sys/dev/an/if_aironet_ieee.h

   1 /*
   2  * Copyright (c) 1997, 1998, 1999
   3  *      Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. All advertising materials mentioning features or use of this software
  14  *    must display the following acknowledgement:
  15  *      This product includes software developed by Bill Paul.
  16  * 4. Neither the name of the author nor the names of any co-contributors
  17  *    may be used to endorse or promote products derived from this software
  18  *    without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  30  * THE POSSIBILITY OF SUCH DAMAGE.
  31  *
  32  * $FreeBSD$
  33  */
  34
  35 #ifndef _IF_AIRONET_IEEE_H
  36 #define _IF_AIRONET_IEEE_H
  37
  38 /*
  39  * This header defines a simple command interface to the FreeBSD
  40  * Aironet driver (an) driver, which is used to set certain
  41  * device-specific parameters which can't be easily managed through
  42  * ifconfig(8). No, sysctl(2) is not the answer. I said a _simple_
  43  * interface, didn't I.
  44  */
  45
  46 #ifndef SIOCSAIRONET
  47 #define SIOCSAIRONET    SIOCSIFGENERIC
  48 #endif
  49
  50 #ifndef SIOCGAIRONET
  51 #define SIOCGAIRONET    SIOCGIFGENERIC
  52 #endif
  53
  54 /*
  55  * This is a make-predend RID value used only by the driver
  56  * to allow the user to set the speed.
  57  */
  58 #define AN_RID_TX_SPEED         0x1234
  59
  60 /*
  61  * Technically I don't think there's a limit to a record
  62  * length. The largest record is the one that contains the CIS
  63  * data, which is 240 words long, so 256 should be a safe
  64  * value.
  65  */
  66 #define AN_MAX_DATALEN  512
  67
  68 struct an_req {
  69         u_int16_t       an_len;
  70         u_int16_t       an_type;
  71         u_int16_t       an_val[AN_MAX_DATALEN];
  72 };
  73
  74 /*
  75  * Private LTV records (interpreted only by the driver). This is
  76  * a minor kludge to allow reading the interface statistics from
  77  * the driver.
  78  */
  79 #define AN_RID_IFACE_STATS      0x0100
  80 #define AN_RID_MGMT_XMIT        0x0200
  81 #ifdef ANCACHE
  82 #define AN_RID_ZERO_CACHE       0x0300
  83 #define AN_RID_READ_CACHE       0x0400
  84 #endif
  85
  86 struct an_80211_hdr {
  87         u_int16_t               frame_ctl;
  88         u_int16_t               dur_id;
  89         u_int8_t                addr1[6];
  90         u_int8_t                addr2[6];
  91         u_int8_t                addr3[6];
  92         u_int16_t               seq_ctl;
  93         u_int8_t                addr4[6];
  94 };
  95
  96 #define AN_FCTL_VERS            0x0002
  97 #define AN_FCTL_FTYPE           0x000C
  98 #define AN_FCTL_STYPE           0x00F0
  99 #define AN_FCTL_TODS            0x0100
 100 #define AN_FCTL_FROMDS          0x0200
 101 #define AN_FCTL_MOREFRAGS       0x0400
 102 #define AN_FCTL_RETRY           0x0800
 103 #define AN_FCTL_PM              0x1000
 104 #define AN_FCTL_MOREDATA        0x2000
 105 #define AN_FCTL_WEP             0x4000
 106 #define AN_FCTL_ORDER           0x8000
 107
 108 #define AN_FTYPE_MGMT           0x0000
 109 #define AN_FTYPE_CTL            0x0004
 110 #define AN_FTYPE_DATA           0x0008
 111
 112 #define AN_STYPE_MGMT_ASREQ     0x0000  /* association request */
 113 #define AN_STYPE_MGMT_ASRESP    0x0010  /* association response */
 114 #define AN_STYPE_MGMT_REASREQ   0x0020  /* reassociation request */
 115 #define AN_STYPE_MGMT_REASRESP  0x0030  /* reassociation response */
 116 #define AN_STYPE_MGMT_PROBEREQ  0x0040  /* probe request */
 117 #define AN_STYPE_MGMT_PROBERESP 0x0050  /* probe response */
 118 #define AN_STYPE_MGMT_BEACON    0x0080  /* beacon */
 119 #define AN_STYPE_MGMT_ATIM      0x0090  /* announcement traffic ind msg */
 120 #define AN_STYPE_MGMT_DISAS     0x00A0  /* disassociation */
 121 #define AN_STYPE_MGMT_AUTH      0x00B0  /* authentication */
 122 #define AN_STYPE_MGMT_DEAUTH    0x00C0  /* deauthentication */
 123
 124 struct an_mgmt_hdr {
 125         u_int16_t               frame_ctl;
 126         u_int16_t               duration;
 127         u_int8_t                dst_addr[6];
 128         u_int8_t                src_addr[6];
 129         u_int8_t                bssid[6];
 130         u_int16_t               seq_ctl;
 131 };
 132
 133 /*
 134  * Aironet IEEE signal strength cache
 135  *
 136  * driver keeps cache of last
 137  * MAXANCACHE packets to arrive including signal strength info.
 138  * daemons may read this via ioctl
 139  *
 140  * Each entry in the wi_sigcache has a unique macsrc.
 141  */
 142 #ifdef ANCACHE
 143 #define MAXANCACHE      10
 144
 145 struct an_sigcache {
 146         char    macsrc[6];      /* unique MAC address for entry */
 147         int     ipsrc;          /* ip address associated with packet */
 148         int     signal;         /* signal strength of the packet */
 149         int     noise;          /* noise value */
 150         int     quality;        /* quality of the packet */
 151 };
 152 #endif
 153
 154 #ifndef _KERNEL
 155 struct an_ltv_stats {
 156         u_int16_t               an_fudge;
 157         u_int16_t               an_len;                 /* 0x00 */
 158         u_int16_t               an_type;                /* 0xXX */
 159         u_int16_t               an_spacer;              /* 0x02 */
 160         u_int32_t               an_rx_overruns;         /* 0x04 */
 161         u_int32_t               an_rx_plcp_csum_errs;   /* 0x08 */
 162         u_int32_t               an_rx_plcp_format_errs; /* 0x0C */
 163         u_int32_t               an_rx_plcp_len_errs;    /* 0x10 */
 164         u_int32_t               an_rx_mac_crc_errs;     /* 0x14 */
 165         u_int32_t               an_rx_mac_crc_ok;       /* 0x18 */
 166         u_int32_t               an_rx_wep_errs;         /* 0x1C */
 167         u_int32_t               an_rx_wep_ok;           /* 0x20 */
 168         u_int32_t               an_retry_long;          /* 0x24 */
 169         u_int32_t               an_retry_short;         /* 0x28 */
 170         u_int32_t               an_retry_max;           /* 0x2C */
 171         u_int32_t               an_no_ack;              /* 0x30 */
 172         u_int32_t               an_no_cts;              /* 0x34 */
 173         u_int32_t               an_rx_ack_ok;           /* 0x38 */
 174         u_int32_t               an_rx_cts_ok;           /* 0x3C */
 175         u_int32_t               an_tx_ack_ok;           /* 0x40 */
 176         u_int32_t               an_tx_rts_ok;           /* 0x44 */
 177         u_int32_t               an_tx_cts_ok;           /* 0x48 */
 178         u_int32_t               an_tx_lmac_mcasts;      /* 0x4C */
 179         u_int32_t               an_tx_lmac_bcasts;      /* 0x50 */
 180         u_int32_t               an_tx_lmac_ucast_frags; /* 0x54 */
 181         u_int32_t               an_tx_lmac_ucasts;      /* 0x58 */
 182         u_int32_t               an_tx_beacons;          /* 0x5C */
 183         u_int32_t               an_rx_beacons;          /* 0x60 */
 184         u_int32_t               an_tx_single_cols;      /* 0x64 */
 185         u_int32_t               an_tx_multi_cols;       /* 0x68 */
 186         u_int32_t               an_tx_defers_no;        /* 0x6C */
 187         u_int32_t               an_tx_defers_prot;      /* 0x70 */
 188         u_int32_t               an_tx_defers_energy;    /* 0x74 */
 189         u_int32_t               an_rx_dups;             /* 0x78 */
 190         u_int32_t               an_rx_partial;          /* 0x7C */
 191         u_int32_t               an_tx_too_old;          /* 0x80 */
 192         u_int32_t               an_rx_too_old;          /* 0x84 */
 193         u_int32_t               an_lostsync_max_retries;/* 0x88 */
 194         u_int32_t               an_lostsync_missed_beacons;/* 0x8C */
 195         u_int32_t               an_lostsync_arl_exceeded;/*0x90 */
 196         u_int32_t               an_lostsync_deauthed;   /* 0x94 */
 197         u_int32_t               an_lostsync_disassociated;/*0x98 */
 198         u_int32_t               an_lostsync_tsf_timing; /* 0x9C */
 199         u_int32_t               an_tx_host_mcasts;      /* 0xA0 */
 200         u_int32_t               an_tx_host_bcasts;      /* 0xA4 */
 201         u_int32_t               an_tx_host_ucasts;      /* 0xA8 */
 202         u_int32_t               an_tx_host_failed;      /* 0xAC */
 203         u_int32_t               an_rx_host_mcasts;      /* 0xB0 */
 204         u_int32_t               an_rx_host_bcasts;      /* 0xB4 */
 205         u_int32_t               an_rx_host_ucasts;      /* 0xB8 */
 206         u_int32_t               an_rx_host_discarded;   /* 0xBC */
 207         u_int32_t               an_tx_hmac_mcasts;      /* 0xC0 */
 208         u_int32_t               an_tx_hmac_bcasts;      /* 0xC4 */
 209         u_int32_t               an_tx_hmac_ucasts;      /* 0xC8 */
 210         u_int32_t               an_tx_hmac_failed;      /* 0xCC */
 211         u_int32_t               an_rx_hmac_mcasts;      /* 0xD0 */
 212         u_int32_t               an_rx_hmac_bcasts;      /* 0xD4 */
 213         u_int32_t               an_rx_hmac_ucasts;      /* 0xD8 */
 214         u_int32_t               an_rx_hmac_discarded;   /* 0xDC */
 215         u_int32_t               an_tx_hmac_accepted;    /* 0xE0 */
 216         u_int32_t               an_ssid_mismatches;     /* 0xE4 */
 217         u_int32_t               an_ap_mismatches;       /* 0xE8 */
 218         u_int32_t               an_rates_mismatches;    /* 0xEC */
 219         u_int32_t               an_auth_rejects;        /* 0xF0 */
 220         u_int32_t               an_auth_timeouts;       /* 0xF4 */
 221         u_int32_t               an_assoc_rejects;       /* 0xF8 */
 222         u_int32_t               an_assoc_timeouts;      /* 0xFC */
 223         u_int32_t               an_reason_outside_table;/* 0x100 */
 224         u_int32_t               an_reason1;             /* 0x104 */
 225         u_int32_t               an_reason2;             /* 0x108 */
 226         u_int32_t               an_reason3;             /* 0x10C */
 227         u_int32_t               an_reason4;             /* 0x110 */
 228         u_int32_t               an_reason5;             /* 0x114 */
 229         u_int32_t               an_reason6;             /* 0x118 */
 230         u_int32_t               an_reason7;             /* 0x11C */
 231         u_int32_t               an_reason8;             /* 0x120 */
 232         u_int32_t               an_reason9;             /* 0x124 */
 233         u_int32_t               an_reason10;            /* 0x128 */
 234         u_int32_t               an_reason11;            /* 0x12C */
 235         u_int32_t               an_reason12;            /* 0x130 */
 236         u_int32_t               an_reason13;            /* 0x134 */
 237         u_int32_t               an_reason14;            /* 0x138 */
 238         u_int32_t               an_reason15;            /* 0x13C */
 239         u_int32_t               an_reason16;            /* 0x140 */
 240         u_int32_t               an_reason17;            /* 0x144 */
 241         u_int32_t               an_reason18;            /* 0x148 */
 242         u_int32_t               an_reason19;            /* 0x14C */
 243         u_int32_t               an_rx_mgmt_pkts;        /* 0x150 */
 244         u_int32_t               an_tx_mgmt_pkts;        /* 0x154 */
 245         u_int32_t               an_rx_refresh_pkts;     /* 0x158 */
 246         u_int32_t               an_tx_refresh_pkts;     /* 0x15C */
 247         u_int32_t               an_rx_poll_pkts;        /* 0x160 */
 248         u_int32_t               an_tx_poll_pkts;        /* 0x164 */
 249         u_int32_t               an_host_retries;        /* 0x168 */
 250         u_int32_t               an_lostsync_hostreq;    /* 0x16C */
 251         u_int32_t               an_host_tx_bytes;       /* 0x170 */
 252         u_int32_t               an_host_rx_bytes;       /* 0x174 */
 253         u_int32_t               an_uptime_usecs;        /* 0x178 */
 254         u_int32_t               an_uptime_secs;         /* 0x17C */
 255         u_int32_t               an_lostsync_better_ap;  /* 0x180 */
 256         u_int32_t               an_rsvd[10];
 257 };
 258
 259 struct an_ltv_genconfig {
 260         /* General configuration. */
 261         u_int16_t               an_len;                 /* 0x00 */
 262         u_int16_t               an_type;                /* XXXX */
 263         u_int16_t               an_opmode;              /* 0x02 */
 264         u_int16_t               an_rxmode;              /* 0x04 */
 265         u_int16_t               an_fragthresh;          /* 0x06 */
 266         u_int16_t               an_rtsthresh;           /* 0x08 */
 267         u_int8_t                an_macaddr[6];          /* 0x0A */
 268         u_int8_t                an_rates[8];            /* 0x10 */
 269         u_int16_t               an_shortretry_limit;    /* 0x18 */
 270         u_int16_t               an_longretry_limit;     /* 0x1A */
 271         u_int16_t               an_tx_msdu_lifetime;    /* 0x1C */
 272         u_int16_t               an_rx_msdu_lifetime;    /* 0x1E */
 273         u_int16_t               an_stationary;          /* 0x20 */
 274         u_int16_t               an_ordering;            /* 0x22 */
 275         u_int16_t               an_devtype;             /* 0x24 */
 276         u_int16_t               an_rsvd0[5];            /* 0x26 */
 277         /* Scanning associating. */
 278         u_int16_t               an_scanmode;            /* 0x30 */
 279         u_int16_t               an_probedelay;          /* 0x32 */
 280         u_int16_t               an_probe_energy_timeout;/* 0x34 */
 281         u_int16_t               an_probe_response_timeout;/*0x36 */
 282         u_int16_t               an_beacon_listen_timeout;/*0x38 */
 283         u_int16_t               an_ibss_join_net_timeout;/*0x3A */
 284         u_int16_t               an_auth_timeout;        /* 0x3C */
 285         u_int16_t               an_authtype;            /* 0x3E */
 286         u_int16_t               an_assoc_timeout;       /* 0x40 */
 287         u_int16_t               an_specified_ap_timeout;/* 0x42 */
 288         u_int16_t               an_offline_scan_interval;/*0x44 */
 289         u_int16_t               an_offline_scan_duration;/*0x46 */
 290         u_int16_t               an_link_loss_delay;     /* 0x48 */
 291         u_int16_t               an_max_beacon_lost_time;/* 0x4A */
 292         u_int16_t               an_refresh_interval;    /* 0x4C */
 293         u_int16_t               an_rsvd1;               /* 0x4E */
 294         /* Power save operation */
 295         u_int16_t               an_psave_mode;          /* 0x50 */
 296         u_int16_t               an_sleep_for_dtims;     /* 0x52 */
 297         u_int16_t               an_listen_interval;     /* 0x54 */
 298         u_int16_t               an_fast_listen_interval;/* 0x56 */
 299         u_int16_t               an_listen_decay;        /* 0x58 */
 300         u_int16_t               an_fast_listen_decay;   /* 0x5A */
 301         u_int16_t               an_rsvd2[2];            /* 0x5C */
 302         /* Ad-hoc (or AP) operation. */
 303         u_int16_t               an_beacon_period;       /* 0x60 */
 304         u_int16_t               an_atim_duration;       /* 0x62 */
 305         u_int16_t               an_rsvd3;               /* 0x64 */
 306         u_int16_t               an_ds_channel;          /* 0x66 */
 307         u_int16_t               an_rsvd4;               /* 0x68 */
 308         u_int16_t               an_dtim_period;         /* 0x6A */
 309         u_int16_t               an_rsvd5[2];            /* 0x6C */
 310         /* Radio operation. */
 311         u_int16_t               an_radiotype;           /* 0x70 */
 312         u_int16_t               an_diversity;           /* 0x72 */
 313         u_int16_t               an_tx_power;            /* 0x74 */
 314         u_int16_t               an_rss_thresh;          /* 0x76 */
 315         u_int16_t               an_rsvd6[4];            /* 0x78 */
 316         /* Aironet extensions. */
 317         u_int8_t                an_nodename[16];        /* 0x80 */
 318         u_int16_t               an_arl_thresh;          /* 0x90 */
 319         u_int16_t               an_arl_decay;           /* 0x92 */
 320         u_int16_t               an_arl_delay;           /* 0x94 */
 321         u_int8_t                an_rsvd7;               /* 0x96 */
 322         u_int8_t                an_rsvd8;               /* 0x97 */
 323         u_int8_t                an_magic_packet_action; /* 0x98 */
 324         u_int8_t                an_magic_packet_ctl;    /* 0x99 */
 325         u_int16_t               an_rsvd9;
 326 };
 327
 328 #define AN_OPMODE_IBSS_ADHOC                    0x0000
 329 #define AN_OPMODE_INFRASTRUCTURE_STATION        0x0001
 330 #define AN_OPMODE_AP                            0x0002
 331 #define AN_OPMODE_AP_REPEATER                   0x0003
 332 #define AN_OPMODE_UNMODIFIED_PAYLOAD            0x0100
 333 #define AN_OPMODE_AIRONET_EXTENSIONS            0x0200
 334 #define AN_OPMODE_AP_EXTENSIONS                 0x0400
 335
 336 #define AN_RXMODE_BC_MC_ADDR                    0x0000
 337 #define AN_RXMODE_BC_ADDR                       0x0001
 338 #define AN_RXMODE_ADDR                          0x0002
 339 #define AN_RXMODE_80211_MONITOR_CURBSS          0x0003
 340 #define AN_RXMODE_80211_MONITOR_ANYBSS          0x0004
 341 #define AN_RXMODE_LAN_MONITOR_CURBSS            0x0005
 342 #define AN_RXMODE_NO_8023_HEADER                0x0100
 343
 344 #define AN_RATE_1MBPS                           0x0002
 345 #define AN_RATE_2MBPS                           0x0004
 346 #define AN_RATE_5_5MBPS                         0x000B
 347 #define AN_RATE_11MBPS                          0x0016
 348
 349 #define AN_DEVTYPE_PC4500                       0x0065
 350 #define AN_DEVTYPE_PC4800                       0x006D
 351
 352 #define AN_SCANMODE_ACTIVE                      0x0000
 353 #define AN_SCANMODE_PASSIVE                     0x0001
 354 #define AN_SCANMODE_AIRONET_ACTIVE              0x0002
 355
 356 #define AN_AUTHTYPE_NONE                        0x0000
 357 #define AN_AUTHTYPE_OPEN                        0x0001
 358 #define AN_AUTHTYPE_SHAREDKEY                   0x0002
 359 #define AN_AUTHTYPE_EXCLUDE_UNENCRYPTED         0x0004
 360
 361 #define AN_PSAVE_NONE                           0x0000
 362 #define AN_PSAVE_CAM                            0x0001
 363 #define AN_PSAVE_PSP                            0x0002
 364 #define AN_PSAVE_PSP_CAM                        0x0003
 365
 366 #define AN_RADIOTYPE_80211_FH                   0x0001
 367 #define AN_RADIOTYPE_80211_DS                   0x0002
 368 #define AN_RADIOTYPE_LM2000_DS                  0x0004
 369
 370 #define AN_DIVERSITY_FACTORY_DEFAULT            0x0000
 371 #define AN_DIVERSITY_ANTENNA_1_ONLY             0x0001
 372 #define AN_DIVERSITY_ANTENNA_2_ONLY             0x0002
 373 #define AN_DIVERSITY_ANTENNA_1_AND_2            0x0003
 374
 375 #define AN_TXPOWER_FACTORY_DEFAULT              0x0000
 376 #define AN_TXPOWER_50MW                         50
 377 #define AN_TXPOWER_100MW                        100
 378 #define AN_TXPOWER_250MW                        250
 379
 380 struct an_ltv_ssidlist {
 381         u_int16_t               an_len;
 382         u_int16_t               an_type;
 383         u_int16_t               an_ssid1_len;
 384         char                    an_ssid1[32];
 385         u_int16_t               an_ssid2_len;
 386         char                    an_ssid2[32];
 387         u_int16_t               an_ssid3_len;
 388         char                    an_ssid3[32];
 389 };
 390
 391 struct an_ltv_aplist {
 392         u_int16_t               an_len;
 393         u_int16_t               an_type;
 394         u_int8_t                an_ap1[8];
 395         u_int8_t                an_ap2[8];
 396         u_int8_t                an_ap3[8];
 397         u_int8_t                an_ap4[8];
 398 };
 399
 400 struct an_ltv_drvname {
 401         u_int16_t               an_len;
 402         u_int16_t               an_type;
 403         u_int8_t                an_drvname[16];
 404 };
 405
 406 struct an_rid_encap {
 407         u_int16_t               an_len;
 408         u_int16_t               an_type;
 409         u_int16_t               an_ethertype_default;
 410         u_int16_t               an_action_default;
 411         u_int16_t               an_ethertype0;
 412         u_int16_t               an_action0;
 413         u_int16_t               an_ethertype1;
 414         u_int16_t               an_action1;
 415         u_int16_t               an_ethertype2;
 416         u_int16_t               an_action2;
 417         u_int16_t               an_ethertype3;
 418         u_int16_t               an_action3;
 419         u_int16_t               an_ethertype4;
 420         u_int16_t               an_action4;
 421         u_int16_t               an_ethertype5;
 422         u_int16_t               an_action5;
 423         u_int16_t               an_ethertype6;
 424         u_int16_t               an_action6;
 425 };
 426
 427 #define AN_ENCAP_ACTION_RX      0x0001
 428 #define AN_ENCAP_ACTION_TX      0x0002
 429
 430 #define AN_RXENCAP_NONE         0x0000
 431 #define AN_RXENCAP_RFC1024      0x0001
 432
 433 #define AN_TXENCAP_RFC1024      0x0000
 434 #define AN_TXENCAP_80211        0x0002
 435
 436 struct an_ltv_caps {
 437         u_int16_t               an_len;                 /* 0x00 */
 438         u_int16_t               an_type;                /* XXXX */
 439         u_int8_t                an_oui[3];              /* 0x02 */
 440         u_int8_t                an_rsvd0;               /* 0x05 */
 441         u_int16_t               an_prodnum;             /* 0x06 */
 442         u_int8_t                an_manufname[32];       /* 0x08 */
 443         u_int8_t                an_prodname[16];        /* 0x28 */
 444         u_int8_t                an_prodvers[8];         /* 0x38 */
 445         u_int8_t                an_oemaddr[6];          /* 0x40 */
 446         u_int8_t                an_aironetaddr[6];      /* 0x46 */
 447         u_int16_t               an_radiotype;           /* 0x4C */
 448         u_int16_t               an_regdomain;           /* 0x4E */
 449         u_int8_t                an_callid[6];           /* 0x50 */
 450         u_int8_t                an_rates[8];            /* 0x56 */
 451         u_int8_t                an_rx_diversity;        /* 0x5E */
 452         u_int8_t                an_tx_diversity;        /* 0x5F */
 453         u_int16_t               an_tx_powerlevels[8];   /* 0x60 */
 454         u_int16_t               an_hwrev;               /* 0x70 */
 455         u_int16_t               an_hwcaps;              /* 0x72 */
 456         u_int16_t               an_temprange;           /* 0x74 */
 457         u_int16_t               an_fwrev;               /* 0x76 */
 458         u_int16_t               an_fwsubrev;            /* 0x78 */
 459         u_int16_t               an_ifacerev;            /* 0x7A */
 460         u_int16_t               an_softcaps;            /* 0x7C */
 461         u_int16_t               an_bootblockrev;        /* 0x7E */
 462 };
 463
 464 struct an_ltv_apinfo {
 465         u_int16_t               an_len;
 466         u_int16_t               an_type;
 467         u_int16_t               an_tim_addr;
 468         u_int16_t               an_airo_addr;
 469 };
 470
 471 struct an_ltv_radioinfo {
 472         u_int16_t               an_len;
 473         u_int16_t               an_type;
 474         /* ??? */
 475 };
 476
 477 struct an_ltv_status {
 478         u_int16_t               an_len;                 /* 0x00 */
 479         u_int16_t               an_type;                /* 0xXX */
 480         u_int8_t                an_macaddr[6];          /* 0x02 */
 481         u_int16_t               an_opmode;              /* 0x08 */
 482         u_int16_t               an_errcode;             /* 0x0A */
 483         u_int16_t               an_cur_signal_quality;  /* 0x0C */
 484         u_int16_t               an_ssidlen;             /* 0x0E */
 485         u_int8_t                an_ssid[32];            /* 0x10 */
 486         u_int8_t                an_ap_name[16];         /* 0x30 */
 487         u_int8_t                an_cur_bssid[6];        /* 0x40 */
 488         u_int8_t                an_prev_bssid1[6];      /* 0x46 */
 489         u_int8_t                an_prev_bssid2[6];      /* 0x4C */
 490         u_int8_t                an_prev_bssid3[6];      /* 0x52 */
 491         u_int16_t               an_beacon_period;       /* 0x58 */
 492         u_int16_t               an_dtim_period;         /* 0x5A */
 493         u_int16_t               an_atim_duration;       /* 0x5C */
 494         u_int16_t               an_hop_period;          /* 0x5E */
 495         u_int16_t               an_cur_channel;         /* 0x62 */
 496         u_int16_t               an_channel_set;         /* 0x60 */
 497         u_int16_t               an_hops_to_backbone;    /* 0x64 */
 498         u_int16_t               an_ap_total_load;       /* 0x66 */
 499         u_int16_t               an_our_generated_load;  /* 0x68 */
 500         u_int16_t               an_accumulated_arl;     /* 0x6A */
 501         u_int16_t               an_rsvd0;               /* 0x6C */
 502 };
 503
 504 #define AN_STATUS_OPMODE_CONFIGURED             0x0001
 505 #define AN_STATUS_OPMODE_MAC_ENABLED            0x0002
 506 #define AN_STATUS_OPMODE_RX_ENABLED             0x0004
 507 #define AN_STATUS_OPMODE_IN_SYNC                0x0010
 508 #define AN_STATUS_OPMODE_ASSOCIATED             0x0020
 509 #define AN_STATUS_OPMODE_ERROR                  0x8000
 510
 511
 512 /*
 513  * These are all the LTV record types that we can read or write
 514  * from the Aironet. Not all of them are temendously useful, but I
 515  * list as many as I know about here for completeness.
 516  */
 517
 518 /*
 519  * Configuration (read/write)
 520  */
 521 #define AN_RID_GENCONFIG        0xFF10  /* General configuration info */
 522 #define AN_RID_SSIDLIST         0xFF11  /* Valid SSID list */
 523 #define AN_RID_APLIST           0xFF12  /* Valid AP list */
 524 #define AN_RID_DRVNAME          0xFF13  /* ID name of this node for diag */
 525 #define AN_RID_ENCAPPROTO       0xFF14  /* Payload encapsulation type */
 526 #define AN_RID_ACTUALCFG        0xFF20  /* Current configuration settings */
 527
 528 /*
 529  * Reporting (read only)
 530  */
 531 #define AN_RID_CAPABILITIES     0xFF00  /* PC 4500/4800 capabilities */
 532 #define AN_RID_AP_INFO          0xFF01  /* Access point info */
 533 #define AN_RID_RADIO_INFO       0xFF02  /* Radio info */
 534 #define AN_RID_STATUS           0xFF50  /* Current status info */
 535
 536 /*
 537  * Statistics
 538  */
 539 #define AN_RID_16BITS_CUM       0xFF60  /* Cumulative 16-bit stats counters */
 540 #define AN_RID_16BITS_DELTA     0xFF61  /* 16-bit stats (since last clear) */
 541 #define AN_RID_16BITS_DELTACLR  0xFF62  /* 16-bit stats, clear on read */
 542 #define AN_RID_32BITS_CUM       0xFF68  /* Cumulative 32-bit stats counters */
 543 #define AN_RID_32BITS_DELTA     0xFF69  /* 32-bit stats (since last clear) */
 544 #define AN_RID_32BITS_DELTACLR  0xFF6A  /* 32-bit stats, clear on read */
 545 #endif
 546
 547
 548 #endif