2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/endian.h>
36 #include <sys/ctype.h>
40 #include <sys/malloc.h>
41 #include <sys/sysctl.h>
43 #include <sys/taskqueue.h>
45 #include <machine/stdarg.h>
46 #include <machine/resource.h>
47 #include <machine/bus.h>
49 #include <dev/ata/ata-all.h>
50 #include <dev/pci/pcivar.h>
54 #include <cam/cam_ccb.h>
55 #include <cam/cam_sim.h>
56 #include <cam/cam_xpt_sim.h>
57 #include <cam/cam_debug.h>
60 static void ataaction(struct cam_sim *sim, union ccb *ccb);
61 static void atapoll(struct cam_sim *sim);
62 static void ata_cam_begin_transaction(device_t dev, union ccb *ccb);
63 static void ata_cam_end_transaction(device_t dev, struct ata_request *request);
64 static void ata_cam_request_sense(device_t dev, struct ata_request *request);
65 static int ata_check_ids(device_t dev, union ccb *ccb);
66 static void ata_conn_event(void *context, int dummy);
67 static void ata_interrupt_locked(void *data);
68 static int ata_module_event_handler(module_t mod, int what, void *arg);
69 static void ata_periodic_poll(void *data);
70 static int ata_str2mode(const char *str);
73 MALLOC_DEFINE(M_ATA, "ata_generic", "ATA driver generic layer");
74 int (*ata_raid_ioctl_func)(u_long cmd, caddr_t data) = NULL;
75 devclass_t ata_devclass;
76 int ata_dma_check_80pin = 1;
79 static SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters");
80 SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma_check_80pin,
81 CTLFLAG_RWTUN, &ata_dma_check_80pin, 0,
82 "Check for 80pin cable before setting ATA DMA mode");
83 FEATURE(ata_cam, "ATA devices are accessed through the cam(4) driver");
86 * newbus device interface related functions
89 ata_probe(device_t dev)
91 return (BUS_PROBE_LOW_PRIORITY);
95 ata_attach(device_t dev)
97 struct ata_channel *ch = device_get_softc(dev);
99 struct cam_devq *devq;
104 /* check that we have a virgin channel to attach */
108 /* initialize the softc basics */
110 ch->state = ATA_IDLE;
111 bzero(&ch->state_mtx, sizeof(struct mtx));
112 mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF);
113 TASK_INIT(&ch->conntask, 0, ata_conn_event, dev);
114 for (i = 0; i < 16; i++) {
115 ch->user[i].revision = 0;
116 snprintf(buf, sizeof(buf), "dev%d.sata_rev", i);
117 if (resource_int_value(device_get_name(dev),
118 device_get_unit(dev), buf, &mode) != 0 &&
119 resource_int_value(device_get_name(dev),
120 device_get_unit(dev), "sata_rev", &mode) != 0)
123 ch->user[i].revision = mode;
124 ch->user[i].mode = 0;
125 snprintf(buf, sizeof(buf), "dev%d.mode", i);
126 if (resource_string_value(device_get_name(dev),
127 device_get_unit(dev), buf, &res) == 0)
128 mode = ata_str2mode(res);
129 else if (resource_string_value(device_get_name(dev),
130 device_get_unit(dev), "mode", &res) == 0)
131 mode = ata_str2mode(res);
135 ch->user[i].mode = mode;
136 if (ch->flags & ATA_SATA)
137 ch->user[i].bytecount = 8192;
139 ch->user[i].bytecount = MAXPHYS;
140 ch->user[i].caps = 0;
141 ch->curr[i] = ch->user[i];
142 if (ch->flags & ATA_SATA) {
143 if (ch->pm_level > 0)
144 ch->user[i].caps |= CTS_SATA_CAPS_H_PMREQ;
145 if (ch->pm_level > 1)
146 ch->user[i].caps |= CTS_SATA_CAPS_D_PMREQ;
148 if (!(ch->flags & ATA_NO_48BIT_DMA))
149 ch->user[i].caps |= CTS_ATA_CAPS_H_DMA48;
152 callout_init(&ch->poll_callout, 1);
154 /* allocate DMA resources if DMA HW present*/
158 /* setup interrupt delivery */
160 ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
161 RF_SHAREABLE | RF_ACTIVE);
163 device_printf(dev, "unable to allocate interrupt\n");
166 if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL,
167 ata_interrupt, ch, &ch->ih))) {
168 bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq);
169 device_printf(dev, "unable to setup interrupt\n");
173 if (ch->flags & ATA_PERIODIC_POLL)
174 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
175 mtx_lock(&ch->state_mtx);
176 /* Create the device queue for our SIM. */
177 devq = cam_simq_alloc(1);
179 device_printf(dev, "Unable to allocate simq\n");
183 /* Construct SIM entry */
184 ch->sim = cam_sim_alloc(ataaction, atapoll, "ata", ch,
185 device_get_unit(dev), &ch->state_mtx, 1, 0, devq);
186 if (ch->sim == NULL) {
187 device_printf(dev, "unable to allocate sim\n");
192 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) {
193 device_printf(dev, "unable to register xpt bus\n");
197 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim),
198 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
199 device_printf(dev, "unable to create path\n");
203 mtx_unlock(&ch->state_mtx);
207 xpt_bus_deregister(cam_sim_path(ch->sim));
209 cam_sim_free(ch->sim, /*free_devq*/TRUE);
212 bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq);
213 mtx_unlock(&ch->state_mtx);
214 if (ch->flags & ATA_PERIODIC_POLL)
215 callout_drain(&ch->poll_callout);
220 ata_detach(device_t dev)
222 struct ata_channel *ch = device_get_softc(dev);
224 /* check that we have a valid channel to detach */
228 /* grap the channel lock so no new requests gets launched */
229 mtx_lock(&ch->state_mtx);
230 ch->state |= ATA_STALL_QUEUE;
231 mtx_unlock(&ch->state_mtx);
232 if (ch->flags & ATA_PERIODIC_POLL)
233 callout_drain(&ch->poll_callout);
235 taskqueue_drain(taskqueue_thread, &ch->conntask);
237 mtx_lock(&ch->state_mtx);
238 xpt_async(AC_LOST_DEVICE, ch->path, NULL);
239 xpt_free_path(ch->path);
240 xpt_bus_deregister(cam_sim_path(ch->sim));
241 cam_sim_free(ch->sim, /*free_devq*/TRUE);
243 mtx_unlock(&ch->state_mtx);
245 /* release resources */
246 bus_teardown_intr(dev, ch->r_irq, ch->ih);
247 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq);
250 /* free DMA resources if DMA HW present*/
254 mtx_destroy(&ch->state_mtx);
259 ata_conn_event(void *context, int dummy)
261 device_t dev = (device_t)context;
262 struct ata_channel *ch = device_get_softc(dev);
265 mtx_lock(&ch->state_mtx);
266 if (ch->sim == NULL) {
267 mtx_unlock(&ch->state_mtx);
271 if ((ccb = xpt_alloc_ccb_nowait()) == NULL)
273 if (xpt_create_path(&ccb->ccb_h.path, NULL,
274 cam_sim_path(ch->sim),
275 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
280 mtx_unlock(&ch->state_mtx);
284 ata_reinit(device_t dev)
286 struct ata_channel *ch = device_get_softc(dev);
287 struct ata_request *request;
289 xpt_freeze_simq(ch->sim, 1);
290 if ((request = ch->running)) {
292 if (ch->state == ATA_ACTIVE)
293 ch->state = ATA_IDLE;
294 callout_stop(&request->callout);
296 ch->dma.unload(request);
297 request->result = ERESTART;
298 ata_cam_end_transaction(dev, request);
300 /* reset the controller HW, the channel and device(s) */
302 /* Tell the XPT about the event */
303 xpt_async(AC_BUS_RESET, ch->path, NULL);
304 xpt_release_simq(ch->sim, TRUE);
309 ata_suspend(device_t dev)
311 struct ata_channel *ch;
313 /* check for valid device */
314 if (!dev || !(ch = device_get_softc(dev)))
317 if (ch->flags & ATA_PERIODIC_POLL)
318 callout_drain(&ch->poll_callout);
319 mtx_lock(&ch->state_mtx);
320 xpt_freeze_simq(ch->sim, 1);
321 while (ch->state != ATA_IDLE)
322 msleep(ch, &ch->state_mtx, PRIBIO, "atasusp", hz/100);
323 mtx_unlock(&ch->state_mtx);
328 ata_resume(device_t dev)
330 struct ata_channel *ch;
333 /* check for valid device */
334 if (!dev || !(ch = device_get_softc(dev)))
337 mtx_lock(&ch->state_mtx);
338 error = ata_reinit(dev);
339 xpt_release_simq(ch->sim, TRUE);
340 mtx_unlock(&ch->state_mtx);
341 if (ch->flags & ATA_PERIODIC_POLL)
342 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
347 ata_interrupt(void *data)
349 struct ata_channel *ch = (struct ata_channel *)data;
351 mtx_lock(&ch->state_mtx);
352 ata_interrupt_locked(data);
353 mtx_unlock(&ch->state_mtx);
357 ata_interrupt_locked(void *data)
359 struct ata_channel *ch = (struct ata_channel *)data;
360 struct ata_request *request;
362 /* ignore interrupt if its not for us */
363 if (ch->hw.status && !ch->hw.status(ch->dev))
366 /* do we have a running request */
367 if (!(request = ch->running))
370 ATA_DEBUG_RQ(request, "interrupt");
372 /* safetycheck for the right state */
373 if (ch->state == ATA_IDLE) {
374 device_printf(request->dev, "interrupt on idle channel ignored\n");
379 * we have the HW locks, so end the transaction for this request
380 * if it finishes immediately otherwise wait for next interrupt
382 if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) {
384 if (ch->state == ATA_ACTIVE)
385 ch->state = ATA_IDLE;
386 ata_cam_end_transaction(ch->dev, request);
392 ata_periodic_poll(void *data)
394 struct ata_channel *ch = (struct ata_channel *)data;
396 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
401 ata_print_cable(device_t dev, u_int8_t *who)
404 "DMA limited to UDMA33, %s found non-ATA66 cable\n", who);
408 * misc support functions
411 ata_default_registers(device_t dev)
413 struct ata_channel *ch = device_get_softc(dev);
415 /* fill in the defaults from whats setup already */
416 ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res;
417 ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset;
418 ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res;
419 ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset;
420 ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res;
421 ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset;
422 ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res;
423 ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset;
427 ata_udelay(int interval)
429 /* for now just use DELAY, the timer/sleep subsytems are not there yet */
430 if (1 || interval < (1000000/hz) || ata_delayed_attach)
433 pause("ataslp", interval/(1000000/hz));
437 ata_cmd2str(struct ata_request *request)
439 static char buffer[20];
441 if (request->flags & ATA_R_ATAPI) {
442 switch (request->u.atapi.sense.key ?
443 request->u.atapi.saved_cmd : request->u.atapi.ccb[0]) {
444 case 0x00: return ("TEST_UNIT_READY");
445 case 0x01: return ("REZERO");
446 case 0x03: return ("REQUEST_SENSE");
447 case 0x04: return ("FORMAT");
448 case 0x08: return ("READ");
449 case 0x0a: return ("WRITE");
450 case 0x10: return ("WEOF");
451 case 0x11: return ("SPACE");
452 case 0x12: return ("INQUIRY");
453 case 0x15: return ("MODE_SELECT");
454 case 0x19: return ("ERASE");
455 case 0x1a: return ("MODE_SENSE");
456 case 0x1b: return ("START_STOP");
457 case 0x1e: return ("PREVENT_ALLOW");
458 case 0x23: return ("ATAPI_READ_FORMAT_CAPACITIES");
459 case 0x25: return ("READ_CAPACITY");
460 case 0x28: return ("READ_BIG");
461 case 0x2a: return ("WRITE_BIG");
462 case 0x2b: return ("LOCATE");
463 case 0x34: return ("READ_POSITION");
464 case 0x35: return ("SYNCHRONIZE_CACHE");
465 case 0x3b: return ("WRITE_BUFFER");
466 case 0x3c: return ("READ_BUFFER");
467 case 0x42: return ("READ_SUBCHANNEL");
468 case 0x43: return ("READ_TOC");
469 case 0x45: return ("PLAY_10");
470 case 0x47: return ("PLAY_MSF");
471 case 0x48: return ("PLAY_TRACK");
472 case 0x4b: return ("PAUSE");
473 case 0x51: return ("READ_DISK_INFO");
474 case 0x52: return ("READ_TRACK_INFO");
475 case 0x53: return ("RESERVE_TRACK");
476 case 0x54: return ("SEND_OPC_INFO");
477 case 0x55: return ("MODE_SELECT_BIG");
478 case 0x58: return ("REPAIR_TRACK");
479 case 0x59: return ("READ_MASTER_CUE");
480 case 0x5a: return ("MODE_SENSE_BIG");
481 case 0x5b: return ("CLOSE_TRACK/SESSION");
482 case 0x5c: return ("READ_BUFFER_CAPACITY");
483 case 0x5d: return ("SEND_CUE_SHEET");
484 case 0x96: return ("SERVICE_ACTION_IN");
485 case 0xa1: return ("BLANK_CMD");
486 case 0xa3: return ("SEND_KEY");
487 case 0xa4: return ("REPORT_KEY");
488 case 0xa5: return ("PLAY_12");
489 case 0xa6: return ("LOAD_UNLOAD");
490 case 0xad: return ("READ_DVD_STRUCTURE");
491 case 0xb4: return ("PLAY_CD");
492 case 0xbb: return ("SET_SPEED");
493 case 0xbd: return ("MECH_STATUS");
494 case 0xbe: return ("READ_CD");
495 case 0xff: return ("POLL_DSC");
498 switch (request->u.ata.command) {
500 switch (request->u.ata.feature) {
501 case 0x00: return ("NOP FLUSHQUEUE");
502 case 0x01: return ("NOP AUTOPOLL");
505 case 0x03: return ("CFA_REQUEST_EXTENDED_ERROR");
507 switch (request->u.ata.feature) {
508 case 0x01: return ("DSM TRIM");
511 case 0x08: return ("DEVICE_RESET");
512 case 0x20: return ("READ");
513 case 0x24: return ("READ48");
514 case 0x25: return ("READ_DMA48");
515 case 0x26: return ("READ_DMA_QUEUED48");
516 case 0x27: return ("READ_NATIVE_MAX_ADDRESS48");
517 case 0x29: return ("READ_MUL48");
518 case 0x2a: return ("READ_STREAM_DMA48");
519 case 0x2b: return ("READ_STREAM48");
520 case 0x2f: return ("READ_LOG_EXT");
521 case 0x30: return ("WRITE");
522 case 0x34: return ("WRITE48");
523 case 0x35: return ("WRITE_DMA48");
524 case 0x36: return ("WRITE_DMA_QUEUED48");
525 case 0x37: return ("SET_MAX_ADDRESS48");
526 case 0x39: return ("WRITE_MUL48");
527 case 0x3a: return ("WRITE_STREAM_DMA48");
528 case 0x3b: return ("WRITE_STREAM48");
529 case 0x3d: return ("WRITE_DMA_FUA48");
530 case 0x3e: return ("WRITE_DMA_QUEUED_FUA48");
531 case 0x3f: return ("WRITE_LOG_EXT");
532 case 0x40: return ("READ_VERIFY");
533 case 0x42: return ("READ_VERIFY48");
535 switch (request->u.ata.feature) {
536 case 0x55: return ("WRITE_UNCORRECTABLE48 PSEUDO");
537 case 0xaa: return ("WRITE_UNCORRECTABLE48 FLAGGED");
539 return "WRITE_UNCORRECTABLE48";
540 case 0x51: return ("CONFIGURE_STREAM");
541 case 0x60: return ("READ_FPDMA_QUEUED");
542 case 0x61: return ("WRITE_FPDMA_QUEUED");
543 case 0x63: return ("NCQ_NON_DATA");
544 case 0x64: return ("SEND_FPDMA_QUEUED");
545 case 0x65: return ("RECEIVE_FPDMA_QUEUED");
547 if (request->u.ata.feature == 0xec)
548 return ("SEP_ATTN IDENTIFY");
549 switch (request->u.ata.lba) {
550 case 0x00: return ("SEP_ATTN READ BUFFER");
551 case 0x02: return ("SEP_ATTN RECEIVE DIAGNOSTIC RESULTS");
552 case 0x80: return ("SEP_ATTN WRITE BUFFER");
553 case 0x82: return ("SEP_ATTN SEND DIAGNOSTIC");
556 case 0x70: return ("SEEK");
557 case 0x87: return ("CFA_TRANSLATE_SECTOR");
558 case 0x90: return ("EXECUTE_DEVICE_DIAGNOSTIC");
559 case 0x92: return ("DOWNLOAD_MICROCODE");
560 case 0xa0: return ("PACKET");
561 case 0xa1: return ("ATAPI_IDENTIFY");
562 case 0xa2: return ("SERVICE");
564 switch(request->u.ata.feature) {
565 case 0xd0: return ("SMART READ ATTR VALUES");
566 case 0xd1: return ("SMART READ ATTR THRESHOLDS");
567 case 0xd3: return ("SMART SAVE ATTR VALUES");
568 case 0xd4: return ("SMART EXECUTE OFFLINE IMMEDIATE");
569 case 0xd5: return ("SMART READ LOG DATA");
570 case 0xd8: return ("SMART ENABLE OPERATION");
571 case 0xd9: return ("SMART DISABLE OPERATION");
572 case 0xda: return ("SMART RETURN STATUS");
575 case 0xb1: return ("DEVICE CONFIGURATION");
576 case 0xc0: return ("CFA_ERASE");
577 case 0xc4: return ("READ_MUL");
578 case 0xc5: return ("WRITE_MUL");
579 case 0xc6: return ("SET_MULTI");
580 case 0xc7: return ("READ_DMA_QUEUED");
581 case 0xc8: return ("READ_DMA");
582 case 0xca: return ("WRITE_DMA");
583 case 0xcc: return ("WRITE_DMA_QUEUED");
584 case 0xcd: return ("CFA_WRITE_MULTIPLE_WITHOUT_ERASE");
585 case 0xce: return ("WRITE_MUL_FUA48");
586 case 0xd1: return ("CHECK_MEDIA_CARD_TYPE");
587 case 0xda: return ("GET_MEDIA_STATUS");
588 case 0xde: return ("MEDIA_LOCK");
589 case 0xdf: return ("MEDIA_UNLOCK");
590 case 0xe0: return ("STANDBY_IMMEDIATE");
591 case 0xe1: return ("IDLE_IMMEDIATE");
592 case 0xe2: return ("STANDBY");
593 case 0xe3: return ("IDLE");
594 case 0xe4: return ("READ_BUFFER/PM");
595 case 0xe5: return ("CHECK_POWER_MODE");
596 case 0xe6: return ("SLEEP");
597 case 0xe7: return ("FLUSHCACHE");
598 case 0xe8: return ("WRITE_PM");
599 case 0xea: return ("FLUSHCACHE48");
600 case 0xec: return ("ATA_IDENTIFY");
601 case 0xed: return ("MEDIA_EJECT");
603 switch (request->u.ata.feature) {
604 case 0x03: return ("SETFEATURES SET TRANSFER MODE");
605 case 0x02: return ("SETFEATURES ENABLE WCACHE");
606 case 0x82: return ("SETFEATURES DISABLE WCACHE");
607 case 0x06: return ("SETFEATURES ENABLE PUIS");
608 case 0x86: return ("SETFEATURES DISABLE PUIS");
609 case 0x07: return ("SETFEATURES SPIN-UP");
610 case 0x10: return ("SETFEATURES ENABLE SATA FEATURE");
611 case 0x90: return ("SETFEATURES DISABLE SATA FEATURE");
612 case 0xaa: return ("SETFEATURES ENABLE RCACHE");
613 case 0x55: return ("SETFEATURES DISABLE RCACHE");
614 case 0x5d: return ("SETFEATURES ENABLE RELIRQ");
615 case 0xdd: return ("SETFEATURES DISABLE RELIRQ");
616 case 0x5e: return ("SETFEATURES ENABLE SRVIRQ");
617 case 0xde: return ("SETFEATURES DISABLE SRVIRQ");
619 return "SETFEATURES";
620 case 0xf1: return ("SECURITY_SET_PASSWORD");
621 case 0xf2: return ("SECURITY_UNLOCK");
622 case 0xf3: return ("SECURITY_ERASE_PREPARE");
623 case 0xf4: return ("SECURITY_ERASE_UNIT");
624 case 0xf5: return ("SECURITY_FREEZE_LOCK");
625 case 0xf6: return ("SECURITY_DISABLE_PASSWORD");
626 case 0xf8: return ("READ_NATIVE_MAX_ADDRESS");
627 case 0xf9: return ("SET_MAX_ADDRESS");
630 sprintf(buffer, "unknown CMD (0x%02x)", request->u.ata.command);
635 ata_mode2str(int mode)
638 case -1: return "UNSUPPORTED";
639 case ATA_PIO0: return "PIO0";
640 case ATA_PIO1: return "PIO1";
641 case ATA_PIO2: return "PIO2";
642 case ATA_PIO3: return "PIO3";
643 case ATA_PIO4: return "PIO4";
644 case ATA_WDMA0: return "WDMA0";
645 case ATA_WDMA1: return "WDMA1";
646 case ATA_WDMA2: return "WDMA2";
647 case ATA_UDMA0: return "UDMA16";
648 case ATA_UDMA1: return "UDMA25";
649 case ATA_UDMA2: return "UDMA33";
650 case ATA_UDMA3: return "UDMA40";
651 case ATA_UDMA4: return "UDMA66";
652 case ATA_UDMA5: return "UDMA100";
653 case ATA_UDMA6: return "UDMA133";
654 case ATA_SA150: return "SATA150";
655 case ATA_SA300: return "SATA300";
656 case ATA_SA600: return "SATA600";
658 if (mode & ATA_DMA_MASK)
666 ata_str2mode(const char *str)
669 if (!strcasecmp(str, "PIO0")) return (ATA_PIO0);
670 if (!strcasecmp(str, "PIO1")) return (ATA_PIO1);
671 if (!strcasecmp(str, "PIO2")) return (ATA_PIO2);
672 if (!strcasecmp(str, "PIO3")) return (ATA_PIO3);
673 if (!strcasecmp(str, "PIO4")) return (ATA_PIO4);
674 if (!strcasecmp(str, "WDMA0")) return (ATA_WDMA0);
675 if (!strcasecmp(str, "WDMA1")) return (ATA_WDMA1);
676 if (!strcasecmp(str, "WDMA2")) return (ATA_WDMA2);
677 if (!strcasecmp(str, "UDMA0")) return (ATA_UDMA0);
678 if (!strcasecmp(str, "UDMA16")) return (ATA_UDMA0);
679 if (!strcasecmp(str, "UDMA1")) return (ATA_UDMA1);
680 if (!strcasecmp(str, "UDMA25")) return (ATA_UDMA1);
681 if (!strcasecmp(str, "UDMA2")) return (ATA_UDMA2);
682 if (!strcasecmp(str, "UDMA33")) return (ATA_UDMA2);
683 if (!strcasecmp(str, "UDMA3")) return (ATA_UDMA3);
684 if (!strcasecmp(str, "UDMA44")) return (ATA_UDMA3);
685 if (!strcasecmp(str, "UDMA4")) return (ATA_UDMA4);
686 if (!strcasecmp(str, "UDMA66")) return (ATA_UDMA4);
687 if (!strcasecmp(str, "UDMA5")) return (ATA_UDMA5);
688 if (!strcasecmp(str, "UDMA100")) return (ATA_UDMA5);
689 if (!strcasecmp(str, "UDMA6")) return (ATA_UDMA6);
690 if (!strcasecmp(str, "UDMA133")) return (ATA_UDMA6);
695 ata_atapi(device_t dev, int target)
697 struct ata_channel *ch = device_get_softc(dev);
699 return (ch->devices & (ATA_ATAPI_MASTER << target));
703 ata_timeout(struct ata_request *request)
705 struct ata_channel *ch;
707 ch = device_get_softc(request->parent);
708 //request->flags |= ATA_R_DEBUG;
709 ATA_DEBUG_RQ(request, "timeout");
712 * If we have an ATA_ACTIVE request running, we flag the request
713 * ATA_R_TIMEOUT so ata_cam_end_transaction() will handle it correctly.
714 * Also, NULL out the running request so we wont loose the race with
715 * an eventual interrupt arriving late.
717 if (ch->state == ATA_ACTIVE) {
718 request->flags |= ATA_R_TIMEOUT;
720 ch->dma.unload(request);
722 ch->state = ATA_IDLE;
723 ata_cam_end_transaction(ch->dev, request);
725 mtx_unlock(&ch->state_mtx);
729 ata_cam_begin_transaction(device_t dev, union ccb *ccb)
731 struct ata_channel *ch = device_get_softc(dev);
732 struct ata_request *request;
734 request = &ch->request;
735 bzero(request, sizeof(*request));
739 request->parent = dev;
740 request->unit = ccb->ccb_h.target_id;
741 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
742 request->data = ccb->ataio.data_ptr;
743 request->bytecount = ccb->ataio.dxfer_len;
744 request->u.ata.command = ccb->ataio.cmd.command;
745 request->u.ata.feature = ((uint16_t)ccb->ataio.cmd.features_exp << 8) |
746 (uint16_t)ccb->ataio.cmd.features;
747 request->u.ata.count = ((uint16_t)ccb->ataio.cmd.sector_count_exp << 8) |
748 (uint16_t)ccb->ataio.cmd.sector_count;
749 if (ccb->ataio.cmd.flags & CAM_ATAIO_48BIT) {
750 request->flags |= ATA_R_48BIT;
752 ((uint64_t)ccb->ataio.cmd.lba_high_exp << 40) |
753 ((uint64_t)ccb->ataio.cmd.lba_mid_exp << 32) |
754 ((uint64_t)ccb->ataio.cmd.lba_low_exp << 24);
757 ((uint64_t)(ccb->ataio.cmd.device & 0x0f) << 24);
759 request->u.ata.lba |= ((uint64_t)ccb->ataio.cmd.lba_high << 16) |
760 ((uint64_t)ccb->ataio.cmd.lba_mid << 8) |
761 (uint64_t)ccb->ataio.cmd.lba_low;
762 if (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)
763 request->flags |= ATA_R_NEEDRESULT;
764 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE &&
765 ccb->ataio.cmd.flags & CAM_ATAIO_DMA)
766 request->flags |= ATA_R_DMA;
767 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
768 request->flags |= ATA_R_READ;
769 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
770 request->flags |= ATA_R_WRITE;
771 if (ccb->ataio.cmd.command == ATA_READ_MUL ||
772 ccb->ataio.cmd.command == ATA_READ_MUL48 ||
773 ccb->ataio.cmd.command == ATA_WRITE_MUL ||
774 ccb->ataio.cmd.command == ATA_WRITE_MUL48) {
775 request->transfersize = min(request->bytecount,
776 ch->curr[ccb->ccb_h.target_id].bytecount);
778 request->transfersize = min(request->bytecount, 512);
780 request->data = ccb->csio.data_ptr;
781 request->bytecount = ccb->csio.dxfer_len;
782 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
783 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes,
784 request->u.atapi.ccb, ccb->csio.cdb_len);
785 request->flags |= ATA_R_ATAPI;
786 if (ch->curr[ccb->ccb_h.target_id].atapi == 16)
787 request->flags |= ATA_R_ATAPI16;
788 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE &&
789 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA)
790 request->flags |= ATA_R_DMA;
791 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
792 request->flags |= ATA_R_READ;
793 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
794 request->flags |= ATA_R_WRITE;
795 request->transfersize = min(request->bytecount,
796 ch->curr[ccb->ccb_h.target_id].bytecount);
798 request->retries = 0;
799 request->timeout = (ccb->ccb_h.timeout + 999) / 1000;
800 callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED);
802 request->flags |= ATA_R_DATA_IN_CCB;
804 ch->running = request;
805 ch->state = ATA_ACTIVE;
806 if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {
808 ch->state = ATA_IDLE;
809 ata_cam_end_transaction(dev, request);
815 ata_cam_request_sense(device_t dev, struct ata_request *request)
817 struct ata_channel *ch = device_get_softc(dev);
818 union ccb *ccb = request->ccb;
820 ch->requestsense = 1;
822 bzero(request, sizeof(*request));
824 request->parent = dev;
825 request->unit = ccb->ccb_h.target_id;
826 request->data = (void *)&ccb->csio.sense_data;
827 request->bytecount = ccb->csio.sense_len;
828 request->u.atapi.ccb[0] = ATAPI_REQUEST_SENSE;
829 request->u.atapi.ccb[4] = ccb->csio.sense_len;
830 request->flags |= ATA_R_ATAPI;
831 if (ch->curr[ccb->ccb_h.target_id].atapi == 16)
832 request->flags |= ATA_R_ATAPI16;
833 if (ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA)
834 request->flags |= ATA_R_DMA;
835 request->flags |= ATA_R_READ;
836 request->transfersize = min(request->bytecount,
837 ch->curr[ccb->ccb_h.target_id].bytecount);
838 request->retries = 0;
839 request->timeout = (ccb->ccb_h.timeout + 999) / 1000;
840 callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED);
843 ch->running = request;
844 ch->state = ATA_ACTIVE;
845 if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {
847 ch->state = ATA_IDLE;
848 ata_cam_end_transaction(dev, request);
854 ata_cam_process_sense(device_t dev, struct ata_request *request)
856 struct ata_channel *ch = device_get_softc(dev);
857 union ccb *ccb = request->ccb;
860 ch->requestsense = 0;
862 if (request->flags & ATA_R_TIMEOUT)
864 if ((request->flags & ATA_R_TIMEOUT) == 0 &&
865 (request->status & ATA_S_ERROR) == 0 &&
866 request->result == 0) {
867 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
869 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
870 ccb->ccb_h.status |= CAM_AUTOSENSE_FAIL;
874 /* Do error recovery if needed. */
880 ata_cam_end_transaction(device_t dev, struct ata_request *request)
882 struct ata_channel *ch = device_get_softc(dev);
883 union ccb *ccb = request->ccb;
886 if (ch->requestsense) {
887 ata_cam_process_sense(dev, request);
891 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
892 if (request->flags & ATA_R_TIMEOUT) {
893 xpt_freeze_simq(ch->sim, 1);
894 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
895 ccb->ccb_h.status |= CAM_CMD_TIMEOUT | CAM_RELEASE_SIMQ;
897 } else if (request->status & ATA_S_ERROR) {
898 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
899 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR;
901 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
902 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
904 } else if (request->result == ERESTART)
905 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
906 else if (request->result != 0)
907 ccb->ccb_h.status |= CAM_REQ_CMP_ERR;
909 ccb->ccb_h.status |= CAM_REQ_CMP;
910 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP &&
911 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
912 xpt_freeze_devq(ccb->ccb_h.path, 1);
913 ccb->ccb_h.status |= CAM_DEV_QFRZN;
915 if (ccb->ccb_h.func_code == XPT_ATA_IO &&
916 ((request->status & ATA_S_ERROR) ||
917 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT))) {
918 struct ata_res *res = &ccb->ataio.res;
919 res->status = request->status;
920 res->error = request->error;
921 res->lba_low = request->u.ata.lba;
922 res->lba_mid = request->u.ata.lba >> 8;
923 res->lba_high = request->u.ata.lba >> 16;
924 res->device = request->u.ata.lba >> 24;
925 res->lba_low_exp = request->u.ata.lba >> 24;
926 res->lba_mid_exp = request->u.ata.lba >> 32;
927 res->lba_high_exp = request->u.ata.lba >> 40;
928 res->sector_count = request->u.ata.count;
929 res->sector_count_exp = request->u.ata.count >> 8;
931 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
932 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
934 ccb->ataio.dxfer_len - request->donecount;
937 ccb->csio.dxfer_len - request->donecount;
940 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR &&
941 (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)
942 ata_cam_request_sense(dev, request);
945 /* Do error recovery if needed. */
951 ata_check_ids(device_t dev, union ccb *ccb)
953 struct ata_channel *ch = device_get_softc(dev);
955 if (ccb->ccb_h.target_id > ((ch->flags & ATA_NO_SLAVE) ? 0 : 1)) {
956 ccb->ccb_h.status = CAM_TID_INVALID;
960 if (ccb->ccb_h.target_lun != 0) {
961 ccb->ccb_h.status = CAM_LUN_INVALID;
969 ataaction(struct cam_sim *sim, union ccb *ccb)
971 device_t dev, parent;
972 struct ata_channel *ch;
974 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ataaction func_code=%x\n",
975 ccb->ccb_h.func_code));
977 ch = (struct ata_channel *)cam_sim_softc(sim);
979 switch (ccb->ccb_h.func_code) {
980 /* Common cases first */
981 case XPT_ATA_IO: /* Execute the requested I/O operation */
983 if (ata_check_ids(dev, ccb))
985 if ((ch->devices & ((ATA_ATA_MASTER | ATA_ATAPI_MASTER)
986 << ccb->ccb_h.target_id)) == 0) {
987 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
991 device_printf(dev, "already running!\n");
992 if (ccb->ccb_h.func_code == XPT_ATA_IO &&
993 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) &&
994 (ccb->ataio.cmd.control & ATA_A_RESET)) {
995 struct ata_res *res = &ccb->ataio.res;
997 bzero(res, sizeof(*res));
998 if (ch->devices & (ATA_ATA_MASTER << ccb->ccb_h.target_id)) {
1002 res->lba_high = 0xeb;
1003 res->lba_mid = 0x14;
1005 ccb->ccb_h.status = CAM_REQ_CMP;
1008 ata_cam_begin_transaction(dev, ccb);
1010 case XPT_EN_LUN: /* Enable LUN as a target */
1011 case XPT_TARGET_IO: /* Execute target I/O request */
1012 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
1013 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
1014 case XPT_ABORT: /* Abort the specified CCB */
1016 ccb->ccb_h.status = CAM_REQ_INVALID;
1018 case XPT_SET_TRAN_SETTINGS:
1020 struct ccb_trans_settings *cts = &ccb->cts;
1021 struct ata_cam_device *d;
1023 if (ata_check_ids(dev, ccb))
1025 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
1026 d = &ch->curr[ccb->ccb_h.target_id];
1028 d = &ch->user[ccb->ccb_h.target_id];
1029 if (ch->flags & ATA_SATA) {
1030 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION)
1031 d->revision = cts->xport_specific.sata.revision;
1032 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) {
1033 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1034 d->mode = ATA_SETMODE(ch->dev,
1035 ccb->ccb_h.target_id,
1036 cts->xport_specific.sata.mode);
1038 d->mode = cts->xport_specific.sata.mode;
1040 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT)
1041 d->bytecount = min(8192, cts->xport_specific.sata.bytecount);
1042 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI)
1043 d->atapi = cts->xport_specific.sata.atapi;
1044 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS)
1045 d->caps = cts->xport_specific.sata.caps;
1047 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_MODE) {
1048 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1049 d->mode = ATA_SETMODE(ch->dev,
1050 ccb->ccb_h.target_id,
1051 cts->xport_specific.ata.mode);
1053 d->mode = cts->xport_specific.ata.mode;
1055 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_BYTECOUNT)
1056 d->bytecount = cts->xport_specific.ata.bytecount;
1057 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_ATAPI)
1058 d->atapi = cts->xport_specific.ata.atapi;
1059 if (cts->xport_specific.ata.valid & CTS_ATA_VALID_CAPS)
1060 d->caps = cts->xport_specific.ata.caps;
1062 ccb->ccb_h.status = CAM_REQ_CMP;
1065 case XPT_GET_TRAN_SETTINGS:
1067 struct ccb_trans_settings *cts = &ccb->cts;
1068 struct ata_cam_device *d;
1070 if (ata_check_ids(dev, ccb))
1072 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
1073 d = &ch->curr[ccb->ccb_h.target_id];
1075 d = &ch->user[ccb->ccb_h.target_id];
1076 cts->protocol = PROTO_UNSPECIFIED;
1077 cts->protocol_version = PROTO_VERSION_UNSPECIFIED;
1078 if (ch->flags & ATA_SATA) {
1079 cts->transport = XPORT_SATA;
1080 cts->transport_version = XPORT_VERSION_UNSPECIFIED;
1081 cts->xport_specific.sata.valid = 0;
1082 cts->xport_specific.sata.mode = d->mode;
1083 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE;
1084 cts->xport_specific.sata.bytecount = d->bytecount;
1085 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT;
1086 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1087 cts->xport_specific.sata.revision =
1088 ATA_GETREV(dev, ccb->ccb_h.target_id);
1089 if (cts->xport_specific.sata.revision != 0xff) {
1090 cts->xport_specific.sata.valid |=
1091 CTS_SATA_VALID_REVISION;
1093 cts->xport_specific.sata.caps =
1094 d->caps & CTS_SATA_CAPS_D;
1096 cts->xport_specific.sata.caps |=
1097 CTS_SATA_CAPS_H_PMREQ;
1099 cts->xport_specific.sata.caps &=
1100 ch->user[ccb->ccb_h.target_id].caps;
1102 cts->xport_specific.sata.revision = d->revision;
1103 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION;
1104 cts->xport_specific.sata.caps = d->caps;
1106 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS;
1107 cts->xport_specific.sata.atapi = d->atapi;
1108 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI;
1110 cts->transport = XPORT_ATA;
1111 cts->transport_version = XPORT_VERSION_UNSPECIFIED;
1112 cts->xport_specific.ata.valid = 0;
1113 cts->xport_specific.ata.mode = d->mode;
1114 cts->xport_specific.ata.valid |= CTS_ATA_VALID_MODE;
1115 cts->xport_specific.ata.bytecount = d->bytecount;
1116 cts->xport_specific.ata.valid |= CTS_ATA_VALID_BYTECOUNT;
1117 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1118 cts->xport_specific.ata.caps =
1119 d->caps & CTS_ATA_CAPS_D;
1120 if (!(ch->flags & ATA_NO_48BIT_DMA))
1121 cts->xport_specific.ata.caps |=
1122 CTS_ATA_CAPS_H_DMA48;
1123 cts->xport_specific.ata.caps &=
1124 ch->user[ccb->ccb_h.target_id].caps;
1126 cts->xport_specific.ata.caps = d->caps;
1127 cts->xport_specific.ata.valid |= CTS_ATA_VALID_CAPS;
1128 cts->xport_specific.ata.atapi = d->atapi;
1129 cts->xport_specific.ata.valid |= CTS_ATA_VALID_ATAPI;
1131 ccb->ccb_h.status = CAM_REQ_CMP;
1134 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1135 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
1137 ccb->ccb_h.status = CAM_REQ_CMP;
1139 case XPT_TERM_IO: /* Terminate the I/O process */
1141 ccb->ccb_h.status = CAM_REQ_INVALID;
1143 case XPT_PATH_INQ: /* Path routing inquiry */
1145 struct ccb_pathinq *cpi = &ccb->cpi;
1147 parent = device_get_parent(dev);
1148 cpi->version_num = 1; /* XXX??? */
1149 cpi->hba_inquiry = PI_SDTR_ABLE;
1150 cpi->target_sprt = 0;
1151 cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED;
1152 cpi->hba_eng_cnt = 0;
1153 if (ch->flags & ATA_NO_SLAVE)
1154 cpi->max_target = 0;
1156 cpi->max_target = 1;
1158 cpi->initiator_id = 0;
1159 cpi->bus_id = cam_sim_bus(sim);
1160 if (ch->flags & ATA_SATA)
1161 cpi->base_transfer_speed = 150000;
1163 cpi->base_transfer_speed = 3300;
1164 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1165 strncpy(cpi->hba_vid, "ATA", HBA_IDLEN);
1166 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1167 cpi->unit_number = cam_sim_unit(sim);
1168 if (ch->flags & ATA_SATA)
1169 cpi->transport = XPORT_SATA;
1171 cpi->transport = XPORT_ATA;
1172 cpi->transport_version = XPORT_VERSION_UNSPECIFIED;
1173 cpi->protocol = PROTO_ATA;
1174 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED;
1175 cpi->maxio = ch->dma.max_iosize ? ch->dma.max_iosize : DFLTPHYS;
1176 if (device_get_devclass(device_get_parent(parent)) ==
1177 devclass_find("pci")) {
1178 cpi->hba_vendor = pci_get_vendor(parent);
1179 cpi->hba_device = pci_get_device(parent);
1180 cpi->hba_subvendor = pci_get_subvendor(parent);
1181 cpi->hba_subdevice = pci_get_subdevice(parent);
1183 cpi->ccb_h.status = CAM_REQ_CMP;
1187 ccb->ccb_h.status = CAM_REQ_INVALID;
1194 atapoll(struct cam_sim *sim)
1196 struct ata_channel *ch = (struct ata_channel *)cam_sim_softc(sim);
1198 ata_interrupt_locked(ch);
1205 ata_module_event_handler(module_t mod, int what, void *arg)
1220 static moduledata_t ata_moduledata = { "ata", ata_module_event_handler, NULL };
1221 DECLARE_MODULE(ata, ata_moduledata, SI_SUB_CONFIGURE, SI_ORDER_SECOND);
1222 MODULE_VERSION(ata, 1);
1223 MODULE_DEPEND(ata, cam, 1, 1, 1);