2 * Copyright (c) 2000 - 2006 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #define AR_PROXIMITY 2048 /* how many sectors is "close" */
35 #define ATA_MAGIC "FreeBSD ATA driver RAID "
37 struct ata_raid_subdisk {
38 struct ar_softc *raid[MAX_VOLUMES];
39 int disk_number[MAX_VOLUMES];
42 /* ATA PseudoRAID Metadata */
50 #define AR_T_JBOD 0x0001
51 #define AR_T_SPAN 0x0002
52 #define AR_T_RAID0 0x0004
53 #define AR_T_RAID1 0x0008
54 #define AR_T_RAID01 0x0010
55 #define AR_T_RAID3 0x0020
56 #define AR_T_RAID4 0x0040
57 #define AR_T_RAID5 0x0080
60 #define AR_S_READY 0x0001
61 #define AR_S_DEGRADED 0x0002
62 #define AR_S_REBUILDING 0x0004
65 #define AR_F_FREEBSD_RAID 0x0001
66 #define AR_F_ADAPTEC_RAID 0x0002
67 #define AR_F_HPTV2_RAID 0x0004
68 #define AR_F_HPTV3_RAID 0x0008
69 #define AR_F_INTEL_RAID 0x0010
70 #define AR_F_ITE_RAID 0x0020
71 #define AR_F_JMICRON_RAID 0x0040
72 #define AR_F_LSIV2_RAID 0x0080
73 #define AR_F_LSIV3_RAID 0x0100
74 #define AR_F_NVIDIA_RAID 0x0200
75 #define AR_F_PROMISE_RAID 0x0400
76 #define AR_F_SII_RAID 0x0800
77 #define AR_F_SIS_RAID 0x1000
78 #define AR_F_VIA_RAID 0x2000
79 #define AR_F_FORMAT_MASK 0x3fff
82 u_int64_t total_sectors;
83 u_int64_t offset_sectors; /* offset from start of disk */
87 u_int width; /* array width in disks */
88 u_int interleave; /* interleave in sectors */
89 u_int total_disks; /* number of disks in this array */
92 u_int8_t serial[16]; /* serial # of physical disk */
93 u_int64_t sectors; /* useable sectors on this disk */
94 off_t last_lba; /* last lba used (for performance) */
96 #define AR_DF_PRESENT 0x0001 /* this HW pos has a disk present */
97 #define AR_DF_ASSIGNED 0x0002 /* this HW pos assigned to an array */
98 #define AR_DF_SPARE 0x0004 /* this HW pos is a spare */
99 #define AR_DF_ONLINE 0x0008 /* this HW pos is online and in use */
102 int toggle; /* performance hack for RAID1's */
103 u_int64_t rebuild_lba; /* rebuild progress indicator */
104 struct mtx lock; /* metadata lock */
105 struct disk *disk; /* disklabel/slice stuff */
106 struct proc *pid; /* rebuilder process id */
109 /* Adaptec HostRAID Metadata */
110 #define ADP_LBA(dev) \
111 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 17)
113 /* note all entries are big endian */
114 struct adaptec_raid_conf {
116 #define ADP_MAGIC_0 0xc4650790
118 u_int32_t generation;
120 u_int16_t total_configs;
127 u_int32_t dummy_4[4];
128 u_int32_t dummy_5[4];
130 u_int16_t total_disks;
131 u_int16_t generation;
135 #define ADP_T_RAID0 0x00
136 #define ADP_T_RAID1 0x01
145 u_int32_t disk_number;
148 u_int16_t stripe_shift;
151 u_int32_t dummy_8[4];
154 u_int32_t dummy_6[13];
156 #define ADP_MAGIC_1 0x9ff85009
157 u_int32_t dummy_7[3];
159 u_int32_t dummy_8[46];
161 #define ADP_MAGIC_3 0x4d545044
163 #define ADP_MAGIC_4 0x9ff85009
164 u_int32_t dummy_9[62];
168 /* Highpoint V2 RocketRAID Metadata */
169 #define HPTV2_LBA(dev) 9
171 struct hptv2_raid_conf {
174 #define HPTV2_MAGIC_OK 0x5a7816f0
175 #define HPTV2_MAGIC_BAD 0x5a7816fd
180 #define HPTV2_O_RAID0 0x01
181 #define HPTV2_O_RAID1 0x02
182 #define HPTV2_O_OK 0x04
184 u_int8_t array_width;
185 u_int8_t stripe_shift;
187 #define HPTV2_T_RAID0 0x00
188 #define HPTV2_T_RAID1 0x01
189 #define HPTV2_T_RAID01_RAID0 0x02
190 #define HPTV2_T_SPAN 0x03
191 #define HPTV2_T_RAID_3 0x04
192 #define HPTV2_T_RAID_5 0x05
193 #define HPTV2_T_JBOD 0x06
194 #define HPTV2_T_RAID01_RAID1 0x07
196 u_int8_t disk_number;
197 u_int32_t total_sectors;
201 u_int8_t boot_protect;
202 u_int8_t error_log_entries;
203 u_int8_t error_log_index;
207 #define HPTV2_R_REMOVED 0xfe
208 #define HPTV2_R_BROKEN 0xff
216 u_int32_t rebuild_lba;
225 /* Highpoint V3 RocketRAID Metadata */
226 #define HPTV3_LBA(dev) \
227 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 11)
229 struct hptv3_raid_conf {
231 #define HPTV3_MAGIC 0x5a7816f3
236 #define HPTV3_BOOT_MARK 0x01
237 #define HPTV3_USER_MODE 0x02
240 u_int8_t config_entries;
242 u_int32_t total_sectors;
244 #define HPTV3_T_SPARE 0x00
245 #define HPTV3_T_JBOD 0x03
246 #define HPTV3_T_SPAN 0x04
247 #define HPTV3_T_RAID0 0x05
248 #define HPTV3_T_RAID1 0x06
249 #define HPTV3_T_RAID3 0x07
250 #define HPTV3_T_RAID5 0x08
252 u_int8_t total_disks;
253 u_int8_t disk_number;
254 u_int8_t stripe_shift;
256 #define HPTV3_T_NEED_REBUILD 0x01
257 #define HPTV3_T_RAID5_FLAG 0x02
259 u_int16_t critical_disks;
260 u_int32_t rebuild_lba;
261 } __packed configs[2];
264 u_int8_t description[64];
265 u_int8_t creator[16];
270 #define HPTV3_T_ENABLE_TCQ 0x01
271 #define HPTV3_T_ENABLE_NCQ 0x02
272 #define HPTV3_T_ENABLE_WCACHE 0x04
273 #define HPTV3_T_ENABLE_RCACHE 0x08
276 u_int32_t total_sectors;
277 u_int32_t rebuild_lba;
278 } __packed configs_high[2];
279 u_int32_t filler[87];
283 /* Intel MatrixRAID Metadata */
284 #define INTEL_LBA(dev) \
285 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 3)
287 struct intel_raid_conf {
288 u_int8_t intel_id[24];
289 #define INTEL_MAGIC "Intel Raid ISM Cfg Sig. "
292 #define INTEL_VERSION_1100 "1.1.00"
293 #define INTEL_VERSION_1201 "1.2.01"
294 #define INTEL_VERSION_1202 "1.2.02"
298 u_int32_t config_size;
300 u_int32_t generation;
301 u_int32_t dummy_1[2];
302 u_int8_t total_disks;
303 u_int8_t total_volumes;
305 u_int32_t filler_0[39];
311 #define INTEL_F_SPARE 0x01
312 #define INTEL_F_ASSIGNED 0x02
313 #define INTEL_F_DOWN 0x04
314 #define INTEL_F_ONLINE 0x08
318 u_int32_t filler_1[62];
321 struct intel_raid_mapping {
323 u_int64_t total_sectors __packed;
326 u_int32_t filler_0[20];
328 u_int32_t disk_sectors;
329 u_int32_t stripe_count;
330 u_int16_t stripe_sectors;
332 #define INTEL_S_READY 0x00
333 #define INTEL_S_DISABLED 0x01
334 #define INTEL_S_DEGRADED 0x02
335 #define INTEL_S_FAILURE 0x03
338 #define INTEL_T_RAID0 0x00
339 #define INTEL_T_RAID1 0x01
340 #define INTEL_T_RAID5 0x05
342 u_int8_t total_disks;
344 u_int32_t filler_1[7];
345 u_int32_t disk_idx[1];
349 /* Integrated Technology Express Metadata */
350 #define ITE_LBA(dev) \
351 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 2)
353 struct ite_raid_conf {
354 u_int32_t filler_1[5];
355 u_int8_t timestamp_0[8];
357 u_int32_t filler_2[5];
360 #define ITE_MAGIC "Integrated Technology Express Inc "
363 u_int32_t filler_5[6];
366 u_int32_t filler_6[12];
368 u_int32_t filler_7[5];
369 u_int64_t total_sectors __packed;
370 u_int32_t filler_8[12];
374 #define ITE_T_RAID0 0x00
375 #define ITE_T_RAID1 0x01
376 #define ITE_T_RAID01 0x02
377 #define ITE_T_SPAN 0x03
380 u_int32_t dummy_5[8];
381 u_int8_t stripe_1kblocks;
382 u_int8_t filler_11[3];
383 u_int32_t filler_12[54];
385 u_int32_t dummy_6[4];
386 u_int8_t timestamp_1[8];
387 u_int32_t filler_13[9];
388 u_int8_t stripe_sectors;
389 u_int8_t filler_14[3];
390 u_int8_t array_width;
391 u_int8_t filler_15[3];
394 u_int8_t disk_number;
395 u_int32_t disk_sectors;
397 u_int32_t dummy_7[4];
398 u_int32_t filler_20[104];
402 /* JMicron Technology Corp Metadata */
403 #define JMICRON_LBA(dev) \
404 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
405 #define JM_MAX_DISKS 8
407 struct jmicron_raid_conf {
408 u_int8_t signature[2];
409 #define JMICRON_MAGIC "JM"
412 #define JMICRON_VERSION 0x0001
415 u_int8_t filler_1[10];
418 u_int32_t disk_sectors_high;
419 u_int16_t disk_sectors_low;
420 u_int8_t filler_2[2];
425 #define JM_T_RAID01 2
429 u_int8_t stripe_shift;
431 #define JM_F_READY 0x0001
432 #define JM_F_BOOTABLE 0x0002
433 #define JM_F_BAD 0x0004
434 #define JM_F_ACTIVE 0c0010
435 #define JM_F_UNSYNC 0c0020
436 #define JM_F_NEWEST 0c0040
438 u_int8_t filler_3[4];
440 u_int32_t disks[JM_MAX_DISKS];
441 u_int8_t filler_4[32];
442 u_int8_t filler_5[384];
446 /* LSILogic V2 MegaRAID Metadata */
447 #define LSIV2_LBA(dev) \
448 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
450 struct lsiv2_raid_conf {
452 #define LSIV2_MAGIC "$XIDE$"
457 u_int8_t config_entries;
459 u_int8_t total_disks;
466 #define LSIV2_T_RAID0 0x01
467 #define LSIV2_T_RAID1 0x02
468 #define LSIV2_T_SPARE 0x08
471 u_int16_t stripe_sectors;
472 u_int8_t array_width;
474 u_int8_t config_offset;
477 #define LSIV2_R_DEGRADED 0x02
479 u_int32_t total_sectors;
484 #define LSIV2_D_MASTER 0x00
485 #define LSIV2_D_SLAVE 0x01
486 #define LSIV2_D_CHANNEL0 0x00
487 #define LSIV2_D_CHANNEL1 0x10
488 #define LSIV2_D_NONE 0xff
491 u_int32_t disk_sectors;
492 u_int8_t disk_number;
493 u_int8_t raid_number;
495 #define LSIV2_D_GONE 0x02
500 u_int8_t disk_number;
501 u_int8_t raid_number;
507 /* LSILogic V3 MegaRAID Metadata */
508 #define LSIV3_LBA(dev) \
509 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 4)
511 struct lsiv3_raid_conf {
512 u_int32_t magic_0; /* 0xa0203200 */
513 u_int32_t filler_0[3];
514 u_int8_t magic_1[4]; /* "SATA" */
515 u_int32_t filler_1[40];
516 u_int32_t dummy_0; /* 0x0d000003 */
517 u_int32_t filler_2[7];
518 u_int32_t dummy_1; /* 0x0d000003 */
519 u_int32_t filler_3[70];
520 u_int8_t magic_2[8]; /* "$_ENQ$31" */
521 u_int8_t filler_4[7];
523 u_int8_t filler_5[512*2];
525 #define LSIV3_MAGIC "$_IDE$"
527 u_int16_t dummy_2; /* 0x33de for OK disk */
528 u_int16_t version; /* 0x0131 for this version */
529 u_int16_t dummy_3; /* 0x0440 always */
533 u_int16_t stripe_pages;
535 #define LSIV3_T_RAID0 0x00
536 #define LSIV3_T_RAID1 0x01
539 u_int8_t total_disks;
540 u_int8_t array_width;
541 u_int8_t filler_0[10];
548 #define LSIV3_D_DEVICE 0x01
549 #define LSIV3_D_CHANNEL 0x10
554 u_int8_t filler_1[16];
557 u_int32_t disk_sectors;
563 #define LSIV3_D_MIRROR 0x00
564 #define LSIV3_D_STRIPE 0xff
567 u_int8_t filler_7[7];
570 u_int8_t filler_8[3];
575 /* nVidia MediaShield Metadata */
576 #define NVIDIA_LBA(dev) \
577 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 2)
579 struct nvidia_raid_conf {
580 u_int8_t nvidia_id[8];
581 #define NV_MAGIC "NVIDIA "
583 u_int32_t config_size;
586 u_int8_t disk_number;
588 u_int32_t total_sectors;
589 u_int32_t sector_size;
591 u_int8_t revision[4];
595 #define NV_MAGIC0 0x00640044
600 u_int8_t array_width;
601 u_int8_t total_disks;
604 #define NV_T_RAID0 0x00000080
605 #define NV_T_RAID1 0x00000081
606 #define NV_T_RAID3 0x00000083
607 #define NV_T_RAID5 0x00000085
608 #define NV_T_RAID01 0x00008180
609 #define NV_T_SPAN 0x000000ff
612 u_int32_t stripe_sectors;
613 u_int32_t stripe_bytes;
614 u_int32_t stripe_shift;
615 u_int32_t stripe_mask;
616 u_int32_t stripe_sizesectors;
617 u_int32_t stripe_sizebytes;
618 u_int32_t rebuild_lba;
622 #define NV_S_BOOTABLE 0x00000001
623 #define NV_S_DEGRADED 0x00000002
625 u_int32_t filler[98];
629 /* Promise FastTrak Metadata */
630 #define PROMISE_LBA(dev) \
631 (((((struct ad_softc *)device_get_ivars(dev))->total_secs / (((struct ad_softc *)device_get_ivars(dev))->heads * ((struct ad_softc *)device_get_ivars(dev))->sectors)) * ((struct ad_softc *)device_get_ivars(dev))->heads * ((struct ad_softc *)device_get_ivars(dev))->sectors) - ((struct ad_softc *)device_get_ivars(dev))->sectors)
633 struct promise_raid_conf {
635 #define PR_MAGIC "Promise Technology, Inc."
639 #define PR_MAGIC0(x) (((u_int64_t)(x.channel) << 48) | \
640 ((u_int64_t)(x.device != 0) << 56))
643 u_int8_t filler1[470];
646 #define PR_I_VALID 0x00000080
649 #define PR_F_VALID 0x00000001
650 #define PR_F_ONLINE 0x00000002
651 #define PR_F_ASSIGNED 0x00000004
652 #define PR_F_SPARE 0x00000008
653 #define PR_F_DUPLICATE 0x00000010
654 #define PR_F_REDIR 0x00000020
655 #define PR_F_DOWN 0x00000040
656 #define PR_F_READY 0x00000080
658 u_int8_t disk_number;
661 u_int64_t magic_0 __packed;
662 u_int32_t disk_offset;
663 u_int32_t disk_sectors;
664 u_int32_t rebuild_lba;
665 u_int16_t generation;
667 #define PR_S_VALID 0x01
668 #define PR_S_ONLINE 0x02
669 #define PR_S_INITED 0x04
670 #define PR_S_READY 0x08
671 #define PR_S_DEGRADED 0x10
672 #define PR_S_MARKED 0x20
673 #define PR_S_FUNCTIONAL 0x80
676 #define PR_T_RAID0 0x00
677 #define PR_T_RAID1 0x01
678 #define PR_T_RAID3 0x02
679 #define PR_T_RAID5 0x04
680 #define PR_T_SPAN 0x08
681 #define PR_T_JBOD 0x10
683 u_int8_t total_disks;
684 u_int8_t stripe_shift;
685 u_int8_t array_width;
686 u_int8_t array_number;
687 u_int32_t total_sectors;
691 u_int64_t magic_1 __packed;
697 u_int64_t magic_0 __packed;
700 int32_t filler2[346];
705 /* Silicon Image Medley Metadata */
706 #define SII_LBA(dev) \
707 ( ((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
709 struct sii_raid_conf {
710 u_int16_t ata_params_00_53[54];
711 u_int64_t total_sectors;
712 u_int16_t ata_params_58_79[70];
715 u_int32_t controller_pci_id;
716 u_int16_t version_minor;
717 u_int16_t version_major;
718 u_int8_t timestamp[6];
719 u_int16_t stripe_sectors;
721 u_int8_t disk_number;
723 #define SII_T_RAID0 0x00
724 #define SII_T_RAID1 0x01
725 #define SII_T_RAID01 0x02
726 #define SII_T_SPARE 0x03
728 u_int8_t raid0_disks;
729 u_int8_t raid0_ident;
730 u_int8_t raid1_disks;
731 u_int8_t raid1_ident;
732 u_int64_t rebuild_lba;
733 u_int32_t generation;
735 #define SII_S_READY 0x01
737 u_int8_t base_raid1_position;
738 u_int8_t base_raid0_position;
742 u_int16_t checksum_0;
744 u_int16_t checksum_1;
748 /* Silicon Integrated Systems RAID Metadata */
749 #define SIS_LBA(dev) \
750 ( ((struct ad_softc *)device_get_ivars(dev))->total_secs - 16)
752 struct sis_raid_conf {
754 #define SIS_MAGIC 0x0010
757 #define SIS_D_MASTER 0xf0
758 #define SIS_D_MIRROR 0x0f
760 u_int8_t type_total_disks;
761 #define SIS_D_MASK 0x0f
762 #define SIS_T_MASK 0xf0
763 #define SIS_T_JBOD 0x10
764 #define SIS_T_RAID0 0x20
765 #define SIS_T_RAID1 0x30
768 u_int32_t controller_pci_id;
769 u_int16_t stripe_sectors;
773 u_int8_t disk_number;
779 /* VIA Tech V-RAID Metadata */
780 #define VIA_LBA(dev) \
781 ( ((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
783 struct via_raid_conf {
785 #define VIA_MAGIC 0xaa55
789 #define VIA_T_MASK 0x7e
790 #define VIA_T_BOOTABLE 0x01
791 #define VIA_T_RAID0 0x04
792 #define VIA_T_RAID1 0x0c
793 #define VIA_T_RAID01 0x4c
794 #define VIA_T_RAID5 0x2c
795 #define VIA_T_SPAN 0x44
796 #define VIA_T_UNKNOWN 0x80
799 #define VIA_D_MASK 0x0f
800 #define VIA_D_DEGRADED 0x10
801 #define VIA_D_HIGH_IDX 0x20
803 u_int8_t stripe_layout;
804 #define VIA_L_DISKS 0x07
805 #define VIA_L_MASK 0xf0
806 #define VIA_L_SHIFT 4
808 u_int64_t disk_sectors;
812 u_int8_t filler_1[461];