2 * Copyright (c) 2000 - 2005 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #define AR_PROXIMITY 2048 /* how many sectors is "close" */
36 #define ATA_MAGIC "FreeBSD ATA driver RAID "
38 struct ata_raid_subdisk {
39 struct ar_softc *raid;
43 /* ATA PseudoRAID Metadata */
45 int lun; /* logical unit number of this RAID */
46 u_int8_t name[32]; /* name of array if any */
47 u_int64_t magic_0; /* magic for this array */
48 u_int64_t magic_1; /* magic for this array */
50 #define AR_T_JBOD 0x0001
51 #define AR_T_SPAN 0x0002
52 #define AR_T_RAID0 0x0004
53 #define AR_T_RAID1 0x0008
54 #define AR_T_RAID01 0x0010
55 #define AR_T_RAID3 0x0020
56 #define AR_T_RAID4 0x0040
57 #define AR_T_RAID5 0x0080
60 #define AR_S_READY 0x0001
61 #define AR_S_DEGRADED 0x0002
62 #define AR_S_REBUILDING 0x0004
65 #define AR_F_FREEBSD_RAID 0x0001
66 #define AR_F_ADAPTEC_RAID 0x0002
67 #define AR_F_HPTV2_RAID 0x0004
68 #define AR_F_HPTV3_RAID 0x0008
69 #define AR_F_INTEL_RAID 0x0010
70 #define AR_F_ITE_RAID 0x0020
71 #define AR_F_LSIV2_RAID 0x0040
72 #define AR_F_LSIV3_RAID 0x0080
73 #define AR_F_NVIDIA_RAID 0x0100
74 #define AR_F_PROMISE_RAID 0x0200
75 #define AR_F_SII_RAID 0x0400
76 #define AR_F_VIA_RAID 0x0800
77 #define AR_F_FORMAT_MASK 0x0fff
79 u_int generation; /* generation of this array */
80 u_int64_t total_sectors;
81 u_int64_t offset_sectors; /* offset from start of disk */
85 u_int width; /* array width in disks */
86 u_int interleave; /* interleave in blocks */
87 u_int total_disks; /* number of disks in this array */
90 u_int8_t serial[16]; /* serial # of physical disk */
91 u_int64_t sectors; /* useable sectors on this disk */
92 off_t last_lba; /* last lba used (for performance) */
94 #define AR_DF_PRESENT 0x0001 /* this HW pos has a disk present */
95 #define AR_DF_ASSIGNED 0x0002 /* this HW pos assigned to an array */
96 #define AR_DF_SPARE 0x0004 /* this HW pos is a spare */
97 #define AR_DF_ONLINE 0x0008 /* this HW pos is online and in use */
100 int toggle; /* performance hack for RAID1's */
101 u_int64_t rebuild_lba; /* rebuild progress indicator */
102 struct mtx lock; /* metadata lock */
103 struct disk *disk; /* disklabel/slice stuff */
104 struct proc *pid; /* rebuilder process id */
107 /* Adaptec HostRAID Metadata */
108 #define ADP_LBA(dev) \
109 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 17)
111 /* note all entries are big endian */
112 struct adaptec_raid_conf {
114 #define ADP_MAGIC_0 0xc4650790
116 u_int32_t generation;
118 u_int16_t total_configs;
125 u_int32_t dummy_4[4];
126 u_int32_t dummy_5[4];
128 u_int16_t total_disks;
129 u_int16_t generation;
133 #define ADP_T_RAID0 0x00
134 #define ADP_T_RAID1 0x01
143 u_int32_t disk_number;
146 u_int16_t stripe_shift;
149 u_int32_t dummy_8[4];
152 u_int32_t dummy_6[13];
154 #define ADP_MAGIC_1 0x9ff85009
155 u_int32_t dummy_7[3];
157 u_int32_t dummy_8[46];
159 #define ADP_MAGIC_3 0x4d545044
161 #define ADP_MAGIC_4 0x9ff85009
162 u_int32_t dummy_9[62];
166 /* Highpoint V2 RocketRAID Metadata */
167 #define HPTV2_LBA(dev) 9
169 struct hptv2_raid_conf {
172 #define HPTV2_MAGIC_OK 0x5a7816f0
173 #define HPTV2_MAGIC_BAD 0x5a7816fd
178 #define HPTV2_O_RAID0 0x01
179 #define HPTV2_O_RAID1 0x02
180 #define HPTV2_O_OK 0x04
182 u_int8_t array_width;
183 u_int8_t stripe_shift;
185 #define HPTV2_T_RAID0 0x00
186 #define HPTV2_T_RAID1 0x01
187 #define HPTV2_T_RAID01_RAID0 0x02
188 #define HPTV2_T_SPAN 0x03
189 #define HPTV2_T_RAID_3 0x04
190 #define HPTV2_T_RAID_5 0x05
191 #define HPTV2_T_JBOD 0x06
192 #define HPTV2_T_RAID01_RAID1 0x07
194 u_int8_t disk_number;
195 u_int32_t total_sectors;
199 u_int8_t boot_protect;
200 u_int8_t error_log_entries;
201 u_int8_t error_log_index;
205 #define HPTV2_R_REMOVED 0xfe
206 #define HPTV2_R_BROKEN 0xff
214 u_int32_t rebuild_lba;
223 /* Highpoint V3 RocketRAID Metadata */
224 #define HPTV3_LBA(dev) \
225 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 11)
227 struct hptv3_raid_conf {
229 #define HPTV3_MAGIC 0x5a7816f3
234 #define HPTV3_BOOT_MARK 0x01
235 #define HPTV3_USER_MODE 0x02
238 u_int8_t config_entries;
240 u_int32_t total_sectors;
242 #define HPTV3_T_SPARE 0x00
243 #define HPTV3_T_JBOD 0x03
244 #define HPTV3_T_SPAN 0x04
245 #define HPTV3_T_RAID0 0x05
246 #define HPTV3_T_RAID1 0x06
247 #define HPTV3_T_RAID3 0x07
248 #define HPTV3_T_RAID5 0x08
250 u_int8_t total_disks;
251 u_int8_t disk_number;
252 u_int8_t stripe_shift;
254 #define HPTV3_T_NEED_REBUILD 0x01
255 #define HPTV3_T_RAID5_FLAG 0x02
257 u_int16_t critical_disks;
258 u_int32_t rebuild_lba;
259 } __packed configs[2];
262 u_int8_t description[64];
263 u_int8_t creator[16];
268 #define HPTV3_T_ENABLE_TCQ 0x01
269 #define HPTV3_T_ENABLE_NCQ 0x02
270 #define HPTV3_T_ENABLE_WCACHE 0x04
271 #define HPTV3_T_ENABLE_RCACHE 0x08
274 u_int32_t total_sectors;
275 u_int32_t rebuild_lba;
276 } __packed configs_high[2];
277 u_int32_t filler[87];
281 /* Intel MatrixRAID Metadata */
282 #define INTEL_LBA(dev) \
283 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 2)
285 struct intel_raid_conf {
286 u_int8_t intel_id[24];
287 #define INTEL_MAGIC "Intel Raid ISM Cfg Sig. "
292 u_int32_t config_size;
294 u_int32_t generation;
295 u_int32_t dummy_1[2];
296 u_int8_t total_disks;
297 u_int8_t total_volumes;
299 u_int32_t filler_0[39];
305 #define INTEL_F_SPARE 0x01
306 #define INTEL_F_ASSIGNED 0x02
307 #define INTEL_F_DOWN 0x04
308 #define INTEL_F_ONLINE 0x08
312 u_int32_t filler_1[62];
315 struct intel_raid_mapping {
317 u_int64_t total_sectors __packed;
320 u_int32_t filler_1[20];
322 u_int32_t disk_sectors;
323 u_int32_t stripe_count;
324 u_int16_t stripe_sectors;
326 #define INTEL_S_READY 0x00
327 #define INTEL_S_DISABLED 0x01
328 #define INTEL_S_DEGRADED 0x02
329 #define INTEL_S_FAILURE 0x03
332 #define INTEL_T_RAID0 0x00
333 #define INTEL_T_RAID1 0x01
335 u_int8_t total_disks;
337 u_int32_t filler_2[7];
338 u_int32_t disk_idx[1];
342 /* Integrated Technology Express Metadata */
343 #define ITE_LBA(dev) \
344 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 2)
346 struct ite_raid_conf {
347 u_int32_t filler_1[5];
348 u_int8_t timestamp_0[8];
350 u_int32_t filler_2[5];
353 #define ITE_MAGIC "Integrated Technology Express Inc "
356 u_int32_t filler_5[6];
359 u_int32_t filler_6[12];
361 u_int32_t filler_7[5];
362 u_int64_t total_sectors __packed;
363 u_int32_t filler_8[12];
367 #define ITE_T_RAID0 0x00
368 #define ITE_T_RAID1 0x01
369 #define ITE_T_RAID01 0x02
370 #define ITE_T_SPAN 0x03
373 u_int32_t dummy_5[8];
374 u_int8_t stripe_1kblocks;
375 u_int8_t filler_11[3];
376 u_int32_t filler_12[54];
378 u_int32_t dummy_6[4];
379 u_int8_t timestamp_1[8];
380 u_int32_t filler_13[9];
381 u_int8_t stripe_sectors;
382 u_int8_t filler_14[3];
383 u_int8_t array_width;
384 u_int8_t filler_15[3];
387 u_int8_t disk_number;
388 u_int32_t disk_sectors;
390 u_int32_t dummy_7[4];
391 u_int32_t filler_20[104];
395 /* LSILogic V2 MegaRAID Metadata */
396 #define LSIV2_LBA(dev) \
397 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
399 struct lsiv2_raid_conf {
401 #define LSIV2_MAGIC "$XIDE$"
406 u_int8_t config_entries;
408 u_int8_t total_disks;
415 #define LSIV2_T_RAID0 0x01
416 #define LSIV2_T_RAID1 0x02
417 #define LSIV2_T_SPARE 0x08
420 u_int16_t stripe_sectors;
421 u_int8_t array_width;
423 u_int8_t config_offset;
426 #define LSIV2_R_DEGRADED 0x02
428 u_int32_t total_sectors;
433 #define LSIV2_D_MASTER 0x00
434 #define LSIV2_D_SLAVE 0x01
435 #define LSIV2_D_CHANNEL0 0x00
436 #define LSIV2_D_CHANNEL1 0x10
437 #define LSIV2_D_NONE 0xff
440 u_int32_t disk_sectors;
441 u_int8_t disk_number;
442 u_int8_t raid_number;
444 #define LSIV2_D_GONE 0x02
449 u_int8_t disk_number;
450 u_int8_t raid_number;
456 /* LSILogic V3 MegaRAID Metadata */
457 #define LSIV3_LBA(dev) \
458 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 4)
460 struct lsiv3_raid_conf {
461 u_int32_t magic_0; /* 0xa0203200 */
462 u_int32_t filler_0[3];
463 u_int8_t magic_1[4]; /* "SATA" */
464 u_int32_t filler_1[40];
465 u_int32_t dummy_0; /* 0x0d000003 */
466 u_int32_t filler_2[7];
467 u_int32_t dummy_1; /* 0x0d000003 */
468 u_int32_t filler_3[70];
469 u_int8_t magic_2[8]; /* "$_ENQ$31" */
470 u_int8_t filler_4[7];
472 u_int8_t filler_5[512*2];
474 #define LSIV3_MAGIC "$_IDE$"
476 u_int16_t dummy_2; /* 0x33de for OK disk */
477 u_int16_t version; /* 0x0131 for this version */
478 u_int16_t dummy_3; /* 0x0440 always */
482 u_int16_t stripe_pages;
484 #define LSIV3_T_RAID0 0x00
485 #define LSIV3_T_RAID1 0x01
488 u_int8_t total_disks;
489 u_int8_t array_width;
490 u_int8_t filler_0[10];
497 #define LSIV3_D_DEVICE 0x01
498 #define LSIV3_D_CHANNEL 0x10
503 u_int8_t filler_1[16];
506 u_int32_t disk_sectors;
512 #define LSIV3_D_MIRROR 0x00
513 #define LSIV3_D_STRIPE 0xff
516 u_int8_t filler_7[7];
519 u_int8_t filler_8[3];
524 /* nVidia MediaShield Metadata */
525 #define NVIDIA_LBA(dev) \
526 (((struct ad_softc *)device_get_ivars(dev))->total_secs - 2)
528 struct nvidia_raid_conf {
529 u_int8_t nvidia_id[8];
530 #define NV_MAGIC "NVIDIA "
532 u_int32_t config_size;
535 u_int8_t disk_number;
537 u_int32_t total_sectors;
538 u_int32_t sector_size;
540 u_int8_t revision[4];
544 #define NV_MAGIC0 0x00640044
549 u_int8_t array_width;
550 u_int8_t total_disks;
553 #define NV_T_RAID0 0x00000080
554 #define NV_T_RAID1 0x00000081
555 #define NV_T_RAID3 0x00000083
556 #define NV_T_RAID5 0x00000085
557 #define NV_T_RAID01 0x00008180
558 #define NV_T_SPAN 0x000000ff
561 u_int32_t stripe_sectors;
562 u_int32_t stripe_bytes;
563 u_int32_t stripe_shift;
564 u_int32_t stripe_mask;
565 u_int32_t stripe_sizesectors;
566 u_int32_t stripe_sizebytes;
567 u_int32_t rebuild_lba;
571 #define NV_S_BOOTABLE 0x00000001
572 #define NV_S_DEGRADED 0x00000002
574 u_int32_t filler[98];
578 /* Promise FastTrak Metadata */
579 #define PR_LBA(dev) \
580 (((((struct ad_softc *)device_get_ivars(dev))->total_secs / (((struct ad_softc *)device_get_ivars(dev))->heads * ((struct ad_softc *)device_get_ivars(dev))->sectors)) * ((struct ad_softc *)device_get_ivars(dev))->heads * ((struct ad_softc *)device_get_ivars(dev))->sectors) - ((struct ad_softc *)device_get_ivars(dev))->sectors)
582 struct promise_raid_conf {
584 #define PR_MAGIC "Promise Technology, Inc."
588 #define PR_MAGIC0(x) (((u_int64_t)(x.channel) << 48) | \
589 ((u_int64_t)(x.device != 0) << 56))
592 u_int8_t filler1[470];
595 #define PR_I_VALID 0x00000080
598 #define PR_F_VALID 0x00000001
599 #define PR_F_ONLINE 0x00000002
600 #define PR_F_ASSIGNED 0x00000004
601 #define PR_F_SPARE 0x00000008
602 #define PR_F_DUPLICATE 0x00000010
603 #define PR_F_REDIR 0x00000020
604 #define PR_F_DOWN 0x00000040
605 #define PR_F_READY 0x00000080
607 u_int8_t disk_number;
610 u_int64_t magic_0 __packed;
611 u_int32_t disk_offset;
612 u_int32_t disk_sectors;
613 u_int32_t rebuild_lba;
614 u_int16_t generation;
616 #define PR_S_VALID 0x01
617 #define PR_S_ONLINE 0x02
618 #define PR_S_INITED 0x04
619 #define PR_S_READY 0x08
620 #define PR_S_DEGRADED 0x10
621 #define PR_S_MARKED 0x20
622 #define PR_S_FUNCTIONAL 0x80
625 #define PR_T_RAID0 0x00
626 #define PR_T_RAID1 0x01
627 #define PR_T_RAID3 0x02
628 #define PR_T_RAID5 0x04
629 #define PR_T_SPAN 0x08
630 #define PR_T_JBOD 0x10
632 u_int8_t total_disks;
633 u_int8_t stripe_shift;
634 u_int8_t array_width;
635 u_int8_t array_number;
636 u_int32_t total_sectors;
640 u_int64_t magic_1 __packed;
646 u_int64_t magic_0 __packed;
649 int32_t filler2[346];
654 /* Silicon Image Medley Metadata */
655 #define SII_LBA(dev) \
656 ( ((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
658 struct sii_raid_conf {
659 u_int16_t ata_params_00_53[54];
660 u_int64_t total_sectors;
661 u_int16_t ata_params_58_79[70];
664 u_int32_t controller_pci_id;
665 u_int16_t version_minor;
666 u_int16_t version_major;
667 u_int8_t timestamp[6];
668 u_int16_t stripe_sectors;
670 u_int8_t disk_number;
672 #define SII_T_RAID0 0x00
673 #define SII_T_RAID1 0x01
674 #define SII_T_RAID01 0x02
675 #define SII_T_SPARE 0x03
677 u_int8_t raid0_disks;
678 u_int8_t raid0_ident;
679 u_int8_t raid1_disks;
680 u_int8_t raid1_ident;
681 u_int64_t rebuild_lba;
682 u_int32_t generation;
684 #define SII_S_READY 0x01
686 u_int8_t base_raid1_position;
687 u_int8_t base_raid0_position;
691 u_int16_t checksum_0;
693 u_int16_t checksum_1;
697 /* VIA Tech V-RAID Metadata */
698 #define VIA_LBA(dev) \
699 ( ((struct ad_softc *)device_get_ivars(dev))->total_secs - 1)
701 struct via_raid_conf {
703 #define VIA_MAGIC 0xaa55
707 #define VIA_T_MASK 0xfe
708 #define VIA_T_BOOTABLE 0x01
709 #define VIA_T_RAID0 0x04
710 #define VIA_T_RAID1 0x0c
711 #define VIA_T_SPAN 0x44
714 #define VIA_D_MASK 0x0f
715 #define VIA_D_DEGRADED 0x10
717 u_int8_t stripe_layout;
718 #define VIA_L_MASK 0x07
719 #define VIA_L_SHIFT 4
721 u_int64_t total_sectors;
725 u_int8_t filler_1[461];