2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
35 #include <sys/endian.h>
36 #include <sys/malloc.h>
38 #include <sys/mutex.h>
40 #include <sys/taskqueue.h>
42 #include <machine/stdarg.h>
43 #include <machine/resource.h>
44 #include <machine/bus.h>
46 #include <dev/ata/ata-all.h>
50 ata_sata_phy_check_events(device_t dev, int port)
52 struct ata_channel *ch = device_get_softc(dev);
53 u_int32_t error, status;
55 if (ata_sata_scr_read(ch, port, ATA_SERROR, &error))
58 /* Check that SError value is sane. */
59 if (error == 0xffffffff)
62 /* Clear set error bits/interrupt. */
64 ata_sata_scr_write(ch, port, ATA_SERROR, error);
66 /* if we have a connection event deal with it */
67 if ((error & ATA_SE_PHY_CHANGED) && (ch->pm_level == 0)) {
69 if (ata_sata_scr_read(ch, port, ATA_SSTATUS, &status)) {
70 device_printf(dev, "PHYRDY change\n");
71 } else if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) &&
72 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) &&
73 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) {
74 device_printf(dev, "CONNECT requested\n");
76 device_printf(dev, "DISCONNECT requested\n");
78 taskqueue_enqueue(taskqueue_thread, &ch->conntask);
83 ata_sata_scr_read(struct ata_channel *ch, int port, int reg, uint32_t *val)
86 if (ch->hw.pm_read != NULL)
87 return (ch->hw.pm_read(ch->dev, port, reg, val));
88 if (ch->r_io[reg].res) {
89 *val = ATA_IDX_INL(ch, reg);
96 ata_sata_scr_write(struct ata_channel *ch, int port, int reg, uint32_t val)
99 if (ch->hw.pm_write != NULL)
100 return (ch->hw.pm_write(ch->dev, port, reg, val));
101 if (ch->r_io[reg].res) {
102 ATA_IDX_OUTL(ch, reg, val);
109 ata_sata_connect(struct ata_channel *ch, int port, int quick)
114 /* wait up to 1 second for "connect well" */
115 timeout = (quick == 2) ? 0 : 100;
118 if (ata_sata_scr_read(ch, port, ATA_SSTATUS, &status))
120 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) &&
121 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) &&
122 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE))
131 device_printf(ch->dev, "SATA connect timeout status=%08x\n",
134 device_printf(ch->dev, "p%d: SATA connect timeout status=%08x\n",
137 } else if (port < 0) {
138 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n",
141 device_printf(ch->dev, "p%d: SATA connect time=%dms status=%08x\n",
142 port, t * 10, status);
146 /* clear SATA error register */
147 ata_sata_scr_write(ch, port, ATA_SERROR, 0xffffffff);
149 return ((t > timeout) ? 0 : 1);
153 ata_sata_phy_reset(device_t dev, int port, int quick)
155 struct ata_channel *ch = device_get_softc(dev);
156 int loop, retry, sata_rev;
159 sata_rev = ch->user[port < 0 ? 0 : port].revision;
164 if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val))
166 if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_IDLE) {
167 ata_sata_scr_write(ch, port, ATA_SCONTROL,
168 ATA_SC_DET_IDLE | ((ch->pm_level > 0) ? 0 :
169 ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER));
170 return ata_sata_connect(ch, port, quick);
176 device_printf(dev, "hard reset ...\n");
178 device_printf(dev, "p%d: hard reset ...\n", port);
182 val1 = ATA_SC_SPD_SPEED_GEN1;
183 else if (sata_rev == 2)
184 val1 = ATA_SC_SPD_SPEED_GEN2;
185 else if (sata_rev == 3)
186 val1 = ATA_SC_SPD_SPEED_GEN3;
189 for (retry = 0; retry < 10; retry++) {
190 for (loop = 0; loop < 10; loop++) {
191 if (ata_sata_scr_write(ch, port, ATA_SCONTROL, ATA_SC_DET_RESET |
192 val1 | ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))
195 if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val))
197 if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_RESET)
201 for (loop = 0; loop < 10; loop++) {
202 if (ata_sata_scr_write(ch, port, ATA_SCONTROL,
203 ATA_SC_DET_IDLE | val1 | ((ch->pm_level > 0) ? 0 :
204 ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER)))
207 if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val))
209 if ((val & ATA_SC_DET_MASK) == 0)
210 return ata_sata_connect(ch, port, 0);
214 /* Clear SATA error register. */
215 ata_sata_scr_write(ch, port, ATA_SERROR, 0xffffffff);
219 device_printf(dev, "hard reset failed\n");
221 device_printf(dev, "p%d: hard reset failed\n", port);
228 ata_sata_setmode(device_t dev, int target, int mode)
231 return (min(mode, ATA_UDMA5));
235 ata_sata_getrev(device_t dev, int target)
237 struct ata_channel *ch = device_get_softc(dev);
239 if (ch->r_io[ATA_SSTATUS].res)
240 return ((ATA_IDX_INL(ch, ATA_SSTATUS) & 0x0f0) >> 4);
245 ata_request2fis_h2d(struct ata_request *request, u_int8_t *fis)
248 if (request->flags & ATA_R_ATAPI) {
249 fis[0] = 0x27; /* host to device */
250 fis[1] = 0x80 | (request->unit & 0x0f);
251 fis[2] = ATA_PACKET_CMD;
252 if (request->flags & (ATA_R_READ | ATA_R_WRITE))
255 fis[5] = request->transfersize;
256 fis[6] = request->transfersize >> 8;
259 fis[15] = ATA_A_4BIT;
263 fis[0] = 0x27; /* host to device */
264 fis[1] = 0x80 | (request->unit & 0x0f);
265 fis[2] = request->u.ata.command;
266 fis[3] = request->u.ata.feature;
267 fis[4] = request->u.ata.lba;
268 fis[5] = request->u.ata.lba >> 8;
269 fis[6] = request->u.ata.lba >> 16;
271 if (!(request->flags & ATA_R_48BIT))
272 fis[7] |= (ATA_D_IBM | (request->u.ata.lba >> 24 & 0x0f));
273 fis[8] = request->u.ata.lba >> 24;
274 fis[9] = request->u.ata.lba >> 32;
275 fis[10] = request->u.ata.lba >> 40;
276 fis[11] = request->u.ata.feature >> 8;
277 fis[12] = request->u.ata.count;
278 fis[13] = request->u.ata.count >> 8;
279 fis[15] = ATA_A_4BIT;
286 ata_pm_identify(device_t dev)
288 struct ata_channel *ch = device_get_softc(dev);
289 u_int32_t pm_chipid, pm_revision, pm_ports;
292 /* get PM vendor & product data */
293 if (ch->hw.pm_read(dev, ATA_PM, 0, &pm_chipid)) {
294 device_printf(dev, "error getting PM vendor data\n");
298 /* get PM revision data */
299 if (ch->hw.pm_read(dev, ATA_PM, 1, &pm_revision)) {
300 device_printf(dev, "error getting PM revison data\n");
304 /* get number of HW ports on the PM */
305 if (ch->hw.pm_read(dev, ATA_PM, 2, &pm_ports)) {
306 device_printf(dev, "error getting PM port info\n");
309 pm_ports &= 0x0000000f;
311 /* chip specific quirks */
314 /* This PM declares 6 ports, while only 5 of them are real.
315 * Port 5 is enclosure management bridge port, which has implementation
316 * problems, causing probe faults. Hide it for now. */
317 device_printf(dev, "SiI 3726 (rev=%x) Port Multiplier with %d (5) ports\n",
318 pm_revision, pm_ports);
323 /* This PM declares 7 ports, while only 5 of them are real.
324 * Port 5 is some fake "Config Disk" with 640 sectors size,
325 * port 6 is enclosure management bridge port.
326 * Both fake ports has implementation problems, causing
327 * probe faults. Hide them for now. */
328 device_printf(dev, "SiI 4726 (rev=%x) Port Multiplier with %d (5) ports\n",
329 pm_revision, pm_ports);
334 device_printf(dev, "Port Multiplier (id=%08x rev=%x) with %d ports\n",
335 pm_chipid, pm_revision, pm_ports);
338 /* reset all ports and register if anything connected */
339 for (port=0; port < pm_ports; port++) {
342 if (!ata_sata_phy_reset(dev, port, 1))
346 * XXX: I have no idea how to properly wait for PMP port hardreset
347 * completion. Without this delay soft reset does not completes
352 signature = ch->hw.softreset(dev, port);
355 device_printf(dev, "p%d: SIGNATURE=%08x\n", port, signature);
357 /* figure out whats there */
358 switch (signature >> 16) {
360 ch->devices |= (ATA_ATA_MASTER << port);
363 ch->devices |= (ATA_ATAPI_MASTER << port);