2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/module.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
37 #include <sys/endian.h>
38 #include <sys/malloc.h>
40 #include <sys/mutex.h>
42 #include <sys/taskqueue.h>
44 #include <machine/stdarg.h>
45 #include <machine/resource.h>
46 #include <machine/bus.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/ata/ata-all.h>
51 #include <dev/ata/ata-pci.h>
54 /* local prototypes */
55 static int ata_via_chipinit(device_t dev);
56 static int ata_via_allocate(device_t dev);
57 static void ata_via_reset(device_t dev);
58 static void ata_via_old_setmode(device_t dev, int mode);
59 static void ata_via_southbridge_fixup(device_t dev);
60 static void ata_via_new_setmode(device_t dev, int mode);
75 * VIA Technologies Inc. chipset support functions
78 ata_via_probe(device_t dev)
80 struct ata_pci_controller *ctlr = device_get_softc(dev);
81 static struct ata_chip_id ids[] =
82 {{ ATA_VIA82C586, 0x02, VIA33, 0x00, ATA_UDMA2, "82C586B" },
83 { ATA_VIA82C586, 0x00, VIA33, 0x00, ATA_WDMA2, "82C586" },
84 { ATA_VIA82C596, 0x12, VIA66, VIACLK, ATA_UDMA4, "82C596B" },
85 { ATA_VIA82C596, 0x00, VIA33, 0x00, ATA_UDMA2, "82C596" },
86 { ATA_VIA82C686, 0x40, VIA100, VIABUG, ATA_UDMA5, "82C686B"},
87 { ATA_VIA82C686, 0x10, VIA66, VIACLK, ATA_UDMA4, "82C686A" },
88 { ATA_VIA82C686, 0x00, VIA33, 0x00, ATA_UDMA2, "82C686" },
89 { ATA_VIA8231, 0x00, VIA100, VIABUG, ATA_UDMA5, "8231" },
90 { ATA_VIA8233, 0x00, VIA100, 0x00, ATA_UDMA5, "8233" },
91 { ATA_VIA8233C, 0x00, VIA100, 0x00, ATA_UDMA5, "8233C" },
92 { ATA_VIA8233A, 0x00, VIA133, 0x00, ATA_UDMA6, "8233A" },
93 { ATA_VIA8235, 0x00, VIA133, 0x00, ATA_UDMA6, "8235" },
94 { ATA_VIA8237, 0x00, VIA133, 0x00, ATA_UDMA6, "8237" },
95 { ATA_VIA8237A, 0x00, VIA133, 0x00, ATA_UDMA6, "8237A" },
96 { ATA_VIA8237S, 0x00, VIA133, 0x00, ATA_UDMA6, "8237S" },
97 { ATA_VIA8251, 0x00, VIA133, 0x00, ATA_UDMA6, "8251" },
98 { 0, 0, 0, 0, 0, 0 }};
99 static struct ata_chip_id new_ids[] =
100 {{ ATA_VIA6410, 0x00, 0, 0x00, ATA_UDMA6, "6410" },
101 { ATA_VIA6420, 0x00, 7, 0x00, ATA_SA150, "6420" },
102 { ATA_VIA6421, 0x00, 6, VIABAR, ATA_SA150, "6421" },
103 { ATA_VIA8237A, 0x00, 7, 0x00, ATA_SA150, "8237A" },
104 { ATA_VIA8237S, 0x00, 7, 0x00, ATA_SA150, "8237S" },
105 { ATA_VIA8251, 0x00, 0, VIAAHCI, ATA_SA300, "8251" },
106 { 0, 0, 0, 0, 0, 0 }};
108 if (pci_get_vendor(dev) != ATA_VIA_ID)
111 if (pci_get_devid(dev) == ATA_VIA82C571) {
112 if (!(ctlr->chip = ata_find_chip(dev, ids, -99)))
116 if (!(ctlr->chip = ata_match_chip(dev, new_ids)))
121 ctlr->chipinit = ata_via_chipinit;
126 ata_via_chipinit(device_t dev)
128 struct ata_pci_controller *ctlr = device_get_softc(dev);
130 if (ata_setup_interrupt(dev, ata_generic_intr))
133 if (ctlr->chip->max_dma >= ATA_SA150) {
134 /* do we have AHCI capability ? */
135 if ((ctlr->chip->cfg2 == VIAAHCI) && ata_ahci_chipinit(dev) != ENXIO)
138 ctlr->r_type2 = SYS_RES_IOPORT;
139 ctlr->r_rid2 = PCIR_BAR(5);
140 if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
141 &ctlr->r_rid2, RF_ACTIVE))) {
142 ctlr->allocate = ata_via_allocate;
143 ctlr->reset = ata_via_reset;
145 /* enable PCI interrupt */
146 pci_write_config(dev, PCIR_COMMAND,
147 pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400,2);
150 if (ctlr->chip->cfg2 & VIABAR) {
152 ctlr->setmode = ata_via_new_setmode;
155 ctlr->setmode = ata_sata_setmode;
159 /* prepare for ATA-66 on the 82C686a and 82C596b */
160 if (ctlr->chip->cfg2 & VIACLK)
161 pci_write_config(dev, 0x50, 0x030b030b, 4);
163 /* the southbridge might need the data corruption fix */
164 if (ctlr->chip->cfg2 & VIABUG)
165 ata_via_southbridge_fixup(dev);
167 /* set fifo configuration half'n'half */
168 pci_write_config(dev, 0x43,
169 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1);
171 /* set status register read retry */
172 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1);
174 /* set DMA read & end-of-sector fifo flush */
175 pci_write_config(dev, 0x46,
176 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
178 /* set sector size */
179 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
180 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
182 ctlr->setmode = ata_via_old_setmode;
187 ata_via_allocate(device_t dev)
189 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
190 struct ata_channel *ch = device_get_softc(dev);
192 /* newer SATA chips has resources in one BAR for each channel */
193 if (ctlr->chip->cfg2 & VIABAR) {
194 struct resource *r_io;
197 rid = PCIR_BAR(ch->unit);
198 if (!(r_io = bus_alloc_resource_any(device_get_parent(dev),
203 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
204 ch->r_io[i].res = r_io;
205 ch->r_io[i].offset = i;
207 ch->r_io[ATA_CONTROL].res = r_io;
208 ch->r_io[ATA_CONTROL].offset = 2 + ATA_IOSIZE;
209 ch->r_io[ATA_IDX_ADDR].res = r_io;
210 ata_default_registers(dev);
211 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
212 ch->r_io[i].res = ctlr->r_res1;
213 ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
220 /* setup the usual register normal pci style */
221 if (ata_pci_allocate(dev))
225 ch->r_io[ATA_SSTATUS].res = ctlr->r_res2;
226 ch->r_io[ATA_SSTATUS].offset = (ch->unit << ctlr->chip->cfg1);
227 ch->r_io[ATA_SERROR].res = ctlr->r_res2;
228 ch->r_io[ATA_SERROR].offset = 0x04 + (ch->unit << ctlr->chip->cfg1);
229 ch->r_io[ATA_SCONTROL].res = ctlr->r_res2;
230 ch->r_io[ATA_SCONTROL].offset = 0x08 + (ch->unit << ctlr->chip->cfg1);
231 ch->flags |= ATA_NO_SLAVE;
233 /* XXX SOS PHY hotplug handling missing in VIA chip ?? */
234 /* XXX SOS unknown how to enable PHY state change interrupt */
239 ata_via_reset(device_t dev)
241 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
242 struct ata_channel *ch = device_get_softc(dev);
244 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1))
245 ata_generic_reset(dev);
247 if (ata_sata_phy_reset(dev))
248 ata_generic_reset(dev);
252 ata_via_new_setmode(device_t dev, int mode)
254 device_t gparent = GRANDPARENT(dev);
255 struct ata_pci_controller *ctlr = device_get_softc(gparent);
256 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
257 struct ata_device *atadev = device_get_softc(dev);
260 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) {
261 u_int8_t pio_timings[] = { 0xa8, 0x65, 0x65, 0x32, 0x20,
263 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 };
264 u_int8_t dma_timings[] = { 0xee, 0xe8, 0xe6, 0xe4, 0xe2, 0xe1, 0xe0 };
266 mode = ata_check_80pin(dev, ata_limit_mode(dev, mode, ATA_UDMA6));
267 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
269 device_printf(dev, "%ssetting %s on %s chip\n",
270 (error) ? "FAILURE " : "", ata_mode2str(mode),
273 pci_write_config(gparent, 0xab, pio_timings[ata_mode2idx(mode)], 1);
274 if (mode >= ATA_UDMA0)
275 pci_write_config(gparent, 0xb3,
276 dma_timings[mode & ATA_MODE_MASK], 1);
281 ata_sata_setmode(dev, mode);
285 ata_via_old_setmode(device_t dev, int mode)
287 device_t gparent = GRANDPARENT(dev);
288 struct ata_pci_controller *ctlr = device_get_softc(gparent);
289 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
290 struct ata_device *atadev = device_get_softc(dev);
291 u_int8_t timings[] = { 0xa8, 0x65, 0x42, 0x22, 0x20, 0x42, 0x22, 0x20,
292 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 };
294 { 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */
295 { 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */
296 { 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0, 0x00 }, /* VIA ATA100 */
297 { 0xf7, 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0 } }; /* VIA ATA133 */
298 int devno = (ch->unit << 1) + atadev->unit;
299 int reg = 0x53 - devno;
302 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma);
303 mode = ata_check_80pin(dev, mode);
305 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
307 device_printf(dev, "%ssetting %s on %s chip\n",
308 (error) ? "FAILURE " : "", ata_mode2str(mode),
311 if (ctlr->chip->cfg1 != VIA133)
312 pci_write_config(gparent, reg - 0x08,timings[ata_mode2idx(mode)],1);
313 if (mode >= ATA_UDMA0)
314 pci_write_config(gparent, reg,
315 modes[ctlr->chip->cfg1][mode & ATA_MODE_MASK], 1);
317 pci_write_config(gparent, reg, 0x8b, 1);
323 ata_via_southbridge_fixup(device_t dev)
328 if (device_get_children(device_get_parent(dev), &children, &nchildren))
331 for (i = 0; i < nchildren; i++) {
332 if (pci_get_devid(children[i]) == ATA_VIA8363 ||
333 pci_get_devid(children[i]) == ATA_VIA8371 ||
334 pci_get_devid(children[i]) == ATA_VIA8662 ||
335 pci_get_devid(children[i]) == ATA_VIA8361) {
336 u_int8_t reg76 = pci_read_config(children[i], 0x76, 1);
338 if ((reg76 & 0xf0) != 0xd0) {
340 "Correcting VIA config for southbridge data corruption bug\n");
341 pci_write_config(children[i], 0x75, 0x80, 1);
342 pci_write_config(children[i], 0x76, (reg76 & 0x0f) | 0xd0, 1);
347 free(children, M_TEMP);
350 ATA_DECLARE_DRIVER(ata_via);
351 MODULE_DEPEND(ata_via, ata_ahci, 1, 1, 1);