2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/sysctl.h>
39 #include <sys/malloc.h>
42 #include <machine/stdarg.h>
44 #include <net/ethernet.h> /* XXX for ether_sprintf */
46 #include <contrib/dev/ath/ah.h>
49 * WiSoC boards overload the bus tag with information about the
50 * board layout. We must extract the bus space tag from that
51 * indirect structure. For everyone else the tag is passed in
53 * XXX cache indirect ref privately
55 #ifdef AH_SUPPORT_AR5312
57 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
59 #define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st)
62 extern void ath_hal_printf(struct ath_hal *, const char*, ...)
64 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
66 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac);
67 extern void *ath_hal_malloc(size_t);
68 extern void ath_hal_free(void *);
70 extern void ath_hal_assert_failed(const char* filename,
71 int lineno, const char* msg);
74 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...);
75 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...);
78 /* NB: put this here instead of the driver to avoid circular references */
79 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
80 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
83 static int ath_hal_debug = 0;
84 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
85 0, "Atheros HAL debugging printfs");
86 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
89 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0,
90 "Atheros HAL version");
92 /* NB: these are deprecated; they exist for now for compatibility */
93 int ath_hal_dma_beacon_response_time = 2; /* in TU's */
94 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
95 &ath_hal_dma_beacon_response_time, 0,
96 "Atheros HAL DMA beacon response time");
97 int ath_hal_sw_beacon_response_time = 10; /* in TU's */
98 SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW,
99 &ath_hal_sw_beacon_response_time, 0,
100 "Atheros HAL software beacon response time");
101 int ath_hal_additional_swba_backoff = 0; /* in TU's */
102 SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW,
103 &ath_hal_additional_swba_backoff, 0,
104 "Atheros HAL additional SWBA backoff time");
106 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
109 ath_hal_malloc(size_t size)
111 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
115 ath_hal_free(void* p)
117 return free(p, M_ATH_HAL);
121 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap)
127 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
131 ath_hal_vprintf(ah, fmt, ap);
136 ath_hal_ether_sprintf(const u_int8_t *mac)
138 return ether_sprintf(mac);
143 HALDEBUG(struct ath_hal *ah, const char* fmt, ...)
148 ath_hal_vprintf(ah, fmt, ap);
154 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...)
156 if (ath_hal_debug >= level) {
159 ath_hal_vprintf(ah, fmt, ap);
163 #endif /* AH_DEBUG */
167 * ALQ register tracing support.
169 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
170 * writes to the file /tmp/ath_hal.log. The file format is a simple
171 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
172 * and then decode the file with the arcode program (that is part of the
173 * HAL). If you start+stop tracing the data will be appended to an
176 * NB: doesn't handle multiple devices properly; only one DEVICE record
177 * is emitted and the different devices are not identified.
180 #include <sys/pcpu.h>
181 #include <contrib/dev/ath/ah_decode.h>
183 static struct alq *ath_hal_alq;
184 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */
185 static u_int ath_hal_alq_lost; /* count of lost records */
186 static const char *ath_hal_logfile = "/tmp/ath_hal.log";
187 static u_int ath_hal_alq_qsize = 64*1024;
190 ath_hal_setlogging(int enable)
195 error = alq_open(&ath_hal_alq, ath_hal_logfile,
196 curthread->td_ucred, ALQ_DEFAULT_CMODE,
197 sizeof (struct athregrec), ath_hal_alq_qsize);
198 ath_hal_alq_lost = 0;
199 ath_hal_alq_emitdev = 1;
200 printf("ath_hal: logging to %s enabled\n",
204 alq_close(ath_hal_alq);
206 printf("ath_hal: logging disabled\n");
213 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
217 enable = (ath_hal_alq != NULL);
218 error = sysctl_handle_int(oidp, &enable, 0, req);
219 if (error || !req->newptr)
222 return (ath_hal_setlogging(enable));
224 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
225 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
226 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
227 &ath_hal_alq_qsize, 0, "In-memory log size (#records)");
228 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
229 &ath_hal_alq_lost, 0, "Register operations not logged");
232 ath_hal_alq_get(struct ath_hal *ah)
236 if (ath_hal_alq_emitdev) {
237 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
239 struct athregrec *r =
240 (struct athregrec *) ale->ae_data;
243 r->val = ah->ah_devid;
244 alq_post(ath_hal_alq, ale);
245 ath_hal_alq_emitdev = 0;
249 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
256 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
258 bus_space_tag_t tag = BUSTAG(ah);
259 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
262 struct ale *ale = ath_hal_alq_get(ah);
264 struct athregrec *r = (struct athregrec *) ale->ae_data;
268 alq_post(ath_hal_alq, ale);
271 #if _BYTE_ORDER == _BIG_ENDIAN
272 if (reg >= 0x4000 && reg < 0x5000)
273 bus_space_write_4(tag, h, reg, val);
276 bus_space_write_stream_4(tag, h, reg, val);
280 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
282 bus_space_tag_t tag = BUSTAG(ah);
283 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
286 #if _BYTE_ORDER == _BIG_ENDIAN
287 if (reg >= 0x4000 && reg < 0x5000)
288 val = bus_space_read_4(tag, h, reg);
291 val = bus_space_read_stream_4(tag, h, reg);
293 struct ale *ale = ath_hal_alq_get(ah);
295 struct athregrec *r = (struct athregrec *) ale->ae_data;
299 alq_post(ath_hal_alq, ale);
306 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
309 struct ale *ale = ath_hal_alq_get(ah);
311 struct athregrec *r = (struct athregrec *) ale->ae_data;
315 alq_post(ath_hal_alq, ale);
319 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
321 * Memory-mapped device register read/write. These are here
322 * as routines when debugging support is enabled and/or when
323 * explicitly configured to use function calls. The latter is
324 * for architectures that might need to do something before
325 * referencing memory (e.g. remap an i/o window).
327 * NB: see the comments in ah_osdep.h about byte-swapping register
328 * reads and writes to understand what's going on below.
332 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
334 bus_space_tag_t tag = BUSTAG(ah);
335 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
337 #if _BYTE_ORDER == _BIG_ENDIAN
338 if (reg >= 0x4000 && reg < 0x5000)
339 bus_space_write_4(tag, h, reg, val);
342 bus_space_write_stream_4(tag, h, reg, val);
346 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
348 bus_space_tag_t tag = BUSTAG(ah);
349 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
352 #if _BYTE_ORDER == _BIG_ENDIAN
353 if (reg >= 0x4000 && reg < 0x5000)
354 val = bus_space_read_4(tag, h, reg);
357 val = bus_space_read_stream_4(tag, h, reg);
360 #endif /* AH_DEBUG || AH_REGOPS_FUNC */
364 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
366 printf("Atheros HAL assertion failure: %s: line %u: %s\n",
367 filename, lineno, msg);
368 panic("ath_hal_assert");
370 #endif /* AH_ASSERT */
373 * Delay n microseconds.
382 ath_hal_getuptime(struct ath_hal *ah)
386 return (bt.sec * 1000) +
387 (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32);
391 ath_hal_memzero(void *dst, size_t n)
397 ath_hal_memcpy(void *dst, const void *src, size_t n)
399 return memcpy(dst, src, n);
407 ath_hal_modevent(module_t mod, int type, void *unused)
414 printf("ath_hal: %s (", ath_hal_version);
416 for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
417 printf("%s%s", sep, ath_hal_buildopts[i]);
428 static moduledata_t ath_hal_mod = {
433 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
434 MODULE_VERSION(ath_hal, 1);