2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 #ifndef _ATH_AH_EEPROM_H_
22 #define _ATH_AH_EEPROM_H_
24 #define AR_EEPROM_VER1 0x1000 /* Version 1.0; 5210 only */
26 * Version 3 EEPROMs are all 16K.
27 * 3.1 adds turbo limit, antenna gain, 16 CTL's, 11g info,
28 * and 2.4Ghz ob/db for B & G
29 * 3.2 has more accurate pcdac intercepts and analog chip
31 * 3.3 adds ctl in-band limit, 32 ctl's, and frequency
33 * 3.4 adds xr power, gainI, and 2.4 turbo params
35 #define AR_EEPROM_VER3 0x3000 /* Version 3.0; start of 16k EEPROM */
36 #define AR_EEPROM_VER3_1 0x3001 /* Version 3.1 */
37 #define AR_EEPROM_VER3_2 0x3002 /* Version 3.2 */
38 #define AR_EEPROM_VER3_3 0x3003 /* Version 3.3 */
39 #define AR_EEPROM_VER3_4 0x3004 /* Version 3.4 */
40 #define AR_EEPROM_VER4 0x4000 /* Version 4.x */
41 #define AR_EEPROM_VER4_0 0x4000 /* Version 4.0 */
42 #define AR_EEPROM_VER4_1 0x4001 /* Version 4.0 */
43 #define AR_EEPROM_VER4_2 0x4002 /* Version 4.0 */
44 #define AR_EEPROM_VER4_3 0x4003 /* Version 4.0 */
45 #define AR_EEPROM_VER4_6 0x4006 /* Version 4.0 */
46 #define AR_EEPROM_VER4_7 0x3007 /* Version 4.7 */
47 #define AR_EEPROM_VER4_9 0x4009 /* EEPROM EAR futureproofing */
48 #define AR_EEPROM_VER5 0x5000 /* Version 5.x */
49 #define AR_EEPROM_VER5_0 0x5000 /* Adds new 2413 cal powers and added params */
50 #define AR_EEPROM_VER5_1 0x5001 /* Adds capability values */
51 #define AR_EEPROM_VER5_3 0x5003 /* Adds spur mitigation table */
52 #define AR_EEPROM_VER5_4 0x5004
54 * Version 14 EEPROMs came in with AR5416.
55 * 14.2 adds txFrameToPaOn, txFrameToDataStart, ht40PowerInc
56 * 14.3 adds bswAtten, bswMargin, swSettle, and base OpFlags for HT20/40
58 #define AR_EEPROM_VER14 0xE000 /* Version 14.x */
59 #define AR_EEPROM_VER14_1 0xE001 /* Adds 11n support */
60 #define AR_EEPROM_VER14_2 0xE002
61 #define AR_EEPROM_VER14_3 0xE003
62 #define AR_EEPROM_VER14_7 0xE007
63 #define AR_EEPROM_VER14_9 0xE009
64 #define AR_EEPROM_VER14_16 0xE010
65 #define AR_EEPROM_VER14_17 0xE011
66 #define AR_EEPROM_VER14_19 0xE013
69 AR_EEP_RFKILL, /* use ath_hal_eepromGetFlag */
70 AR_EEP_AMODE, /* use ath_hal_eepromGetFlag */
71 AR_EEP_BMODE, /* use ath_hal_eepromGetFlag */
72 AR_EEP_GMODE, /* use ath_hal_eepromGetFlag */
73 AR_EEP_TURBO5DISABLE, /* use ath_hal_eepromGetFlag */
74 AR_EEP_TURBO2DISABLE, /* use ath_hal_eepromGetFlag */
75 AR_EEP_ISTALON, /* use ath_hal_eepromGetFlag */
76 AR_EEP_32KHZCRYSTAL, /* use ath_hal_eepromGetFlag */
77 AR_EEP_MACADDR, /* uint8_t* */
78 AR_EEP_COMPRESS, /* use ath_hal_eepromGetFlag */
79 AR_EEP_FASTFRAME, /* use ath_hal_eepromGetFlag */
80 AR_EEP_AES, /* use ath_hal_eepromGetFlag */
81 AR_EEP_BURST, /* use ath_hal_eepromGetFlag */
82 AR_EEP_MAXQCU, /* uint16_t* */
83 AR_EEP_KCENTRIES, /* uint16_t* */
84 AR_EEP_NFTHRESH_5, /* int16_t* */
85 AR_EEP_NFTHRESH_2, /* int16_t* */
86 AR_EEP_REGDMN_0, /* uint16_t* */
87 AR_EEP_REGDMN_1, /* uint16_t* */
88 AR_EEP_OPCAP, /* uint16_t* */
89 AR_EEP_OPMODE, /* uint16_t* */
90 AR_EEP_RFSILENT, /* uint16_t* */
91 AR_EEP_OB_5, /* uint8_t* */
92 AR_EEP_DB_5, /* uint8_t* */
93 AR_EEP_OB_2, /* uint8_t* */
94 AR_EEP_DB_2, /* uint8_t* */
95 AR_EEP_TXMASK, /* uint8_t* */
96 AR_EEP_RXMASK, /* uint8_t* */
97 AR_EEP_RXGAIN_TYPE, /* uint8_t* */
98 AR_EEP_TXGAIN_TYPE, /* uint8_t* */
99 AR_EEP_DAC_HPWR_5G, /* uint8_t* */
100 AR_EEP_OL_PWRCTRL, /* use ath_hal_eepromGetFlag */
101 AR_EEP_FSTCLK_5G, /* use ath_hal_eepromGetFlag */
102 AR_EEP_ANTGAINMAX_5, /* int8_t* */
103 AR_EEP_ANTGAINMAX_2, /* int8_t* */
104 AR_EEP_WRITEPROTECT, /* use ath_hal_eepromGetFlag */
105 AR_EEP_PWR_TABLE_OFFSET,/* int8_t* */
106 AR_EEP_PWDCLKIND, /* uint8_t* */
107 AR_EEP_TEMPSENSE_SLOPE, /* int8_t* */
108 AR_EEP_TEMPSENSE_SLOPE_PAL_ON, /* int8_t* */
109 AR_EEP_FRAC_N_5G, /* uint8_t* */
111 /* New fields for AR9300 and later */
112 AR_EEP_DRIVE_STRENGTH,
113 AR_EEP_PAPRD_ENABLED,
118 uint16_t twice_rdEdgePower;
122 /* XXX should probably be version-dependent */
123 #define SD_NO_CTL 0xf0
125 #define CTL_MODE_M 0x0f
136 /* XXX must match what FCC/MKK/ETSI are defined as in ah_regdomain.h */
137 #define HAL_REG_DMN_MASK 0xf0
138 #define HAL_REGDMN_FCC 0x10
139 #define HAL_REGDMN_MKK 0x40
140 #define HAL_REGDMN_ETSI 0x30
142 #define is_reg_dmn_fcc(reg_dmn) \
143 (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_FCC) ? 1 : 0)
144 #define is_reg_dmn_etsi(reg_dmn) \
145 (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_ETSI) ? 1 : 0)
146 #define is_reg_dmn_mkk(reg_dmn) \
147 (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_MKK) ? 1 : 0)
149 #define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
150 #define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
151 #define AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100
152 #define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
153 #define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
154 #define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
156 /* regulatory capabilities prior to eeprom version 4.0 */
157 #define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000
158 #define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000
160 #define AR_NO_SPUR 0x8000
162 /* XXX exposed to chip code */
163 #define MAX_RATE_POWER 63
165 HAL_STATUS ath_hal_v1EepromAttach(struct ath_hal *ah);
166 HAL_STATUS ath_hal_legacyEepromAttach(struct ath_hal *ah);
167 HAL_STATUS ath_hal_v14EepromAttach(struct ath_hal *ah);
168 HAL_STATUS ath_hal_v4kEepromAttach(struct ath_hal *ah);
169 HAL_STATUS ath_hal_9287EepromAttach(struct ath_hal *ah);
170 #endif /* _ATH_AH_EEPROM_H_ */