2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2006 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 #include "ah_internal.h"
26 #include "ar5211/ar5211.h"
27 #include "ar5211/ar5211reg.h"
30 * Chips-specific key cache routines.
33 #define AR_KEYTABLE_SIZE 128
37 * Return the size of the hardware key cache.
40 ar5211GetKeyCacheSize(struct ath_hal *ah)
42 return AR_KEYTABLE_SIZE;
46 * Return true if the specific key cache entry is valid.
49 ar5211IsKeyCacheEntryValid(struct ath_hal *ah, uint16_t entry)
51 if (entry < AR_KEYTABLE_SIZE) {
52 uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
53 if (val & AR_KEYTABLE_VALID)
60 * Clear the specified key cache entry
63 ar5211ResetKeyCacheEntry(struct ath_hal *ah, uint16_t entry)
65 if (entry < AR_KEYTABLE_SIZE) {
66 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0);
67 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0);
68 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0);
69 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0);
70 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0);
71 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), 0);
72 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0);
73 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0);
80 * Sets the mac part of the specified key cache entry and mark it valid.
83 ar5211SetKeyCacheEntryMac(struct ath_hal *ah, uint16_t entry, const uint8_t *mac)
85 uint32_t macHi, macLo;
87 if (entry >= AR_KEYTABLE_SIZE) {
88 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: entry %u out of range\n",
94 * Set MAC address -- shifted right by 1. MacLo is
95 * the 4 MSBs, and MacHi is the 2 LSBs.
98 macHi = (mac[5] << 8) | mac[4];
99 macLo = (mac[3] << 24)| (mac[2] << 16)
100 | (mac[1] << 8) | mac[0];
102 macLo |= (macHi & 1) << 31; /* carry */
108 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo);
109 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | AR_KEYTABLE_VALID);
114 * Sets the contents of the specified key cache entry.
117 ar5211SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry,
118 const HAL_KEYVAL *k, const uint8_t *mac,
121 uint32_t key0, key1, key2, key3, key4;
123 uint32_t xorMask= xorKey ?
124 (KEY_XOR << 24 | KEY_XOR << 16 | KEY_XOR << 8 | KEY_XOR) : 0;
126 if (entry >= AR_KEYTABLE_SIZE) {
127 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: entry %u out of range\n",
131 switch (k->kv_type) {
132 case HAL_CIPHER_AES_OCB:
133 keyType = AR_KEYTABLE_TYPE_AES;
136 if (k->kv_len < 40 / NBBY) {
137 HALDEBUG(ah, HAL_DEBUG_ANY,
138 "%s: WEP key length %u too small\n",
139 __func__, k->kv_len);
142 if (k->kv_len <= 40 / NBBY)
143 keyType = AR_KEYTABLE_TYPE_40;
144 else if (k->kv_len <= 104 / NBBY)
145 keyType = AR_KEYTABLE_TYPE_104;
147 keyType = AR_KEYTABLE_TYPE_128;
150 keyType = AR_KEYTABLE_TYPE_CLR;
153 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cipher %u not supported\n",
154 __func__, k->kv_type);
158 key0 = LE_READ_4(k->kv_val+0) ^ xorMask;
159 key1 = (LE_READ_2(k->kv_val+4) ^ xorMask) & 0xffff;
160 key2 = LE_READ_4(k->kv_val+6) ^ xorMask;
161 key3 = (LE_READ_2(k->kv_val+10) ^ xorMask) & 0xffff;
162 key4 = LE_READ_4(k->kv_val+12) ^ xorMask;
163 if (k->kv_len <= 104 / NBBY)
168 * Note: WEP key cache hardware requires that each double-word
169 * pair be written in even/odd order (since the destination is
170 * a 64-bit register). Don't reorder these writes w/o
171 * understanding this!
173 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);
174 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);
175 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);
176 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);
177 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);
178 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
179 return ar5211SetKeyCacheEntryMac(ah, entry, mac);