2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 #include "ah_internal.h"
27 #include "ah_desc.h" /* NB: for HAL_PHYERR* */
30 #include "ar5212/ar5212.h"
31 #include "ar5212/ar5212reg.h"
32 #include "ar5212/ar5212phy.h"
34 #define AR_NUM_GPIO 6 /* 6 GPIO pins */
35 #define AR_GPIOD_MASK 0x0000002F /* GPIO data reg r/w mask */
38 * Configure GPIO Output lines
41 ar5212GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)
43 HALASSERT(gpio < AR_NUM_GPIO);
46 * NB: AR_GPIOCR_CR_A(pin) is all 1's so there's no need
47 * to clear the field before or'ing in the new value.
49 OS_REG_WRITE(ah, AR_GPIOCR,
50 OS_REG_READ(ah, AR_GPIOCR) | AR_GPIOCR_CR_A(gpio));
56 * Configure GPIO Input lines
59 ar5212GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
61 HALASSERT(gpio < AR_NUM_GPIO);
63 OS_REG_WRITE(ah, AR_GPIOCR,
64 (OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))
65 | AR_GPIOCR_CR_N(gpio));
71 * Once configured for I/O - set output lines
74 ar5212GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
78 HALASSERT(gpio < AR_NUM_GPIO);
80 reg = OS_REG_READ(ah, AR_GPIODO);
82 reg |= (val&1) << gpio;
84 OS_REG_WRITE(ah, AR_GPIODO, reg);
89 * Once configured for I/O - get input lines
92 ar5212GpioGet(struct ath_hal *ah, uint32_t gpio)
94 if (gpio < AR_NUM_GPIO) {
95 uint32_t val = OS_REG_READ(ah, AR_GPIODI);
96 val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;
104 * Set the GPIO Interrupt
107 ar5212GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
111 /* XXX bounds check gpio */
112 val = OS_REG_READ(ah, AR_GPIOCR);
113 val &= ~(AR_GPIOCR_CR_A(gpio) |
114 AR_GPIOCR_INT_MASK | AR_GPIOCR_INT_ENA | AR_GPIOCR_INT_SEL);
115 val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;
117 val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */
119 val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */
121 /* Don't need to change anything for low level interrupt. */
122 OS_REG_WRITE(ah, AR_GPIOCR, val);
124 /* Change the interrupt mask. */
125 (void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO);