2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 * XXX this is virtually the same code as for 5212; we reuse
25 * storage in the 5212 state block; need to refactor.
28 #include "ah_internal.h"
31 #include "ar5416/ar5416.h"
32 #include "ar5416/ar5416reg.h"
33 #include "ar5416/ar5416phy.h"
36 * Anti noise immunity support. We track phy errors and react
37 * to excessive errors by adjusting the noise immunity parameters.
40 #define HAL_EP_RND(x, mul) \
41 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
42 #define BEACON_RSSI(ahp) \
43 HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
44 HAL_RSSI_EP_MULTIPLIER)
47 * ANI processing tunes radio parameters according to PHY errors
48 * and related information. This is done for for noise and spur
49 * immunity in all operating modes if the device indicates it's
50 * capable at attach time. In addition, when there is a reference
51 * rssi value (e.g. beacon frames from an ap in station mode)
52 * further tuning is done.
54 * ANI_ENA indicates whether any ANI processing should be done;
55 * this is specified at attach time.
57 * ANI_ENA_RSSI indicates whether rssi-based processing should
58 * done, this is enabled based on operating mode and is meaningful
59 * only if ANI_ENA is true.
61 * ANI parameters are typically controlled only by the hal. The
62 * AniControl interface however permits manual tuning through the
66 (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
67 #define ANI_ENA_RSSI(ah) \
68 (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
70 #define ah_mibStats ah_stats.ast_mibstats
73 enableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params)
75 struct ath_hal_5212 *ahp = AH5212(ah);
77 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: "
78 "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n",
79 __func__, params->ofdmPhyErrBase, params->cckPhyErrBase);
81 OS_REG_WRITE(ah, AR_FILTOFDM, 0);
82 OS_REG_WRITE(ah, AR_FILTCCK, 0);
84 OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase);
85 OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase);
86 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
87 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
89 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/
90 ar5212EnableMibCounters(ah); /* enable everything */
94 disableAniMIBCounters(struct ath_hal *ah)
96 struct ath_hal_5212 *ahp = AH5212(ah);
98 HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n");
100 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */
101 ar5212DisableMibCounters(ah); /* disable everything */
103 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, 0);
104 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0);
108 setPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params)
110 if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) {
111 HALDEBUG(ah, HAL_DEBUG_ANY,
112 "OFDM Trigger %d is too high for hw counters, using max\n",
113 params->ofdmTrigHigh);
114 params->ofdmPhyErrBase = 0;
116 params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh;
117 if (params->cckTrigHigh >= AR_PHY_COUNTMAX) {
118 HALDEBUG(ah, HAL_DEBUG_ANY,
119 "CCK Trigger %d is too high for hw counters, using max\n",
120 params->cckTrigHigh);
121 params->cckPhyErrBase = 0;
123 params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh;
127 * Setup ANI handling. Sets all thresholds and reset the
128 * channel statistics. Note that ar5416AniReset should be
129 * called by ar5416Reset before anything else happens and
130 * that's where we force initial settings.
133 ar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24,
134 const struct ar5212AniParams *params5, HAL_BOOL enable)
136 struct ath_hal_5212 *ahp = AH5212(ah);
138 if (params24 != AH_NULL) {
139 OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24));
140 setPhyErrBase(ah, &ahp->ah_aniParams24);
142 if (params5 != AH_NULL) {
143 OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5));
144 setPhyErrBase(ah, &ahp->ah_aniParams5);
147 OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani));
148 /* Enable MIB Counters */
149 enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/);
151 if (enable) { /* Enable ani now */
152 HALASSERT(params24 != AH_NULL && params5 != AH_NULL);
153 ahp->ah_procPhyErr |= HAL_ANI_ENA;
155 ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
160 * Cleanup any ANI state setup.
162 * This doesn't restore registers to their default settings!
165 ar5416AniDetach(struct ath_hal *ah)
167 HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n");
168 disableAniMIBCounters(ah);
172 * Control Adaptive Noise Immunity Parameters
175 ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
178 struct ath_hal_5212 *ahp = AH5212(ah);
179 struct ar5212AniState *aniState = ahp->ah_curani;
180 const struct ar5212AniParams *params = AH_NULL;
183 * This function may be called before there's a current
184 * channel (eg to disable ANI.)
186 if (aniState != AH_NULL)
187 params = aniState->params;
189 OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd);
191 /* These commands can't be disabled */
192 if (cmd == HAL_ANI_PRESENT)
195 if (cmd == HAL_ANI_MODE) {
197 ahp->ah_procPhyErr &= ~HAL_ANI_ENA;
198 /* Turn off HW counters if we have them */
200 } else { /* normal/auto mode */
201 /* don't mess with state if already enabled */
202 if (! (ahp->ah_procPhyErr & HAL_ANI_ENA)) {
203 /* Enable MIB Counters */
205 * XXX use 2.4ghz params if no channel is
208 enableAniMIBCounters(ah,
209 ahp->ah_curani != AH_NULL ?
210 ahp->ah_curani->params:
211 &ahp->ah_aniParams24);
212 ahp->ah_procPhyErr |= HAL_ANI_ENA;
218 /* Check whether the particular function is enabled */
219 if (((1 << cmd) & AH5416(ah)->ah_ani_function) == 0) {
220 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: command %d disabled\n",
222 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: cmd %d; mask %x\n", __func__, cmd, AH5416(ah)->ah_ani_function);
227 case HAL_ANI_NOISE_IMMUNITY_LEVEL: {
230 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_NOISE_IMMUNITY_LEVEL: set level = %d\n", __func__, level);
231 if (level > params->maxNoiseImmunityLevel) {
232 HALDEBUG(ah, HAL_DEBUG_ANI,
233 "%s: immunity level out of range (%u > %u)\n",
234 __func__, level, params->maxNoiseImmunityLevel);
238 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
239 AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]);
240 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
241 AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]);
242 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
243 AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]);
244 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
245 AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]);
247 if (level > aniState->noiseImmunityLevel)
248 ahp->ah_stats.ast_ani_niup++;
249 else if (level < aniState->noiseImmunityLevel)
250 ahp->ah_stats.ast_ani_nidown++;
251 aniState->noiseImmunityLevel = level;
254 case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: {
255 static const TABLE m1ThreshLow = { 127, 50 };
256 static const TABLE m2ThreshLow = { 127, 40 };
257 static const TABLE m1Thresh = { 127, 0x4d };
258 static const TABLE m2Thresh = { 127, 0x40 };
259 static const TABLE m2CountThr = { 31, 16 };
260 static const TABLE m2CountThrLow = { 63, 48 };
261 u_int on = param ? 1 : 0;
263 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: %s\n", __func__, on ? "enabled" : "disabled");
264 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
265 AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]);
266 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
267 AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]);
268 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
269 AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]);
270 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
271 AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]);
272 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
273 AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]);
274 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
275 AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]);
277 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
278 AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]);
279 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
280 AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]);
281 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
282 AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]);
283 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
284 AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]);
287 OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
288 AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
290 OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
291 AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
294 ahp->ah_stats.ast_ani_ofdmon++;
296 ahp->ah_stats.ast_ani_ofdmoff++;
297 aniState->ofdmWeakSigDetectOff = !on;
300 case HAL_ANI_CCK_WEAK_SIGNAL_THR: {
301 static const TABLE weakSigThrCck = { 8, 6 };
302 u_int high = param ? 1 : 0;
304 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_CCK_WEAK_SIGNAL_THR: %s\n", __func__, high ? "high" : "low");
305 OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
306 AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]);
308 ahp->ah_stats.ast_ani_cckhigh++;
310 ahp->ah_stats.ast_ani_ccklow++;
311 aniState->cckWeakSigThreshold = high;
314 case HAL_ANI_FIRSTEP_LEVEL: {
317 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_FIRSTEP_LEVEL: level = %d\n", __func__, level);
318 if (level > params->maxFirstepLevel) {
319 HALDEBUG(ah, HAL_DEBUG_ANI,
320 "%s: firstep level out of range (%u > %u)\n",
321 __func__, level, params->maxFirstepLevel);
324 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
325 AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]);
326 if (level > aniState->firstepLevel)
327 ahp->ah_stats.ast_ani_stepup++;
328 else if (level < aniState->firstepLevel)
329 ahp->ah_stats.ast_ani_stepdown++;
330 aniState->firstepLevel = level;
333 case HAL_ANI_SPUR_IMMUNITY_LEVEL: {
336 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: HAL_ANI_SPUR_IMMUNITY_LEVEL: level = %d\n", __func__, level);
337 if (level > params->maxSpurImmunityLevel) {
338 HALDEBUG(ah, HAL_DEBUG_ANI,
339 "%s: spur immunity level out of range (%u > %u)\n",
340 __func__, level, params->maxSpurImmunityLevel);
343 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
344 AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]);
346 if (level > aniState->spurImmunityLevel)
347 ahp->ah_stats.ast_ani_spurup++;
348 else if (level < aniState->spurImmunityLevel)
349 ahp->ah_stats.ast_ani_spurdown++;
350 aniState->spurImmunityLevel = level;
353 #ifdef AH_PRIVATE_DIAG
354 case HAL_ANI_PHYERR_RESET:
355 ahp->ah_stats.ast_ani_ofdmerrs = 0;
356 ahp->ah_stats.ast_ani_cckerrs = 0;
358 #endif /* AH_PRIVATE_DIAG */
360 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid cmd %u\n",
368 ar5416AniOfdmErrTrigger(struct ath_hal *ah)
370 struct ath_hal_5212 *ahp = AH5212(ah);
371 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
372 struct ar5212AniState *aniState;
373 const struct ar5212AniParams *params;
375 HALASSERT(chan != AH_NULL);
380 aniState = ahp->ah_curani;
381 params = aniState->params;
382 /* First, raise noise immunity level, up to max */
383 if (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel) {
384 if (ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
385 aniState->noiseImmunityLevel + 1))
388 /* then, raise spur immunity level, up to max */
389 if (aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel) {
390 if (ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
391 aniState->spurImmunityLevel + 1))
396 * In the case of AP mode operation, we cannot bucketize beacons
397 * according to RSSI. Instead, raise Firstep level, up to max, and
400 if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
401 if (aniState->firstepLevel < params->maxFirstepLevel) {
402 if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
403 aniState->firstepLevel + 1))
407 if (ANI_ENA_RSSI(ah)) {
408 int32_t rssi = BEACON_RSSI(ahp);
409 if (rssi > params->rssiThrHigh) {
411 * Beacon rssi is high, can turn off ofdm
414 if (!aniState->ofdmWeakSigDetectOff) {
416 HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
419 HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
423 * If weak sig detect is already off, as last resort,
424 * raise firstep level
426 if (aniState->firstepLevel < params->maxFirstepLevel) {
427 if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
428 aniState->firstepLevel + 1))
431 } else if (rssi > params->rssiThrLow) {
433 * Beacon rssi in mid range, need ofdm weak signal
434 * detect, but we can raise firststepLevel.
436 if (aniState->ofdmWeakSigDetectOff)
438 HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
440 if (aniState->firstepLevel < params->maxFirstepLevel)
441 if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
442 aniState->firstepLevel + 1))
446 * Beacon rssi is low, if in 11b/g mode, turn off ofdm
447 * weak signal detection and zero firstepLevel to
448 * maximize CCK sensitivity
450 if (IEEE80211_IS_CHAN_CCK(chan)) {
451 if (!aniState->ofdmWeakSigDetectOff)
453 HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
455 if (aniState->firstepLevel > 0)
456 if (ar5416AniControl(ah,
457 HAL_ANI_FIRSTEP_LEVEL, 0))
465 ar5416AniCckErrTrigger(struct ath_hal *ah)
467 struct ath_hal_5212 *ahp = AH5212(ah);
468 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
469 struct ar5212AniState *aniState;
470 const struct ar5212AniParams *params;
472 HALASSERT(chan != AH_NULL);
477 /* first, raise noise immunity level, up to max */
478 aniState = ahp->ah_curani;
479 params = aniState->params;
480 if ((AH5416(ah)->ah_ani_function & (1 << HAL_ANI_NOISE_IMMUNITY_LEVEL) &&
481 aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel)) {
482 ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
483 aniState->noiseImmunityLevel + 1);
487 if (ANI_ENA_RSSI(ah)) {
488 int32_t rssi = BEACON_RSSI(ahp);
489 if (rssi > params->rssiThrLow) {
491 * Beacon signal in mid and high range,
492 * raise firstep level.
494 if (aniState->firstepLevel < params->maxFirstepLevel)
495 ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
496 aniState->firstepLevel + 1);
499 * Beacon rssi is low, zero firstep level to maximize
500 * CCK sensitivity in 11b/g mode.
502 if (IEEE80211_IS_CHAN_CCK(chan)) {
503 if (aniState->firstepLevel > 0)
505 HAL_ANI_FIRSTEP_LEVEL, 0);
512 ar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState)
514 struct ath_hal_5212 *ahp = AH5212(ah);
515 const struct ar5212AniParams *params = aniState->params;
517 aniState->listenTime = 0;
519 * NB: these are written on reset based on the
520 * ini so we must re-write them!
522 HALDEBUG(ah, HAL_DEBUG_ANI,
523 "%s: Writing ofdmbase=%u cckbase=%u\n", __func__,
524 params->ofdmPhyErrBase, params->cckPhyErrBase);
525 OS_REG_WRITE(ah, AR_PHY_ERR_1, params->ofdmPhyErrBase);
526 OS_REG_WRITE(ah, AR_PHY_ERR_2, params->cckPhyErrBase);
527 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
528 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
530 /* Clear the mib counters and save them in the stats */
531 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
532 aniState->ofdmPhyErrCount = 0;
533 aniState->cckPhyErrCount = 0;
537 * Restore/reset the ANI parameters and reset the statistics.
538 * This routine must be called for every channel change.
540 * NOTE: This is where ah_curani is set; other ani code assumes
541 * it is setup to reflect the current channel.
544 ar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan,
545 HAL_OPMODE opmode, int restore)
547 struct ath_hal_5212 *ahp = AH5212(ah);
548 HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
549 /* XXX bounds check ic_devdata */
550 struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata];
553 if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) {
554 OS_MEMZERO(aniState, sizeof(*aniState));
555 if (IEEE80211_IS_CHAN_2GHZ(chan))
556 aniState->params = &ahp->ah_aniParams24;
558 aniState->params = &ahp->ah_aniParams5;
559 ichan->privFlags |= CHANNEL_ANI_INIT;
560 HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0);
562 ahp->ah_curani = aniState;
564 ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n",
565 __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
566 ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
568 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n",
569 __func__, chan->ic_freq, chan->ic_flags, restore, opmode,
570 ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : "");
572 OS_MARK(ah, AH_MARK_ANI_RESET, opmode);
575 * Turn off PHY error frame delivery while we futz with settings.
577 rxfilter = ah->ah_getRxFilter(ah);
578 ah->ah_setRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR);
581 * If ANI is disabled at this point, don't set the default
582 * ANI parameter settings - leave the HAL settings there.
583 * This is (currently) needed for reliable radar detection.
586 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: ANI disabled\n",
592 * Use a restrictive set of ANI parameters for hostap mode.
594 if (opmode == HAL_M_HOSTAP) {
595 if (IEEE80211_IS_CHAN_2GHZ(chan))
596 AH5416(ah)->ah_ani_function =
597 HAL_ANI_SPUR_IMMUNITY_LEVEL | HAL_ANI_FIRSTEP_LEVEL;
599 AH5416(ah)->ah_ani_function = 0;
603 * Automatic processing is done only in station mode right now.
605 if (opmode == HAL_M_STA)
606 ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA;
608 ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA;
610 * Set all ani parameters. We either set them to initial
611 * values or restore the previous ones for the channel.
612 * XXX if ANI follows hardware, we don't care what mode we're
613 * XXX in, we should keep the ani parameters
615 if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) {
616 ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
617 aniState->noiseImmunityLevel);
618 ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
619 aniState->spurImmunityLevel);
620 ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
621 !aniState->ofdmWeakSigDetectOff);
622 ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR,
623 aniState->cckWeakSigThreshold);
624 ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
625 aniState->firstepLevel);
627 ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0);
628 ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0);
629 ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
631 ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE);
632 ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0);
633 ichan->privFlags |= CHANNEL_ANI_SETUP;
637 * In case the counters haven't yet been setup; set them up.
639 enableAniMIBCounters(ah, aniState->params);
640 ar5416AniRestart(ah, aniState);
643 /* restore RX filter mask */
644 ah->ah_setRxFilter(ah, rxfilter);
648 * Process a MIB interrupt. We may potentially be invoked because
649 * any of the MIB counters overflow/trigger so don't assume we're
650 * here because a PHY error counter triggered.
653 ar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats)
655 struct ath_hal_5212 *ahp = AH5212(ah);
656 uint32_t phyCnt1, phyCnt2;
658 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x "
659 "filtofdm 0x%x filtcck 0x%x\n",
660 __func__, OS_REG_READ(ah, AR_MIBC),
661 OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2),
662 OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK));
665 * First order of business is to clear whatever caused
666 * the interrupt so we don't keep getting interrupted.
667 * We have the usual mib counters that are reset-on-read
668 * and the additional counters that appeared starting in
669 * Hainan. We collect the mib counters and explicitly
670 * zero additional counters we are not using. Anything
671 * else is reset only if it caused the interrupt.
673 /* NB: these are not reset-on-read */
674 phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
675 phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
676 /* not used, always reset them in case they are the cause */
677 OS_REG_WRITE(ah, AR_FILTOFDM, 0);
678 OS_REG_WRITE(ah, AR_FILTCCK, 0);
679 if ((OS_REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING) == 0)
680 OS_REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);
682 /* Clear the mib counters and save them in the stats */
683 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
684 ahp->ah_stats.ast_nodestats = *stats;
687 * Check for an ani stat hitting the trigger threshold.
688 * When this happens we get a MIB interrupt and the top
689 * 2 bits of the counter register will be 0b11, hence
690 * the mask check of phyCnt?.
692 if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
693 ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) {
694 struct ar5212AniState *aniState = ahp->ah_curani;
695 const struct ar5212AniParams *params = aniState->params;
696 uint32_t ofdmPhyErrCnt, cckPhyErrCnt;
698 ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
699 ahp->ah_stats.ast_ani_ofdmerrs +=
700 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
701 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
703 cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
704 ahp->ah_stats.ast_ani_cckerrs +=
705 cckPhyErrCnt - aniState->cckPhyErrCount;
706 aniState->cckPhyErrCount = cckPhyErrCnt;
709 * NB: figure out which counter triggered. If both
710 * trigger we'll only deal with one as the processing
711 * clobbers the error counter so the trigger threshold
712 * check will never be true.
714 if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh)
715 ar5416AniOfdmErrTrigger(ah);
716 if (aniState->cckPhyErrCount > params->cckTrigHigh)
717 ar5416AniCckErrTrigger(ah);
718 /* NB: always restart to insure the h/w counters are reset */
719 ar5416AniRestart(ah, aniState);
724 ar5416AniLowerImmunity(struct ath_hal *ah)
726 struct ath_hal_5212 *ahp = AH5212(ah);
727 struct ar5212AniState *aniState;
728 const struct ar5212AniParams *params;
730 HALASSERT(ANI_ENA(ah));
732 aniState = ahp->ah_curani;
733 params = aniState->params;
736 * In the case of AP mode operation, we cannot bucketize beacons
737 * according to RSSI. Instead, lower Firstep level, down to min, and
740 if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
741 if (aniState->firstepLevel > 0) {
742 if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
743 aniState->firstepLevel - 1))
747 if (ANI_ENA_RSSI(ah)) {
748 int32_t rssi = BEACON_RSSI(ahp);
749 if (rssi > params->rssiThrHigh) {
751 * Beacon signal is high, leave ofdm weak signal
752 * detection off or it may oscillate. Let it fall
755 } else if (rssi > params->rssiThrLow) {
757 * Beacon rssi in mid range, turn on ofdm weak signal
758 * detection or lower firstep level.
760 if (aniState->ofdmWeakSigDetectOff) {
761 if (ar5416AniControl(ah,
762 HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION,
766 if (aniState->firstepLevel > 0) {
767 if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
768 aniState->firstepLevel - 1))
773 * Beacon rssi is low, reduce firstep level.
775 if (aniState->firstepLevel > 0) {
776 if (ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL,
777 aniState->firstepLevel - 1))
782 /* then lower spur immunity level, down to zero */
783 if (aniState->spurImmunityLevel > 0) {
784 if (ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL,
785 aniState->spurImmunityLevel - 1))
789 * if all else fails, lower noise immunity level down to a min value
792 if (aniState->noiseImmunityLevel > 0) {
793 if (ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL,
794 aniState->noiseImmunityLevel - 1))
799 #define CLOCK_RATE 44000 /* XXX use mac_usec or similar */
800 /* convert HW counter values to ms using 11g clock rate, goo9d enough
804 * Return an approximation of the time spent ``listening'' by
805 * deducting the cycles spent tx'ing and rx'ing from the total
806 * cycle count since our last call. A return value <0 indicates
807 * an invalid/inconsistent time.
809 * This may be called with ANI disabled; in which case simply keep
810 * the statistics and don't write to the aniState pointer.
812 * XXX TODO: Make this cleaner!
815 ar5416AniGetListenTime(struct ath_hal *ah)
817 struct ath_hal_5212 *ahp = AH5212(ah);
818 struct ar5212AniState *aniState = NULL;
819 int32_t listenTime = 0;
821 HAL_SURVEY_SAMPLE hs;
824 * We shouldn't see ah_curchan be NULL, but just in case..
826 if (AH_PRIVATE(ah)->ah_curchan == AH_NULL) {
827 ath_hal_printf(ah, "%s: ah_curchan = NULL?\n", __func__);
832 * Fetch the current statistics, squirrel away the current
835 OS_MEMZERO(&hs, sizeof(hs));
836 good = ar5416GetMibCycleCounts(ah, &hs);
837 ath_hal_survey_add_sample(ah, &hs);
840 aniState = ahp->ah_curani;
842 if (good == AH_FALSE) {
844 * Cycle counter wrap (or initial call); it's not possible
845 * to accurately calculate a value because the registers
846 * right shift rather than wrap--so punt and return 0.
849 ahp->ah_stats.ast_ani_lzero++;
850 } else if (ANI_ENA(ah)) {
852 * Only calculate and update the cycle count if we have
856 AH5416(ah)->ah_cycleCount - aniState->cycleCount;
858 AH5416(ah)->ah_rxBusy - aniState->rxFrameCount;
860 AH5416(ah)->ah_txBusy - aniState->txFrameCount;
861 listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE;
865 * Again, only update ANI state if we have it.
868 aniState->cycleCount = AH5416(ah)->ah_cycleCount;
869 aniState->rxFrameCount = AH5416(ah)->ah_rxBusy;
870 aniState->txFrameCount = AH5416(ah)->ah_txBusy;
877 * Update ani stats in preparation for listen time processing.
880 updateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState)
882 struct ath_hal_5212 *ahp = AH5212(ah);
883 const struct ar5212AniParams *params = aniState->params;
884 uint32_t phyCnt1, phyCnt2;
885 int32_t ofdmPhyErrCnt, cckPhyErrCnt;
887 /* Clear the mib counters and save them in the stats */
888 ar5212UpdateMibCounters(ah, &ahp->ah_mibStats);
890 /* NB: these are not reset-on-read */
891 phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1);
892 phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2);
894 /* NB: these are spec'd to never roll-over */
895 ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase;
896 if (ofdmPhyErrCnt < 0) {
897 HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n",
898 ofdmPhyErrCnt, phyCnt1);
899 ofdmPhyErrCnt = AR_PHY_COUNTMAX;
901 ahp->ah_stats.ast_ani_ofdmerrs +=
902 ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
903 aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
905 cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase;
906 if (cckPhyErrCnt < 0) {
907 HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n",
908 cckPhyErrCnt, phyCnt2);
909 cckPhyErrCnt = AR_PHY_COUNTMAX;
911 ahp->ah_stats.ast_ani_cckerrs +=
912 cckPhyErrCnt - aniState->cckPhyErrCount;
913 aniState->cckPhyErrCount = cckPhyErrCnt;
917 ar5416RxMonitor(struct ath_hal *ah, const HAL_NODE_STATS *stats,
918 const struct ieee80211_channel *chan)
920 struct ath_hal_5212 *ahp = AH5212(ah);
921 ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi;
925 * Do periodic processing. This routine is called from the
926 * driver's rx interrupt handler after processing frames.
929 ar5416AniPoll(struct ath_hal *ah, const struct ieee80211_channel *chan)
931 struct ath_hal_5212 *ahp = AH5212(ah);
932 struct ar5212AniState *aniState = ahp->ah_curani;
933 const struct ar5212AniParams *params;
936 /* Always update from the MIB, for statistics gathering */
937 listenTime = ar5416AniGetListenTime(ah);
939 /* XXX can aniState be null? */
940 if (aniState == AH_NULL)
946 if (listenTime < 0) {
947 ahp->ah_stats.ast_ani_lneg++;
948 /* restart ANI period if listenTime is invalid */
949 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: invalid listenTime\n",
951 ar5416AniRestart(ah, aniState);
953 /* Don't do any further processing */
956 /* XXX beware of overflow? */
957 aniState->listenTime += listenTime;
959 OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime);
961 params = aniState->params;
962 if (aniState->listenTime > 5*params->period) {
964 * Check to see if need to lower immunity if
965 * 5 aniPeriods have passed
967 updateMIBStats(ah, aniState);
968 if (aniState->ofdmPhyErrCount <= aniState->listenTime *
969 params->ofdmTrigLow/1000 &&
970 aniState->cckPhyErrCount <= aniState->listenTime *
971 params->cckTrigLow/1000)
972 ar5416AniLowerImmunity(ah);
973 HALDEBUG(ah, HAL_DEBUG_ANI, "%s: lower immunity\n",
975 ar5416AniRestart(ah, aniState);
976 } else if (aniState->listenTime > params->period) {
977 updateMIBStats(ah, aniState);
978 /* check to see if need to raise immunity */
979 if (aniState->ofdmPhyErrCount > aniState->listenTime *
980 params->ofdmTrigHigh / 1000) {
981 HALDEBUG(ah, HAL_DEBUG_ANI,
982 "%s: OFDM err %u listenTime %u\n", __func__,
983 aniState->ofdmPhyErrCount, aniState->listenTime);
984 ar5416AniOfdmErrTrigger(ah);
985 ar5416AniRestart(ah, aniState);
986 } else if (aniState->cckPhyErrCount > aniState->listenTime *
987 params->cckTrigHigh / 1000) {
988 HALDEBUG(ah, HAL_DEBUG_ANI,
989 "%s: CCK err %u listenTime %u\n", __func__,
990 aniState->cckPhyErrCount, aniState->listenTime);
991 ar5416AniCckErrTrigger(ah);
992 ar5416AniRestart(ah, aniState);