2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
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21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
36 * Driver for the Atheros Wireless LAN controller.
38 * This software is derived from work of Atsushi Onoe; his contribution
39 * is greatly appreciated.
45 * This is needed for register operations which are performed
46 * by the driver - eg, calls to ath_hal_gettsf32().
48 * It's also required for any AH_DEBUG checks in here, eg the
49 * module dependencies.
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysctl.h>
58 #include <sys/malloc.h>
60 #include <sys/mutex.h>
61 #include <sys/kernel.h>
62 #include <sys/socket.h>
63 #include <sys/sockio.h>
64 #include <sys/errno.h>
65 #include <sys/callout.h>
67 #include <sys/endian.h>
68 #include <sys/kthread.h>
69 #include <sys/taskqueue.h>
71 #include <sys/module.h>
73 #include <sys/smp.h> /* for mp_ncpus */
75 #include <machine/bus.h>
78 #include <net/if_var.h>
79 #include <net/if_dl.h>
80 #include <net/if_media.h>
81 #include <net/if_types.h>
82 #include <net/if_arp.h>
83 #include <net/ethernet.h>
84 #include <net/if_llc.h>
86 #include <net80211/ieee80211_var.h>
87 #include <net80211/ieee80211_regdomain.h>
88 #ifdef IEEE80211_SUPPORT_SUPERG
89 #include <net80211/ieee80211_superg.h>
95 #include <netinet/in.h>
96 #include <netinet/if_ether.h>
99 #include <dev/ath/if_athvar.h>
101 #include <dev/ath/if_ath_debug.h>
102 #include <dev/ath/if_ath_misc.h>
103 #include <dev/ath/if_ath_tx.h>
104 #include <dev/ath/if_ath_beacon.h>
107 #include <dev/ath/ath_tx99/ath_tx99.h>
111 * Setup a h/w transmit queue for beacons.
114 ath_beaconq_setup(struct ath_softc *sc)
116 struct ath_hal *ah = sc->sc_ah;
119 memset(&qi, 0, sizeof(qi));
120 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
121 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
122 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
123 /* NB: for dynamic turbo, don't enable any other interrupts */
124 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
126 qi.tqi_qflags |= HAL_TXQ_TXOKINT_ENABLE |
127 HAL_TXQ_TXERRINT_ENABLE;
129 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
133 * Setup the transmit queue parameters for the beacon queue.
136 ath_beaconq_config(struct ath_softc *sc)
138 #define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1)
139 struct ieee80211com *ic = &sc->sc_ic;
140 struct ath_hal *ah = sc->sc_ah;
143 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
144 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
145 ic->ic_opmode == IEEE80211_M_MBSS) {
147 * Always burst out beacon and CAB traffic.
149 qi.tqi_aifs = ATH_BEACON_AIFS_DEFAULT;
150 qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT;
151 qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT;
153 struct wmeParams *wmep =
154 &ic->ic_wme.wme_chanParams.cap_wmeParams[WME_AC_BE];
156 * Adhoc mode; important thing is to use 2x cwmin.
158 qi.tqi_aifs = wmep->wmep_aifsn;
159 qi.tqi_cwmin = 2*ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
160 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
163 if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
164 device_printf(sc->sc_dev, "unable to update parameters for "
165 "beacon hardware queue!\n");
168 ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
171 #undef ATH_EXPONENT_TO_VALUE
175 * Allocate and setup an initial beacon frame.
178 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
180 struct ieee80211vap *vap = ni->ni_vap;
181 struct ath_vap *avp = ATH_VAP(vap);
187 DPRINTF(sc, ATH_DEBUG_NODE, "%s: bf_m=%p, bf_node=%p\n",
188 __func__, bf->bf_m, bf->bf_node);
189 if (bf->bf_m != NULL) {
190 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
194 if (bf->bf_node != NULL) {
195 ieee80211_free_node(bf->bf_node);
200 * NB: the beacon data buffer must be 32-bit aligned;
201 * we assume the mbuf routines will return us something
202 * with this alignment (perhaps should assert).
204 m = ieee80211_beacon_alloc(ni);
206 device_printf(sc->sc_dev, "%s: cannot get mbuf\n", __func__);
207 sc->sc_stats.ast_be_nombuf++;
210 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
211 bf->bf_segs, &bf->bf_nseg,
214 device_printf(sc->sc_dev,
215 "%s: cannot map mbuf, bus_dmamap_load_mbuf_sg returns %d\n",
222 * Calculate a TSF adjustment factor required for staggered
223 * beacons. Note that we assume the format of the beacon
224 * frame leaves the tstamp field immediately following the
227 if (sc->sc_stagbeacons && avp->av_bslot > 0) {
229 struct ieee80211_frame *wh;
232 * The beacon interval is in TU's; the TSF is in usecs.
233 * We figure out how many TU's to add to align the timestamp
234 * then convert to TSF units and handle byte swapping before
235 * inserting it in the frame. The hardware will then add this
236 * each time a beacon frame is sent. Note that we align vap's
237 * 1..N and leave vap 0 untouched. This means vap 0 has a
238 * timestamp in one beacon interval while the others get a
239 * timstamp aligned to the next interval.
241 tsfadjust = ni->ni_intval *
242 (ATH_BCBUF - avp->av_bslot) / ATH_BCBUF;
243 tsfadjust = htole64(tsfadjust << 10); /* TU -> TSF */
245 DPRINTF(sc, ATH_DEBUG_BEACON,
246 "%s: %s beacons bslot %d intval %u tsfadjust %llu\n",
247 __func__, sc->sc_stagbeacons ? "stagger" : "burst",
248 avp->av_bslot, ni->ni_intval,
249 (long long unsigned) le64toh(tsfadjust));
251 wh = mtod(m, struct ieee80211_frame *);
252 memcpy(&wh[1], &tsfadjust, sizeof(tsfadjust));
255 bf->bf_node = ieee80211_ref_node(ni);
261 * Setup the beacon frame for transmit.
264 ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf)
266 #define USE_SHPREAMBLE(_ic) \
267 (((_ic)->ic_flags & (IEEE80211_F_SHPREAMBLE | IEEE80211_F_USEBARKER))\
268 == IEEE80211_F_SHPREAMBLE)
269 struct ieee80211_node *ni = bf->bf_node;
270 struct ieee80211com *ic = ni->ni_ic;
271 struct mbuf *m = bf->bf_m;
272 struct ath_hal *ah = sc->sc_ah;
275 const HAL_RATE_TABLE *rt;
277 HAL_DMA_ADDR bufAddrList[4];
278 uint32_t segLenList[4];
279 HAL_11N_RATE_SERIES rc[4];
281 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: m %p len %u\n",
282 __func__, m, m->m_len);
284 /* setup descriptors */
289 flags = HAL_TXDESC_NOACK;
290 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) {
291 /* self-linked descriptor */
292 ath_hal_settxdesclink(sc->sc_ah, ds, bf->bf_daddr);
293 flags |= HAL_TXDESC_VEOL;
295 * Let hardware handle antenna switching.
297 antenna = sc->sc_txantenna;
299 ath_hal_settxdesclink(sc->sc_ah, ds, 0);
301 * Switch antenna every 4 beacons.
302 * XXX assumes two antenna
304 if (sc->sc_txantenna != 0)
305 antenna = sc->sc_txantenna;
306 else if (sc->sc_stagbeacons && sc->sc_nbcnvaps != 0)
307 antenna = ((sc->sc_stats.ast_be_xmit / sc->sc_nbcnvaps) & 4 ? 2 : 1);
309 antenna = (sc->sc_stats.ast_be_xmit & 4 ? 2 : 1);
312 KASSERT(bf->bf_nseg == 1,
313 ("multi-segment beacon frame; nseg %u", bf->bf_nseg));
316 * Calculate rate code.
317 * XXX everything at min xmit rate
320 rt = sc->sc_currates;
321 rate = rt->info[rix].rateCode;
322 if (USE_SHPREAMBLE(ic))
323 rate |= rt->info[rix].shortPreamble;
324 ath_hal_setuptxdesc(ah, ds
325 , m->m_len + IEEE80211_CRC_LEN /* frame length */
326 , sizeof(struct ieee80211_frame)/* header length */
327 , HAL_PKT_TYPE_BEACON /* Atheros packet type */
328 , ieee80211_get_node_txpower(ni) /* txpower XXX */
329 , rate, 1 /* series 0 rate/tries */
330 , HAL_TXKEYIX_INVALID /* no encryption */
331 , antenna /* antenna mode */
332 , flags /* no ack, veol for beacons */
333 , 0 /* rts/cts rate */
334 , 0 /* rts/cts duration */
338 * The EDMA HAL currently assumes that _all_ rate control
339 * settings are done in ath_hal_set11nratescenario(), rather
340 * than in ath_hal_setuptxdesc().
343 memset(&rc, 0, sizeof(rc));
345 rc[0].ChSel = sc->sc_txchainmask;
347 rc[0].Rate = rt->info[rix].rateCode;
348 rc[0].RateIndex = rix;
349 rc[0].tx_power_cap = 0x3f;
351 ath_hal_computetxtime(ah, rt, roundup(m->m_len, 4),
353 ath_hal_set11nratescenario(ah, ds, 0, 0, rc, 4, flags);
356 /* NB: beacon's BufLen must be a multiple of 4 bytes */
357 segLenList[0] = roundup(m->m_len, 4);
358 segLenList[1] = segLenList[2] = segLenList[3] = 0;
359 bufAddrList[0] = bf->bf_segs[0].ds_addr;
360 bufAddrList[1] = bufAddrList[2] = bufAddrList[3] = 0;
361 ath_hal_filltxdesc(ah, ds
364 , 0 /* XXX desc id */
365 , sc->sc_bhalq /* hardware TXQ */
366 , AH_TRUE /* first segment */
367 , AH_TRUE /* last segment */
368 , ds /* first descriptor */
373 #undef USE_SHPREAMBLE
377 ath_beacon_update(struct ieee80211vap *vap, int item)
379 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off;
381 setbit(bo->bo_flags, item);
385 * Handle a beacon miss.
388 ath_beacon_miss(struct ath_softc *sc)
390 HAL_SURVEY_SAMPLE hs;
394 bzero(&hs, sizeof(hs));
396 ret = ath_hal_get_mib_cycle_counts(sc->sc_ah, &hs);
398 if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) && hangs != 0) {
399 DPRINTF(sc, ATH_DEBUG_BEACON,
406 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_MISSED_BEACON))
407 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_MISSED_BEACON, 0, NULL);
410 DPRINTF(sc, ATH_DEBUG_BEACON,
411 "%s: valid=%d, txbusy=%u, rxbusy=%u, chanbusy=%u, "
412 "extchanbusy=%u, cyclecount=%u\n",
423 * Transmit a beacon frame at SWBA. Dynamic updates to the
424 * frame contents are done as needed and the slot time is
425 * also adjusted based on current state.
428 ath_beacon_proc(void *arg, int pending)
430 struct ath_softc *sc = arg;
431 struct ath_hal *ah = sc->sc_ah;
432 struct ieee80211vap *vap;
437 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: pending %u\n",
440 * Check if the previous beacon has gone out. If
441 * not don't try to post another, skip this period
442 * and wait for the next. Missed beacons indicate
443 * a problem and should not occur. If we miss too
444 * many consecutive beacons reset the device.
446 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
448 sc->sc_stats.ast_be_missed++;
450 DPRINTF(sc, ATH_DEBUG_BEACON,
451 "%s: missed %u consecutive beacons\n",
452 __func__, sc->sc_bmisscount);
453 if (sc->sc_bmisscount >= ath_bstuck_threshold)
454 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
457 if (sc->sc_bmisscount != 0) {
458 DPRINTF(sc, ATH_DEBUG_BEACON,
459 "%s: resume beacon xmit after %u misses\n",
460 __func__, sc->sc_bmisscount);
461 sc->sc_bmisscount = 0;
463 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_RESUME_BEACON))
464 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_RESUME_BEACON, 0, NULL);
468 if (sc->sc_stagbeacons) { /* staggered beacons */
469 struct ieee80211com *ic = &sc->sc_ic;
472 tsftu = ath_hal_gettsf32(ah) >> 10;
474 slot = ((tsftu % ic->ic_lintval) * ATH_BCBUF) / ic->ic_lintval;
475 vap = sc->sc_bslot[(slot+1) % ATH_BCBUF];
477 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
478 bf = ath_beacon_generate(sc, vap);
480 bfaddr = bf->bf_daddr;
482 } else { /* burst'd beacons */
483 uint32_t *bflink = &bfaddr;
485 for (slot = 0; slot < ATH_BCBUF; slot++) {
486 vap = sc->sc_bslot[slot];
487 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
488 bf = ath_beacon_generate(sc, vap);
490 * XXX TODO: this should use settxdesclinkptr()
491 * otherwise it won't work for EDMA chipsets!
494 /* XXX should do this using the ds */
495 *bflink = bf->bf_daddr;
496 ath_hal_gettxdesclinkptr(sc->sc_ah,
497 bf->bf_desc, &bflink);
502 * XXX TODO: this should use settxdesclinkptr()
503 * otherwise it won't work for EDMA chipsets!
505 *bflink = 0; /* terminate list */
509 * Handle slot time change when a non-ERP station joins/leaves
510 * an 11g network. The 802.11 layer notifies us via callback,
511 * we mark updateslot, then wait one beacon before effecting
512 * the change. This gives associated stations at least one
513 * beacon interval to note the state change.
516 if (sc->sc_updateslot == UPDATE) {
517 sc->sc_updateslot = COMMIT; /* commit next beacon */
518 sc->sc_slotupdate = slot;
519 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
520 ath_setslottime(sc); /* commit change to h/w */
523 * Check recent per-antenna transmit statistics and flip
524 * the default antenna if noticeably more frames went out
525 * on the non-default antenna.
526 * XXX assumes 2 anntenae
528 if (!sc->sc_diversity && (!sc->sc_stagbeacons || slot == 0)) {
529 otherant = sc->sc_defant & 1 ? 2 : 1;
530 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
531 ath_setdefantenna(sc, otherant);
532 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
535 /* Program the CABQ with the contents of the CABQ txq and start it */
536 ATH_TXQ_LOCK(sc->sc_cabq);
537 ath_beacon_cabq_start(sc);
538 ATH_TXQ_UNLOCK(sc->sc_cabq);
540 /* Program the new beacon frame if we have one for this interval */
543 * Stop any current dma and put the new frame on the queue.
544 * This should never fail since we check above that no frames
545 * are still pending on the queue.
547 if (! sc->sc_isedma) {
548 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
549 DPRINTF(sc, ATH_DEBUG_ANY,
550 "%s: beacon queue %u did not stop?\n",
551 __func__, sc->sc_bhalq);
554 /* NB: cabq traffic should already be queued and primed */
556 ath_hal_puttxbuf(ah, sc->sc_bhalq, bfaddr);
557 ath_hal_txstart(ah, sc->sc_bhalq);
559 sc->sc_stats.ast_be_xmit++;
564 ath_beacon_cabq_start_edma(struct ath_softc *sc)
566 struct ath_buf *bf, *bf_last;
567 struct ath_txq *cabq = sc->sc_cabq;
573 ATH_TXQ_LOCK_ASSERT(cabq);
575 if (TAILQ_EMPTY(&cabq->axq_q))
577 bf = TAILQ_FIRST(&cabq->axq_q);
578 bf_last = TAILQ_LAST(&cabq->axq_q, axq_q_s);
581 * This is a dirty, dirty hack to push the contents of
582 * the cabq staging queue into the FIFO.
584 * This ideally should live in the EDMA code file
585 * and only push things into the CABQ if there's a FIFO
588 * We can't treat this like a normal TX queue because
589 * in the case of multi-VAP traffic, we may have to flush
590 * the CABQ each new (staggered) beacon that goes out.
591 * But for non-staggered beacons, we could in theory
592 * handle multicast traffic for all VAPs in one FIFO
593 * push. Just keep all of this in mind if you're wondering
594 * how to correctly/better handle multi-VAP CABQ traffic
599 * Is the CABQ FIFO free? If not, complain loudly and
600 * don't queue anything. Maybe we'll flush the CABQ
601 * traffic, maybe we won't. But that'll happen next
604 if (cabq->axq_fifo_depth >= HAL_TXFIFO_DEPTH) {
605 device_printf(sc->sc_dev,
606 "%s: Q%d: CAB FIFO queue=%d?\n",
609 cabq->axq_fifo_depth);
614 * Ok, so here's the gymnastics reqiured to make this
619 * Tag the first/last buffer appropriately.
621 bf->bf_flags |= ATH_BUF_FIFOPTR;
622 bf_last->bf_flags |= ATH_BUF_FIFOEND;
626 TAILQ_FOREACH(bfi, &cabq->axq_q, bf_list) {
627 ath_printtxbuf(sc, bf, cabq->axq_qnum, i, 0);
633 * We now need to push this set of frames onto the tail
634 * of the FIFO queue. We don't adjust the aggregate
635 * count, only the queue depth counter(s).
636 * We also need to blank the link pointer now.
638 TAILQ_CONCAT(&cabq->fifo.axq_q, &cabq->axq_q, bf_list);
639 cabq->axq_link = NULL;
640 cabq->fifo.axq_depth += cabq->axq_depth;
643 /* Bump FIFO queue */
644 cabq->axq_fifo_depth++;
646 /* Push the first entry into the hardware */
647 ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr);
648 cabq->axq_flags |= ATH_TXQ_PUTRUNNING;
650 /* NB: gated by beacon so safe to start here */
651 ath_hal_txstart(sc->sc_ah, cabq->axq_qnum);
656 ath_beacon_cabq_start_legacy(struct ath_softc *sc)
659 struct ath_txq *cabq = sc->sc_cabq;
661 ATH_TXQ_LOCK_ASSERT(cabq);
662 if (TAILQ_EMPTY(&cabq->axq_q))
664 bf = TAILQ_FIRST(&cabq->axq_q);
666 /* Push the first entry into the hardware */
667 ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr);
668 cabq->axq_flags |= ATH_TXQ_PUTRUNNING;
670 /* NB: gated by beacon so safe to start here */
671 ath_hal_txstart(sc->sc_ah, cabq->axq_qnum);
675 * Start CABQ transmission - this assumes that all frames are prepped
676 * and ready in the CABQ.
679 ath_beacon_cabq_start(struct ath_softc *sc)
681 struct ath_txq *cabq = sc->sc_cabq;
683 ATH_TXQ_LOCK_ASSERT(cabq);
685 if (TAILQ_EMPTY(&cabq->axq_q))
689 ath_beacon_cabq_start_edma(sc);
691 ath_beacon_cabq_start_legacy(sc);
695 ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap)
697 struct ath_vap *avp = ATH_VAP(vap);
698 struct ath_txq *cabq = sc->sc_cabq;
703 KASSERT(vap->iv_state >= IEEE80211_S_RUN,
704 ("not running, state %d", vap->iv_state));
705 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
708 * Update dynamic beacon contents. If this returns
709 * non-zero then we need to remap the memory because
710 * the beacon frame changed size (probably because
711 * of the TIM bitmap).
715 /* XXX lock mcastq? */
716 nmcastq = avp->av_mcastq.axq_depth;
718 if (ieee80211_beacon_update(bf->bf_node, m, nmcastq)) {
719 /* XXX too conservative? */
720 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
721 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
722 bf->bf_segs, &bf->bf_nseg,
725 if_printf(vap->iv_ifp,
726 "%s: bus_dmamap_load_mbuf_sg failed, error %u\n",
731 if ((vap->iv_bcn_off.bo_tim[4] & 1) && cabq->axq_depth) {
732 DPRINTF(sc, ATH_DEBUG_BEACON,
733 "%s: cabq did not drain, mcastq %u cabq %u\n",
734 __func__, nmcastq, cabq->axq_depth);
735 sc->sc_stats.ast_cabq_busy++;
736 if (sc->sc_nvaps > 1 && sc->sc_stagbeacons) {
738 * CABQ traffic from a previous vap is still pending.
739 * We must drain the q before this beacon frame goes
740 * out as otherwise this vap's stations will get cab
741 * frames from a different vap.
742 * XXX could be slow causing us to miss DBA
745 * XXX TODO: this doesn't stop CABQ DMA - it assumes
746 * that since we're about to transmit a beacon, we've
747 * already stopped transmitting on the CABQ. But this
748 * doesn't at all mean that the CABQ DMA QCU will
749 * accept a new TXDP! So what, should we do a DMA
750 * stop? What if it fails?
752 * More thought is required here.
755 * XXX can we even stop TX DMA here? Check what the
756 * reference driver does for cabq for beacons, given
757 * that stopping TX requires RX is paused.
759 ath_tx_draintxq(sc, cabq);
762 ath_beacon_setup(sc, bf);
763 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
766 * XXX TODO: tie into net80211 for quiet time IE update and program
767 * local AP timer if we require it. The process of updating the
768 * beacon will also update the IE with the relevant counters.
772 * Enable the CAB queue before the beacon queue to
773 * insure cab frames are triggered by this beacon.
775 if (vap->iv_bcn_off.bo_tim[4] & 1) {
777 /* NB: only at DTIM */
778 ATH_TXQ_LOCK(&avp->av_mcastq);
780 struct ath_buf *bfm, *bfc_last;
783 * Move frames from the s/w mcast q to the h/w cab q.
785 * XXX TODO: if we chain together multiple VAPs
786 * worth of CABQ traffic, should we keep the
787 * MORE data bit set on the last frame of each
788 * intermediary VAP (ie, only clear the MORE
789 * bit of the last frame on the last vap?)
791 bfm = TAILQ_FIRST(&avp->av_mcastq.axq_q);
795 * If there's already a frame on the CABQ, we
796 * need to link to the end of the last frame.
797 * We can't use axq_link here because
798 * EDMA descriptors require some recalculation
799 * (checksum) to occur.
801 bfc_last = ATH_TXQ_LAST(cabq, axq_q_s);
802 if (bfc_last != NULL) {
803 ath_hal_settxdesclink(sc->sc_ah,
807 ath_txqmove(cabq, &avp->av_mcastq);
808 ATH_TXQ_UNLOCK(cabq);
810 * XXX not entirely accurate, in case a mcast
811 * queue frame arrived before we grabbed the TX
814 sc->sc_stats.ast_cabq_xmit += nmcastq;
816 ATH_TXQ_UNLOCK(&avp->av_mcastq);
822 ath_beacon_start_adhoc(struct ath_softc *sc, struct ieee80211vap *vap)
824 struct ath_vap *avp = ATH_VAP(vap);
825 struct ath_hal *ah = sc->sc_ah;
830 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
833 * Update dynamic beacon contents. If this returns
834 * non-zero then we need to remap the memory because
835 * the beacon frame changed size (probably because
836 * of the TIM bitmap).
840 if (ieee80211_beacon_update(bf->bf_node, m, 0)) {
841 /* XXX too conservative? */
842 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
843 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
844 bf->bf_segs, &bf->bf_nseg,
847 if_printf(vap->iv_ifp,
848 "%s: bus_dmamap_load_mbuf_sg failed, error %u\n",
853 ath_beacon_setup(sc, bf);
854 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
856 /* NB: caller is known to have already stopped tx dma */
857 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
858 ath_hal_txstart(ah, sc->sc_bhalq);
862 * Reclaim beacon resources and return buffer to the pool.
865 ath_beacon_return(struct ath_softc *sc, struct ath_buf *bf)
868 DPRINTF(sc, ATH_DEBUG_NODE, "%s: free bf=%p, bf_m=%p, bf_node=%p\n",
869 __func__, bf, bf->bf_m, bf->bf_node);
870 if (bf->bf_m != NULL) {
871 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
875 if (bf->bf_node != NULL) {
876 ieee80211_free_node(bf->bf_node);
879 TAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
883 * Reclaim beacon resources.
886 ath_beacon_free(struct ath_softc *sc)
890 TAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
891 DPRINTF(sc, ATH_DEBUG_NODE,
892 "%s: free bf=%p, bf_m=%p, bf_node=%p\n",
893 __func__, bf, bf->bf_m, bf->bf_node);
894 if (bf->bf_m != NULL) {
895 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
899 if (bf->bf_node != NULL) {
900 ieee80211_free_node(bf->bf_node);
907 * Configure the beacon and sleep timers.
909 * When operating as an AP this resets the TSF and sets
910 * up the hardware to notify us when we need to issue beacons.
912 * When operating in station mode this sets up the beacon
913 * timers according to the timestamp of the last received
914 * beacon and the current TSF, configures PCF and DTIM
915 * handling, programs the sleep registers so the hardware
916 * will wakeup in time to receive beacons, and configures
917 * the beacon miss handling so we'll receive a BMISS
918 * interrupt when we stop seeing beacons from the AP
919 * we've associated with.
922 ath_beacon_config(struct ath_softc *sc, struct ieee80211vap *vap)
924 #define TSF_TO_TU(_h,_l) \
925 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
927 struct ath_hal *ah = sc->sc_ah;
929 struct ieee80211com *ic = &sc->sc_ic;
930 struct ieee80211_node *ni;
931 u_int32_t nexttbtt, intval, tsftu;
932 u_int32_t nexttbtt_u8, intval_u8;
933 u_int64_t tsf, tsf_beacon;
936 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
938 * Just ensure that we aren't being called when the last
942 device_printf(sc->sc_dev, "%s: called with no VAPs\n",
947 /* Now that we have a vap, we can do this bit */
950 ni = ieee80211_ref_node(vap->iv_bss);
953 ath_power_set_power_state(sc, HAL_PM_AWAKE);
956 /* Always clear the quiet IE timers; let the next update program them */
957 ath_hal_set_quiet(ah, 0, 0, 0, HAL_QUIET_DISABLE);
958 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie));
960 /* extract tstamp from last beacon and convert to TU */
961 nexttbtt = TSF_TO_TU(le32dec(ni->ni_tstamp.data + 4),
962 le32dec(ni->ni_tstamp.data));
964 tsf_beacon = ((uint64_t) le32dec(ni->ni_tstamp.data + 4)) << 32;
965 tsf_beacon |= le32dec(ni->ni_tstamp.data);
967 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
968 ic->ic_opmode == IEEE80211_M_MBSS) {
970 * For multi-bss ap/mesh support beacons are either staggered
971 * evenly over N slots or burst together. For the former
972 * arrange for the SWBA to be delivered for each slot.
973 * Slots that are not occupied will generate nothing.
975 /* NB: the beacon interval is kept internally in TU's */
976 intval = ni->ni_intval & HAL_BEACON_PERIOD;
977 if (sc->sc_stagbeacons)
980 /* NB: the beacon interval is kept internally in TU's */
981 intval = ni->ni_intval & HAL_BEACON_PERIOD;
985 * Note: rounding up to the next intval can cause problems with
986 * bad APs when we're in powersave mode.
988 * In STA mode with powersave enabled, beacons are only received
989 * whenever the beacon timer fires to wake up the hardware.
990 * Now, if this is rounded up to the next intval, it assumes
991 * that the AP has started transmitting beacons at TSF values that
992 * are multiples of intval, versus say being 25 TU off.
994 * The specification (802.11-2012 10.1.3.2 - Beacon Generation in
995 * Infrastructure Networks) requires APs be beaconing at a
996 * mutiple of intval. So, if bintval=100, then we shouldn't
997 * get beacons at intervals other than around multiples of 100.
999 if (nexttbtt == 0) /* e.g. for ap mode */
1002 nexttbtt = roundup(nexttbtt, intval);
1004 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
1005 __func__, nexttbtt, intval, ni->ni_intval);
1006 if (ic->ic_opmode == IEEE80211_M_STA && !sc->sc_swbmiss) {
1007 HAL_BEACON_STATE bs;
1008 int dtimperiod, dtimcount;
1009 int cfpperiod, cfpcount;
1012 * Setup dtim and cfp parameters according to
1013 * last beacon we received (which may be none).
1015 dtimperiod = ni->ni_dtim_period;
1016 if (dtimperiod <= 0) /* NB: 0 if not known */
1018 dtimcount = ni->ni_dtim_count;
1019 if (dtimcount >= dtimperiod) /* NB: sanity check */
1020 dtimcount = 0; /* XXX? */
1021 cfpperiod = 1; /* NB: no PCF support yet */
1024 * Pull nexttbtt forward to reflect the current
1025 * TSF and calculate dtim+cfp state for the result.
1027 tsf = ath_hal_gettsf64(ah);
1028 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
1030 DPRINTF(sc, ATH_DEBUG_BEACON,
1031 "%s: beacon tsf=%llu, hw tsf=%llu, nexttbtt=%u, tsftu=%u\n",
1033 (unsigned long long) tsf_beacon,
1034 (unsigned long long) tsf,
1037 DPRINTF(sc, ATH_DEBUG_BEACON,
1038 "%s: beacon tsf=%llu, hw tsf=%llu, tsf delta=%lld\n",
1040 (unsigned long long) tsf_beacon,
1041 (unsigned long long) tsf,
1043 (long long) tsf_beacon);
1045 DPRINTF(sc, ATH_DEBUG_BEACON,
1046 "%s: nexttbtt=%llu, beacon tsf delta=%lld\n",
1048 (unsigned long long) nexttbtt,
1049 (long long) ((long long) nexttbtt * 1024LL) - (long long) tsf_beacon);
1053 if (nexttbtt > tsftu) {
1054 uint32_t countdiff, oldtbtt, remainder;
1057 remainder = (nexttbtt - tsftu) % intval;
1058 nexttbtt = tsftu + remainder;
1060 countdiff = (oldtbtt - nexttbtt) / intval % dtimperiod;
1061 if (dtimcount > countdiff) {
1062 dtimcount -= countdiff;
1064 dtimcount += dtimperiod - countdiff;
1066 } else { //nexttbtt <= tsftu
1067 uint32_t countdiff, oldtbtt, remainder;
1070 remainder = (tsftu - nexttbtt) % intval;
1071 nexttbtt = tsftu - remainder + intval;
1072 countdiff = (nexttbtt - oldtbtt) / intval % dtimperiod;
1073 if (dtimcount > countdiff) {
1074 dtimcount -= countdiff;
1076 dtimcount += dtimperiod - countdiff;
1080 DPRINTF(sc, ATH_DEBUG_BEACON,
1081 "%s: adj nexttbtt=%llu, rx tsf delta=%lld\n",
1083 (unsigned long long) nexttbtt,
1084 (long long) ((long long)nexttbtt * 1024LL) - (long long)tsf);
1086 memset(&bs, 0, sizeof(bs));
1087 bs.bs_intval = intval;
1088 bs.bs_nexttbtt = nexttbtt;
1089 bs.bs_dtimperiod = dtimperiod*intval;
1090 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
1091 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
1092 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
1093 bs.bs_cfpmaxduration = 0;
1096 * The 802.11 layer records the offset to the DTIM
1097 * bitmap while receiving beacons; use it here to
1098 * enable h/w detection of our AID being marked in
1099 * the bitmap vector (to indicate frames for us are
1100 * pending at the AP).
1101 * XXX do DTIM handling in s/w to WAR old h/w bugs
1102 * XXX enable based on h/w rev for newer chips
1104 bs.bs_timoffset = ni->ni_timoff;
1107 * Calculate the number of consecutive beacons to miss
1108 * before taking a BMISS interrupt.
1109 * Note that we clamp the result to at most 10 beacons.
1111 bs.bs_bmissthreshold = vap->iv_bmissthreshold;
1112 if (bs.bs_bmissthreshold > 10)
1113 bs.bs_bmissthreshold = 10;
1114 else if (bs.bs_bmissthreshold <= 0)
1115 bs.bs_bmissthreshold = 1;
1118 * Calculate sleep duration. The configuration is
1119 * given in ms. We insure a multiple of the beacon
1120 * period is used. Also, if the sleep duration is
1121 * greater than the DTIM period then it makes senses
1122 * to make it a multiple of that.
1124 * XXX fixed at 100ms
1126 bs.bs_sleepduration =
1127 roundup(IEEE80211_MS_TO_TU(100), bs.bs_intval);
1128 if (bs.bs_sleepduration > bs.bs_dtimperiod)
1129 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
1131 DPRINTF(sc, ATH_DEBUG_BEACON,
1132 "%s: tsf %ju tsf:tu %u intval %u nexttbtt %u dtim %u "
1133 "nextdtim %u bmiss %u sleep %u cfp:period %u "
1134 "maxdur %u next %u timoffset %u\n"
1142 , bs.bs_bmissthreshold
1143 , bs.bs_sleepduration
1145 , bs.bs_cfpmaxduration
1149 ath_hal_intrset(ah, 0);
1150 ath_hal_beacontimers(ah, &bs);
1151 sc->sc_imask |= HAL_INT_BMISS;
1152 ath_hal_intrset(ah, sc->sc_imask);
1154 ath_hal_intrset(ah, 0);
1155 if (nexttbtt == intval)
1156 intval |= HAL_BEACON_RESET_TSF;
1157 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1159 * In IBSS mode enable the beacon timers but only
1160 * enable SWBA interrupts if we need to manually
1161 * prepare beacon frames. Otherwise we use a
1162 * self-linked tx descriptor and let the hardware
1165 intval |= HAL_BEACON_ENA;
1166 if (!sc->sc_hasveol)
1167 sc->sc_imask |= HAL_INT_SWBA;
1168 if ((intval & HAL_BEACON_RESET_TSF) == 0) {
1170 * Pull nexttbtt forward to reflect
1173 tsf = ath_hal_gettsf64(ah);
1174 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
1177 } while (nexttbtt < tsftu);
1179 ath_beaconq_config(sc);
1180 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
1181 ic->ic_opmode == IEEE80211_M_MBSS) {
1183 * In AP/mesh mode we enable the beacon timers
1184 * and SWBA interrupts to prepare beacon frames.
1186 intval |= HAL_BEACON_ENA;
1187 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
1188 ath_beaconq_config(sc);
1192 * Now dirty things because for now, the EDMA HAL has
1193 * nexttbtt and intval is TU/8.
1195 if (sc->sc_isedma) {
1196 nexttbtt_u8 = (nexttbtt << 3);
1197 intval_u8 = (intval << 3);
1198 if (intval & HAL_BEACON_ENA)
1199 intval_u8 |= HAL_BEACON_ENA;
1200 if (intval & HAL_BEACON_RESET_TSF)
1201 intval_u8 |= HAL_BEACON_RESET_TSF;
1202 ath_hal_beaconinit(ah, nexttbtt_u8, intval_u8);
1204 ath_hal_beaconinit(ah, nexttbtt, intval);
1205 sc->sc_bmisscount = 0;
1206 ath_hal_intrset(ah, sc->sc_imask);
1208 * When using a self-linked beacon descriptor in
1209 * ibss mode load it once here.
1211 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
1212 ath_beacon_start_adhoc(sc, vap);
1214 ieee80211_free_node(ni);
1217 ath_power_restore_power_state(sc);