2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
41 #include <sys/module.h>
42 #include <sys/kernel.h>
44 #include <sys/mutex.h>
45 #include <sys/errno.h>
47 #include <machine/bus.h>
48 #include <machine/resource.h>
52 #include <sys/socket.h>
55 #include <net/if_media.h>
56 #include <net/if_arp.h>
57 #include <net/ethernet.h>
59 #include <net80211/ieee80211_var.h>
61 #include <dev/ath/if_athvar.h>
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
66 /* For EEPROM firmware */
67 #ifdef ATH_EEPROM_FIRMWARE
68 #include <sys/linker.h>
69 #include <sys/firmware.h>
70 #endif /* ATH_EEPROM_FIRMWARE */
76 struct ath_pci_softc {
77 struct ath_softc sc_sc;
78 struct resource *sc_sr; /* memory resource */
79 struct resource *sc_irq; /* irq resource */
80 void *sc_ih; /* interrupt handler */
84 #define PCIR_RETRY_TIMEOUT 0x41
85 #define PCIR_CFG_PMCSR 0x48
87 #define DEFAULT_CACHESIZE 32
90 ath_pci_setup(device_t dev)
94 /* XXX TODO: need to override the _system_ saved copies of this */
97 * If the cache line size is 0, force it to a reasonable
100 cz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
102 pci_write_config(dev, PCIR_CACHELNSZ,
103 DEFAULT_CACHESIZE / 4, 1);
106 /* Override the system latency timer */
107 pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1);
109 /* If a PCI NIC, force wakeup */
110 #ifdef ATH_PCI_WAKEUP_WAR
111 /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
114 pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
116 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
118 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
123 * Disable retry timeout to keep PCI Tx retries from
124 * interfering with C3 CPU state.
126 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
130 ath_pci_probe(device_t dev)
134 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
135 if (devname != NULL) {
136 device_set_desc(dev, devname);
137 return BUS_PROBE_DEFAULT;
143 ath_pci_attach(device_t dev)
145 struct ath_pci_softc *psc = device_get_softc(dev);
146 struct ath_softc *sc = &psc->sc_sc;
149 #ifdef ATH_EEPROM_FIRMWARE
150 const struct firmware *fw = NULL;
157 * Enable bus mastering.
159 pci_enable_busmaster(dev);
162 * Setup other PCI bus configuration parameters.
167 * Setup memory-mapping of PCI registers.
170 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
172 if (psc->sc_sr == NULL) {
173 device_printf(dev, "cannot map register space\n");
176 /* XXX uintptr_t is a bandaid for ia64; to be fixed */
177 sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr);
178 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
180 * Mark device invalid so any interrupts (shared or otherwise)
181 * that arrive before the HAL is setup are discarded.
186 * Arrange interrupt line.
189 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
190 RF_SHAREABLE|RF_ACTIVE);
191 if (psc->sc_irq == NULL) {
192 device_printf(dev, "could not map interrupt\n");
195 if (bus_setup_intr(dev, psc->sc_irq,
196 INTR_TYPE_NET | INTR_MPSAFE,
197 NULL, ath_intr, sc, &psc->sc_ih)) {
198 device_printf(dev, "could not establish interrupt\n");
203 * Setup DMA descriptor area.
205 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
206 1, 0, /* alignment, bounds */
207 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
208 BUS_SPACE_MAXADDR, /* highaddr */
209 NULL, NULL, /* filter, filterarg */
210 0x3ffff, /* maxsize XXX */
211 ATH_MAX_SCATTER, /* nsegments */
212 0x3ffff, /* maxsegsize XXX */
213 BUS_DMA_ALLOCNOW, /* flags */
217 device_printf(dev, "cannot allocate DMA tag\n");
221 #ifdef ATH_EEPROM_FIRMWARE
223 * If there's an EEPROM firmware image, load that in.
225 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
226 "eeprom_firmware", &buf) == 0) {
228 device_printf(dev, "%s: looking up firmware @ '%s'\n",
231 fw = firmware_get(buf);
233 device_printf(dev, "%s: couldn't find firmware\n",
238 device_printf(dev, "%s: EEPROM firmware @ %p\n",
241 malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO);
242 if (! sc->sc_eepromdata) {
243 device_printf(dev, "%s: can't malloc eepromdata\n",
247 memcpy(sc->sc_eepromdata, fw->data, fw->datasize);
250 #endif /* ATH_EEPROM_FIRMWARE */
253 ATH_PCU_LOCK_INIT(sc);
254 ATH_RX_LOCK_INIT(sc);
255 ATH_TX_LOCK_INIT(sc);
256 ATH_TX_IC_LOCK_INIT(sc);
257 ATH_TXSTATUS_LOCK_INIT(sc);
259 error = ath_attach(pci_get_device(dev), sc);
260 if (error == 0) /* success */
263 ATH_TXSTATUS_LOCK_DESTROY(sc);
264 ATH_PCU_LOCK_DESTROY(sc);
265 ATH_RX_LOCK_DESTROY(sc);
266 ATH_TX_IC_LOCK_DESTROY(sc);
267 ATH_TX_LOCK_DESTROY(sc);
268 ATH_LOCK_DESTROY(sc);
269 bus_dma_tag_destroy(sc->sc_dmat);
271 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
273 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
275 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
281 ath_pci_detach(device_t dev)
283 struct ath_pci_softc *psc = device_get_softc(dev);
284 struct ath_softc *sc = &psc->sc_sc;
286 /* check if device was removed */
287 sc->sc_invalid = !bus_child_present(dev);
290 * Do a config read to clear pre-existing pci error status.
292 (void) pci_read_config(dev, PCIR_COMMAND, 4);
296 bus_generic_detach(dev);
297 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
298 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
300 bus_dma_tag_destroy(sc->sc_dmat);
301 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
303 if (sc->sc_eepromdata)
304 free(sc->sc_eepromdata, M_TEMP);
306 ATH_TXSTATUS_LOCK_DESTROY(sc);
307 ATH_PCU_LOCK_DESTROY(sc);
308 ATH_RX_LOCK_DESTROY(sc);
309 ATH_TX_IC_LOCK_DESTROY(sc);
310 ATH_TX_LOCK_DESTROY(sc);
311 ATH_LOCK_DESTROY(sc);
317 ath_pci_shutdown(device_t dev)
319 struct ath_pci_softc *psc = device_get_softc(dev);
321 ath_shutdown(&psc->sc_sc);
326 ath_pci_suspend(device_t dev)
328 struct ath_pci_softc *psc = device_get_softc(dev);
330 ath_suspend(&psc->sc_sc);
336 ath_pci_resume(device_t dev)
338 struct ath_pci_softc *psc = device_get_softc(dev);
341 * Suspend/resume resets the PCI configuration space.
345 ath_resume(&psc->sc_sc);
350 static device_method_t ath_pci_methods[] = {
351 /* Device interface */
352 DEVMETHOD(device_probe, ath_pci_probe),
353 DEVMETHOD(device_attach, ath_pci_attach),
354 DEVMETHOD(device_detach, ath_pci_detach),
355 DEVMETHOD(device_shutdown, ath_pci_shutdown),
356 DEVMETHOD(device_suspend, ath_pci_suspend),
357 DEVMETHOD(device_resume, ath_pci_resume),
361 static driver_t ath_pci_driver = {
364 sizeof (struct ath_pci_softc)
366 static devclass_t ath_devclass;
367 DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0);
368 MODULE_VERSION(ath_pci, 1);
369 MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */
370 MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */