2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Driver for the Atheros Wireless LAN controller.
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
43 * This is needed for register operations which are performed
44 * by the driver - eg, calls to ath_hal_gettsf32().
46 * It's also required for any AH_DEBUG checks in here, eg the
47 * module dependencies.
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysctl.h>
56 #include <sys/malloc.h>
58 #include <sys/mutex.h>
59 #include <sys/kernel.h>
60 #include <sys/socket.h>
61 #include <sys/sockio.h>
62 #include <sys/errno.h>
63 #include <sys/callout.h>
65 #include <sys/endian.h>
66 #include <sys/kthread.h>
67 #include <sys/taskqueue.h>
69 #include <sys/module.h>
71 #include <sys/smp.h> /* for mp_ncpus */
73 #include <machine/bus.h>
76 #include <net/if_var.h>
77 #include <net/if_dl.h>
78 #include <net/if_media.h>
79 #include <net/if_types.h>
80 #include <net/if_arp.h>
81 #include <net/ethernet.h>
82 #include <net/if_llc.h>
84 #include <net80211/ieee80211_var.h>
85 #include <net80211/ieee80211_regdomain.h>
86 #ifdef IEEE80211_SUPPORT_SUPERG
87 #include <net80211/ieee80211_superg.h>
89 #ifdef IEEE80211_SUPPORT_TDMA
90 #include <net80211/ieee80211_tdma.h>
96 #include <netinet/in.h>
97 #include <netinet/if_ether.h>
100 #include <dev/ath/if_athvar.h>
101 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
102 #include <dev/ath/ath_hal/ah_diagcodes.h>
104 #include <dev/ath/if_ath_debug.h>
105 #include <dev/ath/if_ath_misc.h>
106 #include <dev/ath/if_ath_tsf.h>
107 #include <dev/ath/if_ath_tx.h>
108 #include <dev/ath/if_ath_sysctl.h>
109 #include <dev/ath/if_ath_led.h>
110 #include <dev/ath/if_ath_keycache.h>
111 #include <dev/ath/if_ath_rx.h>
112 #include <dev/ath/if_ath_beacon.h>
113 #include <dev/ath/if_athdfs.h>
116 #include <dev/ath/ath_tx99/ath_tx99.h>
120 #include <dev/ath/if_ath_alq.h>
123 #ifdef IEEE80211_SUPPORT_TDMA
124 #include <dev/ath/if_ath_tdma.h>
126 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
128 static void ath_tdma_bintvalsetup(struct ath_softc *sc,
129 const struct ieee80211_tdma_state *tdma);
130 #endif /* IEEE80211_SUPPORT_TDMA */
132 #ifdef IEEE80211_SUPPORT_TDMA
134 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
136 struct ath_hal *ah = sc->sc_ah;
137 HAL_BEACON_TIMERS bt;
139 bt.bt_intval = bintval | HAL_BEACON_ENA;
140 bt.bt_nexttbtt = nexttbtt;
141 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
142 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
143 bt.bt_nextatim = nexttbtt+1;
144 /* Enables TBTT, DBA, SWBA timers by default */
147 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
148 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n",
163 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) {
164 struct if_ath_alq_tdma_timer_set t;
165 t.bt_intval = htobe32(bt.bt_intval);
166 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt);
167 t.bt_nextdba = htobe32(bt.bt_nextdba);
168 t.bt_nextswba = htobe32(bt.bt_nextswba);
169 t.bt_nextatim = htobe32(bt.bt_nextatim);
170 t.bt_flags = htobe32(bt.bt_flags);
171 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep);
172 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep);
173 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET,
174 sizeof(t), (char *) &t);
178 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
179 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n",
183 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10),
184 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10));
185 ath_hal_beaconsettimers(ah, &bt);
189 * Calculate the beacon interval. This is periodic in the
190 * superframe for the bss. We assume each station is configured
191 * identically wrt transmit rate so the guard time we calculate
192 * above will be the same on all stations. Note we need to
193 * factor in the xmit time because the hardware will schedule
194 * a frame for transmit if the start of the frame is within
195 * the burst time. When we get hardware that properly kills
196 * frames in the PCU we can reduce/eliminate the guard time.
198 * Roundup to 1024 is so we have 1 TU buffer in the guard time
199 * to deal with the granularity of the nexttbtt timer. 11n MAC's
200 * with 1us timer granularity should allow us to reduce/eliminate
204 ath_tdma_bintvalsetup(struct ath_softc *sc,
205 const struct ieee80211_tdma_state *tdma)
207 /* copy from vap state (XXX check all vaps have same value?) */
208 sc->sc_tdmaslotlen = tdma->tdma_slotlen;
210 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
211 tdma->tdma_slotcnt, 1024);
212 sc->sc_tdmabintval >>= 10; /* TSF -> TU */
213 if (sc->sc_tdmabintval & 1)
214 sc->sc_tdmabintval++;
216 if (tdma->tdma_slot == 0) {
218 * Only slot 0 beacons; other slots respond.
220 sc->sc_imask |= HAL_INT_SWBA;
221 sc->sc_tdmaswba = 0; /* beacon immediately */
223 /* XXX all vaps must be slot 0 or slot !0 */
224 sc->sc_imask &= ~HAL_INT_SWBA;
229 * Max 802.11 overhead. This assumes no 4-address frames and
230 * the encapsulation done by ieee80211_encap (llc). We also
231 * include potential crypto overhead.
233 #define IEEE80211_MAXOVERHEAD \
234 (sizeof(struct ieee80211_qosframe) \
235 + sizeof(struct llc) \
236 + IEEE80211_ADDR_LEN \
237 + IEEE80211_WEP_IVLEN \
238 + IEEE80211_WEP_KIDLEN \
239 + IEEE80211_WEP_CRCLEN \
240 + IEEE80211_WEP_MICLEN \
244 * Setup initially for tdma operation. Start the beacon
245 * timers and enable SWBA if we are slot 0. Otherwise
246 * we wait for slot 0 to arrive so we can sync up before
247 * starting to transmit.
250 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
252 struct ath_hal *ah = sc->sc_ah;
253 struct ifnet *ifp = sc->sc_ifp;
254 struct ieee80211com *ic = ifp->if_l2com;
255 const struct ieee80211_txparam *tp;
256 const struct ieee80211_tdma_state *tdma = NULL;
260 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
262 device_printf(sc->sc_dev, "%s: no vaps?\n", __func__);
266 /* XXX should take a locked ref to iv_bss */
267 tp = vap->iv_bss->ni_txparms;
269 * Calculate the guard time for each slot. This is the
270 * time to send a maximal-size frame according to the
271 * fixed/lowest transmit rate. Note that the interface
272 * mtu does not include the 802.11 overhead so we must
273 * tack that on (ath_hal_computetxtime includes the
274 * preamble and plcp in it's calculation).
277 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
278 rix = ath_tx_findrix(sc, tp->ucastrate);
280 rix = ath_tx_findrix(sc, tp->mcastrate);
283 * If the chip supports enforcing TxOP on transmission,
284 * we can just delete the guard window. It isn't at all required.
286 if (sc->sc_hasenforcetxop) {
287 sc->sc_tdmaguard = 0;
289 /* XXX short preamble assumed */
290 /* XXX non-11n rate assumed */
291 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
292 ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE);
295 ath_hal_intrset(ah, 0);
297 ath_beaconq_config(sc); /* setup h/w beacon q */
299 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */
300 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */
301 ath_tdma_settimers(sc, sc->sc_tdmabintval,
302 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
303 sc->sc_syncbeacon = 0;
305 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
306 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
308 ath_hal_intrset(ah, sc->sc_imask);
310 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
311 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
312 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
313 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
317 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) {
318 struct if_ath_alq_tdma_timer_config t;
320 t.tdma_slot = htobe32(tdma->tdma_slot);
321 t.tdma_slotlen = htobe32(tdma->tdma_slotlen);
322 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt);
323 t.tdma_bintval = htobe32(tdma->tdma_bintval);
324 t.tdma_guard = htobe32(sc->sc_tdmaguard);
325 t.tdma_scbintval = htobe32(sc->sc_tdmabintval);
326 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep);
328 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG,
329 sizeof(t), (char *) &t);
331 #endif /* ATH_DEBUG_ALQ */
335 * Update tdma operation. Called from the 802.11 layer
336 * when a beacon is received from the TDMA station operating
337 * in the slot immediately preceding us in the bss. Use
338 * the rx timestamp for the beacon frame to update our
339 * beacon timers so we follow their schedule. Note that
340 * by using the rx timestamp we implicitly include the
341 * propagation delay in our schedule.
343 * XXX TODO: since the changes for the AR5416 and later chips
344 * involved changing the TSF/TU calculations, we need to make
345 * sure that various calculations wrap consistently.
347 * A lot of the problems stemmed from the calculations wrapping
348 * at 65,535 TU. Since a lot of the math is still being done in
349 * TU, please audit it to ensure that when the TU values programmed
350 * into the timers wrap at (2^31)-1 TSF, all the various terms
354 ath_tdma_update(struct ieee80211_node *ni,
355 const struct ieee80211_tdma_param *tdma, int changed)
357 #define TSF_TO_TU(_h,_l) \
358 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
359 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10)
360 struct ieee80211vap *vap = ni->ni_vap;
361 struct ieee80211com *ic = ni->ni_ic;
362 struct ath_softc *sc = ic->ic_softc;
363 struct ath_hal *ah = sc->sc_ah;
364 const HAL_RATE_TABLE *rt = sc->sc_currates;
365 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full;
366 u_int32_t txtime, nextslottu;
367 int32_t tudelta, tsfdelta;
368 const struct ath_rx_status *rs;
371 sc->sc_stats.ast_tdma_update++;
374 * Check for and adopt configuration changes.
377 const struct ieee80211_tdma_state *ts = vap->iv_tdma;
379 ath_tdma_bintvalsetup(sc, ts);
380 if (changed & TDMA_UPDATE_SLOTLEN)
383 DPRINTF(sc, ATH_DEBUG_TDMA,
384 "%s: adopt slot %u slotcnt %u slotlen %u us "
385 "bintval %u TU\n", __func__,
386 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
390 ath_hal_intrset(ah, sc->sc_imask);
391 /* NB: beacon timers programmed below */
394 /* extend rx timestamp to 64 bits */
396 tsf = ath_hal_gettsf64(ah);
397 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf);
399 * The rx timestamp is set by the hardware on completing
400 * reception (at the point where the rx descriptor is DMA'd
401 * to the host). To find the start of our next slot we
402 * must adjust this time by the time required to send
403 * the packet just received.
405 rix = rt->rateCodeToIndex[rs->rs_rate];
408 * To calculate the packet duration for legacy rates, we
409 * only need the rix and preamble.
411 * For 11n non-aggregate frames, we also need the channel
412 * width and short/long guard interval.
414 * For 11n aggregate frames, the required hacks are a little
415 * more subtle. You need to figure out the frame duration
416 * for each frame, including the delimiters. However, when
417 * a frame isn't received successfully, we won't hear it
418 * (unless you enable reception of CRC errored frames), so
419 * your duration calculation is going to be off.
421 * However, we can assume that the beacon frames won't be
422 * transmitted as aggregate frames, so we should be okay.
423 * Just add a check to ensure that we aren't handed something
426 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is
427 * actually short guard interval. For legacy rates,
428 * it's short preamble.
430 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen,
432 !! (rs->rs_flags & HAL_RX_2040),
434 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble);
435 /* NB: << 9 is to cvt to TU and /2 */
436 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
439 * For 802.11n chips: nextslottu needs to be the full TSF space,
440 * not just 0..65535 TU.
442 nextslottu = TSF_TO_TU(nextslot>>32, nextslot);
444 * Retrieve the hardware NextTBTT in usecs
445 * and calculate the difference between what the
446 * other station thinks and what we have programmed. This
447 * lets us figure how to adjust our timers to match. The
448 * adjustments are done by pulling the TSF forward and possibly
449 * rewriting the beacon timers.
452 * The logic here assumes the nexttbtt counter is in TSF
453 * but the prr-11n NICs are in TU. The HAL shifts them
454 * to TSF but there's two important differences:
456 * + The TU->TSF values have 0's for the low 9 bits, and
457 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for
458 * the pre-11n NICs, but not for the 11n NICs.
460 * So for now, just make sure the nexttbtt value we get
461 * matches the second issue or once nexttbtt exceeds this
462 * value, tsfdelta ends up becoming very negative and all
463 * of the adjustments get very messed up.
467 * We need to track the full nexttbtt rather than having it
468 * truncated at HAL_BEACON_PERIOD, as programming the
469 * nexttbtt (and related) registers for the 11n chips is
470 * actually going to take the full 32 bit space, rather than
473 nexttbtt_full = ath_hal_getnexttbtt(ah);
474 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1));
475 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt);
477 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
478 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, "
479 "nextslottu %d, nextslottume %d\n",
480 (unsigned long long) rs->rs_tstamp,
481 (unsigned long long) rstamp,
482 (unsigned long long) tsf, txtime,
483 (unsigned long long) nextslot,
484 nextslottu, TSF_TO_TU(nextslot >> 32, nextslot));
485 DPRINTF(sc, ATH_DEBUG_TDMA,
486 " beacon tstamp: %llu (0x%016llx)\n",
487 (unsigned long long) le64toh(ni->ni_tstamp.tsf),
488 (unsigned long long) le64toh(ni->ni_tstamp.tsf));
490 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
491 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n",
492 (unsigned long long) nexttbtt,
493 (long long) nexttbtt,
495 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
498 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
499 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
500 tsfdelta = -tsfdelta % 1024;
502 } else if (tsfdelta > 0) {
503 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
504 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
505 tsfdelta = 1024 - (tsfdelta % 1024);
508 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
509 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
511 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full);
514 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) {
515 struct if_ath_alq_tdma_beacon_state t;
516 t.rx_tsf = htobe64(rstamp);
517 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf));
518 t.tsf64 = htobe64(tsf);
519 t.nextslot_tsf = htobe64(nextslot);
520 t.nextslot_tu = htobe32(nextslottu);
521 t.txtime = htobe32(txtime);
522 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE,
523 sizeof(t), (char *) &t);
526 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) {
527 struct if_ath_alq_tdma_slot_calc t;
529 t.nexttbtt = htobe64(nexttbtt_full);
530 t.next_slot = htobe64(nextslot);
531 t.tsfdelta = htobe32(tsfdelta);
532 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap));
533 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam));
535 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC,
536 sizeof(t), (char *) &t);
541 * Copy sender's timetstamp into tdma ie so they can
542 * calculate roundtrip time. We submit a beacon frame
543 * below after any timer adjustment. The frame goes out
544 * at the next TBTT so the sender can calculate the
545 * roundtrip by inspecting the tdma ie in our beacon frame.
547 * NB: This tstamp is subtlely preserved when
548 * IEEE80211_BEACON_TDMA is marked (e.g. when the
549 * slot position changes) because ieee80211_add_tdma
550 * skips over the data.
552 memcpy(ATH_VAP(vap)->av_boff.bo_tdma +
553 __offsetof(struct ieee80211_tdma_param, tdma_tstamp),
554 &ni->ni_tstamp.data, 8);
556 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
557 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n",
558 (unsigned long long) tsf, (unsigned long long) nextslot,
559 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta);
562 * Adjust the beacon timers only when pulling them forward
563 * or when going back by less than the beacon interval.
564 * Negative jumps larger than the beacon interval seem to
565 * cause the timers to stop and generally cause instability.
566 * This basically filters out jumps due to missed beacons.
568 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
569 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
570 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n",
574 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
575 sc->sc_stats.ast_tdma_timers++;
580 /* XXX should just teach ath_hal_adjusttsf() to do this */
581 tsf = ath_hal_gettsf64(ah);
582 ath_hal_settsf64(ah, tsf + tsfdelta);
583 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
584 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n",
586 (unsigned long long) tsf,
590 if (if_ath_alq_checkdebug(&sc->sc_alq,
591 ATH_ALQ_TDMA_TSF_ADJUST)) {
592 struct if_ath_alq_tdma_tsf_adjust t;
594 t.tsfdelta = htobe32(tsfdelta);
595 t.tsf64_old = htobe64(tsf);
596 t.tsf64_new = htobe64(tsf + tsfdelta);
597 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST,
598 sizeof(t), (char *) &t);
600 #endif /* ATH_DEBUG_ALQ */
601 sc->sc_stats.ast_tdma_tsf++;
603 ath_tdma_beacon_send(sc, vap); /* prepare response */
609 * Transmit a beacon frame at SWBA. Dynamic updates
610 * to the frame contents are done as needed.
613 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
615 struct ath_hal *ah = sc->sc_ah;
620 * Check if the previous beacon has gone out. If
621 * not don't try to post another, skip this period
622 * and wait for the next. Missed beacons indicate
623 * a problem and should not occur. If we miss too
624 * many consecutive beacons reset the device.
626 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
628 DPRINTF(sc, ATH_DEBUG_BEACON,
629 "%s: missed %u consecutive beacons\n",
630 __func__, sc->sc_bmisscount);
631 if (sc->sc_bmisscount >= ath_bstuck_threshold)
632 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
635 if (sc->sc_bmisscount != 0) {
636 DPRINTF(sc, ATH_DEBUG_BEACON,
637 "%s: resume beacon xmit after %u misses\n",
638 __func__, sc->sc_bmisscount);
639 sc->sc_bmisscount = 0;
643 * Check recent per-antenna transmit statistics and flip
644 * the default antenna if noticeably more frames went out
645 * on the non-default antenna.
646 * XXX assumes 2 anntenae
648 if (!sc->sc_diversity) {
649 otherant = sc->sc_defant & 1 ? 2 : 1;
650 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
651 ath_setdefantenna(sc, otherant);
652 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
655 bf = ath_beacon_generate(sc, vap);
656 /* XXX We don't do cabq traffic, but just for completeness .. */
657 ATH_TXQ_LOCK(sc->sc_cabq);
658 ath_beacon_cabq_start(sc);
659 ATH_TXQ_UNLOCK(sc->sc_cabq);
663 * Stop any current dma and put the new frame on the queue.
664 * This should never fail since we check above that no frames
665 * are still pending on the queue.
667 if ((! sc->sc_isedma) &&
668 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) {
669 DPRINTF(sc, ATH_DEBUG_ANY,
670 "%s: beacon queue %u did not stop?\n",
671 __func__, sc->sc_bhalq);
672 /* NB: the HAL still stops DMA, so proceed */
674 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
675 ath_hal_txstart(ah, sc->sc_bhalq);
677 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */
680 * Record local TSF for our last send for use
681 * in arbitrating slot collisions.
683 /* XXX should take a locked ref to iv_bss */
684 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
687 #endif /* IEEE80211_SUPPORT_TDMA */