2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Driver for the Atheros Wireless LAN controller.
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/sysctl.h>
48 #include <sys/malloc.h>
50 #include <sys/mutex.h>
51 #include <sys/kernel.h>
52 #include <sys/socket.h>
53 #include <sys/sockio.h>
54 #include <sys/errno.h>
55 #include <sys/callout.h>
57 #include <sys/endian.h>
58 #include <sys/kthread.h>
59 #include <sys/taskqueue.h>
62 #include <machine/bus.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_types.h>
68 #include <net/if_arp.h>
69 #include <net/ethernet.h>
70 #include <net/if_llc.h>
72 #include <net80211/ieee80211_var.h>
73 #include <net80211/ieee80211_regdomain.h>
74 #ifdef IEEE80211_SUPPORT_SUPERG
75 #include <net80211/ieee80211_superg.h>
77 #ifdef IEEE80211_SUPPORT_TDMA
78 #include <net80211/ieee80211_tdma.h>
80 #include <net80211/ieee80211_ht.h>
85 #include <netinet/in.h>
86 #include <netinet/if_ether.h>
89 #include <dev/ath/if_athvar.h>
90 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
91 #include <dev/ath/ath_hal/ah_diagcodes.h>
93 #include <dev/ath/if_ath_debug.h>
96 #include <dev/ath/ath_tx99/ath_tx99.h>
99 #include <dev/ath/if_ath_misc.h>
100 #include <dev/ath/if_ath_tx.h>
101 #include <dev/ath/if_ath_tx_ht.h>
104 * How many retries to perform in software
106 #define SWMAX_RETRIES 10
108 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
110 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
112 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
113 struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
114 static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
115 struct ieee80211_node *ni, struct mbuf *m0, int *tid);
118 * Whether to use the 11n rate scenario functions or not
121 ath_tx_is_11n(struct ath_softc *sc)
123 return (sc->sc_ah->ah_magic == 0x20065416);
127 * Obtain the current TID from the given frame.
129 * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
130 * This has implications for which AC/priority the packet is placed
134 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
136 const struct ieee80211_frame *wh;
137 int pri = M_WME_GETAC(m0);
139 wh = mtod(m0, const struct ieee80211_frame *);
140 if (! IEEE80211_QOS_HAS_SEQ(wh))
141 return IEEE80211_NONQOS_TID;
143 return WME_AC_TO_TID(pri);
147 * Determine what the correct AC queue for the given frame
150 * This code assumes that the TIDs map consistently to
151 * the underlying hardware (or software) ath_txq.
152 * Since the sender may try to set an AC which is
153 * arbitrary, non-QoS TIDs may end up being put on
154 * completely different ACs. There's no way to put a
155 * TID into multiple ath_txq's for scheduling, so
156 * for now we override the AC/TXQ selection and set
157 * non-QOS TID frames into the BE queue.
159 * This may be completely incorrect - specifically,
160 * some management frames may end up out of order
161 * compared to the QoS traffic they're controlling.
162 * I'll look into this later.
165 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
167 const struct ieee80211_frame *wh;
168 int pri = M_WME_GETAC(m0);
169 wh = mtod(m0, const struct ieee80211_frame *);
170 if (IEEE80211_QOS_HAS_SEQ(wh))
177 ath_txfrag_cleanup(struct ath_softc *sc,
178 ath_bufhead *frags, struct ieee80211_node *ni)
180 struct ath_buf *bf, *next;
182 ATH_TXBUF_LOCK_ASSERT(sc);
184 TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
185 /* NB: bf assumed clean */
186 TAILQ_REMOVE(frags, bf, bf_list);
187 TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
188 ieee80211_node_decref(ni);
193 * Setup xmit of a fragmented frame. Allocate a buffer
194 * for each frag and bump the node reference count to
195 * reflect the held reference to be setup by ath_tx_start.
198 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
199 struct mbuf *m0, struct ieee80211_node *ni)
205 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
206 bf = _ath_getbuf_locked(sc);
207 if (bf == NULL) { /* out of buffers, cleanup */
208 device_printf(sc->sc_dev, "%s: no buffer?\n",
210 ath_txfrag_cleanup(sc, frags, ni);
213 ieee80211_node_incref(ni);
214 TAILQ_INSERT_TAIL(frags, bf, bf_list);
216 ATH_TXBUF_UNLOCK(sc);
218 return !TAILQ_EMPTY(frags);
222 * Reclaim mbuf resources. For fragmented frames we
223 * need to claim each frag chained with m_nextpkt.
226 ath_freetx(struct mbuf *m)
234 } while ((m = next) != NULL);
238 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
244 * Load the DMA map so any coalescing is done. This
245 * also calculates the number of descriptors we need.
247 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
248 bf->bf_segs, &bf->bf_nseg,
250 if (error == EFBIG) {
251 /* XXX packet requires too many descriptors */
252 bf->bf_nseg = ATH_TXDESC+1;
253 } else if (error != 0) {
254 sc->sc_stats.ast_tx_busdma++;
259 * Discard null packets and check for packets that
260 * require too many TX descriptors. We try to convert
261 * the latter to a cluster.
263 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */
264 sc->sc_stats.ast_tx_linear++;
265 m = m_collapse(m0, M_DONTWAIT, ATH_TXDESC);
268 sc->sc_stats.ast_tx_nombuf++;
272 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
273 bf->bf_segs, &bf->bf_nseg,
276 sc->sc_stats.ast_tx_busdma++;
280 KASSERT(bf->bf_nseg <= ATH_TXDESC,
281 ("too many segments after defrag; nseg %u", bf->bf_nseg));
282 } else if (bf->bf_nseg == 0) { /* null packet, discard */
283 sc->sc_stats.ast_tx_nodata++;
287 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
288 __func__, m0, m0->m_pkthdr.len);
289 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
296 * Chain together segments+descriptors for a non-11n frame.
299 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_buf *bf)
301 struct ath_hal *ah = sc->sc_ah;
302 struct ath_desc *ds, *ds0;
306 * Fillin the remainder of the descriptor info.
308 ds0 = ds = bf->bf_desc;
309 for (i = 0; i < bf->bf_nseg; i++, ds++) {
310 ds->ds_data = bf->bf_segs[i].ds_addr;
311 if (i == bf->bf_nseg - 1)
314 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
315 ath_hal_filltxdesc(ah, ds
316 , bf->bf_segs[i].ds_len /* segment length */
317 , i == 0 /* first segment */
318 , i == bf->bf_nseg - 1 /* last segment */
319 , ds0 /* first descriptor */
321 DPRINTF(sc, ATH_DEBUG_XMIT,
322 "%s: %d: %08x %08x %08x %08x %08x %08x\n",
323 __func__, i, ds->ds_link, ds->ds_data,
324 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
327 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
331 * Fill in the descriptor list for a aggregate subframe.
333 * The subframe is returned with the ds_link field in the last subframe
337 ath_tx_chaindesclist_subframe(struct ath_softc *sc, struct ath_buf *bf)
339 struct ath_hal *ah = sc->sc_ah;
340 struct ath_desc *ds, *ds0;
343 ds0 = ds = bf->bf_desc;
346 * There's no need to call ath_hal_setupfirsttxdesc here;
347 * That's only going to occur for the first frame in an aggregate.
349 for (i = 0; i < bf->bf_nseg; i++, ds++) {
350 ds->ds_data = bf->bf_segs[i].ds_addr;
351 if (i == bf->bf_nseg - 1)
354 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
357 * This performs the setup for an aggregate frame.
358 * This includes enabling the aggregate flags if needed.
360 ath_hal_chaintxdesc(ah, ds,
361 bf->bf_state.bfs_pktlen,
362 bf->bf_state.bfs_hdrlen,
363 HAL_PKT_TYPE_AMPDU, /* forces aggregate bits to be set */
364 bf->bf_state.bfs_keyix,
365 0, /* cipher, calculated from keyix */
366 bf->bf_state.bfs_ndelim,
367 bf->bf_segs[i].ds_len, /* segment length */
368 i == 0, /* first segment */
369 i == bf->bf_nseg - 1, /* last segment */
370 bf->bf_next == NULL /* last sub-frame in aggr */
373 DPRINTF(sc, ATH_DEBUG_XMIT,
374 "%s: %d: %08x %08x %08x %08x %08x %08x\n",
375 __func__, i, ds->ds_link, ds->ds_data,
376 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
378 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
379 BUS_DMASYNC_PREWRITE);
384 * Setup segments+descriptors for an 11n aggregate.
385 * bf_first is the first buffer in the aggregate.
386 * The descriptor list must already been linked together using
390 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
392 struct ath_buf *bf, *bf_prev = NULL;
394 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
395 __func__, bf_first->bf_state.bfs_nframes,
396 bf_first->bf_state.bfs_al);
399 * Setup all descriptors of all subframes.
403 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
404 "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
405 __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
406 SEQNO(bf->bf_state.bfs_seqno));
408 /* Sub-frame setup */
409 ath_tx_chaindesclist_subframe(sc, bf);
412 * Link the last descriptor of the previous frame
413 * to the beginning descriptor of this frame.
416 bf_prev->bf_lastds->ds_link = bf->bf_daddr;
418 /* Save a copy so we can link the next descriptor in */
424 * Setup first descriptor of first frame.
425 * chaintxdesc() overwrites the descriptor entries;
426 * setupfirsttxdesc() merges in things.
427 * Otherwise various fields aren't set correctly (eg flags).
429 ath_hal_setupfirsttxdesc(sc->sc_ah,
431 bf_first->bf_state.bfs_al,
432 bf_first->bf_state.bfs_txflags | HAL_TXDESC_INTREQ,
433 bf_first->bf_state.bfs_txpower,
434 bf_first->bf_state.bfs_txrate0,
435 bf_first->bf_state.bfs_try0,
436 bf_first->bf_state.bfs_txantenna,
437 bf_first->bf_state.bfs_ctsrate,
438 bf_first->bf_state.bfs_ctsduration);
441 * Setup the last descriptor in the list.
442 * bf_prev points to the last; bf is NULL here.
444 ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_desc,
448 * Set the first descriptor bf_lastds field to point to
449 * the last descriptor in the last subframe, that's where
450 * the status update will occur.
452 bf_first->bf_lastds = bf_prev->bf_lastds;
455 * And bf_last in the first descriptor points to the end of
456 * the aggregate list.
458 bf_first->bf_last = bf_prev;
460 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
464 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
467 ATH_TXQ_LOCK_ASSERT(txq);
468 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
469 ("%s: busy status 0x%x", __func__, bf->bf_flags));
470 if (txq->axq_link != NULL) {
471 struct ath_buf *last = ATH_TXQ_LAST(txq, axq_q_s);
472 struct ieee80211_frame *wh;
474 /* mark previous frame */
475 wh = mtod(last->bf_m, struct ieee80211_frame *);
476 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
477 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
478 BUS_DMASYNC_PREWRITE);
480 /* link descriptor */
481 *txq->axq_link = bf->bf_daddr;
483 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
484 txq->axq_link = &bf->bf_lastds->ds_link;
488 * Hand-off packet to a hardware queue.
491 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
494 struct ath_hal *ah = sc->sc_ah;
497 * Insert the frame on the outbound list and pass it on
498 * to the hardware. Multicast frames buffered for power
499 * save stations and transmit from the CAB queue are stored
500 * on a s/w only queue and loaded on to the CAB queue in
501 * the SWBA handler since frames only go out on DTIM and
502 * to avoid possible races.
504 ATH_TXQ_LOCK_ASSERT(txq);
505 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
506 ("%s: busy status 0x%x", __func__, bf->bf_flags));
507 KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
508 ("ath_tx_handoff_hw called for mcast queue"));
512 * This causes a LOR. Find out where the PCU lock is being
513 * held whilst the TXQ lock is grabbed - that shouldn't
517 if (sc->sc_inreset_cnt) {
519 DPRINTF(sc, ATH_DEBUG_RESET,
520 "%s: called with sc_in_reset != 0\n",
522 DPRINTF(sc, ATH_DEBUG_XMIT,
523 "%s: queued: TXDP[%u] = %p (%p) depth %d\n",
524 __func__, txq->axq_qnum,
525 (caddr_t)bf->bf_daddr, bf->bf_desc,
527 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
528 if (bf->bf_state.bfs_aggr)
529 txq->axq_aggr_depth++;
531 * There's no need to update axq_link; the hardware
532 * is in reset and once the reset is complete, any
533 * non-empty queues will simply have DMA restarted.
540 /* For now, so not to generate whitespace diffs */
542 #ifdef IEEE80211_SUPPORT_TDMA
545 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
546 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
547 if (txq->axq_link == NULL) {
549 * Be careful writing the address to TXDP. If
550 * the tx q is enabled then this write will be
551 * ignored. Normally this is not an issue but
552 * when tdma is in use and the q is beacon gated
553 * this race can occur. If the q is busy then
554 * defer the work to later--either when another
555 * packet comes along or when we prepare a beacon
559 ath_hal_puttxbuf(ah, txq->axq_qnum,
561 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
562 DPRINTF(sc, ATH_DEBUG_XMIT,
563 "%s: TXDP[%u] = %p (%p) depth %d\n",
564 __func__, txq->axq_qnum,
565 (caddr_t)bf->bf_daddr, bf->bf_desc,
568 txq->axq_flags |= ATH_TXQ_PUTPENDING;
569 DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
570 "%s: Q%u busy, defer enable\n", __func__,
574 *txq->axq_link = bf->bf_daddr;
575 DPRINTF(sc, ATH_DEBUG_XMIT,
576 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
577 txq->axq_qnum, txq->axq_link,
578 (caddr_t)bf->bf_daddr, bf->bf_desc,
580 if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
582 * The q was busy when we previously tried
583 * to write the address of the first buffer
584 * in the chain. Since it's not busy now
585 * handle this chore. We are certain the
586 * buffer at the front is the right one since
587 * axq_link is NULL only when the buffer list
590 ath_hal_puttxbuf(ah, txq->axq_qnum,
591 TAILQ_FIRST(&txq->axq_q)->bf_daddr);
592 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
593 DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
594 "%s: Q%u restarted\n", __func__,
599 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
600 if (txq->axq_link == NULL) {
601 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
602 DPRINTF(sc, ATH_DEBUG_XMIT,
603 "%s: TXDP[%u] = %p (%p) depth %d\n",
604 __func__, txq->axq_qnum,
605 (caddr_t)bf->bf_daddr, bf->bf_desc,
608 *txq->axq_link = bf->bf_daddr;
609 DPRINTF(sc, ATH_DEBUG_XMIT,
610 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
611 txq->axq_qnum, txq->axq_link,
612 (caddr_t)bf->bf_daddr, bf->bf_desc,
615 #endif /* IEEE80211_SUPPORT_TDMA */
616 if (bf->bf_state.bfs_aggr)
617 txq->axq_aggr_depth++;
618 txq->axq_link = &bf->bf_lastds->ds_link;
619 ath_hal_txstart(ah, txq->axq_qnum);
624 * Restart TX DMA for the given TXQ.
626 * This must be called whether the queue is empty or not.
629 ath_txq_restart_dma(struct ath_softc *sc, struct ath_txq *txq)
631 struct ath_hal *ah = sc->sc_ah;
632 struct ath_buf *bf, *bf_last;
634 ATH_TXQ_LOCK_ASSERT(txq);
636 /* This is always going to be cleared, empty or not */
637 txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
639 /* XXX make this ATH_TXQ_FIRST */
640 bf = TAILQ_FIRST(&txq->axq_q);
641 bf_last = ATH_TXQ_LAST(txq, axq_q_s);
646 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
647 txq->axq_link = &bf_last->bf_lastds->ds_link;
648 ath_hal_txstart(ah, txq->axq_qnum);
652 * Hand off a packet to the hardware (or mcast queue.)
654 * The relevant hardware txq should be locked.
657 ath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
659 ATH_TXQ_LOCK_ASSERT(txq);
661 if (txq->axq_qnum == ATH_TXQ_SWQ)
662 ath_tx_handoff_mcast(sc, txq, bf);
664 ath_tx_handoff_hw(sc, txq, bf);
668 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
669 struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
672 DPRINTF(sc, ATH_DEBUG_XMIT,
673 "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
682 const struct ieee80211_cipher *cip;
683 struct ieee80211_key *k;
686 * Construct the 802.11 header+trailer for an encrypted
687 * frame. The only reason this can fail is because of an
688 * unknown or unsupported cipher/key type.
690 k = ieee80211_crypto_encap(ni, m0);
693 * This can happen when the key is yanked after the
694 * frame was queued. Just discard the frame; the
695 * 802.11 layer counts failures and provides
696 * debugging/diagnostics.
701 * Adjust the packet + header lengths for the crypto
702 * additions and calculate the h/w key index. When
703 * a s/w mic is done the frame will have had any mic
704 * added to it prior to entry so m0->m_pkthdr.len will
705 * account for it. Otherwise we need to add it to the
709 (*hdrlen) += cip->ic_header;
710 (*pktlen) += cip->ic_header + cip->ic_trailer;
711 /* NB: frags always have any TKIP MIC done in s/w */
712 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
713 (*pktlen) += cip->ic_miclen;
714 (*keyix) = k->wk_keyix;
715 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
717 * Use station key cache slot, if assigned.
719 (*keyix) = ni->ni_ucastkey.wk_keyix;
720 if ((*keyix) == IEEE80211_KEYIX_NONE)
721 (*keyix) = HAL_TXKEYIX_INVALID;
723 (*keyix) = HAL_TXKEYIX_INVALID;
729 * Calculate whether interoperability protection is required for
732 * This requires the rate control information be filled in,
733 * as the protection requirement depends upon the current
734 * operating mode / PHY.
737 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
739 struct ieee80211_frame *wh;
743 const HAL_RATE_TABLE *rt = sc->sc_currates;
744 struct ifnet *ifp = sc->sc_ifp;
745 struct ieee80211com *ic = ifp->if_l2com;
747 flags = bf->bf_state.bfs_txflags;
748 rix = bf->bf_state.bfs_rc[0].rix;
749 shortPreamble = bf->bf_state.bfs_shpream;
750 wh = mtod(bf->bf_m, struct ieee80211_frame *);
753 * If 802.11g protection is enabled, determine whether
754 * to use RTS/CTS or just CTS. Note that this is only
755 * done for OFDM unicast frames.
757 if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
758 rt->info[rix].phy == IEEE80211_T_OFDM &&
759 (flags & HAL_TXDESC_NOACK) == 0) {
760 bf->bf_state.bfs_doprot = 1;
761 /* XXX fragments must use CCK rates w/ protection */
762 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
763 flags |= HAL_TXDESC_RTSENA;
764 } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
765 flags |= HAL_TXDESC_CTSENA;
768 * For frags it would be desirable to use the
769 * highest CCK rate for RTS/CTS. But stations
770 * farther away may detect it at a lower CCK rate
771 * so use the configured protection rate instead
774 sc->sc_stats.ast_tx_protect++;
778 * If 11n protection is enabled and it's a HT frame,
781 * XXX ic_htprotmode or ic_curhtprotmode?
782 * XXX should it_htprotmode only matter if ic_curhtprotmode
783 * XXX indicates it's not a HT pure environment?
785 if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
786 rt->info[rix].phy == IEEE80211_T_HT &&
787 (flags & HAL_TXDESC_NOACK) == 0) {
788 flags |= HAL_TXDESC_RTSENA;
789 sc->sc_stats.ast_tx_htprotect++;
791 bf->bf_state.bfs_txflags = flags;
795 * Update the frame duration given the currently selected rate.
797 * This also updates the frame duration value, so it will require
801 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
803 struct ieee80211_frame *wh;
807 struct ath_hal *ah = sc->sc_ah;
808 const HAL_RATE_TABLE *rt = sc->sc_currates;
809 int isfrag = bf->bf_m->m_flags & M_FRAG;
811 flags = bf->bf_state.bfs_txflags;
812 rix = bf->bf_state.bfs_rc[0].rix;
813 shortPreamble = bf->bf_state.bfs_shpream;
814 wh = mtod(bf->bf_m, struct ieee80211_frame *);
817 * Calculate duration. This logically belongs in the 802.11
818 * layer but it lacks sufficient information to calculate it.
820 if ((flags & HAL_TXDESC_NOACK) == 0 &&
821 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
824 dur = rt->info[rix].spAckDuration;
826 dur = rt->info[rix].lpAckDuration;
827 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
828 dur += dur; /* additional SIFS+ACK */
829 KASSERT(bf->bf_m->m_nextpkt != NULL, ("no fragment"));
831 * Include the size of next fragment so NAV is
832 * updated properly. The last fragment uses only
835 dur += ath_hal_computetxtime(ah, rt,
836 bf->bf_m->m_nextpkt->m_pkthdr.len,
841 * Force hardware to use computed duration for next
842 * fragment by disabling multi-rate retry which updates
843 * duration based on the multi-rate duration table.
845 bf->bf_state.bfs_ismrr = 0;
846 bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
847 /* XXX update bfs_rc[0].try? */
850 /* Update the duration field itself */
851 *(u_int16_t *)wh->i_dur = htole16(dur);
856 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
857 int cix, int shortPreamble)
862 * CTS transmit rate is derived from the transmit rate
863 * by looking in the h/w rate table. We must also factor
864 * in whether or not a short preamble is to be used.
866 /* NB: cix is set above where RTS/CTS is enabled */
867 KASSERT(cix != 0xff, ("cix not setup"));
868 ctsrate = rt->info[cix].rateCode;
870 /* XXX this should only matter for legacy rates */
872 ctsrate |= rt->info[cix].shortPreamble;
878 * Calculate the RTS/CTS duration for legacy frames.
881 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
882 int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
887 /* This mustn't be called for HT modes */
888 if (rt->info[cix].phy == IEEE80211_T_HT) {
889 printf("%s: HT rate where it shouldn't be (0x%x)\n",
890 __func__, rt->info[cix].rateCode);
895 * Compute the transmit duration based on the frame
896 * size and the size of an ACK frame. We call into the
897 * HAL to do the computation since it depends on the
898 * characteristics of the actual PHY being used.
900 * NB: CTS is assumed the same size as an ACK so we can
901 * use the precalculated ACK durations.
904 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
905 ctsduration += rt->info[cix].spAckDuration;
906 ctsduration += ath_hal_computetxtime(ah,
907 rt, pktlen, rix, AH_TRUE);
908 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
909 ctsduration += rt->info[rix].spAckDuration;
911 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
912 ctsduration += rt->info[cix].lpAckDuration;
913 ctsduration += ath_hal_computetxtime(ah,
914 rt, pktlen, rix, AH_FALSE);
915 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
916 ctsduration += rt->info[rix].lpAckDuration;
919 return (ctsduration);
923 * Update the given ath_buf with updated rts/cts setup and duration
926 * To support rate lookups for each software retry, the rts/cts rate
927 * and cts duration must be re-calculated.
929 * This function assumes the RTS/CTS flags have been set as needed;
930 * mrr has been disabled; and the rate control lookup has been done.
932 * XXX TODO: MRR need only be disabled for the pre-11n NICs.
933 * XXX The 11n NICs support per-rate RTS/CTS configuration.
936 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
938 uint16_t ctsduration = 0;
940 uint8_t rix = bf->bf_state.bfs_rc[0].rix;
942 const HAL_RATE_TABLE *rt = sc->sc_currates;
945 * No RTS/CTS enabled? Don't bother.
947 if ((bf->bf_state.bfs_txflags &
948 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
949 /* XXX is this really needed? */
950 bf->bf_state.bfs_ctsrate = 0;
951 bf->bf_state.bfs_ctsduration = 0;
956 * If protection is enabled, use the protection rix control
957 * rate. Otherwise use the rate0 control rate.
959 if (bf->bf_state.bfs_doprot)
960 rix = sc->sc_protrix;
962 rix = bf->bf_state.bfs_rc[0].rix;
965 * If the raw path has hard-coded ctsrate0 to something,
968 if (bf->bf_state.bfs_ctsrate0 != 0)
969 cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
971 /* Control rate from above */
972 cix = rt->info[rix].controlRate;
974 /* Calculate the rtscts rate for the given cix */
975 ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
976 bf->bf_state.bfs_shpream);
978 /* The 11n chipsets do ctsduration calculations for you */
979 if (! ath_tx_is_11n(sc))
980 ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
981 bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
982 rt, bf->bf_state.bfs_txflags);
984 /* Squirrel away in ath_buf */
985 bf->bf_state.bfs_ctsrate = ctsrate;
986 bf->bf_state.bfs_ctsduration = ctsduration;
989 * Must disable multi-rate retry when using RTS/CTS.
990 * XXX TODO: only for pre-11n NICs.
992 bf->bf_state.bfs_ismrr = 0;
993 bf->bf_state.bfs_try0 =
994 bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
998 * Setup the descriptor chain for a normal or fast-frame
1002 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1004 struct ath_desc *ds = bf->bf_desc;
1005 struct ath_hal *ah = sc->sc_ah;
1007 ath_hal_setuptxdesc(ah, ds
1008 , bf->bf_state.bfs_pktlen /* packet length */
1009 , bf->bf_state.bfs_hdrlen /* header length */
1010 , bf->bf_state.bfs_atype /* Atheros packet type */
1011 , bf->bf_state.bfs_txpower /* txpower */
1012 , bf->bf_state.bfs_txrate0
1013 , bf->bf_state.bfs_try0 /* series 0 rate/tries */
1014 , bf->bf_state.bfs_keyix /* key cache index */
1015 , bf->bf_state.bfs_txantenna /* antenna mode */
1016 , bf->bf_state.bfs_txflags /* flags */
1017 , bf->bf_state.bfs_ctsrate /* rts/cts rate */
1018 , bf->bf_state.bfs_ctsduration /* rts/cts duration */
1022 * This will be overriden when the descriptor chain is written.
1027 /* XXX TODO: Setup descriptor chain */
1033 * This performs a rate lookup for the given ath_buf only if it's required.
1034 * Non-data frames and raw frames don't require it.
1036 * This populates the primary and MRR entries; MRR values are
1037 * then disabled later on if something requires it (eg RTS/CTS on
1040 * This needs to be done before the RTS/CTS fields are calculated
1041 * as they may depend upon the rate chosen.
1044 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1049 if (! bf->bf_state.bfs_doratelookup)
1052 /* Get rid of any previous state */
1053 bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1055 ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1056 ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1057 bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1059 /* In case MRR is disabled, make sure rc[0] is setup correctly */
1060 bf->bf_state.bfs_rc[0].rix = rix;
1061 bf->bf_state.bfs_rc[0].ratecode = rate;
1062 bf->bf_state.bfs_rc[0].tries = try0;
1064 if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1065 ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1066 bf->bf_state.bfs_rc);
1067 ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1069 sc->sc_txrix = rix; /* for LED blinking */
1070 sc->sc_lastdatarix = rix; /* for fast frames */
1071 bf->bf_state.bfs_try0 = try0;
1072 bf->bf_state.bfs_txrate0 = rate;
1076 * Set the rate control fields in the given descriptor based on
1077 * the bf_state fields and node state.
1079 * The bfs fields should already be set with the relevant rate
1080 * control information, including whether MRR is to be enabled.
1082 * Since the FreeBSD HAL currently sets up the first TX rate
1083 * in ath_hal_setuptxdesc(), this will setup the MRR
1084 * conditionally for the pre-11n chips, and call ath_buf_set_rate
1085 * unconditionally for 11n chips. These require the 11n rate
1086 * scenario to be set if MCS rates are enabled, so it's easier
1087 * to just always call it. The caller can then only set rates 2, 3
1088 * and 4 if multi-rate retry is needed.
1091 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
1094 struct ath_rc_series *rc = bf->bf_state.bfs_rc;
1096 /* If mrr is disabled, blank tries 1, 2, 3 */
1097 if (! bf->bf_state.bfs_ismrr)
1098 rc[1].tries = rc[2].tries = rc[3].tries = 0;
1101 * Always call - that way a retried descriptor will
1102 * have the MRR fields overwritten.
1104 * XXX TODO: see if this is really needed - setting up
1105 * the first descriptor should set the MRR fields to 0
1108 if (ath_tx_is_11n(sc)) {
1109 ath_buf_set_rate(sc, ni, bf);
1111 ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
1112 , rc[1].ratecode, rc[1].tries
1113 , rc[2].ratecode, rc[2].tries
1114 , rc[3].ratecode, rc[3].tries
1120 * Transmit the given frame to the hardware.
1122 * The frame must already be setup; rate control must already have
1125 * XXX since the TXQ lock is being held here (and I dislike holding
1126 * it for this long when not doing software aggregation), later on
1127 * break this function into "setup_normal" and "xmit_normal". The
1128 * lock only needs to be held for the ath_tx_handoff call.
1131 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1135 ATH_TXQ_LOCK_ASSERT(txq);
1137 /* Setup the descriptor before handoff */
1138 ath_tx_do_ratelookup(sc, bf);
1139 ath_tx_calc_duration(sc, bf);
1140 ath_tx_calc_protection(sc, bf);
1141 ath_tx_set_rtscts(sc, bf);
1142 ath_tx_rate_fill_rcflags(sc, bf);
1143 ath_tx_setds(sc, bf);
1144 ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1145 ath_tx_chaindesclist(sc, bf);
1147 /* Hand off to hardware */
1148 ath_tx_handoff(sc, txq, bf);
1154 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1155 struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1157 struct ieee80211vap *vap = ni->ni_vap;
1158 struct ath_hal *ah = sc->sc_ah;
1159 struct ifnet *ifp = sc->sc_ifp;
1160 struct ieee80211com *ic = ifp->if_l2com;
1161 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1162 int error, iswep, ismcast, isfrag, ismrr;
1163 int keyix, hdrlen, pktlen, try0 = 0;
1164 u_int8_t rix = 0, txrate = 0;
1165 struct ath_desc *ds;
1166 struct ieee80211_frame *wh;
1167 u_int subtype, flags;
1169 const HAL_RATE_TABLE *rt;
1170 HAL_BOOL shortPreamble;
1171 struct ath_node *an;
1174 wh = mtod(m0, struct ieee80211_frame *);
1175 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1176 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1177 isfrag = m0->m_flags & M_FRAG;
1178 hdrlen = ieee80211_anyhdrsize(wh);
1180 * Packet length must not include any
1181 * pad bytes; deduct them here.
1183 pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1185 /* Handle encryption twiddling if needed */
1186 if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1192 /* packet header may have moved, reset our local pointer */
1193 wh = mtod(m0, struct ieee80211_frame *);
1195 pktlen += IEEE80211_CRC_LEN;
1198 * Load the DMA map so any coalescing is done. This
1199 * also calculates the number of descriptors we need.
1201 error = ath_tx_dmasetup(sc, bf, m0);
1204 bf->bf_node = ni; /* NB: held reference */
1205 m0 = bf->bf_m; /* NB: may have changed */
1206 wh = mtod(m0, struct ieee80211_frame *);
1208 /* setup descriptors */
1210 rt = sc->sc_currates;
1211 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1214 * NB: the 802.11 layer marks whether or not we should
1215 * use short preamble based on the current mode and
1216 * negotiated parameters.
1218 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1219 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1220 shortPreamble = AH_TRUE;
1221 sc->sc_stats.ast_tx_shortpre++;
1223 shortPreamble = AH_FALSE;
1227 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
1228 ismrr = 0; /* default no multi-rate retry*/
1229 pri = M_WME_GETAC(m0); /* honor classification */
1230 /* XXX use txparams instead of fixed values */
1232 * Calculate Atheros packet type from IEEE80211 packet header,
1233 * setup for rate calculations, and select h/w transmit queue.
1235 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1236 case IEEE80211_FC0_TYPE_MGT:
1237 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1238 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1239 atype = HAL_PKT_TYPE_BEACON;
1240 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1241 atype = HAL_PKT_TYPE_PROBE_RESP;
1242 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1243 atype = HAL_PKT_TYPE_ATIM;
1245 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
1246 rix = an->an_mgmtrix;
1247 txrate = rt->info[rix].rateCode;
1249 txrate |= rt->info[rix].shortPreamble;
1250 try0 = ATH_TXMGTTRY;
1251 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1253 case IEEE80211_FC0_TYPE_CTL:
1254 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
1255 rix = an->an_mgmtrix;
1256 txrate = rt->info[rix].rateCode;
1258 txrate |= rt->info[rix].shortPreamble;
1259 try0 = ATH_TXMGTTRY;
1260 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1262 case IEEE80211_FC0_TYPE_DATA:
1263 atype = HAL_PKT_TYPE_NORMAL; /* default */
1265 * Data frames: multicast frames go out at a fixed rate,
1266 * EAPOL frames use the mgmt frame rate; otherwise consult
1267 * the rate control module for the rate to use.
1270 rix = an->an_mcastrix;
1271 txrate = rt->info[rix].rateCode;
1273 txrate |= rt->info[rix].shortPreamble;
1275 } else if (m0->m_flags & M_EAPOL) {
1276 /* XXX? maybe always use long preamble? */
1277 rix = an->an_mgmtrix;
1278 txrate = rt->info[rix].rateCode;
1280 txrate |= rt->info[rix].shortPreamble;
1281 try0 = ATH_TXMAXTRY; /* XXX?too many? */
1284 * Do rate lookup on each TX, rather than using
1285 * the hard-coded TX information decided here.
1288 bf->bf_state.bfs_doratelookup = 1;
1290 if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1291 flags |= HAL_TXDESC_NOACK;
1294 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1295 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1301 /* Check if the TXQ wouldn't match what the hardware TXQ is! */
1302 if (txq != sc->sc_ac2q[pri]) {
1303 device_printf(sc->sc_dev,
1304 "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1310 sc->sc_ac2q[pri]->axq_qnum);
1314 * Calculate miscellaneous flags.
1317 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
1318 } else if (pktlen > vap->iv_rtsthreshold &&
1319 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1320 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
1321 sc->sc_stats.ast_tx_rts++;
1323 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
1324 sc->sc_stats.ast_tx_noack++;
1325 #ifdef IEEE80211_SUPPORT_TDMA
1326 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1327 DPRINTF(sc, ATH_DEBUG_TDMA,
1328 "%s: discard frame, ACK required w/ TDMA\n", __func__);
1329 sc->sc_stats.ast_tdma_ack++;
1336 * Determine if a tx interrupt should be generated for
1337 * this descriptor. We take a tx interrupt to reap
1338 * descriptors when the h/w hits an EOL condition or
1339 * when the descriptor is specifically marked to generate
1340 * an interrupt. We periodically mark descriptors in this
1341 * way to insure timely replenishing of the supply needed
1342 * for sending frames. Defering interrupts reduces system
1343 * load and potentially allows more concurrent work to be
1344 * done but if done to aggressively can cause senders to
1347 * NB: use >= to deal with sc_txintrperiod changing
1348 * dynamically through sysctl.
1350 if (flags & HAL_TXDESC_INTREQ) {
1351 txq->axq_intrcnt = 0;
1352 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1353 flags |= HAL_TXDESC_INTREQ;
1354 txq->axq_intrcnt = 0;
1357 /* This point forward is actual TX bits */
1360 * At this point we are committed to sending the frame
1361 * and we don't need to look at m_nextpkt; clear it in
1362 * case this frame is part of frag chain.
1364 m0->m_nextpkt = NULL;
1366 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1367 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1368 sc->sc_hwmap[rix].ieeerate, -1);
1370 if (ieee80211_radiotap_active_vap(vap)) {
1371 u_int64_t tsf = ath_hal_gettsf64(ah);
1373 sc->sc_tx_th.wt_tsf = htole64(tsf);
1374 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1376 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1378 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1379 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1380 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1381 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1383 ieee80211_radiotap_tx(vap, m0);
1386 /* Blank the legacy rate array */
1387 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1390 * ath_buf_set_rate needs at least one rate/try to setup
1391 * the rate scenario.
1393 bf->bf_state.bfs_rc[0].rix = rix;
1394 bf->bf_state.bfs_rc[0].tries = try0;
1395 bf->bf_state.bfs_rc[0].ratecode = txrate;
1397 /* Store the decided rate index values away */
1398 bf->bf_state.bfs_pktlen = pktlen;
1399 bf->bf_state.bfs_hdrlen = hdrlen;
1400 bf->bf_state.bfs_atype = atype;
1401 bf->bf_state.bfs_txpower = ni->ni_txpower;
1402 bf->bf_state.bfs_txrate0 = txrate;
1403 bf->bf_state.bfs_try0 = try0;
1404 bf->bf_state.bfs_keyix = keyix;
1405 bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1406 bf->bf_state.bfs_txflags = flags;
1407 bf->bf_state.bfs_shpream = shortPreamble;
1409 /* XXX this should be done in ath_tx_setrate() */
1410 bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */
1411 bf->bf_state.bfs_ctsrate = 0; /* calculated later */
1412 bf->bf_state.bfs_ctsduration = 0;
1413 bf->bf_state.bfs_ismrr = ismrr;
1419 * Direct-dispatch the current frame to the hardware.
1421 * This can be called by the net80211 code.
1423 * XXX what about locking? Or, push the seqno assign into the
1424 * XXX aggregate scheduler so its serialised?
1427 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1428 struct ath_buf *bf, struct mbuf *m0)
1430 struct ieee80211vap *vap = ni->ni_vap;
1431 struct ath_vap *avp = ATH_VAP(vap);
1435 struct ath_txq *txq;
1437 const struct ieee80211_frame *wh;
1438 int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1439 ieee80211_seq seqno;
1440 uint8_t type, subtype;
1443 * Determine the target hardware queue.
1445 * For multicast frames, the txq gets overridden appropriately
1446 * depending upon the state of PS.
1448 * For any other frame, we do a TID/QoS lookup inside the frame
1449 * to see what the TID should be. If it's a non-QoS frame, the
1450 * AC and TID are overridden. The TID/TXQ code assumes the
1451 * TID is on a predictable hardware TXQ, so we don't support
1452 * having a node TID queued to multiple hardware TXQs.
1453 * This may change in the future but would require some locking
1456 pri = ath_tx_getac(sc, m0);
1457 tid = ath_tx_gettid(sc, m0);
1459 txq = sc->sc_ac2q[pri];
1460 wh = mtod(m0, struct ieee80211_frame *);
1461 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1462 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1463 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1466 * Enforce how deep the multicast queue can grow.
1468 * XXX duplicated in ath_raw_xmit().
1470 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1471 ATH_TXQ_LOCK(sc->sc_cabq);
1473 if (sc->sc_cabq->axq_depth > sc->sc_txq_mcastq_maxdepth) {
1474 sc->sc_stats.ast_tx_mcastq_overflow++;
1478 ATH_TXQ_UNLOCK(sc->sc_cabq);
1487 is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1488 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1489 is_ampdu = is_ampdu_tx | is_ampdu_pending;
1491 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1492 __func__, tid, pri, is_ampdu);
1495 * When servicing one or more stations in power-save mode
1496 * (or) if there is some mcast data waiting on the mcast
1497 * queue (to prevent out of order delivery) multicast frames
1498 * must be bufferd until after the beacon.
1500 * TODO: we should lock the mcastq before we check the length.
1502 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
1503 txq = &avp->av_mcastq;
1505 /* Do the generic frame setup */
1506 /* XXX should just bzero the bf_state? */
1507 bf->bf_state.bfs_dobaw = 0;
1509 /* A-MPDU TX? Manually set sequence number */
1510 /* Don't do it whilst pending; the net80211 layer still assigns them */
1511 /* XXX do we need locking here? */
1515 * Always call; this function will
1516 * handle making sure that null data frames
1517 * don't get a sequence number from the current
1518 * TID and thus mess with the BAW.
1520 seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
1523 * Don't add QoS NULL frames to the BAW.
1525 if (IEEE80211_QOS_HAS_SEQ(wh) &&
1526 subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
1527 bf->bf_state.bfs_dobaw = 1;
1529 ATH_TXQ_UNLOCK(txq);
1533 * If needed, the sequence number has been assigned.
1534 * Squirrel it away somewhere easy to get to.
1536 bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
1538 /* Is ampdu pending? fetch the seqno and print it out */
1539 if (is_ampdu_pending)
1540 DPRINTF(sc, ATH_DEBUG_SW_TX,
1541 "%s: tid %d: ampdu pending, seqno %d\n",
1542 __func__, tid, M_SEQNO_GET(m0));
1544 /* This also sets up the DMA map */
1545 r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
1550 /* At this point m0 could have changed! */
1555 * If it's a multicast frame, do a direct-dispatch to the
1556 * destination hardware queue. Don't bother software
1560 * If it's a BAR frame, do a direct dispatch to the
1561 * destination hardware queue. Don't bother software
1562 * queuing it, as the TID will now be paused.
1563 * Sending a BAR frame can occur from the net80211 txa timer
1564 * (ie, retries) or from the ath txtask (completion call.)
1565 * It queues directly to hardware because the TID is paused
1566 * at this point (and won't be unpaused until the BAR has
1567 * either been TXed successfully or max retries has been
1570 if (txq == &avp->av_mcastq) {
1571 DPRINTF(sc, ATH_DEBUG_SW_TX,
1572 "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
1574 ath_tx_xmit_normal(sc, txq, bf);
1575 ATH_TXQ_UNLOCK(txq);
1576 } else if (type == IEEE80211_FC0_TYPE_CTL &&
1577 subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1578 DPRINTF(sc, ATH_DEBUG_SW_TX,
1579 "%s: BAR: TX'ing direct\n", __func__);
1581 ath_tx_xmit_normal(sc, txq, bf);
1582 ATH_TXQ_UNLOCK(txq);
1584 /* add to software queue */
1585 DPRINTF(sc, ATH_DEBUG_SW_TX,
1586 "%s: bf=%p: swq: TX'ing\n", __func__, bf);
1587 ath_tx_swq(sc, ni, txq, bf);
1591 * For now, since there's no software queue,
1592 * direct-dispatch to the hardware.
1595 ath_tx_xmit_normal(sc, txq, bf);
1596 ATH_TXQ_UNLOCK(txq);
1603 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
1604 struct ath_buf *bf, struct mbuf *m0,
1605 const struct ieee80211_bpf_params *params)
1607 struct ifnet *ifp = sc->sc_ifp;
1608 struct ieee80211com *ic = ifp->if_l2com;
1609 struct ath_hal *ah = sc->sc_ah;
1610 struct ieee80211vap *vap = ni->ni_vap;
1611 int error, ismcast, ismrr;
1612 int keyix, hdrlen, pktlen, try0, txantenna;
1613 u_int8_t rix, txrate;
1614 struct ieee80211_frame *wh;
1617 const HAL_RATE_TABLE *rt;
1618 struct ath_desc *ds;
1623 wh = mtod(m0, struct ieee80211_frame *);
1624 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1625 hdrlen = ieee80211_anyhdrsize(wh);
1627 * Packet length must not include any
1628 * pad bytes; deduct them here.
1630 /* XXX honor IEEE80211_BPF_DATAPAD */
1631 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
1634 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
1637 /* Handle encryption twiddling if needed */
1638 if (! ath_tx_tag_crypto(sc, ni,
1639 m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
1640 &hdrlen, &pktlen, &keyix)) {
1644 /* packet header may have moved, reset our local pointer */
1645 wh = mtod(m0, struct ieee80211_frame *);
1647 /* Do the generic frame setup */
1648 /* XXX should just bzero the bf_state? */
1649 bf->bf_state.bfs_dobaw = 0;
1651 error = ath_tx_dmasetup(sc, bf, m0);
1654 m0 = bf->bf_m; /* NB: may have changed */
1655 wh = mtod(m0, struct ieee80211_frame *);
1656 bf->bf_node = ni; /* NB: held reference */
1658 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
1659 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1660 if (params->ibp_flags & IEEE80211_BPF_RTS)
1661 flags |= HAL_TXDESC_RTSENA;
1662 else if (params->ibp_flags & IEEE80211_BPF_CTS) {
1663 /* XXX assume 11g/11n protection? */
1664 bf->bf_state.bfs_doprot = 1;
1665 flags |= HAL_TXDESC_CTSENA;
1667 /* XXX leave ismcast to injector? */
1668 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
1669 flags |= HAL_TXDESC_NOACK;
1671 rt = sc->sc_currates;
1672 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1673 rix = ath_tx_findrix(sc, params->ibp_rate0);
1674 txrate = rt->info[rix].rateCode;
1675 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
1676 txrate |= rt->info[rix].shortPreamble;
1678 try0 = params->ibp_try0;
1679 ismrr = (params->ibp_try1 != 0);
1680 txantenna = params->ibp_pri >> 2;
1681 if (txantenna == 0) /* XXX? */
1682 txantenna = sc->sc_txantenna;
1685 * Since ctsrate is fixed, store it away for later
1686 * use when the descriptor fields are being set.
1688 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
1689 bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
1691 pri = params->ibp_pri & 3;
1692 /* Override pri if the frame isn't a QoS one */
1693 if (! IEEE80211_QOS_HAS_SEQ(wh))
1694 pri = ath_tx_getac(sc, m0);
1697 * NB: we mark all packets as type PSPOLL so the h/w won't
1698 * set the sequence number, duration, etc.
1700 atype = HAL_PKT_TYPE_PSPOLL;
1702 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1703 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
1704 sc->sc_hwmap[rix].ieeerate, -1);
1706 if (ieee80211_radiotap_active_vap(vap)) {
1707 u_int64_t tsf = ath_hal_gettsf64(ah);
1709 sc->sc_tx_th.wt_tsf = htole64(tsf);
1710 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1711 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
1712 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1713 if (m0->m_flags & M_FRAG)
1714 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1715 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1716 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1717 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1719 ieee80211_radiotap_tx(vap, m0);
1723 * Formulate first tx descriptor with tx controls.
1726 /* XXX check return value? */
1728 /* Store the decided rate index values away */
1729 bf->bf_state.bfs_pktlen = pktlen;
1730 bf->bf_state.bfs_hdrlen = hdrlen;
1731 bf->bf_state.bfs_atype = atype;
1732 bf->bf_state.bfs_txpower = params->ibp_power;
1733 bf->bf_state.bfs_txrate0 = txrate;
1734 bf->bf_state.bfs_try0 = try0;
1735 bf->bf_state.bfs_keyix = keyix;
1736 bf->bf_state.bfs_txantenna = txantenna;
1737 bf->bf_state.bfs_txflags = flags;
1738 bf->bf_state.bfs_shpream =
1739 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
1741 /* XXX this should be done in ath_tx_setrate() */
1742 bf->bf_state.bfs_ctsrate = 0;
1743 bf->bf_state.bfs_ctsduration = 0;
1744 bf->bf_state.bfs_ismrr = ismrr;
1746 /* Blank the legacy rate array */
1747 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1749 bf->bf_state.bfs_rc[0].rix =
1750 ath_tx_findrix(sc, params->ibp_rate0);
1751 bf->bf_state.bfs_rc[0].tries = try0;
1752 bf->bf_state.bfs_rc[0].ratecode = txrate;
1757 rix = ath_tx_findrix(sc, params->ibp_rate1);
1758 bf->bf_state.bfs_rc[1].rix = rix;
1759 bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
1761 rix = ath_tx_findrix(sc, params->ibp_rate2);
1762 bf->bf_state.bfs_rc[2].rix = rix;
1763 bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
1765 rix = ath_tx_findrix(sc, params->ibp_rate3);
1766 bf->bf_state.bfs_rc[3].rix = rix;
1767 bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
1770 * All the required rate control decisions have been made;
1771 * fill in the rc flags.
1773 ath_tx_rate_fill_rcflags(sc, bf);
1775 /* NB: no buffered multicast in power save support */
1777 /* XXX If it's an ADDBA, override the correct queue */
1778 do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
1780 /* Map ADDBA to the correct priority */
1783 device_printf(sc->sc_dev,
1784 "%s: overriding tid %d pri %d -> %d\n",
1785 __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
1787 pri = TID_TO_WME_AC(o_tid);
1791 * If we're overiding the ADDBA destination, dump directly
1792 * into the hardware queue, right after any pending
1793 * frames to that node are.
1795 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
1796 __func__, do_override);
1799 ATH_TXQ_LOCK(sc->sc_ac2q[pri]);
1800 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
1801 ATH_TXQ_UNLOCK(sc->sc_ac2q[pri]);
1803 /* Queue to software queue */
1804 ath_tx_swq(sc, ni, sc->sc_ac2q[pri], bf);
1813 * This can be called by net80211.
1816 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1817 const struct ieee80211_bpf_params *params)
1819 struct ieee80211com *ic = ni->ni_ic;
1820 struct ifnet *ifp = ic->ic_ifp;
1821 struct ath_softc *sc = ifp->if_softc;
1823 struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
1827 if (sc->sc_inreset_cnt > 0) {
1828 device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n",
1834 sc->sc_txstart_cnt++;
1837 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
1838 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
1839 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
1840 "!running" : "invalid");
1847 * Enforce how deep the multicast queue can grow.
1849 * XXX duplicated in ath_tx_start().
1851 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1852 ATH_TXQ_LOCK(sc->sc_cabq);
1854 if (sc->sc_cabq->axq_depth > sc->sc_txq_mcastq_maxdepth) {
1855 sc->sc_stats.ast_tx_mcastq_overflow++;
1859 ATH_TXQ_UNLOCK(sc->sc_cabq);
1868 * Grab a TX buffer and associated resources.
1870 bf = ath_getbuf(sc);
1872 sc->sc_stats.ast_tx_nobuf++;
1878 if (params == NULL) {
1880 * Legacy path; interpret frame contents to decide
1881 * precisely how to send the frame.
1883 if (ath_tx_start(sc, ni, bf, m)) {
1884 error = EIO; /* XXX */
1889 * Caller supplied explicit parameters to use in
1890 * sending the frame.
1892 if (ath_tx_raw_start(sc, ni, bf, m, params)) {
1893 error = EIO; /* XXX */
1897 sc->sc_wd_timer = 5;
1899 sc->sc_stats.ast_tx_raw++;
1902 sc->sc_txstart_cnt--;
1908 TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1909 ATH_TXBUF_UNLOCK(sc);
1912 sc->sc_txstart_cnt--;
1916 sc->sc_stats.ast_tx_raw_fail++;
1917 ieee80211_free_node(ni);
1922 /* Some helper functions */
1925 * ADDBA (and potentially others) need to be placed in the same
1926 * hardware queue as the TID/node it's relating to. This is so
1927 * it goes out after any pending non-aggregate frames to the
1930 * If this isn't done, the ADDBA can go out before the frames
1931 * queued in hardware. Even though these frames have a sequence
1932 * number -earlier- than the ADDBA can be transmitted (but
1933 * no frames whose sequence numbers are after the ADDBA should
1934 * be!) they'll arrive after the ADDBA - and the receiving end
1935 * will simply drop them as being out of the BAW.
1937 * The frames can't be appended to the TID software queue - it'll
1938 * never be sent out. So these frames have to be directly
1939 * dispatched to the hardware, rather than queued in software.
1940 * So if this function returns true, the TXQ has to be
1941 * overridden and it has to be directly dispatched.
1943 * It's a dirty hack, but someone's gotta do it.
1947 * XXX doesn't belong here!
1950 ieee80211_is_action(struct ieee80211_frame *wh)
1952 /* Type: Management frame? */
1953 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
1954 IEEE80211_FC0_TYPE_MGT)
1957 /* Subtype: Action frame? */
1958 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
1959 IEEE80211_FC0_SUBTYPE_ACTION)
1965 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
1967 * Return an alternate TID for ADDBA request frames.
1969 * Yes, this likely should be done in the net80211 layer.
1972 ath_tx_action_frame_override_queue(struct ath_softc *sc,
1973 struct ieee80211_node *ni,
1974 struct mbuf *m0, int *tid)
1976 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
1977 struct ieee80211_action_ba_addbarequest *ia;
1979 uint16_t baparamset;
1981 /* Not action frame? Bail */
1982 if (! ieee80211_is_action(wh))
1985 /* XXX Not needed for frames we send? */
1987 /* Correct length? */
1988 if (! ieee80211_parse_action(ni, m))
1992 /* Extract out action frame */
1993 frm = (u_int8_t *)&wh[1];
1994 ia = (struct ieee80211_action_ba_addbarequest *) frm;
1996 /* Not ADDBA? Bail */
1997 if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
1999 if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2002 /* Extract TID, return it */
2003 baparamset = le16toh(ia->rq_baparamset);
2004 *tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2010 /* Per-node software queue operations */
2013 * Add the current packet to the given BAW.
2014 * It is assumed that the current packet
2016 * + fits inside the BAW;
2017 * + already has had a sequence number allocated.
2019 * Since the BAW status may be modified by both the ath task and
2020 * the net80211/ifnet contexts, the TID must be locked.
2023 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2024 struct ath_tid *tid, struct ath_buf *bf)
2027 struct ieee80211_tx_ampdu *tap;
2029 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2030 ATH_TID_LOCK_ASSERT(sc, tid);
2032 if (bf->bf_state.bfs_isretried)
2035 tap = ath_tx_get_tx_tid(an, tid->tid);
2037 if (bf->bf_state.bfs_addedbaw)
2038 device_printf(sc->sc_dev,
2039 "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2040 "baw head=%d tail=%d\n",
2041 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2042 tap->txa_start, tap->txa_wnd, tid->baw_head,
2046 * ni->ni_txseqs[] is the currently allocated seqno.
2047 * the txa state contains the current baw start.
2049 index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2050 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2051 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2052 "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2053 "baw head=%d tail=%d\n",
2054 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2055 tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2060 assert(tid->tx_buf[cindex] == NULL);
2062 if (tid->tx_buf[cindex] != NULL) {
2063 device_printf(sc->sc_dev,
2064 "%s: ba packet dup (index=%d, cindex=%d, "
2065 "head=%d, tail=%d)\n",
2066 __func__, index, cindex, tid->baw_head, tid->baw_tail);
2067 device_printf(sc->sc_dev,
2068 "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2070 tid->tx_buf[cindex],
2071 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2073 SEQNO(bf->bf_state.bfs_seqno)
2076 tid->tx_buf[cindex] = bf;
2078 if (index >= ((tid->baw_tail - tid->baw_head) &
2079 (ATH_TID_MAX_BUFS - 1))) {
2080 tid->baw_tail = cindex;
2081 INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2086 * Flip the BAW buffer entry over from the existing one to the new one.
2088 * When software retransmitting a (sub-)frame, it is entirely possible that
2089 * the frame ath_buf is marked as BUSY and can't be immediately reused.
2090 * In that instance the buffer is cloned and the new buffer is used for
2091 * retransmit. We thus need to update the ath_buf slot in the BAW buf
2092 * tracking array to maintain consistency.
2095 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2096 struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2099 struct ieee80211_tx_ampdu *tap;
2100 int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2102 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2103 ATH_TID_LOCK_ASSERT(sc, tid);
2105 tap = ath_tx_get_tx_tid(an, tid->tid);
2106 index = ATH_BA_INDEX(tap->txa_start, seqno);
2107 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2110 * Just warn for now; if it happens then we should find out
2111 * about it. It's highly likely the aggregation session will
2114 if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2115 device_printf(sc->sc_dev, "%s: retransmitted buffer"
2116 " has mismatching seqno's, BA session may hang.\n",
2118 device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n",
2120 old_bf->bf_state.bfs_seqno,
2121 new_bf->bf_state.bfs_seqno);
2124 if (tid->tx_buf[cindex] != old_bf) {
2125 device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; "
2126 " has m BA session may hang.\n",
2128 device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n",
2133 tid->tx_buf[cindex] = new_bf;
2137 * seq_start - left edge of BAW
2138 * seq_next - current/next sequence number to allocate
2140 * Since the BAW status may be modified by both the ath task and
2141 * the net80211/ifnet contexts, the TID must be locked.
2144 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2145 struct ath_tid *tid, const struct ath_buf *bf)
2148 struct ieee80211_tx_ampdu *tap;
2149 int seqno = SEQNO(bf->bf_state.bfs_seqno);
2151 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2153 tap = ath_tx_get_tx_tid(an, tid->tid);
2154 index = ATH_BA_INDEX(tap->txa_start, seqno);
2155 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2157 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2158 "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2159 "baw head=%d, tail=%d\n",
2160 __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2161 cindex, tid->baw_head, tid->baw_tail);
2164 * If this occurs then we have a big problem - something else
2165 * has slid tap->txa_start along without updating the BAW
2166 * tracking start/end pointers. Thus the TX BAW state is now
2167 * completely busted.
2169 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2170 * it's quite possible that a cloned buffer is making its way
2171 * here and causing it to fire off. Disable TDMA for now.
2173 if (tid->tx_buf[cindex] != bf) {
2174 device_printf(sc->sc_dev,
2175 "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2177 bf, SEQNO(bf->bf_state.bfs_seqno),
2178 tid->tx_buf[cindex],
2179 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno));
2182 tid->tx_buf[cindex] = NULL;
2184 while (tid->baw_head != tid->baw_tail &&
2185 !tid->tx_buf[tid->baw_head]) {
2186 INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2187 INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2189 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2190 "%s: baw is now %d:%d, baw head=%d\n",
2191 __func__, tap->txa_start, tap->txa_wnd, tid->baw_head);
2195 * Mark the current node/TID as ready to TX.
2197 * This is done to make it easy for the software scheduler to
2198 * find which nodes have data to send.
2200 * The TXQ lock must be held.
2203 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2205 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2207 ATH_TXQ_LOCK_ASSERT(txq);
2210 return; /* paused, can't schedule yet */
2213 return; /* already scheduled */
2217 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2221 * Mark the current node as no longer needing to be polled for
2224 * The TXQ lock must be held.
2227 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2229 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2231 ATH_TXQ_LOCK_ASSERT(txq);
2233 if (tid->sched == 0)
2237 TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2241 * Assign a sequence number manually to the given frame.
2243 * This should only be called for A-MPDU TX frames.
2245 static ieee80211_seq
2246 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2247 struct ath_buf *bf, struct mbuf *m0)
2249 struct ieee80211_frame *wh;
2251 ieee80211_seq seqno;
2255 wh = mtod(m0, struct ieee80211_frame *);
2256 pri = M_WME_GETAC(m0); /* honor classification */
2257 tid = WME_AC_TO_TID(pri);
2258 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2259 __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2261 /* XXX Is it a control frame? Ignore */
2263 /* Does the packet require a sequence number? */
2264 if (! IEEE80211_QOS_HAS_SEQ(wh))
2268 * Is it a QOS NULL Data frame? Give it a sequence number from
2269 * the default TID (IEEE80211_NONQOS_TID.)
2271 * The RX path of everything I've looked at doesn't include the NULL
2272 * data frame sequence number in the aggregation state updates, so
2273 * assigning it a sequence number there will cause a BAW hole on the
2276 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2277 if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
2278 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2279 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2281 /* Manually assign sequence number */
2282 seqno = ni->ni_txseqs[tid];
2283 INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2285 *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2286 M_SEQNO_SET(m0, seqno);
2288 /* Return so caller can do something with it if needed */
2289 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno);
2294 * Attempt to direct dispatch an aggregate frame to hardware.
2295 * If the frame is out of BAW, queue.
2296 * Otherwise, schedule it as a single frame.
2299 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, struct ath_buf *bf)
2301 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
2302 struct ath_txq *txq = bf->bf_state.bfs_txq;
2303 struct ieee80211_tx_ampdu *tap;
2305 ATH_TXQ_LOCK_ASSERT(txq);
2306 ATH_TID_LOCK_ASSERT(sc, tid);
2308 tap = ath_tx_get_tx_tid(an, tid->tid);
2312 ATH_TXQ_INSERT_TAIL(tid, bf, bf_list);
2313 /* XXX don't sched - we're paused! */
2317 /* outside baw? queue */
2318 if (bf->bf_state.bfs_dobaw &&
2319 (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2320 SEQNO(bf->bf_state.bfs_seqno)))) {
2321 ATH_TXQ_INSERT_TAIL(tid, bf, bf_list);
2322 ath_tx_tid_sched(sc, tid);
2326 /* Direct dispatch to hardware */
2327 ath_tx_do_ratelookup(sc, bf);
2328 ath_tx_calc_duration(sc, bf);
2329 ath_tx_calc_protection(sc, bf);
2330 ath_tx_set_rtscts(sc, bf);
2331 ath_tx_rate_fill_rcflags(sc, bf);
2332 ath_tx_setds(sc, bf);
2333 ath_tx_set_ratectrl(sc, bf->bf_node, bf);
2334 ath_tx_chaindesclist(sc, bf);
2337 sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
2339 /* Track per-TID hardware queue depth correctly */
2343 if (bf->bf_state.bfs_dobaw) {
2344 ath_tx_addto_baw(sc, an, tid, bf);
2345 bf->bf_state.bfs_addedbaw = 1;
2348 /* Set completion handler, multi-frame aggregate or not */
2349 bf->bf_comp = ath_tx_aggr_comp;
2351 /* Hand off to hardware */
2352 ath_tx_handoff(sc, txq, bf);
2356 * Attempt to send the packet.
2357 * If the queue isn't busy, direct-dispatch.
2358 * If the queue is busy enough, queue the given packet on the
2359 * relevant software queue.
2362 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_txq *txq,
2365 struct ath_node *an = ATH_NODE(ni);
2366 struct ieee80211_frame *wh;
2367 struct ath_tid *atid;
2369 struct mbuf *m0 = bf->bf_m;
2371 /* Fetch the TID - non-QoS frames get assigned to TID 16 */
2372 wh = mtod(m0, struct ieee80211_frame *);
2373 pri = ath_tx_getac(sc, m0);
2374 tid = ath_tx_gettid(sc, m0);
2375 atid = &an->an_tid[tid];
2377 ATH_TID_LOCK_ASSERT(sc, atid);
2379 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
2380 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2382 /* Set local packet state, used to queue packets to hardware */
2383 bf->bf_state.bfs_tid = tid;
2384 bf->bf_state.bfs_txq = txq;
2385 bf->bf_state.bfs_pri = pri;
2388 * If the hardware queue isn't busy, queue it directly.
2389 * If the hardware queue is busy, queue it.
2390 * If the TID is paused or the traffic it outside BAW, software
2395 /* TID is paused, queue */
2396 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
2397 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2398 } else if (ath_tx_ampdu_pending(sc, an, tid)) {
2399 /* AMPDU pending; queue */
2400 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
2401 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2403 } else if (ath_tx_ampdu_running(sc, an, tid)) {
2404 /* AMPDU running, attempt direct dispatch if possible */
2405 if (txq->axq_depth < sc->sc_hwq_limit) {
2406 ath_tx_xmit_aggr(sc, an, bf);
2407 DPRINTF(sc, ATH_DEBUG_SW_TX,
2411 DPRINTF(sc, ATH_DEBUG_SW_TX,
2412 "%s: ampdu; swq'ing\n",
2414 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2415 ath_tx_tid_sched(sc, atid);
2417 } else if (txq->axq_depth < sc->sc_hwq_limit) {
2418 /* AMPDU not running, attempt direct dispatch */
2419 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
2420 ath_tx_xmit_normal(sc, txq, bf);
2423 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
2424 ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2425 ath_tx_tid_sched(sc, atid);
2427 ATH_TXQ_UNLOCK(txq);
2431 * Do the basic frame setup stuff that's required before the frame
2432 * is added to a software queue.
2434 * All frames get mostly the same treatment and it's done once.
2435 * Retransmits fiddle with things like the rate control setup,
2436 * setting the retransmit bit in the packet; doing relevant DMA/bus
2437 * syncing and relinking it (back) into the hardware TX queue.
2439 * Note that this may cause the mbuf to be reallocated, so
2440 * m0 may not be valid.
2445 * Configure the per-TID node state.
2447 * This likely belongs in if_ath_node.c but I can't think of anywhere
2448 * else to put it just yet.
2450 * This sets up the SLISTs and the mutex as appropriate.
2453 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
2456 struct ath_tid *atid;
2458 for (i = 0; i < IEEE80211_TID_SIZE; i++) {
2459 atid = &an->an_tid[i];
2460 TAILQ_INIT(&atid->axq_q);
2463 for (j = 0; j < ATH_TID_MAX_BUFS; j++)
2464 atid->tx_buf[j] = NULL;
2465 atid->baw_head = atid->baw_tail = 0;
2468 atid->hwq_depth = 0;
2469 atid->cleanup_inprogress = 0;
2470 if (i == IEEE80211_NONQOS_TID)
2471 atid->ac = WME_AC_BE;
2473 atid->ac = TID_TO_WME_AC(i);
2478 * Pause the current TID. This stops packets from being transmitted
2481 * Since this is also called from upper layers as well as the driver,
2482 * it will get the TID lock.
2485 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
2488 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2490 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n",
2491 __func__, tid->paused);
2495 * Unpause the current TID, and schedule it if needed.
2498 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
2500 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2504 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n",
2505 __func__, tid->paused);
2507 if (tid->paused || tid->axq_depth == 0) {
2511 ath_tx_tid_sched(sc, tid);
2512 /* Punt some frames to the hardware if needed */
2513 //ath_txq_sched(sc, sc->sc_ac2q[tid->ac]);
2514 taskqueue_enqueue(sc->sc_tq, &sc->sc_txqtask);
2518 * Suspend the queue because we need to TX a BAR.
2521 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
2523 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2525 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
2526 "%s: tid=%p, bar_wait=%d, bar_tx=%d, called\n",
2532 /* We shouldn't be called when bar_tx is 1 */
2534 device_printf(sc->sc_dev, "%s: bar_tx is 1?!\n",
2538 /* If we've already been called, just be patient. */
2545 /* Only one pause, no matter how many frames fail */
2546 ath_tx_tid_pause(sc, tid);
2550 * We've finished with BAR handling - either we succeeded or
2551 * failed. Either way, unsuspend TX.
2554 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
2556 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2558 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
2559 "%s: tid=%p, called\n",
2563 if (tid->bar_tx == 0 || tid->bar_wait == 0) {
2564 device_printf(sc->sc_dev, "%s: bar_tx=%d, bar_wait=%d: ?\n",
2565 __func__, tid->bar_tx, tid->bar_wait);
2568 tid->bar_tx = tid->bar_wait = 0;
2569 ath_tx_tid_resume(sc, tid);
2573 * Return whether we're ready to TX a BAR frame.
2575 * Requires the TID lock be held.
2578 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
2581 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2583 if (tid->bar_wait == 0 || tid->hwq_depth > 0)
2586 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, "%s: tid=%p (%d), bar ready\n",
2587 __func__, tid, tid->tid);
2593 * Check whether the current TID is ready to have a BAR
2594 * TXed and if so, do the TX.
2596 * Since the TID/TXQ lock can't be held during a call to
2597 * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
2598 * sending the BAR and locking it again.
2600 * Eventually, the code to send the BAR should be broken out
2601 * from this routine so the lock doesn't have to be reacquired
2602 * just to be immediately dropped by the caller.
2605 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
2607 struct ieee80211_tx_ampdu *tap;
2609 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2611 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
2612 "%s: tid=%p, called\n",
2616 tap = ath_tx_get_tx_tid(tid->an, tid->tid);
2619 * This is an error condition!
2621 if (tid->bar_wait == 0 || tid->bar_tx == 1) {
2622 device_printf(sc->sc_dev,
2623 "%s: tid=%p, bar_tx=%d, bar_wait=%d: ?\n",
2631 /* Don't do anything if we still have pending frames */
2632 if (tid->hwq_depth > 0) {
2633 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
2634 "%s: tid=%p, hwq_depth=%d, waiting\n",
2641 /* We're now about to TX */
2645 * Calculate new BAW left edge, now that all frames have either
2646 * succeeded or failed.
2648 * XXX verify this is _actually_ the valid value to begin at!
2650 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
2651 "%s: tid=%p, new BAW left edge=%d\n",
2656 /* Try sending the BAR frame */
2657 /* We can't hold the lock here! */
2659 ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
2660 if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
2661 /* Success? Now we wait for notification that it's done */
2662 ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
2666 /* Failure? For now, warn loudly and continue */
2667 ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
2668 device_printf(sc->sc_dev, "%s: tid=%p, failed to TX BAR, continue!\n",
2670 ath_tx_tid_bar_unsuspend(sc, tid);
2675 * Free any packets currently pending in the software TX queue.
2677 * This will be called when a node is being deleted.
2679 * It can also be called on an active node during an interface
2680 * reset or state transition.
2682 * (From Linux/reference):
2684 * TODO: For frame(s) that are in the retry state, we will reuse the
2685 * sequence number(s) without setting the retry bit. The
2686 * alternative is to give up on these and BAR the receiver's window
2690 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
2691 struct ath_tid *tid, ath_bufhead *bf_cq)
2694 struct ieee80211_tx_ampdu *tap;
2695 struct ieee80211_node *ni = &an->an_node;
2697 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2699 tap = ath_tx_get_tx_tid(an, tid->tid);
2701 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2703 /* Walk the queue, free frames */
2705 bf = TAILQ_FIRST(&tid->axq_q);
2711 device_printf(sc->sc_dev,
2712 "%s: node %p: bf=%p: addbaw=%d, dobaw=%d, "
2713 "seqno=%d, retry=%d\n",
2715 bf->bf_state.bfs_addedbaw,
2716 bf->bf_state.bfs_dobaw,
2717 SEQNO(bf->bf_state.bfs_seqno),
2718 bf->bf_state.bfs_retries);
2719 device_printf(sc->sc_dev,
2720 "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d\n",
2725 device_printf(sc->sc_dev,
2726 "%s: node %p: tid %d: txq_depth=%d, "
2727 "txq_aggr_depth=%d, sched=%d, paused=%d, "
2728 "hwq_depth=%d, incomp=%d, baw_head=%d, "
2729 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
2730 __func__, ni, tid->tid, txq->axq_depth,
2731 txq->axq_aggr_depth, tid->sched, tid->paused,
2732 tid->hwq_depth, tid->incomp, tid->baw_head,
2733 tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
2734 ni->ni_txseqs[tid->tid]);
2736 /* XXX Dump the frame, see what it is? */
2737 ieee80211_dump_pkt(ni->ni_ic,
2738 mtod(bf->bf_m, const uint8_t *),
2739 bf->bf_m->m_len, 0, -1);
2746 * If the current TID is running AMPDU, update
2749 if (ath_tx_ampdu_running(sc, an, tid->tid) &&
2750 bf->bf_state.bfs_dobaw) {
2752 * Only remove the frame from the BAW if it's
2753 * been transmitted at least once; this means
2754 * the frame was in the BAW to begin with.
2756 if (bf->bf_state.bfs_retries > 0) {
2757 ath_tx_update_baw(sc, an, tid, bf);
2758 bf->bf_state.bfs_dobaw = 0;
2761 * This has become a non-fatal error now
2763 if (! bf->bf_state.bfs_addedbaw)
2764 device_printf(sc->sc_dev,
2765 "%s: wasn't added: seqno %d\n",
2766 __func__, SEQNO(bf->bf_state.bfs_seqno));
2768 ATH_TXQ_REMOVE(tid, bf, bf_list);
2769 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
2773 * Now that it's completed, grab the TID lock and update
2774 * the sequence number and BAW window.
2775 * Because sequence numbers have been assigned to frames
2776 * that haven't been sent yet, it's entirely possible
2777 * we'll be called with some pending frames that have not
2780 * The cleaner solution is to do the sequence number allocation
2781 * when the packet is first transmitted - and thus the "retries"
2782 * check above would be enough to update the BAW/seqno.
2785 /* But don't do it for non-QoS TIDs */
2788 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
2789 "%s: node %p: TID %d: sliding BAW left edge to %d\n",
2790 __func__, an, tid->tid, tap->txa_start);
2792 ni->ni_txseqs[tid->tid] = tap->txa_start;
2793 tid->baw_tail = tid->baw_head;
2798 * Flush all software queued packets for the given node.
2800 * This occurs when a completion handler frees the last buffer
2801 * for a node, and the node is thus freed. This causes the node
2802 * to be cleaned up, which ends up calling ath_tx_node_flush.
2805 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
2813 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
2814 struct ath_tid *atid = &an->an_tid[tid];
2815 struct ath_txq *txq = sc->sc_ac2q[atid->ac];
2817 /* Remove this tid from the list of active tids */
2819 ath_tx_tid_unsched(sc, atid);
2822 ath_tx_tid_drain(sc, an, atid, &bf_cq);
2823 ATH_TXQ_UNLOCK(txq);
2826 /* Handle completed frames */
2827 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
2828 TAILQ_REMOVE(&bf_cq, bf, bf_list);
2829 ath_tx_default_comp(sc, bf, 0);
2834 * Drain all the software TXQs currently with traffic queued.
2837 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
2839 struct ath_tid *tid;
2847 * Iterate over all active tids for the given txq,
2848 * flushing and unsched'ing them
2850 while (! TAILQ_EMPTY(&txq->axq_tidq)) {
2851 tid = TAILQ_FIRST(&txq->axq_tidq);
2852 ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
2853 ath_tx_tid_unsched(sc, tid);
2856 ATH_TXQ_UNLOCK(txq);
2858 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
2859 TAILQ_REMOVE(&bf_cq, bf, bf_list);
2860 ath_tx_default_comp(sc, bf, 0);
2865 * Handle completion of non-aggregate session frames.
2868 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
2870 struct ieee80211_node *ni = bf->bf_node;
2871 struct ath_node *an = ATH_NODE(ni);
2872 int tid = bf->bf_state.bfs_tid;
2873 struct ath_tid *atid = &an->an_tid[tid];
2874 struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
2876 /* The TID state is protected behind the TXQ lock */
2877 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2879 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
2880 __func__, bf, fail, atid->hwq_depth - 1);
2883 if (atid->hwq_depth < 0)
2884 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
2885 __func__, atid->hwq_depth);
2886 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2889 * punt to rate control if we're not being cleaned up
2890 * during a hw queue drain and the frame wanted an ACK.
2892 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
2893 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
2894 ts, bf->bf_state.bfs_pktlen,
2895 1, (ts->ts_status == 0) ? 0 : 1);
2897 ath_tx_default_comp(sc, bf, fail);
2901 * Handle cleanup of aggregate session packets that aren't
2904 * There's no need to update the BAW here - the session is being
2908 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
2910 struct ieee80211_node *ni = bf->bf_node;
2911 struct ath_node *an = ATH_NODE(ni);
2912 int tid = bf->bf_state.bfs_tid;
2913 struct ath_tid *atid = &an->an_tid[tid];
2915 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
2916 __func__, tid, atid->incomp);
2918 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2920 if (atid->incomp == 0) {
2921 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
2922 "%s: TID %d: cleaned up! resume!\n",
2924 atid->cleanup_inprogress = 0;
2925 ath_tx_tid_resume(sc, atid);
2927 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2929 ath_tx_default_comp(sc, bf, 0);
2933 * Performs transmit side cleanup when TID changes from aggregated to
2936 * - Discard all retry frames from the s/w queue.
2937 * - Fix the tx completion function for all buffers in s/w queue.
2938 * - Count the number of unacked frames, and let transmit completion
2941 * The caller is responsible for pausing the TID.
2944 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid)
2946 struct ath_tid *atid = &an->an_tid[tid];
2947 struct ieee80211_tx_ampdu *tap;
2948 struct ath_buf *bf, *bf_next;
2951 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2952 "%s: TID %d: called\n", __func__, tid);
2955 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2958 * Update the frames in the software TX queue:
2960 * + Discard retry frames in the queue
2961 * + Fix the completion function to be non-aggregate
2963 bf = TAILQ_FIRST(&atid->axq_q);
2965 if (bf->bf_state.bfs_isretried) {
2966 bf_next = TAILQ_NEXT(bf, bf_list);
2967 TAILQ_REMOVE(&atid->axq_q, bf, bf_list);
2969 if (bf->bf_state.bfs_dobaw) {
2970 ath_tx_update_baw(sc, an, atid, bf);
2971 if (! bf->bf_state.bfs_addedbaw)
2972 device_printf(sc->sc_dev,
2973 "%s: wasn't added: seqno %d\n",
2975 SEQNO(bf->bf_state.bfs_seqno));
2977 bf->bf_state.bfs_dobaw = 0;
2979 * Call the default completion handler with "fail" just
2980 * so upper levels are suitably notified about this.
2982 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
2986 /* Give these the default completion handler */
2987 bf->bf_comp = ath_tx_normal_comp;
2988 bf = TAILQ_NEXT(bf, bf_list);
2991 /* The caller is required to pause the TID */
2994 ath_tx_tid_pause(sc, atid);
2998 * Calculate what hardware-queued frames exist based
2999 * on the current BAW size. Ie, what frames have been
3000 * added to the TX hardware queue for this TID but
3003 tap = ath_tx_get_tx_tid(an, tid);
3004 /* Need the lock - fiddling with BAW */
3005 while (atid->baw_head != atid->baw_tail) {
3006 if (atid->tx_buf[atid->baw_head]) {
3008 atid->cleanup_inprogress = 1;
3009 atid->tx_buf[atid->baw_head] = NULL;
3011 INCR(atid->baw_head, ATH_TID_MAX_BUFS);
3012 INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
3016 * If cleanup is required, defer TID scheduling
3017 * until all the HW queued packets have been
3020 if (! atid->cleanup_inprogress)
3021 ath_tx_tid_resume(sc, atid);
3023 if (atid->cleanup_inprogress)
3024 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3025 "%s: TID %d: cleanup needed: %d packets\n",
3026 __func__, tid, atid->incomp);
3027 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3029 /* Handle completing frames and fail them */
3030 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3031 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3032 ath_tx_default_comp(sc, bf, 1);
3037 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
3039 struct ieee80211_frame *wh;
3041 wh = mtod(bf->bf_m, struct ieee80211_frame *);
3042 /* Only update/resync if needed */
3043 if (bf->bf_state.bfs_isretried == 0) {
3044 wh->i_fc[1] |= IEEE80211_FC1_RETRY;
3045 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3046 BUS_DMASYNC_PREWRITE);
3048 sc->sc_stats.ast_tx_swretries++;
3049 bf->bf_state.bfs_isretried = 1;
3050 bf->bf_state.bfs_retries ++;
3053 static struct ath_buf *
3054 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
3055 struct ath_tid *tid, struct ath_buf *bf)
3057 struct ath_buf *nbf;
3060 nbf = ath_buf_clone(sc, bf);
3063 device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n",
3068 /* Failed to clone */
3069 device_printf(sc->sc_dev,
3070 "%s: failed to clone a busy buffer\n",
3075 /* Setup the dma for the new buffer */
3076 error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
3078 device_printf(sc->sc_dev,
3079 "%s: failed to setup dma for clone\n",
3082 * Put this at the head of the list, not tail;
3083 * that way it doesn't interfere with the
3084 * busy buffer logic (which uses the tail of
3088 TAILQ_INSERT_HEAD(&sc->sc_txbuf, nbf, bf_list);
3089 ATH_TXBUF_UNLOCK(sc);
3093 /* Update BAW if required, before we free the original buf */
3094 if (bf->bf_state.bfs_dobaw)
3095 ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
3097 /* Free current buffer; return the older buffer */
3100 ath_freebuf(sc, bf);
3105 * Handle retrying an unaggregate frame in an aggregate
3108 * If too many retries occur, pause the TID, wait for
3109 * any further retransmits (as there's no reason why
3110 * non-aggregate frames in an aggregate session are
3111 * transmitted in-order; they just have to be in-BAW)
3112 * and then queue a BAR.
3115 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
3117 struct ieee80211_node *ni = bf->bf_node;
3118 struct ath_node *an = ATH_NODE(ni);
3119 int tid = bf->bf_state.bfs_tid;
3120 struct ath_tid *atid = &an->an_tid[tid];
3121 struct ieee80211_tx_ampdu *tap;
3123 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3125 tap = ath_tx_get_tx_tid(an, tid);
3128 * If the buffer is marked as busy, we can't directly
3129 * reuse it. Instead, try to clone the buffer.
3130 * If the clone is successful, recycle the old buffer.
3131 * If the clone is unsuccessful, set bfs_retries to max
3132 * to force the next bit of code to free the buffer
3135 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
3136 (bf->bf_flags & ATH_BUF_BUSY)) {
3137 struct ath_buf *nbf;
3138 nbf = ath_tx_retry_clone(sc, an, atid, bf);
3140 /* bf has been freed at this point */
3143 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
3146 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
3147 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
3148 "%s: exceeded retries; seqno %d\n",
3149 __func__, SEQNO(bf->bf_state.bfs_seqno));
3150 sc->sc_stats.ast_tx_swretrymax++;
3152 /* Update BAW anyway */
3153 if (bf->bf_state.bfs_dobaw) {
3154 ath_tx_update_baw(sc, an, atid, bf);
3155 if (! bf->bf_state.bfs_addedbaw)
3156 device_printf(sc->sc_dev,
3157 "%s: wasn't added: seqno %d\n",
3158 __func__, SEQNO(bf->bf_state.bfs_seqno));
3160 bf->bf_state.bfs_dobaw = 0;
3162 /* Suspend the TX queue and get ready to send the BAR */
3163 ath_tx_tid_bar_suspend(sc, atid);
3165 /* Send the BAR if there are no other frames waiting */
3166 if (ath_tx_tid_bar_tx_ready(sc, atid))
3167 ath_tx_tid_bar_tx(sc, atid);
3169 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3171 /* Free buffer, bf is free after this call */
3172 ath_tx_default_comp(sc, bf, 0);
3177 * This increments the retry counter as well as
3178 * sets the retry flag in the ath_buf and packet
3181 ath_tx_set_retry(sc, bf);
3184 * Insert this at the head of the queue, so it's
3185 * retried before any current/subsequent frames.
3187 ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
3188 ath_tx_tid_sched(sc, atid);
3189 /* Send the BAR if there are no other frames waiting */
3190 if (ath_tx_tid_bar_tx_ready(sc, atid))
3191 ath_tx_tid_bar_tx(sc, atid);
3193 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3197 * Common code for aggregate excessive retry/subframe retry.
3198 * If retrying, queues buffers to bf_q. If not, frees the
3201 * XXX should unify this with ath_tx_aggr_retry_unaggr()
3204 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
3207 struct ieee80211_node *ni = bf->bf_node;
3208 struct ath_node *an = ATH_NODE(ni);
3209 int tid = bf->bf_state.bfs_tid;
3210 struct ath_tid *atid = &an->an_tid[tid];
3212 ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[atid->ac]);
3214 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3215 ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
3216 /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
3219 * If the buffer is marked as busy, we can't directly
3220 * reuse it. Instead, try to clone the buffer.
3221 * If the clone is successful, recycle the old buffer.
3222 * If the clone is unsuccessful, set bfs_retries to max
3223 * to force the next bit of code to free the buffer
3226 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
3227 (bf->bf_flags & ATH_BUF_BUSY)) {
3228 struct ath_buf *nbf;
3229 nbf = ath_tx_retry_clone(sc, an, atid, bf);
3231 /* bf has been freed at this point */
3234 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
3237 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
3238 sc->sc_stats.ast_tx_swretrymax++;
3239 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
3240 "%s: max retries: seqno %d\n",
3241 __func__, SEQNO(bf->bf_state.bfs_seqno));
3242 ath_tx_update_baw(sc, an, atid, bf);
3243 if (! bf->bf_state.bfs_addedbaw)
3244 device_printf(sc->sc_dev,
3245 "%s: wasn't added: seqno %d\n",
3246 __func__, SEQNO(bf->bf_state.bfs_seqno));
3247 bf->bf_state.bfs_dobaw = 0;
3251 ath_tx_set_retry(sc, bf);
3252 bf->bf_next = NULL; /* Just to make sure */
3254 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3259 * error pkt completion for an aggregate destination
3262 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
3263 struct ath_tid *tid)
3265 struct ieee80211_node *ni = bf_first->bf_node;
3266 struct ath_node *an = ATH_NODE(ni);
3267 struct ath_buf *bf_next, *bf;
3270 struct ieee80211_tx_ampdu *tap;
3277 * Update rate control - all frames have failed.
3279 * XXX use the length in the first frame in the series;
3280 * XXX just so things are consistent for now.
3282 ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
3283 &bf_first->bf_status.ds_txstat,
3284 bf_first->bf_state.bfs_pktlen,
3285 bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
3287 ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
3288 tap = ath_tx_get_tx_tid(an, tid->tid);
3289 sc->sc_stats.ast_tx_aggr_failall++;
3291 /* Retry all subframes */
3294 bf_next = bf->bf_next;
3295 bf->bf_next = NULL; /* Remove it from the aggr list */
3296 sc->sc_stats.ast_tx_aggr_fail++;
3297 if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
3300 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3305 /* Prepend all frames to the beginning of the queue */
3306 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
3307 TAILQ_REMOVE(&bf_q, bf, bf_list);
3308 ATH_TXQ_INSERT_HEAD(tid, bf, bf_list);
3312 * Schedule the TID to be re-tried.
3314 ath_tx_tid_sched(sc, tid);
3317 * send bar if we dropped any frames
3319 * Keep the txq lock held for now, as we need to ensure
3320 * that ni_txseqs[] is consistent (as it's being updated
3321 * in the ifnet TX context or raw TX context.)
3324 /* Suspend the TX queue and get ready to send the BAR */
3325 ath_tx_tid_bar_suspend(sc, tid);
3329 * Send BAR if required
3331 if (ath_tx_tid_bar_tx_ready(sc, tid))
3332 ath_tx_tid_bar_tx(sc, tid);
3333 ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
3335 /* Complete frames which errored out */
3336 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3337 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3338 ath_tx_default_comp(sc, bf, 0);
3343 * Handle clean-up of packets from an aggregate list.
3345 * There's no need to update the BAW here - the session is being
3349 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
3351 struct ath_buf *bf, *bf_next;
3352 struct ieee80211_node *ni = bf_first->bf_node;
3353 struct ath_node *an = ATH_NODE(ni);
3354 int tid = bf_first->bf_state.bfs_tid;
3355 struct ath_tid *atid = &an->an_tid[tid];
3359 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3367 if (atid->incomp == 0) {
3368 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3369 "%s: TID %d: cleaned up! resume!\n",
3371 atid->cleanup_inprogress = 0;
3372 ath_tx_tid_resume(sc, atid);
3375 /* Send BAR if required */
3376 if (ath_tx_tid_bar_tx_ready(sc, atid))
3377 ath_tx_tid_bar_tx(sc, atid);
3378 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3380 /* Handle frame completion */
3382 bf_next = bf->bf_next;
3383 ath_tx_default_comp(sc, bf, 1);
3389 * Handle completion of an set of aggregate frames.
3391 * XXX for now, simply complete each sub-frame.
3393 * Note: the completion handler is the last descriptor in the aggregate,
3394 * not the last descriptor in the first frame.
3397 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
3400 //struct ath_desc *ds = bf->bf_lastds;
3401 struct ieee80211_node *ni = bf_first->bf_node;
3402 struct ath_node *an = ATH_NODE(ni);
3403 int tid = bf_first->bf_state.bfs_tid;
3404 struct ath_tid *atid = &an->an_tid[tid];
3405 struct ath_tx_status ts;
3406 struct ieee80211_tx_ampdu *tap;
3412 struct ath_buf *bf, *bf_next;
3415 int nframes = 0, nbad = 0, nf;
3417 /* XXX there's too much on the stack? */
3418 struct ath_rc_series rc[ATH_RC_NUM];
3421 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
3422 __func__, atid->hwq_depth);
3424 /* The TID state is kept behind the TXQ lock */
3425 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3428 if (atid->hwq_depth < 0)
3429 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3430 __func__, atid->hwq_depth);
3433 * Punt cleanup to the relevant function, not our problem now
3435 if (atid->cleanup_inprogress) {
3436 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3437 ath_tx_comp_cleanup_aggr(sc, bf_first);
3442 * Take a copy; this may be needed -after- bf_first
3443 * has been completed and freed.
3445 ts = bf_first->bf_status.ds_txstat;
3447 * XXX for now, use the first frame in the aggregate for
3448 * XXX rate control completion; it's at least consistent.
3450 pktlen = bf_first->bf_state.bfs_pktlen;
3453 * Handle errors first!
3455 * Here, handle _any_ error as a "exceeded retries" error.
3456 * Later on (when filtered frames are to be specially handled)
3457 * it'll have to be expanded.
3460 if (ts.ts_status & HAL_TXERR_XRETRY) {
3462 if (ts.ts_status != 0) {
3463 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3464 ath_tx_comp_aggr_error(sc, bf_first, atid);
3470 tap = ath_tx_get_tx_tid(an, tid);
3473 * extract starting sequence and block-ack bitmap
3475 /* XXX endian-ness of seq_st, ba? */
3476 seq_st = ts.ts_seqnum;
3477 hasba = !! (ts.ts_flags & HAL_TX_BA);
3478 tx_ok = (ts.ts_status == 0);
3479 isaggr = bf_first->bf_state.bfs_aggr;
3480 ba[0] = ts.ts_ba_low;
3481 ba[1] = ts.ts_ba_high;
3484 * Copy the TX completion status and the rate control
3485 * series from the first descriptor, as it may be freed
3486 * before the rate control code can get its grubby fingers
3489 memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
3491 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3492 "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
3493 "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
3494 __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
3495 isaggr, seq_st, hasba, ba[0], ba[1]);
3497 /* Occasionally, the MAC sends a tx status for the wrong TID. */
3498 if (tid != ts.ts_tid) {
3499 device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n",
3500 __func__, tid, ts.ts_tid);
3504 /* AR5416 BA bug; this requires an interface reset */
3505 if (isaggr && tx_ok && (! hasba)) {
3506 device_printf(sc->sc_dev,
3507 "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
3509 __func__, hasba, tx_ok, isaggr, seq_st);
3510 /* XXX TODO: schedule an interface reset */
3514 * Walk the list of frames, figure out which ones were correctly
3515 * sent and which weren't.
3518 nf = bf_first->bf_state.bfs_nframes;
3520 /* bf_first is going to be invalid once this list is walked */
3524 * Walk the list of completed frames and determine
3525 * which need to be completed and which need to be
3528 * For completed frames, the completion functions need
3529 * to be called at the end of this function as the last
3530 * node reference may free the node.
3532 * Finally, since the TXQ lock can't be held during the
3533 * completion callback (to avoid lock recursion),
3534 * the completion calls have to be done outside of the
3539 ba_index = ATH_BA_INDEX(seq_st,
3540 SEQNO(bf->bf_state.bfs_seqno));
3541 bf_next = bf->bf_next;
3542 bf->bf_next = NULL; /* Remove it from the aggr list */
3544 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3545 "%s: checking bf=%p seqno=%d; ack=%d\n",
3546 __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
3547 ATH_BA_ISSET(ba, ba_index));
3549 if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
3550 sc->sc_stats.ast_tx_aggr_ok++;
3551 ath_tx_update_baw(sc, an, atid, bf);
3552 bf->bf_state.bfs_dobaw = 0;
3553 if (! bf->bf_state.bfs_addedbaw)
3554 device_printf(sc->sc_dev,
3555 "%s: wasn't added: seqno %d\n",
3556 __func__, SEQNO(bf->bf_state.bfs_seqno));
3558 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3560 sc->sc_stats.ast_tx_aggr_fail++;
3561 if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
3564 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3572 * Now that the BAW updates have been done, unlock
3574 * txseq is grabbed before the lock is released so we
3575 * have a consistent view of what -was- in the BAW.
3576 * Anything after this point will not yet have been
3579 txseq = tap->txa_start;
3580 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3583 device_printf(sc->sc_dev,
3584 "%s: num frames seen=%d; bf nframes=%d\n",
3585 __func__, nframes, nf);
3588 * Now we know how many frames were bad, call the rate
3592 ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
3596 * send bar if we dropped any frames
3599 /* Suspend the TX queue and get ready to send the BAR */
3600 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3601 ath_tx_tid_bar_suspend(sc, atid);
3602 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3605 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3606 "%s: txa_start now %d\n", __func__, tap->txa_start);
3608 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3610 /* Prepend all frames to the beginning of the queue */
3611 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
3612 TAILQ_REMOVE(&bf_q, bf, bf_list);
3613 ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
3617 * Reschedule to grab some further frames.
3619 ath_tx_tid_sched(sc, atid);
3622 * Send BAR if required
3624 if (ath_tx_tid_bar_tx_ready(sc, atid))
3625 ath_tx_tid_bar_tx(sc, atid);
3627 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3629 /* Do deferred completion */
3630 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3631 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3632 ath_tx_default_comp(sc, bf, 0);
3637 * Handle completion of unaggregated frames in an ADDBA
3640 * Fail is set to 1 if the entry is being freed via a call to
3641 * ath_tx_draintxq().
3644 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
3646 struct ieee80211_node *ni = bf->bf_node;
3647 struct ath_node *an = ATH_NODE(ni);
3648 int tid = bf->bf_state.bfs_tid;
3649 struct ath_tid *atid = &an->an_tid[tid];
3650 struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
3653 * Update rate control status here, before we possibly
3654 * punt to retry or cleanup.
3656 * Do it outside of the TXQ lock.
3658 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
3659 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
3660 &bf->bf_status.ds_txstat,
3661 bf->bf_state.bfs_pktlen,
3662 1, (ts->ts_status == 0) ? 0 : 1);
3665 * This is called early so atid->hwq_depth can be tracked.
3666 * This unfortunately means that it's released and regrabbed
3667 * during retry and cleanup. That's rather inefficient.
3669 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3671 if (tid == IEEE80211_NONQOS_TID)
3672 device_printf(sc->sc_dev, "%s: TID=16!\n", __func__);
3674 DPRINTF(sc, ATH_DEBUG_SW_TX,
3675 "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
3676 __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
3677 SEQNO(bf->bf_state.bfs_seqno));
3680 if (atid->hwq_depth < 0)
3681 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3682 __func__, atid->hwq_depth);
3685 * If a cleanup is in progress, punt to comp_cleanup;
3686 * rather than handling it here. It's thus their
3687 * responsibility to clean up, call the completion
3688 * function in net80211, etc.
3690 if (atid->cleanup_inprogress) {
3691 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3692 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
3694 ath_tx_comp_cleanup_unaggr(sc, bf);
3699 * Don't bother with the retry check if all frames
3700 * are being failed (eg during queue deletion.)
3703 if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
3705 if (fail == 0 && ts->ts_status != 0) {
3706 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3707 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
3709 ath_tx_aggr_retry_unaggr(sc, bf);
3713 /* Success? Complete */
3714 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
3715 __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
3716 if (bf->bf_state.bfs_dobaw) {
3717 ath_tx_update_baw(sc, an, atid, bf);
3718 bf->bf_state.bfs_dobaw = 0;
3719 if (! bf->bf_state.bfs_addedbaw)
3720 device_printf(sc->sc_dev,
3721 "%s: wasn't added: seqno %d\n",
3722 __func__, SEQNO(bf->bf_state.bfs_seqno));
3726 * Send BAR if required
3728 if (ath_tx_tid_bar_tx_ready(sc, atid))
3729 ath_tx_tid_bar_tx(sc, atid);
3731 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3733 ath_tx_default_comp(sc, bf, fail);
3734 /* bf is freed at this point */
3738 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
3740 if (bf->bf_state.bfs_aggr)
3741 ath_tx_aggr_comp_aggr(sc, bf, fail);
3743 ath_tx_aggr_comp_unaggr(sc, bf, fail);
3747 * Schedule some packets from the given node/TID to the hardware.
3749 * This is the aggregate version.
3752 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
3753 struct ath_tid *tid)
3756 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3757 struct ieee80211_tx_ampdu *tap;
3758 struct ieee80211_node *ni = &an->an_node;
3759 ATH_AGGR_STATUS status;
3762 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
3763 ATH_TXQ_LOCK_ASSERT(txq);
3765 tap = ath_tx_get_tx_tid(an, tid->tid);
3767 if (tid->tid == IEEE80211_NONQOS_TID)
3768 device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n",
3772 status = ATH_AGGR_DONE;
3775 * If the upper layer has paused the TID, don't
3776 * queue any further packets.
3778 * This can also occur from the completion task because
3779 * of packet loss; but as its serialised with this code,
3780 * it won't "appear" half way through queuing packets.
3785 bf = TAILQ_FIRST(&tid->axq_q);
3791 * If the packet doesn't fall within the BAW (eg a NULL
3792 * data frame), schedule it directly; continue.
3794 if (! bf->bf_state.bfs_dobaw) {
3795 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3796 "%s: non-baw packet\n",
3798 ATH_TXQ_REMOVE(tid, bf, bf_list);
3799 bf->bf_state.bfs_aggr = 0;
3800 ath_tx_do_ratelookup(sc, bf);
3801 ath_tx_calc_duration(sc, bf);
3802 ath_tx_calc_protection(sc, bf);
3803 ath_tx_set_rtscts(sc, bf);
3804 ath_tx_rate_fill_rcflags(sc, bf);
3805 ath_tx_setds(sc, bf);
3806 ath_tx_chaindesclist(sc, bf);
3807 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3808 ath_tx_set_ratectrl(sc, ni, bf);
3810 sc->sc_aggr_stats.aggr_nonbaw_pkt++;
3812 /* Queue the packet; continue */
3819 * Do a rate control lookup on the first frame in the
3820 * list. The rate control code needs that to occur
3821 * before it can determine whether to TX.
3822 * It's inaccurate because the rate control code doesn't
3823 * really "do" aggregate lookups, so it only considers
3824 * the size of the first frame.
3826 ath_tx_do_ratelookup(sc, bf);
3827 bf->bf_state.bfs_rc[3].rix = 0;
3828 bf->bf_state.bfs_rc[3].tries = 0;
3830 ath_tx_calc_duration(sc, bf);
3831 ath_tx_calc_protection(sc, bf);
3833 ath_tx_set_rtscts(sc, bf);
3834 ath_tx_rate_fill_rcflags(sc, bf);
3836 status = ath_tx_form_aggr(sc, an, tid, &bf_q);
3838 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3839 "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
3842 * No frames to be picked up - out of BAW
3844 if (TAILQ_EMPTY(&bf_q))
3848 * This assumes that the descriptor list in the ath_bufhead
3849 * are already linked together via bf_next pointers.
3851 bf = TAILQ_FIRST(&bf_q);
3853 if (status == ATH_AGGR_8K_LIMITED)
3854 sc->sc_aggr_stats.aggr_rts_aggr_limited++;
3857 * If it's the only frame send as non-aggregate
3858 * assume that ath_tx_form_aggr() has checked
3859 * whether it's in the BAW and added it appropriately.
3861 if (bf->bf_state.bfs_nframes == 1) {
3862 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3863 "%s: single-frame aggregate\n", __func__);
3864 bf->bf_state.bfs_aggr = 0;
3865 ath_tx_setds(sc, bf);
3866 ath_tx_chaindesclist(sc, bf);
3867 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3868 ath_tx_set_ratectrl(sc, ni, bf);
3869 if (status == ATH_AGGR_BAW_CLOSED)
3870 sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
3872 sc->sc_aggr_stats.aggr_single_pkt++;
3874 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3875 "%s: multi-frame aggregate: %d frames, "
3877 __func__, bf->bf_state.bfs_nframes,
3878 bf->bf_state.bfs_al);
3879 bf->bf_state.bfs_aggr = 1;
3880 sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
3881 sc->sc_aggr_stats.aggr_aggr_pkt++;
3884 * Calculate the duration/protection as required.
3886 ath_tx_calc_duration(sc, bf);
3887 ath_tx_calc_protection(sc, bf);
3890 * Update the rate and rtscts information based on the
3891 * rate decision made by the rate control code;
3892 * the first frame in the aggregate needs it.
3894 ath_tx_set_rtscts(sc, bf);
3897 * Setup the relevant descriptor fields
3898 * for aggregation. The first descriptor
3899 * already points to the rest in the chain.
3901 ath_tx_setds_11n(sc, bf);
3904 * setup first desc with rate and aggr info
3906 ath_tx_set_ratectrl(sc, ni, bf);
3909 //txq = bf->bf_state.bfs_txq;
3911 /* Set completion handler, multi-frame aggregate or not */
3912 bf->bf_comp = ath_tx_aggr_comp;
3914 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
3915 device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
3918 ath_tx_handoff(sc, txq, bf);
3920 /* Track outstanding buffer count to hardware */
3921 /* aggregates are "one" buffer */
3925 * Break out if ath_tx_form_aggr() indicated
3926 * there can't be any further progress (eg BAW is full.)
3927 * Checking for an empty txq is done above.
3929 * XXX locking on txq here?
3931 if (txq->axq_aggr_depth >= sc->sc_hwq_limit ||
3932 status == ATH_AGGR_BAW_CLOSED)
3938 * Schedule some packets from the given node/TID to the hardware.
3941 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
3942 struct ath_tid *tid)
3945 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3946 struct ieee80211_node *ni = &an->an_node;
3948 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
3949 __func__, an, tid->tid);
3951 ATH_TXQ_LOCK_ASSERT(txq);
3953 /* Check - is AMPDU pending or running? then print out something */
3954 if (ath_tx_ampdu_pending(sc, an, tid->tid))
3955 device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n",
3956 __func__, tid->tid);
3957 if (ath_tx_ampdu_running(sc, an, tid->tid))
3958 device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n",
3959 __func__, tid->tid);
3964 * If the upper layers have paused the TID, don't
3965 * queue any further packets.
3970 bf = TAILQ_FIRST(&tid->axq_q);
3975 ATH_TXQ_REMOVE(tid, bf, bf_list);
3977 KASSERT(txq == bf->bf_state.bfs_txq, ("txqs not equal!\n"));
3980 if (tid->tid != bf->bf_state.bfs_tid) {
3981 device_printf(sc->sc_dev, "%s: bfs_tid %d !="
3983 __func__, bf->bf_state.bfs_tid, tid->tid);
3985 /* Normal completion handler */
3986 bf->bf_comp = ath_tx_normal_comp;
3988 /* Program descriptors + rate control */
3989 ath_tx_do_ratelookup(sc, bf);
3990 ath_tx_calc_duration(sc, bf);
3991 ath_tx_calc_protection(sc, bf);
3992 ath_tx_set_rtscts(sc, bf);
3993 ath_tx_rate_fill_rcflags(sc, bf);
3994 ath_tx_setds(sc, bf);
3995 ath_tx_chaindesclist(sc, bf);
3996 ath_tx_set_ratectrl(sc, ni, bf);
3998 /* Track outstanding buffer count to hardware */
3999 /* aggregates are "one" buffer */
4002 /* Punt to hardware or software txq */
4003 ath_tx_handoff(sc, txq, bf);
4008 * Schedule some packets to the given hardware queue.
4010 * This function walks the list of TIDs (ie, ath_node TIDs
4011 * with queued traffic) and attempts to schedule traffic
4014 * TID scheduling is implemented as a FIFO, with TIDs being
4015 * added to the end of the queue after some frames have been
4019 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
4021 struct ath_tid *tid, *next, *last;
4023 ATH_TXQ_LOCK_ASSERT(txq);
4026 * Don't schedule if the hardware queue is busy.
4027 * This (hopefully) gives some more time to aggregate
4028 * some packets in the aggregation queue.
4030 if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
4031 sc->sc_aggr_stats.aggr_sched_nopkt++;
4035 last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
4037 TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
4039 * Suspend paused queues here; they'll be resumed
4040 * once the addba completes or times out.
4042 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
4043 __func__, tid->tid, tid->paused);
4044 ath_tx_tid_unsched(sc, tid);
4048 if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
4049 ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
4051 ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
4053 /* Not empty? Re-schedule */
4054 if (tid->axq_depth != 0)
4055 ath_tx_tid_sched(sc, tid);
4057 /* Give the software queue time to aggregate more packets */
4058 if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
4063 * If this was the last entry on the original list, stop.
4064 * Otherwise nodes that have been rescheduled onto the end
4065 * of the TID FIFO list will just keep being rescheduled.
4077 * Return net80211 TID struct pointer, or NULL for none
4079 struct ieee80211_tx_ampdu *
4080 ath_tx_get_tx_tid(struct ath_node *an, int tid)
4082 struct ieee80211_node *ni = &an->an_node;
4083 struct ieee80211_tx_ampdu *tap;
4085 if (tid == IEEE80211_NONQOS_TID)
4088 tap = &ni->ni_tx_ampdu[tid];
4093 * Is AMPDU-TX running?
4096 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
4098 struct ieee80211_tx_ampdu *tap;
4100 if (tid == IEEE80211_NONQOS_TID)
4103 tap = ath_tx_get_tx_tid(an, tid);
4105 return 0; /* Not valid; default to not running */
4107 return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
4111 * Is AMPDU-TX negotiation pending?
4114 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
4116 struct ieee80211_tx_ampdu *tap;
4118 if (tid == IEEE80211_NONQOS_TID)
4121 tap = ath_tx_get_tx_tid(an, tid);
4123 return 0; /* Not valid; default to not pending */
4125 return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
4129 * Is AMPDU-TX pending for the given TID?
4134 * Method to handle sending an ADDBA request.
4136 * We tap this so the relevant flags can be set to pause the TID
4137 * whilst waiting for the response.
4139 * XXX there's no timeout handler we can override?
4142 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
4143 int dialogtoken, int baparamset, int batimeout)
4145 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4146 int tid = tap->txa_tid;
4147 struct ath_node *an = ATH_NODE(ni);
4148 struct ath_tid *atid = &an->an_tid[tid];
4151 * XXX danger Will Robinson!
4153 * Although the taskqueue may be running and scheduling some more
4154 * packets, these should all be _before_ the addba sequence number.
4155 * However, net80211 will keep self-assigning sequence numbers
4156 * until addba has been negotiated.
4158 * In the past, these packets would be "paused" (which still works
4159 * fine, as they're being scheduled to the driver in the same
4160 * serialised method which is calling the addba request routine)
4161 * and when the aggregation session begins, they'll be dequeued
4162 * as aggregate packets and added to the BAW. However, now there's
4163 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
4164 * packets. Thus they never get included in the BAW tracking and
4165 * this can cause the initial burst of packets after the addba
4166 * negotiation to "hang", as they quickly fall outside the BAW.
4168 * The "eventual" solution should be to tag these packets with
4169 * dobaw. Although net80211 has given us a sequence number,
4170 * it'll be "after" the left edge of the BAW and thus it'll
4173 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4175 * This is a bit annoying. Until net80211 HT code inherits some
4176 * (any) locking, we may have this called in parallel BUT only
4177 * one response/timeout will be called. Grr.
4179 if (atid->addba_tx_pending == 0) {
4180 ath_tx_tid_pause(sc, atid);
4181 atid->addba_tx_pending = 1;
4183 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4185 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4186 "%s: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
4187 __func__, dialogtoken, baparamset, batimeout);
4188 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4189 "%s: txa_start=%d, ni_txseqs=%d\n",
4190 __func__, tap->txa_start, ni->ni_txseqs[tid]);
4192 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
4197 * Handle an ADDBA response.
4199 * We unpause the queue so TX'ing can resume.
4201 * Any packets TX'ed from this point should be "aggregate" (whether
4202 * aggregate or not) so the BAW is updated.
4204 * Note! net80211 keeps self-assigning sequence numbers until
4205 * ampdu is negotiated. This means the initially-negotiated BAW left
4206 * edge won't match the ni->ni_txseq.
4208 * So, being very dirty, the BAW left edge is "slid" here to match
4211 * What likely SHOULD happen is that all packets subsequent to the
4212 * addba request should be tagged as aggregate and queued as non-aggregate
4213 * frames; thus updating the BAW. For now though, I'll just slide the
4217 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
4218 int status, int code, int batimeout)
4220 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4221 int tid = tap->txa_tid;
4222 struct ath_node *an = ATH_NODE(ni);
4223 struct ath_tid *atid = &an->an_tid[tid];
4226 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4227 "%s: called; status=%d, code=%d, batimeout=%d\n", __func__,
4228 status, code, batimeout);
4230 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4231 "%s: txa_start=%d, ni_txseqs=%d\n",
4232 __func__, tap->txa_start, ni->ni_txseqs[tid]);
4235 * Call this first, so the interface flags get updated
4236 * before the TID is unpaused. Otherwise a race condition
4237 * exists where the unpaused TID still doesn't yet have
4238 * IEEE80211_AGGR_RUNNING set.
4240 r = sc->sc_addba_response(ni, tap, status, code, batimeout);
4242 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4243 atid->addba_tx_pending = 0;
4246 * Slide the BAW left edge to wherever net80211 left it for us.
4247 * Read above for more information.
4249 tap->txa_start = ni->ni_txseqs[tid];
4250 ath_tx_tid_resume(sc, atid);
4251 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4257 * Stop ADDBA on a queue.
4260 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
4262 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4263 int tid = tap->txa_tid;
4264 struct ath_node *an = ATH_NODE(ni);
4265 struct ath_tid *atid = &an->an_tid[tid];
4267 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: called\n", __func__);
4269 /* Pause TID traffic early, so there aren't any races */
4270 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4271 ath_tx_tid_pause(sc, atid);
4272 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4274 /* There's no need to hold the TXQ lock here */
4275 sc->sc_addba_stop(ni, tap);
4278 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
4279 * it'll set the cleanup flag, and it'll be unpaused once
4280 * things have been cleaned up.
4282 ath_tx_tid_cleanup(sc, an, tid);
4286 * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
4287 * it simply tears down the aggregation session. Ew.
4289 * It however will call ieee80211_ampdu_stop() which will call
4290 * ic->ic_addba_stop().
4292 * XXX This uses a hard-coded max BAR count value; the whole
4293 * XXX BAR TX success or failure should be better handled!
4296 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
4299 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4300 int tid = tap->txa_tid;
4301 struct ath_node *an = ATH_NODE(ni);
4302 struct ath_tid *atid = &an->an_tid[tid];
4303 int attempts = tap->txa_attempts;
4305 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
4306 "%s: called; tap=%p, atid=%p, txa_tid=%d, atid->tid=%d, status=%d, attempts=%d\n",
4315 /* Note: This may update the BAW details */
4316 sc->sc_bar_response(ni, tap, status);
4318 /* Unpause the TID */
4320 * XXX if this is attempt=50, the TID will be downgraded
4321 * XXX to a non-aggregate session. So we must unpause the
4322 * XXX TID here or it'll never be done.
4324 if (status == 0 || attempts == 50) {
4325 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4326 ath_tx_tid_bar_unsuspend(sc, atid);
4327 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4332 * This is called whenever the pending ADDBA request times out.
4333 * Unpause and reschedule the TID.
4336 ath_addba_response_timeout(struct ieee80211_node *ni,
4337 struct ieee80211_tx_ampdu *tap)
4339 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
4340 int tid = tap->txa_tid;
4341 struct ath_node *an = ATH_NODE(ni);
4342 struct ath_tid *atid = &an->an_tid[tid];
4344 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4345 "%s: called; resuming\n", __func__);
4347 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4348 atid->addba_tx_pending = 0;
4349 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
4351 /* Note: This updates the aggregate state to (again) pending */
4352 sc->sc_addba_response_timeout(ni, tap);
4354 /* Unpause the TID; which reschedules it */
4355 ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
4356 ath_tx_tid_resume(sc, atid);
4357 ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);