2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14 * redistribution must be conditioned upon including a substantially
15 * similar Disclaimer requirement for further binary redistribution.
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGES.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * Driver for the Atheros Wireless LAN controller.
37 * This software is derived from work of Atsushi Onoe; his contribution
38 * is greatly appreciated.
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/sysctl.h>
49 #include <sys/malloc.h>
51 #include <sys/mutex.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
54 #include <sys/sockio.h>
55 #include <sys/errno.h>
56 #include <sys/callout.h>
58 #include <sys/endian.h>
59 #include <sys/kthread.h>
60 #include <sys/taskqueue.h>
63 #include <machine/bus.h>
66 #include <net/if_dl.h>
67 #include <net/if_media.h>
68 #include <net/if_types.h>
69 #include <net/if_arp.h>
70 #include <net/ethernet.h>
71 #include <net/if_llc.h>
73 #include <net80211/ieee80211_var.h>
74 #include <net80211/ieee80211_regdomain.h>
75 #ifdef IEEE80211_SUPPORT_SUPERG
76 #include <net80211/ieee80211_superg.h>
78 #ifdef IEEE80211_SUPPORT_TDMA
79 #include <net80211/ieee80211_tdma.h>
81 #include <net80211/ieee80211_ht.h>
86 #include <netinet/in.h>
87 #include <netinet/if_ether.h>
90 #include <dev/ath/if_athvar.h>
91 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
92 #include <dev/ath/ath_hal/ah_diagcodes.h>
94 #include <dev/ath/if_ath_debug.h>
97 #include <dev/ath/ath_tx99/ath_tx99.h>
100 #include <dev/ath/if_ath_misc.h>
101 #include <dev/ath/if_ath_tx.h>
102 #include <dev/ath/if_ath_tx_ht.h>
105 #include <dev/ath/if_ath_alq.h>
109 * How many retries to perform in software
111 #define SWMAX_RETRIES 10
114 * What queue to throw the non-QoS TID traffic into
116 #define ATH_NONQOS_TID_AC WME_AC_VO
119 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
121 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
123 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
125 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
126 struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
127 static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
128 struct ieee80211_node *ni, struct mbuf *m0, int *tid);
129 static struct ath_buf *
130 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
131 struct ath_tid *tid, struct ath_buf *bf);
135 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
141 /* XXX we should skip out early if debugging isn't enabled! */
145 /* XXX should ensure bf_nseg > 0! */
146 if (bf->bf_nseg == 0)
148 n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
149 for (i = 0, ds = (const char *) bf->bf_desc;
151 i++, ds += sc->sc_tx_desclen) {
152 if_ath_alq_post(&sc->sc_alq,
160 #endif /* ATH_DEBUG_ALQ */
163 * Whether to use the 11n rate scenario functions or not
166 ath_tx_is_11n(struct ath_softc *sc)
168 return ((sc->sc_ah->ah_magic == 0x20065416) ||
169 (sc->sc_ah->ah_magic == 0x19741014));
173 * Obtain the current TID from the given frame.
175 * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
176 * This has implications for which AC/priority the packet is placed
180 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
182 const struct ieee80211_frame *wh;
183 int pri = M_WME_GETAC(m0);
185 wh = mtod(m0, const struct ieee80211_frame *);
186 if (! IEEE80211_QOS_HAS_SEQ(wh))
187 return IEEE80211_NONQOS_TID;
189 return WME_AC_TO_TID(pri);
193 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
195 struct ieee80211_frame *wh;
197 wh = mtod(bf->bf_m, struct ieee80211_frame *);
198 /* Only update/resync if needed */
199 if (bf->bf_state.bfs_isretried == 0) {
200 wh->i_fc[1] |= IEEE80211_FC1_RETRY;
201 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
202 BUS_DMASYNC_PREWRITE);
204 bf->bf_state.bfs_isretried = 1;
205 bf->bf_state.bfs_retries ++;
209 * Determine what the correct AC queue for the given frame
212 * This code assumes that the TIDs map consistently to
213 * the underlying hardware (or software) ath_txq.
214 * Since the sender may try to set an AC which is
215 * arbitrary, non-QoS TIDs may end up being put on
216 * completely different ACs. There's no way to put a
217 * TID into multiple ath_txq's for scheduling, so
218 * for now we override the AC/TXQ selection and set
219 * non-QOS TID frames into the BE queue.
221 * This may be completely incorrect - specifically,
222 * some management frames may end up out of order
223 * compared to the QoS traffic they're controlling.
224 * I'll look into this later.
227 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
229 const struct ieee80211_frame *wh;
230 int pri = M_WME_GETAC(m0);
231 wh = mtod(m0, const struct ieee80211_frame *);
232 if (IEEE80211_QOS_HAS_SEQ(wh))
235 return ATH_NONQOS_TID_AC;
239 ath_txfrag_cleanup(struct ath_softc *sc,
240 ath_bufhead *frags, struct ieee80211_node *ni)
242 struct ath_buf *bf, *next;
244 ATH_TXBUF_LOCK_ASSERT(sc);
246 TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
247 /* NB: bf assumed clean */
248 TAILQ_REMOVE(frags, bf, bf_list);
249 ath_returnbuf_head(sc, bf);
250 ieee80211_node_decref(ni);
255 * Setup xmit of a fragmented frame. Allocate a buffer
256 * for each frag and bump the node reference count to
257 * reflect the held reference to be setup by ath_tx_start.
260 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
261 struct mbuf *m0, struct ieee80211_node *ni)
267 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
268 /* XXX non-management? */
269 bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
270 if (bf == NULL) { /* out of buffers, cleanup */
271 device_printf(sc->sc_dev, "%s: no buffer?\n",
273 ath_txfrag_cleanup(sc, frags, ni);
276 ieee80211_node_incref(ni);
277 TAILQ_INSERT_TAIL(frags, bf, bf_list);
279 ATH_TXBUF_UNLOCK(sc);
281 return !TAILQ_EMPTY(frags);
285 * Reclaim mbuf resources. For fragmented frames we
286 * need to claim each frag chained with m_nextpkt.
289 ath_freetx(struct mbuf *m)
297 } while ((m = next) != NULL);
301 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
307 * Load the DMA map so any coalescing is done. This
308 * also calculates the number of descriptors we need.
310 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
311 bf->bf_segs, &bf->bf_nseg,
313 if (error == EFBIG) {
314 /* XXX packet requires too many descriptors */
315 bf->bf_nseg = ATH_MAX_SCATTER + 1;
316 } else if (error != 0) {
317 sc->sc_stats.ast_tx_busdma++;
322 * Discard null packets and check for packets that
323 * require too many TX descriptors. We try to convert
324 * the latter to a cluster.
326 if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */
327 sc->sc_stats.ast_tx_linear++;
328 m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
331 sc->sc_stats.ast_tx_nombuf++;
335 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
336 bf->bf_segs, &bf->bf_nseg,
339 sc->sc_stats.ast_tx_busdma++;
343 KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
344 ("too many segments after defrag; nseg %u", bf->bf_nseg));
345 } else if (bf->bf_nseg == 0) { /* null packet, discard */
346 sc->sc_stats.ast_tx_nodata++;
350 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
351 __func__, m0, m0->m_pkthdr.len);
352 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
359 * Chain together segments+descriptors for a frame - 11n or otherwise.
361 * For aggregates, this is called on each frame in the aggregate.
364 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
365 struct ath_buf *bf, int is_aggr, int is_first_subframe,
366 int is_last_subframe)
368 struct ath_hal *ah = sc->sc_ah;
371 HAL_DMA_ADDR bufAddrList[4];
372 uint32_t segLenList[4];
377 * XXX There's txdma and txdma_mgmt; the descriptor
380 struct ath_descdma *dd = &sc->sc_txdma;
383 * Fillin the remainder of the descriptor info.
387 * We need the number of TX data pointers in each descriptor.
388 * EDMA and later chips support 4 TX buffers per descriptor;
389 * previous chips just support one.
391 numTxMaps = sc->sc_tx_nmaps;
394 * For EDMA and later chips ensure the TX map is fully populated
395 * before advancing to the next descriptor.
397 ds = (char *) bf->bf_desc;
399 bzero(bufAddrList, sizeof(bufAddrList));
400 bzero(segLenList, sizeof(segLenList));
401 for (i = 0; i < bf->bf_nseg; i++) {
402 bufAddrList[bp] = bf->bf_segs[i].ds_addr;
403 segLenList[bp] = bf->bf_segs[i].ds_len;
407 * Go to the next segment if this isn't the last segment
408 * and there's space in the current TX map.
410 if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
414 * Last segment or we're out of buffer pointers.
418 if (i == bf->bf_nseg - 1)
419 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
421 ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
422 bf->bf_daddr + dd->dd_descsize * (dsp + 1));
425 * XXX This assumes that bfs_txq is the actual destination
426 * hardware queue at this point. It may not have been
427 * assigned, it may actually be pointing to the multicast
428 * software TXQ id. These must be fixed!
430 ath_hal_filltxdesc(ah, (struct ath_desc *) ds
433 , bf->bf_descid /* XXX desc id */
434 , bf->bf_state.bfs_tx_queue
435 , isFirstDesc /* first segment */
436 , i == bf->bf_nseg - 1 /* last segment */
437 , (struct ath_desc *) ds0 /* first descriptor */
441 * Make sure the 11n aggregate fields are cleared.
443 * XXX TODO: this doesn't need to be called for
444 * aggregate frames; as it'll be called on all
445 * sub-frames. Since the descriptors are in
446 * non-cacheable memory, this leads to some
447 * rather slow writes on MIPS/ARM platforms.
449 if (ath_tx_is_11n(sc))
450 ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
453 * If 11n is enabled, set it up as if it's an aggregate
456 if (is_last_subframe) {
457 ath_hal_set11n_aggr_last(sc->sc_ah,
458 (struct ath_desc *) ds);
459 } else if (is_aggr) {
461 * This clears the aggrlen field; so
462 * the caller needs to call set_aggr_first()!
464 * XXX TODO: don't call this for the first
465 * descriptor in the first frame in an
468 ath_hal_set11n_aggr_middle(sc->sc_ah,
469 (struct ath_desc *) ds,
470 bf->bf_state.bfs_ndelim);
473 bf->bf_lastds = (struct ath_desc *) ds;
476 * Don't forget to skip to the next descriptor.
478 ds += sc->sc_tx_desclen;
482 * .. and don't forget to blank these out!
484 bzero(bufAddrList, sizeof(bufAddrList));
485 bzero(segLenList, sizeof(segLenList));
487 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
491 * Set the rate control fields in the given descriptor based on
492 * the bf_state fields and node state.
494 * The bfs fields should already be set with the relevant rate
495 * control information, including whether MRR is to be enabled.
497 * Since the FreeBSD HAL currently sets up the first TX rate
498 * in ath_hal_setuptxdesc(), this will setup the MRR
499 * conditionally for the pre-11n chips, and call ath_buf_set_rate
500 * unconditionally for 11n chips. These require the 11n rate
501 * scenario to be set if MCS rates are enabled, so it's easier
502 * to just always call it. The caller can then only set rates 2, 3
503 * and 4 if multi-rate retry is needed.
506 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
509 struct ath_rc_series *rc = bf->bf_state.bfs_rc;
511 /* If mrr is disabled, blank tries 1, 2, 3 */
512 if (! bf->bf_state.bfs_ismrr)
513 rc[1].tries = rc[2].tries = rc[3].tries = 0;
517 * If NOACK is set, just set ntries=1.
519 else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
520 rc[1].tries = rc[2].tries = rc[3].tries = 0;
526 * Always call - that way a retried descriptor will
527 * have the MRR fields overwritten.
529 * XXX TODO: see if this is really needed - setting up
530 * the first descriptor should set the MRR fields to 0
533 if (ath_tx_is_11n(sc)) {
534 ath_buf_set_rate(sc, ni, bf);
536 ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
537 , rc[1].ratecode, rc[1].tries
538 , rc[2].ratecode, rc[2].tries
539 , rc[3].ratecode, rc[3].tries
545 * Setup segments+descriptors for an 11n aggregate.
546 * bf_first is the first buffer in the aggregate.
547 * The descriptor list must already been linked together using
551 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
553 struct ath_buf *bf, *bf_prev = NULL;
554 struct ath_desc *ds0 = bf_first->bf_desc;
556 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
557 __func__, bf_first->bf_state.bfs_nframes,
558 bf_first->bf_state.bfs_al);
562 if (bf->bf_state.bfs_txrate0 == 0)
563 device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n",
565 if (bf->bf_state.bfs_rc[0].ratecode == 0)
566 device_printf(sc->sc_dev, "%s: bf=%p, rix0=%d\n",
570 * Setup all descriptors of all subframes - this will
571 * call ath_hal_set11naggrmiddle() on every frame.
574 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
575 "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
576 __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
577 SEQNO(bf->bf_state.bfs_seqno));
580 * Setup the initial fields for the first descriptor - all
581 * the non-11n specific stuff.
583 ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
584 , bf->bf_state.bfs_pktlen /* packet length */
585 , bf->bf_state.bfs_hdrlen /* header length */
586 , bf->bf_state.bfs_atype /* Atheros packet type */
587 , bf->bf_state.bfs_txpower /* txpower */
588 , bf->bf_state.bfs_txrate0
589 , bf->bf_state.bfs_try0 /* series 0 rate/tries */
590 , bf->bf_state.bfs_keyix /* key cache index */
591 , bf->bf_state.bfs_txantenna /* antenna mode */
592 , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */
593 , bf->bf_state.bfs_ctsrate /* rts/cts rate */
594 , bf->bf_state.bfs_ctsduration /* rts/cts duration */
598 * First descriptor? Setup the rate control and initial
599 * aggregate header information.
601 if (bf == bf_first) {
603 * setup first desc with rate and aggr info
605 ath_tx_set_ratectrl(sc, bf->bf_node, bf);
609 * Setup the descriptors for a multi-descriptor frame.
610 * This is both aggregate and non-aggregate aware.
612 ath_tx_chaindesclist(sc, ds0, bf,
614 !! (bf == bf_first), /* is_first_subframe */
615 !! (bf->bf_next == NULL) /* is_last_subframe */
618 if (bf == bf_first) {
620 * Initialise the first 11n aggregate with the
621 * aggregate length and aggregate enable bits.
623 ath_hal_set11n_aggr_first(sc->sc_ah,
626 bf->bf_state.bfs_ndelim);
630 * Link the last descriptor of the previous frame
631 * to the beginning descriptor of this frame.
634 ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
637 /* Save a copy so we can link the next descriptor in */
643 * Set the first descriptor bf_lastds field to point to
644 * the last descriptor in the last subframe, that's where
645 * the status update will occur.
647 bf_first->bf_lastds = bf_prev->bf_lastds;
650 * And bf_last in the first descriptor points to the end of
651 * the aggregate list.
653 bf_first->bf_last = bf_prev;
656 * For non-AR9300 NICs, which require the rate control
657 * in the final descriptor - let's set that up now.
659 * This is because the filltxdesc() HAL call doesn't
660 * populate the last segment with rate control information
661 * if firstSeg is also true. For non-aggregate frames
662 * that is fine, as the first frame already has rate control
663 * info. But if the last frame in an aggregate has one
664 * descriptor, both firstseg and lastseg will be true and
665 * the rate info isn't copied.
667 * This is inefficient on MIPS/ARM platforms that have
668 * non-cachable memory for TX descriptors, but we'll just
671 * As to why the rate table is stashed in the last descriptor
672 * rather than the first descriptor? Because proctxdesc()
673 * is called on the final descriptor in an MPDU or A-MPDU -
674 * ie, the one that gets updated by the hardware upon
675 * completion. That way proctxdesc() doesn't need to know
676 * about the first _and_ last TX descriptor.
678 ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
680 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
684 * Hand-off a frame to the multicast TX queue.
686 * This is a software TXQ which will be appended to the CAB queue
687 * during the beacon setup code.
689 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
690 * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
691 * with the actual hardware txq, or all of this will fall apart.
693 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
694 * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
698 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
701 ATH_TX_LOCK_ASSERT(sc);
703 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
704 ("%s: busy status 0x%x", __func__, bf->bf_flags));
707 * Ensure that the tx queue is the cabq, so things get
710 if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) {
711 device_printf(sc->sc_dev,
712 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
715 bf->bf_state.bfs_tx_queue,
720 if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
721 struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
722 struct ieee80211_frame *wh;
724 /* mark previous frame */
725 wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
726 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
727 bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
728 BUS_DMASYNC_PREWRITE);
730 /* link descriptor */
731 ath_hal_settxdesclink(sc->sc_ah,
735 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
740 * Hand-off packet to a hardware queue.
743 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
746 struct ath_hal *ah = sc->sc_ah;
747 struct ath_buf *bf_first;
750 * Insert the frame on the outbound list and pass it on
751 * to the hardware. Multicast frames buffered for power
752 * save stations and transmit from the CAB queue are stored
753 * on a s/w only queue and loaded on to the CAB queue in
754 * the SWBA handler since frames only go out on DTIM and
755 * to avoid possible races.
757 ATH_TX_LOCK_ASSERT(sc);
758 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
759 ("%s: busy status 0x%x", __func__, bf->bf_flags));
760 KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
761 ("ath_tx_handoff_hw called for mcast queue"));
764 * XXX racy, should hold the PCU lock when checking this,
765 * and also should ensure that the TX counter is >0!
767 KASSERT((sc->sc_inreset_cnt == 0),
768 ("%s: TX during reset?\n", __func__));
772 * This causes a LOR. Find out where the PCU lock is being
773 * held whilst the TXQ lock is grabbed - that shouldn't
777 if (sc->sc_inreset_cnt) {
779 DPRINTF(sc, ATH_DEBUG_RESET,
780 "%s: called with sc_in_reset != 0\n",
782 DPRINTF(sc, ATH_DEBUG_XMIT,
783 "%s: queued: TXDP[%u] = %p (%p) depth %d\n",
784 __func__, txq->axq_qnum,
785 (caddr_t)bf->bf_daddr, bf->bf_desc,
787 /* XXX axq_link needs to be set and updated! */
788 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
789 if (bf->bf_state.bfs_aggr)
790 txq->axq_aggr_depth++;
799 * XXX TODO: if there's a holdingbf, then
800 * ATH_TXQ_PUTRUNNING should be clear.
802 * If there is a holdingbf and the list is empty,
803 * then axq_link should be pointing to the holdingbf.
805 * Otherwise it should point to the last descriptor
806 * in the last ath_buf.
808 * In any case, we should really ensure that we
809 * update the previous descriptor link pointer to
810 * this descriptor, regardless of all of the above state.
812 * For now this is captured by having axq_link point
813 * to either the holdingbf (if the TXQ list is empty)
814 * or the end of the list (if the TXQ list isn't empty.)
815 * I'd rather just kill axq_link here and do it as above.
819 * Append the frame to the TX queue.
821 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
822 ATH_KTR(sc, ATH_KTR_TX, 3,
823 "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
830 * If there's a link pointer, update it.
832 * XXX we should replace this with the above logic, just
833 * to kill axq_link with fire.
835 if (txq->axq_link != NULL) {
836 *txq->axq_link = bf->bf_daddr;
837 DPRINTF(sc, ATH_DEBUG_XMIT,
838 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
839 txq->axq_qnum, txq->axq_link,
840 (caddr_t)bf->bf_daddr, bf->bf_desc,
842 ATH_KTR(sc, ATH_KTR_TX, 5,
843 "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
845 txq->axq_qnum, txq->axq_link,
846 (caddr_t)bf->bf_daddr, bf->bf_desc,
851 * If we've not pushed anything into the hardware yet,
852 * push the head of the queue into the TxDP.
854 * Once we've started DMA, there's no guarantee that
855 * updating the TxDP with a new value will actually work.
856 * So we just don't do that - if we hit the end of the list,
857 * we keep that buffer around (the "holding buffer") and
858 * re-start DMA by updating the link pointer of _that_
859 * descriptor and then restart DMA.
861 if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) {
862 bf_first = TAILQ_FIRST(&txq->axq_q);
863 txq->axq_flags |= ATH_TXQ_PUTRUNNING;
864 ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr);
865 DPRINTF(sc, ATH_DEBUG_XMIT,
866 "%s: TXDP[%u] = %p (%p) depth %d\n",
867 __func__, txq->axq_qnum,
868 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
870 ATH_KTR(sc, ATH_KTR_TX, 5,
871 "ath_tx_handoff: TXDP[%u] = %p (%p) "
872 "lastds=%p depth %d",
874 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
880 * Ensure that the bf TXQ matches this TXQ, so later
881 * checking and holding buffer manipulation is sane.
883 if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) {
884 device_printf(sc->sc_dev,
885 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
888 bf->bf_state.bfs_tx_queue,
893 * Track aggregate queue depth.
895 if (bf->bf_state.bfs_aggr)
896 txq->axq_aggr_depth++;
899 * Update the link pointer.
901 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
906 * If we wrote a TxDP above, DMA will start from here.
908 * If DMA is running, it'll do nothing.
910 * If the DMA engine hit the end of the QCU list (ie LINK=NULL,
911 * or VEOL) then it stops at the last transmitted write.
912 * We then append a new frame by updating the link pointer
913 * in that descriptor and then kick TxE here; it will re-read
914 * that last descriptor and find the new descriptor to transmit.
916 * This is why we keep the holding descriptor around.
918 ath_hal_txstart(ah, txq->axq_qnum);
920 ATH_KTR(sc, ATH_KTR_TX, 1,
921 "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
925 * Restart TX DMA for the given TXQ.
927 * This must be called whether the queue is empty or not.
930 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
932 struct ath_buf *bf, *bf_last;
934 ATH_TXQ_LOCK_ASSERT(txq);
936 /* XXX make this ATH_TXQ_FIRST */
937 bf = TAILQ_FIRST(&txq->axq_q);
938 bf_last = ATH_TXQ_LAST(txq, axq_q_s);
943 DPRINTF(sc, ATH_DEBUG_RESET,
944 "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n",
949 (uint32_t) bf->bf_daddr);
952 if (sc->sc_debug & ATH_DEBUG_RESET)
953 ath_tx_dump(sc, txq);
957 * This is called from a restart, so DMA is known to be
958 * completely stopped.
960 KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)),
961 ("%s: Q%d: called with PUTRUNNING=1\n",
965 ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr);
966 txq->axq_flags |= ATH_TXQ_PUTRUNNING;
968 ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds,
970 ath_hal_txstart(sc->sc_ah, txq->axq_qnum);
974 * Hand off a packet to the hardware (or mcast queue.)
976 * The relevant hardware txq should be locked.
979 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
982 ATH_TX_LOCK_ASSERT(sc);
985 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
986 ath_tx_alq_post(sc, bf);
989 if (txq->axq_qnum == ATH_TXQ_SWQ)
990 ath_tx_handoff_mcast(sc, txq, bf);
992 ath_tx_handoff_hw(sc, txq, bf);
996 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
997 struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
1000 DPRINTF(sc, ATH_DEBUG_XMIT,
1001 "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
1010 const struct ieee80211_cipher *cip;
1011 struct ieee80211_key *k;
1014 * Construct the 802.11 header+trailer for an encrypted
1015 * frame. The only reason this can fail is because of an
1016 * unknown or unsupported cipher/key type.
1018 k = ieee80211_crypto_encap(ni, m0);
1021 * This can happen when the key is yanked after the
1022 * frame was queued. Just discard the frame; the
1023 * 802.11 layer counts failures and provides
1024 * debugging/diagnostics.
1029 * Adjust the packet + header lengths for the crypto
1030 * additions and calculate the h/w key index. When
1031 * a s/w mic is done the frame will have had any mic
1032 * added to it prior to entry so m0->m_pkthdr.len will
1033 * account for it. Otherwise we need to add it to the
1037 (*hdrlen) += cip->ic_header;
1038 (*pktlen) += cip->ic_header + cip->ic_trailer;
1039 /* NB: frags always have any TKIP MIC done in s/w */
1040 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
1041 (*pktlen) += cip->ic_miclen;
1042 (*keyix) = k->wk_keyix;
1043 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
1045 * Use station key cache slot, if assigned.
1047 (*keyix) = ni->ni_ucastkey.wk_keyix;
1048 if ((*keyix) == IEEE80211_KEYIX_NONE)
1049 (*keyix) = HAL_TXKEYIX_INVALID;
1051 (*keyix) = HAL_TXKEYIX_INVALID;
1057 * Calculate whether interoperability protection is required for
1060 * This requires the rate control information be filled in,
1061 * as the protection requirement depends upon the current
1062 * operating mode / PHY.
1065 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1067 struct ieee80211_frame *wh;
1071 const HAL_RATE_TABLE *rt = sc->sc_currates;
1072 struct ifnet *ifp = sc->sc_ifp;
1073 struct ieee80211com *ic = ifp->if_l2com;
1075 flags = bf->bf_state.bfs_txflags;
1076 rix = bf->bf_state.bfs_rc[0].rix;
1077 shortPreamble = bf->bf_state.bfs_shpream;
1078 wh = mtod(bf->bf_m, struct ieee80211_frame *);
1081 * If 802.11g protection is enabled, determine whether
1082 * to use RTS/CTS or just CTS. Note that this is only
1083 * done for OFDM unicast frames.
1085 if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1086 rt->info[rix].phy == IEEE80211_T_OFDM &&
1087 (flags & HAL_TXDESC_NOACK) == 0) {
1088 bf->bf_state.bfs_doprot = 1;
1089 /* XXX fragments must use CCK rates w/ protection */
1090 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1091 flags |= HAL_TXDESC_RTSENA;
1092 } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1093 flags |= HAL_TXDESC_CTSENA;
1096 * For frags it would be desirable to use the
1097 * highest CCK rate for RTS/CTS. But stations
1098 * farther away may detect it at a lower CCK rate
1099 * so use the configured protection rate instead
1102 sc->sc_stats.ast_tx_protect++;
1106 * If 11n protection is enabled and it's a HT frame,
1109 * XXX ic_htprotmode or ic_curhtprotmode?
1110 * XXX should it_htprotmode only matter if ic_curhtprotmode
1111 * XXX indicates it's not a HT pure environment?
1113 if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1114 rt->info[rix].phy == IEEE80211_T_HT &&
1115 (flags & HAL_TXDESC_NOACK) == 0) {
1116 flags |= HAL_TXDESC_RTSENA;
1117 sc->sc_stats.ast_tx_htprotect++;
1119 bf->bf_state.bfs_txflags = flags;
1123 * Update the frame duration given the currently selected rate.
1125 * This also updates the frame duration value, so it will require
1129 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1131 struct ieee80211_frame *wh;
1135 struct ath_hal *ah = sc->sc_ah;
1136 const HAL_RATE_TABLE *rt = sc->sc_currates;
1137 int isfrag = bf->bf_m->m_flags & M_FRAG;
1139 flags = bf->bf_state.bfs_txflags;
1140 rix = bf->bf_state.bfs_rc[0].rix;
1141 shortPreamble = bf->bf_state.bfs_shpream;
1142 wh = mtod(bf->bf_m, struct ieee80211_frame *);
1145 * Calculate duration. This logically belongs in the 802.11
1146 * layer but it lacks sufficient information to calculate it.
1148 if ((flags & HAL_TXDESC_NOACK) == 0 &&
1149 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1152 dur = rt->info[rix].spAckDuration;
1154 dur = rt->info[rix].lpAckDuration;
1155 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1156 dur += dur; /* additional SIFS+ACK */
1157 KASSERT(bf->bf_m->m_nextpkt != NULL, ("no fragment"));
1159 * Include the size of next fragment so NAV is
1160 * updated properly. The last fragment uses only
1163 * XXX TODO: ensure that the rate lookup for each
1164 * fragment is the same as the rate used by the
1167 dur += ath_hal_computetxtime(ah, rt,
1168 bf->bf_m->m_nextpkt->m_pkthdr.len,
1169 rix, shortPreamble);
1173 * Force hardware to use computed duration for next
1174 * fragment by disabling multi-rate retry which updates
1175 * duration based on the multi-rate duration table.
1177 bf->bf_state.bfs_ismrr = 0;
1178 bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1179 /* XXX update bfs_rc[0].try? */
1182 /* Update the duration field itself */
1183 *(u_int16_t *)wh->i_dur = htole16(dur);
1188 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1189 int cix, int shortPreamble)
1194 * CTS transmit rate is derived from the transmit rate
1195 * by looking in the h/w rate table. We must also factor
1196 * in whether or not a short preamble is to be used.
1198 /* NB: cix is set above where RTS/CTS is enabled */
1199 KASSERT(cix != 0xff, ("cix not setup"));
1200 ctsrate = rt->info[cix].rateCode;
1202 /* XXX this should only matter for legacy rates */
1204 ctsrate |= rt->info[cix].shortPreamble;
1210 * Calculate the RTS/CTS duration for legacy frames.
1213 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1214 int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1217 int ctsduration = 0;
1219 /* This mustn't be called for HT modes */
1220 if (rt->info[cix].phy == IEEE80211_T_HT) {
1221 printf("%s: HT rate where it shouldn't be (0x%x)\n",
1222 __func__, rt->info[cix].rateCode);
1227 * Compute the transmit duration based on the frame
1228 * size and the size of an ACK frame. We call into the
1229 * HAL to do the computation since it depends on the
1230 * characteristics of the actual PHY being used.
1232 * NB: CTS is assumed the same size as an ACK so we can
1233 * use the precalculated ACK durations.
1235 if (shortPreamble) {
1236 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
1237 ctsduration += rt->info[cix].spAckDuration;
1238 ctsduration += ath_hal_computetxtime(ah,
1239 rt, pktlen, rix, AH_TRUE);
1240 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
1241 ctsduration += rt->info[rix].spAckDuration;
1243 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
1244 ctsduration += rt->info[cix].lpAckDuration;
1245 ctsduration += ath_hal_computetxtime(ah,
1246 rt, pktlen, rix, AH_FALSE);
1247 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
1248 ctsduration += rt->info[rix].lpAckDuration;
1251 return (ctsduration);
1255 * Update the given ath_buf with updated rts/cts setup and duration
1258 * To support rate lookups for each software retry, the rts/cts rate
1259 * and cts duration must be re-calculated.
1261 * This function assumes the RTS/CTS flags have been set as needed;
1262 * mrr has been disabled; and the rate control lookup has been done.
1264 * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1265 * XXX The 11n NICs support per-rate RTS/CTS configuration.
1268 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1270 uint16_t ctsduration = 0;
1271 uint8_t ctsrate = 0;
1272 uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1274 const HAL_RATE_TABLE *rt = sc->sc_currates;
1277 * No RTS/CTS enabled? Don't bother.
1279 if ((bf->bf_state.bfs_txflags &
1280 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1281 /* XXX is this really needed? */
1282 bf->bf_state.bfs_ctsrate = 0;
1283 bf->bf_state.bfs_ctsduration = 0;
1288 * If protection is enabled, use the protection rix control
1289 * rate. Otherwise use the rate0 control rate.
1291 if (bf->bf_state.bfs_doprot)
1292 rix = sc->sc_protrix;
1294 rix = bf->bf_state.bfs_rc[0].rix;
1297 * If the raw path has hard-coded ctsrate0 to something,
1300 if (bf->bf_state.bfs_ctsrate0 != 0)
1301 cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1303 /* Control rate from above */
1304 cix = rt->info[rix].controlRate;
1306 /* Calculate the rtscts rate for the given cix */
1307 ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1308 bf->bf_state.bfs_shpream);
1310 /* The 11n chipsets do ctsduration calculations for you */
1311 if (! ath_tx_is_11n(sc))
1312 ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1313 bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1314 rt, bf->bf_state.bfs_txflags);
1316 /* Squirrel away in ath_buf */
1317 bf->bf_state.bfs_ctsrate = ctsrate;
1318 bf->bf_state.bfs_ctsduration = ctsduration;
1321 * Must disable multi-rate retry when using RTS/CTS.
1323 if (!sc->sc_mrrprot) {
1324 bf->bf_state.bfs_ismrr = 0;
1325 bf->bf_state.bfs_try0 =
1326 bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1331 * Setup the descriptor chain for a normal or fast-frame
1334 * XXX TODO: extend to include the destination hardware QCU ID.
1335 * Make sure that is correct. Make sure that when being added
1336 * to the mcastq, the CABQ QCUID is set or things will get a bit
1340 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1342 struct ath_desc *ds = bf->bf_desc;
1343 struct ath_hal *ah = sc->sc_ah;
1345 if (bf->bf_state.bfs_txrate0 == 0)
1346 device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n",
1349 ath_hal_setuptxdesc(ah, ds
1350 , bf->bf_state.bfs_pktlen /* packet length */
1351 , bf->bf_state.bfs_hdrlen /* header length */
1352 , bf->bf_state.bfs_atype /* Atheros packet type */
1353 , bf->bf_state.bfs_txpower /* txpower */
1354 , bf->bf_state.bfs_txrate0
1355 , bf->bf_state.bfs_try0 /* series 0 rate/tries */
1356 , bf->bf_state.bfs_keyix /* key cache index */
1357 , bf->bf_state.bfs_txantenna /* antenna mode */
1358 , bf->bf_state.bfs_txflags /* flags */
1359 , bf->bf_state.bfs_ctsrate /* rts/cts rate */
1360 , bf->bf_state.bfs_ctsduration /* rts/cts duration */
1364 * This will be overriden when the descriptor chain is written.
1369 /* Set rate control and descriptor chain for this frame */
1370 ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1371 ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1377 * This performs a rate lookup for the given ath_buf only if it's required.
1378 * Non-data frames and raw frames don't require it.
1380 * This populates the primary and MRR entries; MRR values are
1381 * then disabled later on if something requires it (eg RTS/CTS on
1384 * This needs to be done before the RTS/CTS fields are calculated
1385 * as they may depend upon the rate chosen.
1388 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1393 if (! bf->bf_state.bfs_doratelookup)
1396 /* Get rid of any previous state */
1397 bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1399 ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1400 ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1401 bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1403 /* In case MRR is disabled, make sure rc[0] is setup correctly */
1404 bf->bf_state.bfs_rc[0].rix = rix;
1405 bf->bf_state.bfs_rc[0].ratecode = rate;
1406 bf->bf_state.bfs_rc[0].tries = try0;
1408 if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1409 ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1410 bf->bf_state.bfs_rc);
1411 ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1413 sc->sc_txrix = rix; /* for LED blinking */
1414 sc->sc_lastdatarix = rix; /* for fast frames */
1415 bf->bf_state.bfs_try0 = try0;
1416 bf->bf_state.bfs_txrate0 = rate;
1420 * Update the CLRDMASK bit in the ath_buf if it needs to be set.
1423 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
1426 struct ath_node *an = ATH_NODE(bf->bf_node);
1428 ATH_TX_LOCK_ASSERT(sc);
1430 if (an->clrdmask == 1) {
1431 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1437 * Return whether this frame should be software queued or
1438 * direct dispatched.
1440 * When doing powersave, BAR frames should be queued but other management
1441 * frames should be directly sent.
1443 * When not doing powersave, stick BAR frames into the hardware queue
1444 * so it goes out even though the queue is paused.
1446 * For now, management frames are also software queued by default.
1449 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
1450 struct mbuf *m0, int *queue_to_head)
1452 struct ieee80211_node *ni = &an->an_node;
1453 struct ieee80211_frame *wh;
1454 uint8_t type, subtype;
1456 wh = mtod(m0, struct ieee80211_frame *);
1457 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1458 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1460 (*queue_to_head) = 0;
1462 /* If it's not in powersave - direct-dispatch BAR */
1463 if ((ATH_NODE(ni)->an_is_powersave == 0)
1464 && type == IEEE80211_FC0_TYPE_CTL &&
1465 subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1466 DPRINTF(sc, ATH_DEBUG_SW_TX,
1467 "%s: BAR: TX'ing direct\n", __func__);
1469 } else if ((ATH_NODE(ni)->an_is_powersave == 1)
1470 && type == IEEE80211_FC0_TYPE_CTL &&
1471 subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1472 /* BAR TX whilst asleep; queue */
1473 DPRINTF(sc, ATH_DEBUG_SW_TX,
1474 "%s: swq: TX'ing\n", __func__);
1475 (*queue_to_head) = 1;
1477 } else if ((ATH_NODE(ni)->an_is_powersave == 1)
1478 && (type == IEEE80211_FC0_TYPE_MGT ||
1479 type == IEEE80211_FC0_TYPE_CTL)) {
1481 * Other control/mgmt frame; bypass software queuing
1484 device_printf(sc->sc_dev,
1485 "%s: %6D: Node is asleep; sending mgmt "
1486 "(type=%d, subtype=%d)\n",
1500 * Transmit the given frame to the hardware.
1502 * The frame must already be setup; rate control must already have
1505 * XXX since the TXQ lock is being held here (and I dislike holding
1506 * it for this long when not doing software aggregation), later on
1507 * break this function into "setup_normal" and "xmit_normal". The
1508 * lock only needs to be held for the ath_tx_handoff call.
1510 * XXX we don't update the leak count here - if we're doing
1511 * direct frame dispatch, we need to be able to do it without
1512 * decrementing the leak count (eg multicast queue frames.)
1515 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1518 struct ath_node *an = ATH_NODE(bf->bf_node);
1519 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1521 ATH_TX_LOCK_ASSERT(sc);
1524 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
1525 * set a completion handler however it doesn't (yet) properly
1526 * handle the strict ordering requirements needed for normal,
1527 * non-aggregate session frames.
1529 * Once this is implemented, only set CLRDMASK like this for
1530 * frames that must go out - eg management/raw frames.
1532 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1534 /* Setup the descriptor before handoff */
1535 ath_tx_do_ratelookup(sc, bf);
1536 ath_tx_calc_duration(sc, bf);
1537 ath_tx_calc_protection(sc, bf);
1538 ath_tx_set_rtscts(sc, bf);
1539 ath_tx_rate_fill_rcflags(sc, bf);
1540 ath_tx_setds(sc, bf);
1542 /* Track per-TID hardware queue depth correctly */
1545 /* Assign the completion handler */
1546 bf->bf_comp = ath_tx_normal_comp;
1548 /* Hand off to hardware */
1549 ath_tx_handoff(sc, txq, bf);
1553 * Do the basic frame setup stuff that's required before the frame
1554 * is added to a software queue.
1556 * All frames get mostly the same treatment and it's done once.
1557 * Retransmits fiddle with things like the rate control setup,
1558 * setting the retransmit bit in the packet; doing relevant DMA/bus
1559 * syncing and relinking it (back) into the hardware TX queue.
1561 * Note that this may cause the mbuf to be reallocated, so
1562 * m0 may not be valid.
1565 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1566 struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1568 struct ieee80211vap *vap = ni->ni_vap;
1569 struct ath_hal *ah = sc->sc_ah;
1570 struct ifnet *ifp = sc->sc_ifp;
1571 struct ieee80211com *ic = ifp->if_l2com;
1572 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1573 int error, iswep, ismcast, isfrag, ismrr;
1574 int keyix, hdrlen, pktlen, try0 = 0;
1575 u_int8_t rix = 0, txrate = 0;
1576 struct ath_desc *ds;
1577 struct ieee80211_frame *wh;
1578 u_int subtype, flags;
1580 const HAL_RATE_TABLE *rt;
1581 HAL_BOOL shortPreamble;
1582 struct ath_node *an;
1586 * To ensure that both sequence numbers and the CCMP PN handling
1587 * is "correct", make sure that the relevant TID queue is locked.
1588 * Otherwise the CCMP PN and seqno may appear out of order, causing
1589 * re-ordered frames to have out of order CCMP PN's, resulting
1590 * in many, many frame drops.
1592 ATH_TX_LOCK_ASSERT(sc);
1594 wh = mtod(m0, struct ieee80211_frame *);
1595 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1596 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1597 isfrag = m0->m_flags & M_FRAG;
1598 hdrlen = ieee80211_anyhdrsize(wh);
1600 * Packet length must not include any
1601 * pad bytes; deduct them here.
1603 pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1605 /* Handle encryption twiddling if needed */
1606 if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1612 /* packet header may have moved, reset our local pointer */
1613 wh = mtod(m0, struct ieee80211_frame *);
1615 pktlen += IEEE80211_CRC_LEN;
1618 * Load the DMA map so any coalescing is done. This
1619 * also calculates the number of descriptors we need.
1621 error = ath_tx_dmasetup(sc, bf, m0);
1624 bf->bf_node = ni; /* NB: held reference */
1625 m0 = bf->bf_m; /* NB: may have changed */
1626 wh = mtod(m0, struct ieee80211_frame *);
1628 /* setup descriptors */
1630 rt = sc->sc_currates;
1631 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1634 * NB: the 802.11 layer marks whether or not we should
1635 * use short preamble based on the current mode and
1636 * negotiated parameters.
1638 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1639 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1640 shortPreamble = AH_TRUE;
1641 sc->sc_stats.ast_tx_shortpre++;
1643 shortPreamble = AH_FALSE;
1647 //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
1649 ismrr = 0; /* default no multi-rate retry*/
1650 pri = M_WME_GETAC(m0); /* honor classification */
1651 /* XXX use txparams instead of fixed values */
1653 * Calculate Atheros packet type from IEEE80211 packet header,
1654 * setup for rate calculations, and select h/w transmit queue.
1656 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1657 case IEEE80211_FC0_TYPE_MGT:
1658 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1659 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1660 atype = HAL_PKT_TYPE_BEACON;
1661 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1662 atype = HAL_PKT_TYPE_PROBE_RESP;
1663 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1664 atype = HAL_PKT_TYPE_ATIM;
1666 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
1667 rix = an->an_mgmtrix;
1668 txrate = rt->info[rix].rateCode;
1670 txrate |= rt->info[rix].shortPreamble;
1671 try0 = ATH_TXMGTTRY;
1672 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1674 case IEEE80211_FC0_TYPE_CTL:
1675 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
1676 rix = an->an_mgmtrix;
1677 txrate = rt->info[rix].rateCode;
1679 txrate |= rt->info[rix].shortPreamble;
1680 try0 = ATH_TXMGTTRY;
1681 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1683 case IEEE80211_FC0_TYPE_DATA:
1684 atype = HAL_PKT_TYPE_NORMAL; /* default */
1686 * Data frames: multicast frames go out at a fixed rate,
1687 * EAPOL frames use the mgmt frame rate; otherwise consult
1688 * the rate control module for the rate to use.
1691 rix = an->an_mcastrix;
1692 txrate = rt->info[rix].rateCode;
1694 txrate |= rt->info[rix].shortPreamble;
1696 } else if (m0->m_flags & M_EAPOL) {
1697 /* XXX? maybe always use long preamble? */
1698 rix = an->an_mgmtrix;
1699 txrate = rt->info[rix].rateCode;
1701 txrate |= rt->info[rix].shortPreamble;
1702 try0 = ATH_TXMAXTRY; /* XXX?too many? */
1705 * Do rate lookup on each TX, rather than using
1706 * the hard-coded TX information decided here.
1709 bf->bf_state.bfs_doratelookup = 1;
1711 if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1712 flags |= HAL_TXDESC_NOACK;
1715 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1716 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1718 /* XXX free tx dmamap */
1724 * There are two known scenarios where the frame AC doesn't match
1725 * what the destination TXQ is.
1727 * + non-QoS frames (eg management?) that the net80211 stack has
1728 * assigned a higher AC to, but since it's a non-QoS TID, it's
1729 * being thrown into TID 16. TID 16 gets the AC_BE queue.
1730 * It's quite possible that management frames should just be
1731 * direct dispatched to hardware rather than go via the software
1732 * queue; that should be investigated in the future. There are
1733 * some specific scenarios where this doesn't make sense, mostly
1734 * surrounding ADDBA request/response - hence why that is special
1737 * + Multicast frames going into the VAP mcast queue. That shows up
1740 * This driver should eventually support separate TID and TXQ locking,
1741 * allowing for arbitrary AC frames to appear on arbitrary software
1742 * queues, being queued to the "correct" hardware queue when needed.
1745 if (txq != sc->sc_ac2q[pri]) {
1746 device_printf(sc->sc_dev,
1747 "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1753 sc->sc_ac2q[pri]->axq_qnum);
1758 * Calculate miscellaneous flags.
1761 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
1762 } else if (pktlen > vap->iv_rtsthreshold &&
1763 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1764 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
1765 sc->sc_stats.ast_tx_rts++;
1767 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
1768 sc->sc_stats.ast_tx_noack++;
1769 #ifdef IEEE80211_SUPPORT_TDMA
1770 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1771 DPRINTF(sc, ATH_DEBUG_TDMA,
1772 "%s: discard frame, ACK required w/ TDMA\n", __func__);
1773 sc->sc_stats.ast_tdma_ack++;
1774 /* XXX free tx dmamap */
1781 * Determine if a tx interrupt should be generated for
1782 * this descriptor. We take a tx interrupt to reap
1783 * descriptors when the h/w hits an EOL condition or
1784 * when the descriptor is specifically marked to generate
1785 * an interrupt. We periodically mark descriptors in this
1786 * way to insure timely replenishing of the supply needed
1787 * for sending frames. Defering interrupts reduces system
1788 * load and potentially allows more concurrent work to be
1789 * done but if done to aggressively can cause senders to
1792 * NB: use >= to deal with sc_txintrperiod changing
1793 * dynamically through sysctl.
1795 if (flags & HAL_TXDESC_INTREQ) {
1796 txq->axq_intrcnt = 0;
1797 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1798 flags |= HAL_TXDESC_INTREQ;
1799 txq->axq_intrcnt = 0;
1802 /* This point forward is actual TX bits */
1805 * At this point we are committed to sending the frame
1806 * and we don't need to look at m_nextpkt; clear it in
1807 * case this frame is part of frag chain.
1809 m0->m_nextpkt = NULL;
1811 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1812 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1813 sc->sc_hwmap[rix].ieeerate, -1);
1815 if (ieee80211_radiotap_active_vap(vap)) {
1816 u_int64_t tsf = ath_hal_gettsf64(ah);
1818 sc->sc_tx_th.wt_tsf = htole64(tsf);
1819 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1821 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1823 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1824 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1825 sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1826 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1828 ieee80211_radiotap_tx(vap, m0);
1831 /* Blank the legacy rate array */
1832 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1835 * ath_buf_set_rate needs at least one rate/try to setup
1836 * the rate scenario.
1838 bf->bf_state.bfs_rc[0].rix = rix;
1839 bf->bf_state.bfs_rc[0].tries = try0;
1840 bf->bf_state.bfs_rc[0].ratecode = txrate;
1842 /* Store the decided rate index values away */
1843 bf->bf_state.bfs_pktlen = pktlen;
1844 bf->bf_state.bfs_hdrlen = hdrlen;
1845 bf->bf_state.bfs_atype = atype;
1846 bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1847 bf->bf_state.bfs_txrate0 = txrate;
1848 bf->bf_state.bfs_try0 = try0;
1849 bf->bf_state.bfs_keyix = keyix;
1850 bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1851 bf->bf_state.bfs_txflags = flags;
1852 bf->bf_state.bfs_shpream = shortPreamble;
1854 /* XXX this should be done in ath_tx_setrate() */
1855 bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */
1856 bf->bf_state.bfs_ctsrate = 0; /* calculated later */
1857 bf->bf_state.bfs_ctsduration = 0;
1858 bf->bf_state.bfs_ismrr = ismrr;
1864 * Queue a frame to the hardware or software queue.
1866 * This can be called by the net80211 code.
1868 * XXX what about locking? Or, push the seqno assign into the
1869 * XXX aggregate scheduler so its serialised?
1871 * XXX When sending management frames via ath_raw_xmit(),
1872 * should CLRDMASK be set unconditionally?
1875 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1876 struct ath_buf *bf, struct mbuf *m0)
1878 struct ieee80211vap *vap = ni->ni_vap;
1879 struct ath_vap *avp = ATH_VAP(vap);
1883 struct ath_txq *txq;
1885 const struct ieee80211_frame *wh;
1886 int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1887 ieee80211_seq seqno;
1888 uint8_t type, subtype;
1891 ATH_TX_LOCK_ASSERT(sc);
1894 * Determine the target hardware queue.
1896 * For multicast frames, the txq gets overridden appropriately
1897 * depending upon the state of PS.
1899 * For any other frame, we do a TID/QoS lookup inside the frame
1900 * to see what the TID should be. If it's a non-QoS frame, the
1901 * AC and TID are overridden. The TID/TXQ code assumes the
1902 * TID is on a predictable hardware TXQ, so we don't support
1903 * having a node TID queued to multiple hardware TXQs.
1904 * This may change in the future but would require some locking
1907 pri = ath_tx_getac(sc, m0);
1908 tid = ath_tx_gettid(sc, m0);
1910 txq = sc->sc_ac2q[pri];
1911 wh = mtod(m0, struct ieee80211_frame *);
1912 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1913 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1914 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1917 * Enforce how deep the multicast queue can grow.
1919 * XXX duplicated in ath_raw_xmit().
1921 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1922 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
1923 > sc->sc_txq_mcastq_maxdepth) {
1924 sc->sc_stats.ast_tx_mcastq_overflow++;
1931 * Enforce how deep the unicast queue can grow.
1933 * If the node is in power save then we don't want
1934 * the software queue to grow too deep, or a node may
1935 * end up consuming all of the ath_buf entries.
1937 * For now, only do this for DATA frames.
1939 * We will want to cap how many management/control
1940 * frames get punted to the software queue so it doesn't
1941 * fill up. But the correct solution isn't yet obvious.
1942 * In any case, this check should at least let frames pass
1943 * that we are direct-dispatching.
1945 * XXX TODO: duplicate this to the raw xmit path!
1947 if (type == IEEE80211_FC0_TYPE_DATA &&
1948 ATH_NODE(ni)->an_is_powersave &&
1949 ATH_NODE(ni)->an_swq_depth >
1950 sc->sc_txq_node_psq_maxdepth) {
1951 sc->sc_stats.ast_tx_node_psq_overflow++;
1957 is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1958 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1959 is_ampdu = is_ampdu_tx | is_ampdu_pending;
1961 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1962 __func__, tid, pri, is_ampdu);
1964 /* Set local packet state, used to queue packets to hardware */
1965 bf->bf_state.bfs_tid = tid;
1966 bf->bf_state.bfs_tx_queue = txq->axq_qnum;
1967 bf->bf_state.bfs_pri = pri;
1971 * When servicing one or more stations in power-save mode
1972 * (or) if there is some mcast data waiting on the mcast
1973 * queue (to prevent out of order delivery) multicast frames
1974 * must be bufferd until after the beacon.
1976 * TODO: we should lock the mcastq before we check the length.
1978 if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
1979 txq = &avp->av_mcastq;
1981 * Mark the frame as eventually belonging on the CAB
1982 * queue, so the descriptor setup functions will
1983 * correctly initialise the descriptor 'qcuId' field.
1985 bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
1989 /* Do the generic frame setup */
1990 /* XXX should just bzero the bf_state? */
1991 bf->bf_state.bfs_dobaw = 0;
1993 /* A-MPDU TX? Manually set sequence number */
1995 * Don't do it whilst pending; the net80211 layer still
2000 * Always call; this function will
2001 * handle making sure that null data frames
2002 * don't get a sequence number from the current
2003 * TID and thus mess with the BAW.
2005 seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
2008 * Don't add QoS NULL frames to the BAW.
2010 if (IEEE80211_QOS_HAS_SEQ(wh) &&
2011 subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
2012 bf->bf_state.bfs_dobaw = 1;
2017 * If needed, the sequence number has been assigned.
2018 * Squirrel it away somewhere easy to get to.
2020 bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
2022 /* Is ampdu pending? fetch the seqno and print it out */
2023 if (is_ampdu_pending)
2024 DPRINTF(sc, ATH_DEBUG_SW_TX,
2025 "%s: tid %d: ampdu pending, seqno %d\n",
2026 __func__, tid, M_SEQNO_GET(m0));
2028 /* This also sets up the DMA map */
2029 r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
2034 /* At this point m0 could have changed! */
2039 * If it's a multicast frame, do a direct-dispatch to the
2040 * destination hardware queue. Don't bother software
2044 * If it's a BAR frame, do a direct dispatch to the
2045 * destination hardware queue. Don't bother software
2046 * queuing it, as the TID will now be paused.
2047 * Sending a BAR frame can occur from the net80211 txa timer
2048 * (ie, retries) or from the ath txtask (completion call.)
2049 * It queues directly to hardware because the TID is paused
2050 * at this point (and won't be unpaused until the BAR has
2051 * either been TXed successfully or max retries has been
2055 * Until things are better debugged - if this node is asleep
2056 * and we're sending it a non-BAR frame, direct dispatch it.
2057 * Why? Because we need to figure out what's actually being
2058 * sent - eg, during reassociation/reauthentication after
2059 * the node (last) disappeared whilst asleep, the driver should
2060 * have unpaused/unsleep'ed the node. So until that is
2061 * sorted out, use this workaround.
2063 if (txq == &avp->av_mcastq) {
2064 DPRINTF(sc, ATH_DEBUG_SW_TX,
2065 "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
2066 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2067 ath_tx_xmit_normal(sc, txq, bf);
2068 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2070 ath_tx_swq(sc, ni, txq, queue_to_head, bf);
2072 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2073 ath_tx_xmit_normal(sc, txq, bf);
2077 * For now, since there's no software queue,
2078 * direct-dispatch to the hardware.
2080 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2082 * Update the current leak count if
2083 * we're leaking frames; and set the
2084 * MORE flag as appropriate.
2086 ath_tx_leak_count_update(sc, tid, bf);
2087 ath_tx_xmit_normal(sc, txq, bf);
2094 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2095 struct ath_buf *bf, struct mbuf *m0,
2096 const struct ieee80211_bpf_params *params)
2098 struct ifnet *ifp = sc->sc_ifp;
2099 struct ieee80211com *ic = ifp->if_l2com;
2100 struct ath_hal *ah = sc->sc_ah;
2101 struct ieee80211vap *vap = ni->ni_vap;
2102 int error, ismcast, ismrr;
2103 int keyix, hdrlen, pktlen, try0, txantenna;
2104 u_int8_t rix, txrate;
2105 struct ieee80211_frame *wh;
2108 const HAL_RATE_TABLE *rt;
2109 struct ath_desc *ds;
2113 uint8_t type, subtype;
2116 ATH_TX_LOCK_ASSERT(sc);
2118 wh = mtod(m0, struct ieee80211_frame *);
2119 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2120 hdrlen = ieee80211_anyhdrsize(wh);
2122 * Packet length must not include any
2123 * pad bytes; deduct them here.
2125 /* XXX honor IEEE80211_BPF_DATAPAD */
2126 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2128 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2129 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2131 ATH_KTR(sc, ATH_KTR_TX, 2,
2132 "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
2134 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2137 pri = params->ibp_pri & 3;
2138 /* Override pri if the frame isn't a QoS one */
2139 if (! IEEE80211_QOS_HAS_SEQ(wh))
2140 pri = ath_tx_getac(sc, m0);
2142 /* XXX If it's an ADDBA, override the correct queue */
2143 do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
2145 /* Map ADDBA to the correct priority */
2148 device_printf(sc->sc_dev,
2149 "%s: overriding tid %d pri %d -> %d\n",
2150 __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
2152 pri = TID_TO_WME_AC(o_tid);
2155 /* Handle encryption twiddling if needed */
2156 if (! ath_tx_tag_crypto(sc, ni,
2157 m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2158 &hdrlen, &pktlen, &keyix)) {
2162 /* packet header may have moved, reset our local pointer */
2163 wh = mtod(m0, struct ieee80211_frame *);
2165 /* Do the generic frame setup */
2166 /* XXX should just bzero the bf_state? */
2167 bf->bf_state.bfs_dobaw = 0;
2169 error = ath_tx_dmasetup(sc, bf, m0);
2172 m0 = bf->bf_m; /* NB: may have changed */
2173 wh = mtod(m0, struct ieee80211_frame *);
2174 bf->bf_node = ni; /* NB: held reference */
2176 /* Always enable CLRDMASK for raw frames for now.. */
2177 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
2178 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
2179 if (params->ibp_flags & IEEE80211_BPF_RTS)
2180 flags |= HAL_TXDESC_RTSENA;
2181 else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2182 /* XXX assume 11g/11n protection? */
2183 bf->bf_state.bfs_doprot = 1;
2184 flags |= HAL_TXDESC_CTSENA;
2186 /* XXX leave ismcast to injector? */
2187 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2188 flags |= HAL_TXDESC_NOACK;
2190 rt = sc->sc_currates;
2191 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2192 rix = ath_tx_findrix(sc, params->ibp_rate0);
2193 txrate = rt->info[rix].rateCode;
2194 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2195 txrate |= rt->info[rix].shortPreamble;
2197 try0 = params->ibp_try0;
2198 ismrr = (params->ibp_try1 != 0);
2199 txantenna = params->ibp_pri >> 2;
2200 if (txantenna == 0) /* XXX? */
2201 txantenna = sc->sc_txantenna;
2204 * Since ctsrate is fixed, store it away for later
2205 * use when the descriptor fields are being set.
2207 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2208 bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
2211 * NB: we mark all packets as type PSPOLL so the h/w won't
2212 * set the sequence number, duration, etc.
2214 atype = HAL_PKT_TYPE_PSPOLL;
2216 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2217 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2218 sc->sc_hwmap[rix].ieeerate, -1);
2220 if (ieee80211_radiotap_active_vap(vap)) {
2221 u_int64_t tsf = ath_hal_gettsf64(ah);
2223 sc->sc_tx_th.wt_tsf = htole64(tsf);
2224 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2225 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
2226 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2227 if (m0->m_flags & M_FRAG)
2228 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2229 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
2230 sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
2231 ieee80211_get_node_txpower(ni));
2232 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2234 ieee80211_radiotap_tx(vap, m0);
2238 * Formulate first tx descriptor with tx controls.
2241 /* XXX check return value? */
2243 /* Store the decided rate index values away */
2244 bf->bf_state.bfs_pktlen = pktlen;
2245 bf->bf_state.bfs_hdrlen = hdrlen;
2246 bf->bf_state.bfs_atype = atype;
2247 bf->bf_state.bfs_txpower = MIN(params->ibp_power,
2248 ieee80211_get_node_txpower(ni));
2249 bf->bf_state.bfs_txrate0 = txrate;
2250 bf->bf_state.bfs_try0 = try0;
2251 bf->bf_state.bfs_keyix = keyix;
2252 bf->bf_state.bfs_txantenna = txantenna;
2253 bf->bf_state.bfs_txflags = flags;
2254 bf->bf_state.bfs_shpream =
2255 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2257 /* Set local packet state, used to queue packets to hardware */
2258 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2259 bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
2260 bf->bf_state.bfs_pri = pri;
2262 /* XXX this should be done in ath_tx_setrate() */
2263 bf->bf_state.bfs_ctsrate = 0;
2264 bf->bf_state.bfs_ctsduration = 0;
2265 bf->bf_state.bfs_ismrr = ismrr;
2267 /* Blank the legacy rate array */
2268 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2270 bf->bf_state.bfs_rc[0].rix =
2271 ath_tx_findrix(sc, params->ibp_rate0);
2272 bf->bf_state.bfs_rc[0].tries = try0;
2273 bf->bf_state.bfs_rc[0].ratecode = txrate;
2278 rix = ath_tx_findrix(sc, params->ibp_rate1);
2279 bf->bf_state.bfs_rc[1].rix = rix;
2280 bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2282 rix = ath_tx_findrix(sc, params->ibp_rate2);
2283 bf->bf_state.bfs_rc[2].rix = rix;
2284 bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2286 rix = ath_tx_findrix(sc, params->ibp_rate3);
2287 bf->bf_state.bfs_rc[3].rix = rix;
2288 bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2291 * All the required rate control decisions have been made;
2292 * fill in the rc flags.
2294 ath_tx_rate_fill_rcflags(sc, bf);
2296 /* NB: no buffered multicast in power save support */
2299 * If we're overiding the ADDBA destination, dump directly
2300 * into the hardware queue, right after any pending
2301 * frames to that node are.
2303 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2304 __func__, do_override);
2308 * Put addba frames in the right place in the right TID/HWQ.
2311 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2313 * XXX if it's addba frames, should we be leaking
2314 * them out via the frame leak method?
2315 * XXX for now let's not risk it; but we may wish
2316 * to investigate this later.
2318 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2319 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2321 /* Queue to software queue */
2322 ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
2324 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2325 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2328 /* Direct-dispatch to the hardware */
2329 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2331 * Update the current leak count if
2332 * we're leaking frames; and set the
2333 * MORE flag as appropriate.
2335 ath_tx_leak_count_update(sc, tid, bf);
2336 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2344 * This can be called by net80211.
2347 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2348 const struct ieee80211_bpf_params *params)
2350 struct ieee80211com *ic = ni->ni_ic;
2351 struct ifnet *ifp = ic->ic_ifp;
2352 struct ath_softc *sc = ifp->if_softc;
2354 struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
2358 if (sc->sc_inreset_cnt > 0) {
2359 device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n",
2365 sc->sc_txstart_cnt++;
2370 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
2371 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
2372 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
2373 "!running" : "invalid");
2380 * Enforce how deep the multicast queue can grow.
2382 * XXX duplicated in ath_tx_start().
2384 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2385 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
2386 > sc->sc_txq_mcastq_maxdepth) {
2387 sc->sc_stats.ast_tx_mcastq_overflow++;
2398 * Grab a TX buffer and associated resources.
2400 bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2402 sc->sc_stats.ast_tx_nobuf++;
2407 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
2410 if (params == NULL) {
2412 * Legacy path; interpret frame contents to decide
2413 * precisely how to send the frame.
2415 if (ath_tx_start(sc, ni, bf, m)) {
2416 error = EIO; /* XXX */
2421 * Caller supplied explicit parameters to use in
2422 * sending the frame.
2424 if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2425 error = EIO; /* XXX */
2429 sc->sc_wd_timer = 5;
2431 sc->sc_stats.ast_tx_raw++;
2434 * Update the TIM - if there's anything queued to the
2435 * software queue and power save is enabled, we should
2438 ath_tx_update_tim(sc, ni, 1);
2443 sc->sc_txstart_cnt--;
2448 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
2454 ath_returnbuf_head(sc, bf);
2455 ATH_TXBUF_UNLOCK(sc);
2461 sc->sc_txstart_cnt--;
2464 ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
2467 sc->sc_stats.ast_tx_raw_fail++;
2468 ieee80211_free_node(ni);
2473 /* Some helper functions */
2476 * ADDBA (and potentially others) need to be placed in the same
2477 * hardware queue as the TID/node it's relating to. This is so
2478 * it goes out after any pending non-aggregate frames to the
2481 * If this isn't done, the ADDBA can go out before the frames
2482 * queued in hardware. Even though these frames have a sequence
2483 * number -earlier- than the ADDBA can be transmitted (but
2484 * no frames whose sequence numbers are after the ADDBA should
2485 * be!) they'll arrive after the ADDBA - and the receiving end
2486 * will simply drop them as being out of the BAW.
2488 * The frames can't be appended to the TID software queue - it'll
2489 * never be sent out. So these frames have to be directly
2490 * dispatched to the hardware, rather than queued in software.
2491 * So if this function returns true, the TXQ has to be
2492 * overridden and it has to be directly dispatched.
2494 * It's a dirty hack, but someone's gotta do it.
2498 * XXX doesn't belong here!
2501 ieee80211_is_action(struct ieee80211_frame *wh)
2503 /* Type: Management frame? */
2504 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2505 IEEE80211_FC0_TYPE_MGT)
2508 /* Subtype: Action frame? */
2509 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2510 IEEE80211_FC0_SUBTYPE_ACTION)
2516 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
2518 * Return an alternate TID for ADDBA request frames.
2520 * Yes, this likely should be done in the net80211 layer.
2523 ath_tx_action_frame_override_queue(struct ath_softc *sc,
2524 struct ieee80211_node *ni,
2525 struct mbuf *m0, int *tid)
2527 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2528 struct ieee80211_action_ba_addbarequest *ia;
2530 uint16_t baparamset;
2532 /* Not action frame? Bail */
2533 if (! ieee80211_is_action(wh))
2536 /* XXX Not needed for frames we send? */
2538 /* Correct length? */
2539 if (! ieee80211_parse_action(ni, m))
2543 /* Extract out action frame */
2544 frm = (u_int8_t *)&wh[1];
2545 ia = (struct ieee80211_action_ba_addbarequest *) frm;
2547 /* Not ADDBA? Bail */
2548 if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2550 if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2553 /* Extract TID, return it */
2554 baparamset = le16toh(ia->rq_baparamset);
2555 *tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2561 /* Per-node software queue operations */
2564 * Add the current packet to the given BAW.
2565 * It is assumed that the current packet
2567 * + fits inside the BAW;
2568 * + already has had a sequence number allocated.
2570 * Since the BAW status may be modified by both the ath task and
2571 * the net80211/ifnet contexts, the TID must be locked.
2574 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2575 struct ath_tid *tid, struct ath_buf *bf)
2578 struct ieee80211_tx_ampdu *tap;
2580 ATH_TX_LOCK_ASSERT(sc);
2582 if (bf->bf_state.bfs_isretried)
2585 tap = ath_tx_get_tx_tid(an, tid->tid);
2587 if (! bf->bf_state.bfs_dobaw) {
2588 device_printf(sc->sc_dev,
2589 "%s: dobaw=0, seqno=%d, window %d:%d\n",
2591 SEQNO(bf->bf_state.bfs_seqno),
2596 if (bf->bf_state.bfs_addedbaw)
2597 device_printf(sc->sc_dev,
2598 "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2599 "baw head=%d tail=%d\n",
2600 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2601 tap->txa_start, tap->txa_wnd, tid->baw_head,
2605 * Verify that the given sequence number is not outside of the
2606 * BAW. Complain loudly if that's the case.
2608 if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2609 SEQNO(bf->bf_state.bfs_seqno))) {
2610 device_printf(sc->sc_dev,
2611 "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
2612 "baw head=%d tail=%d\n",
2613 __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2614 tap->txa_start, tap->txa_wnd, tid->baw_head,
2619 * ni->ni_txseqs[] is the currently allocated seqno.
2620 * the txa state contains the current baw start.
2622 index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2623 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2624 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2625 "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2626 "baw head=%d tail=%d\n",
2627 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2628 tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2633 assert(tid->tx_buf[cindex] == NULL);
2635 if (tid->tx_buf[cindex] != NULL) {
2636 device_printf(sc->sc_dev,
2637 "%s: ba packet dup (index=%d, cindex=%d, "
2638 "head=%d, tail=%d)\n",
2639 __func__, index, cindex, tid->baw_head, tid->baw_tail);
2640 device_printf(sc->sc_dev,
2641 "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2643 tid->tx_buf[cindex],
2644 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2646 SEQNO(bf->bf_state.bfs_seqno)
2649 tid->tx_buf[cindex] = bf;
2651 if (index >= ((tid->baw_tail - tid->baw_head) &
2652 (ATH_TID_MAX_BUFS - 1))) {
2653 tid->baw_tail = cindex;
2654 INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2659 * Flip the BAW buffer entry over from the existing one to the new one.
2661 * When software retransmitting a (sub-)frame, it is entirely possible that
2662 * the frame ath_buf is marked as BUSY and can't be immediately reused.
2663 * In that instance the buffer is cloned and the new buffer is used for
2664 * retransmit. We thus need to update the ath_buf slot in the BAW buf
2665 * tracking array to maintain consistency.
2668 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2669 struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2672 struct ieee80211_tx_ampdu *tap;
2673 int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2675 ATH_TX_LOCK_ASSERT(sc);
2677 tap = ath_tx_get_tx_tid(an, tid->tid);
2678 index = ATH_BA_INDEX(tap->txa_start, seqno);
2679 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2682 * Just warn for now; if it happens then we should find out
2683 * about it. It's highly likely the aggregation session will
2686 if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2687 device_printf(sc->sc_dev, "%s: retransmitted buffer"
2688 " has mismatching seqno's, BA session may hang.\n",
2690 device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n",
2692 old_bf->bf_state.bfs_seqno,
2693 new_bf->bf_state.bfs_seqno);
2696 if (tid->tx_buf[cindex] != old_bf) {
2697 device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; "
2698 " has m BA session may hang.\n",
2700 device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n",
2705 tid->tx_buf[cindex] = new_bf;
2709 * seq_start - left edge of BAW
2710 * seq_next - current/next sequence number to allocate
2712 * Since the BAW status may be modified by both the ath task and
2713 * the net80211/ifnet contexts, the TID must be locked.
2716 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2717 struct ath_tid *tid, const struct ath_buf *bf)
2720 struct ieee80211_tx_ampdu *tap;
2721 int seqno = SEQNO(bf->bf_state.bfs_seqno);
2723 ATH_TX_LOCK_ASSERT(sc);
2725 tap = ath_tx_get_tx_tid(an, tid->tid);
2726 index = ATH_BA_INDEX(tap->txa_start, seqno);
2727 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2729 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2730 "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2731 "baw head=%d, tail=%d\n",
2732 __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2733 cindex, tid->baw_head, tid->baw_tail);
2736 * If this occurs then we have a big problem - something else
2737 * has slid tap->txa_start along without updating the BAW
2738 * tracking start/end pointers. Thus the TX BAW state is now
2739 * completely busted.
2741 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2742 * it's quite possible that a cloned buffer is making its way
2743 * here and causing it to fire off. Disable TDMA for now.
2745 if (tid->tx_buf[cindex] != bf) {
2746 device_printf(sc->sc_dev,
2747 "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2749 bf, SEQNO(bf->bf_state.bfs_seqno),
2750 tid->tx_buf[cindex],
2751 (tid->tx_buf[cindex] != NULL) ?
2752 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2755 tid->tx_buf[cindex] = NULL;
2757 while (tid->baw_head != tid->baw_tail &&
2758 !tid->tx_buf[tid->baw_head]) {
2759 INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2760 INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2762 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2763 "%s: baw is now %d:%d, baw head=%d\n",
2764 __func__, tap->txa_start, tap->txa_wnd, tid->baw_head);
2768 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
2771 struct ieee80211_frame *wh;
2773 ATH_TX_LOCK_ASSERT(sc);
2775 if (tid->an->an_leak_count > 0) {
2776 wh = mtod(bf->bf_m, struct ieee80211_frame *);
2779 * Update MORE based on the software/net80211 queue states.
2781 if ((tid->an->an_stack_psq > 0)
2782 || (tid->an->an_swq_depth > 0))
2783 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
2785 wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
2787 DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
2788 "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
2790 tid->an->an_node.ni_macaddr,
2792 tid->an->an_leak_count,
2793 tid->an->an_stack_psq,
2794 tid->an->an_swq_depth,
2795 !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
2798 * Re-sync the underlying buffer.
2800 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2801 BUS_DMASYNC_PREWRITE);
2803 tid->an->an_leak_count --;
2808 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
2811 ATH_TX_LOCK_ASSERT(sc);
2813 if (tid->an->an_leak_count > 0) {
2822 * Mark the current node/TID as ready to TX.
2824 * This is done to make it easy for the software scheduler to
2825 * find which nodes have data to send.
2827 * The TXQ lock must be held.
2830 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2832 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2834 ATH_TX_LOCK_ASSERT(sc);
2837 * If we are leaking out a frame to this destination
2838 * for PS-POLL, ensure that we allow scheduling to
2841 if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2842 return; /* paused, can't schedule yet */
2845 return; /* already scheduled */
2851 * If this is a sleeping node we're leaking to, given
2852 * it a higher priority. This is so bad for QoS it hurts.
2854 if (tid->an->an_leak_count) {
2855 TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
2857 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2862 * We can't do the above - it'll confuse the TXQ software
2863 * scheduler which will keep checking the _head_ TID
2864 * in the list to see if it has traffic. If we queue
2865 * a TID to the head of the list and it doesn't transmit,
2866 * we'll check it again.
2868 * So, get the rest of this leaking frames support working
2869 * and reliable first and _then_ optimise it so they're
2870 * pushed out in front of any other pending software
2873 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2877 * Mark the current node as no longer needing to be polled for
2880 * The TXQ lock must be held.
2883 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2885 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2887 ATH_TX_LOCK_ASSERT(sc);
2889 if (tid->sched == 0)
2893 TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2897 * Assign a sequence number manually to the given frame.
2899 * This should only be called for A-MPDU TX frames.
2901 static ieee80211_seq
2902 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2903 struct ath_buf *bf, struct mbuf *m0)
2905 struct ieee80211_frame *wh;
2907 ieee80211_seq seqno;
2911 wh = mtod(m0, struct ieee80211_frame *);
2912 pri = M_WME_GETAC(m0); /* honor classification */
2913 tid = WME_AC_TO_TID(pri);
2914 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2915 __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2917 /* XXX Is it a control frame? Ignore */
2919 /* Does the packet require a sequence number? */
2920 if (! IEEE80211_QOS_HAS_SEQ(wh))
2923 ATH_TX_LOCK_ASSERT(sc);
2926 * Is it a QOS NULL Data frame? Give it a sequence number from
2927 * the default TID (IEEE80211_NONQOS_TID.)
2929 * The RX path of everything I've looked at doesn't include the NULL
2930 * data frame sequence number in the aggregation state updates, so
2931 * assigning it a sequence number there will cause a BAW hole on the
2934 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2935 if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
2936 /* XXX no locking for this TID? This is a bit of a problem. */
2937 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2938 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2940 /* Manually assign sequence number */
2941 seqno = ni->ni_txseqs[tid];
2942 INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2944 *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2945 M_SEQNO_SET(m0, seqno);
2947 /* Return so caller can do something with it if needed */
2948 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno);
2953 * Attempt to direct dispatch an aggregate frame to hardware.
2954 * If the frame is out of BAW, queue.
2955 * Otherwise, schedule it as a single frame.
2958 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
2959 struct ath_txq *txq, struct ath_buf *bf)
2961 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
2962 struct ieee80211_tx_ampdu *tap;
2964 ATH_TX_LOCK_ASSERT(sc);
2966 tap = ath_tx_get_tx_tid(an, tid->tid);
2969 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
2970 ATH_TID_INSERT_HEAD(tid, bf, bf_list);
2971 /* XXX don't sched - we're paused! */
2975 /* outside baw? queue */
2976 if (bf->bf_state.bfs_dobaw &&
2977 (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2978 SEQNO(bf->bf_state.bfs_seqno)))) {
2979 ATH_TID_INSERT_HEAD(tid, bf, bf_list);
2980 ath_tx_tid_sched(sc, tid);
2985 * This is a temporary check and should be removed once
2986 * all the relevant code paths have been fixed.
2988 * During aggregate retries, it's possible that the head
2989 * frame will fail (which has the bfs_aggr and bfs_nframes
2990 * fields set for said aggregate) and will be retried as
2991 * a single frame. In this instance, the values should
2992 * be reset or the completion code will get upset with you.
2994 if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
2995 device_printf(sc->sc_dev, "%s: bfs_aggr=%d, bfs_nframes=%d\n",
2997 bf->bf_state.bfs_aggr,
2998 bf->bf_state.bfs_nframes);
2999 bf->bf_state.bfs_aggr = 0;
3000 bf->bf_state.bfs_nframes = 1;
3003 /* Update CLRDMASK just before this frame is queued */
3004 ath_tx_update_clrdmask(sc, tid, bf);
3006 /* Direct dispatch to hardware */
3007 ath_tx_do_ratelookup(sc, bf);
3008 ath_tx_calc_duration(sc, bf);
3009 ath_tx_calc_protection(sc, bf);
3010 ath_tx_set_rtscts(sc, bf);
3011 ath_tx_rate_fill_rcflags(sc, bf);
3012 ath_tx_setds(sc, bf);
3015 sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
3017 /* Track per-TID hardware queue depth correctly */
3021 if (bf->bf_state.bfs_dobaw) {
3022 ath_tx_addto_baw(sc, an, tid, bf);
3023 bf->bf_state.bfs_addedbaw = 1;
3026 /* Set completion handler, multi-frame aggregate or not */
3027 bf->bf_comp = ath_tx_aggr_comp;
3030 * Update the current leak count if
3031 * we're leaking frames; and set the
3032 * MORE flag as appropriate.
3034 ath_tx_leak_count_update(sc, tid, bf);
3036 /* Hand off to hardware */
3037 ath_tx_handoff(sc, txq, bf);
3041 * Attempt to send the packet.
3042 * If the queue isn't busy, direct-dispatch.
3043 * If the queue is busy enough, queue the given packet on the
3044 * relevant software queue.
3047 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
3048 struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3050 struct ath_node *an = ATH_NODE(ni);
3051 struct ieee80211_frame *wh;
3052 struct ath_tid *atid;
3054 struct mbuf *m0 = bf->bf_m;
3056 ATH_TX_LOCK_ASSERT(sc);
3058 /* Fetch the TID - non-QoS frames get assigned to TID 16 */
3059 wh = mtod(m0, struct ieee80211_frame *);
3060 pri = ath_tx_getac(sc, m0);
3061 tid = ath_tx_gettid(sc, m0);
3062 atid = &an->an_tid[tid];
3064 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3065 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3067 /* Set local packet state, used to queue packets to hardware */
3068 /* XXX potentially duplicate info, re-check */
3069 bf->bf_state.bfs_tid = tid;
3070 bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3071 bf->bf_state.bfs_pri = pri;
3074 * If the hardware queue isn't busy, queue it directly.
3075 * If the hardware queue is busy, queue it.
3076 * If the TID is paused or the traffic it outside BAW, software
3079 * If the node is in power-save and we're leaking a frame,
3080 * leak a single frame.
3082 if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3083 /* TID is paused, queue */
3084 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
3086 * If the caller requested that it be sent at a high
3087 * priority, queue it at the head of the list.
3090 ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3092 ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3093 } else if (ath_tx_ampdu_pending(sc, an, tid)) {
3094 /* AMPDU pending; queue */
3095 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
3096 ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3098 } else if (ath_tx_ampdu_running(sc, an, tid)) {
3099 /* AMPDU running, attempt direct dispatch if possible */
3102 * Always queue the frame to the tail of the list.
3104 ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3107 * If the hardware queue isn't busy, direct dispatch
3108 * the head frame in the list. Don't schedule the
3109 * TID - let it build some more frames first?
3111 * Otherwise, schedule the TID.
3113 if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit) {
3114 bf = ATH_TID_FIRST(atid);
3115 ATH_TID_REMOVE(atid, bf, bf_list);
3118 * Ensure it's definitely treated as a non-AMPDU
3119 * frame - this information may have been left
3120 * over from a previous attempt.
3122 bf->bf_state.bfs_aggr = 0;
3123 bf->bf_state.bfs_nframes = 1;
3125 /* Queue to the hardware */
3126 ath_tx_xmit_aggr(sc, an, txq, bf);
3127 DPRINTF(sc, ATH_DEBUG_SW_TX,
3131 DPRINTF(sc, ATH_DEBUG_SW_TX,
3132 "%s: ampdu; swq'ing\n",
3135 ath_tx_tid_sched(sc, atid);
3137 } else if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit) {
3138 /* AMPDU not running, attempt direct dispatch */
3139 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
3140 /* See if clrdmask needs to be set */
3141 ath_tx_update_clrdmask(sc, atid, bf);
3144 * Update the current leak count if
3145 * we're leaking frames; and set the
3146 * MORE flag as appropriate.
3148 ath_tx_leak_count_update(sc, atid, bf);
3151 * Dispatch the frame.
3153 ath_tx_xmit_normal(sc, txq, bf);
3156 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
3157 ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3158 ath_tx_tid_sched(sc, atid);
3163 * Only set the clrdmask bit if none of the nodes are currently
3166 * XXX TODO: go through all the callers and check to see
3167 * which are being called in the context of looping over all
3168 * TIDs (eg, if all tids are being paused, resumed, etc.)
3169 * That'll avoid O(n^2) complexity here.
3172 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
3176 ATH_TX_LOCK_ASSERT(sc);
3178 for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3179 if (an->an_tid[i].isfiltered == 1)
3186 * Configure the per-TID node state.
3188 * This likely belongs in if_ath_node.c but I can't think of anywhere
3189 * else to put it just yet.
3191 * This sets up the SLISTs and the mutex as appropriate.
3194 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3197 struct ath_tid *atid;
3199 for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3200 atid = &an->an_tid[i];
3202 /* XXX now with this bzer(), is the field 0'ing needed? */
3203 bzero(atid, sizeof(*atid));
3205 TAILQ_INIT(&atid->tid_q);
3206 TAILQ_INIT(&atid->filtq.tid_q);
3209 for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3210 atid->tx_buf[j] = NULL;
3211 atid->baw_head = atid->baw_tail = 0;
3214 atid->hwq_depth = 0;
3215 atid->cleanup_inprogress = 0;
3216 if (i == IEEE80211_NONQOS_TID)
3217 atid->ac = ATH_NONQOS_TID_AC;
3219 atid->ac = TID_TO_WME_AC(i);
3221 an->clrdmask = 1; /* Always start by setting this bit */
3225 * Pause the current TID. This stops packets from being transmitted
3228 * Since this is also called from upper layers as well as the driver,
3229 * it will get the TID lock.
3232 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3235 ATH_TX_LOCK_ASSERT(sc);
3237 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n",
3238 __func__, tid->paused);
3242 * Unpause the current TID, and schedule it if needed.
3245 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3247 ATH_TX_LOCK_ASSERT(sc);
3250 * There's some odd places where ath_tx_tid_resume() is called
3251 * when it shouldn't be; this works around that particular issue
3252 * until it's actually resolved.
3254 if (tid->paused == 0) {
3255 device_printf(sc->sc_dev, "%s: %6D: paused=0?\n",
3257 tid->an->an_node.ni_macaddr,
3263 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n",
3264 __func__, tid->paused);
3270 * Override the clrdmask configuration for the next frame
3271 * from this TID, just to get the ball rolling.
3273 ath_tx_set_clrdmask(sc, tid->an);
3275 if (tid->axq_depth == 0)
3278 /* XXX isfiltered shouldn't ever be 0 at this point */
3279 if (tid->isfiltered == 1) {
3280 device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
3284 ath_tx_tid_sched(sc, tid);
3287 * Queue the software TX scheduler.
3289 ath_tx_swq_kick(sc);
3293 * Add the given ath_buf to the TID filtered frame list.
3294 * This requires the TID be filtered.
3297 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3301 ATH_TX_LOCK_ASSERT(sc);
3303 if (! tid->isfiltered)
3304 device_printf(sc->sc_dev, "%s: not filtered?!\n", __func__);
3306 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3308 /* Set the retry bit and bump the retry counter */
3309 ath_tx_set_retry(sc, bf);
3310 sc->sc_stats.ast_tx_swfiltered++;
3312 ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3316 * Handle a completed filtered frame from the given TID.
3317 * This just enables/pauses the filtered frame state if required
3318 * and appends the filtered frame to the filtered queue.
3321 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3325 ATH_TX_LOCK_ASSERT(sc);
3327 if (! tid->isfiltered) {
3328 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: filter transition\n",
3330 tid->isfiltered = 1;
3331 ath_tx_tid_pause(sc, tid);
3334 /* Add the frame to the filter queue */
3335 ath_tx_tid_filt_addbuf(sc, tid, bf);
3339 * Complete the filtered frame TX completion.
3341 * If there are no more frames in the hardware queue, unpause/unfilter
3342 * the TID if applicable. Otherwise we will wait for a node PS transition
3346 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3350 ATH_TX_LOCK_ASSERT(sc);
3352 if (tid->hwq_depth != 0)
3355 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: hwq=0, transition back\n",
3357 tid->isfiltered = 0;
3358 /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
3359 ath_tx_set_clrdmask(sc, tid->an);
3361 /* XXX this is really quite inefficient */
3362 while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
3363 ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3364 ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3367 ath_tx_tid_resume(sc, tid);
3371 * Called when a single (aggregate or otherwise) frame is completed.
3373 * Returns 1 if the buffer could be added to the filtered list
3374 * (cloned or otherwise), 0 if the buffer couldn't be added to the
3375 * filtered list (failed clone; expired retry) and the caller should
3376 * free it and handle it like a failure (eg by sending a BAR.)
3379 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3382 struct ath_buf *nbf;
3385 ATH_TX_LOCK_ASSERT(sc);
3388 * Don't allow a filtered frame to live forever.
3390 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3391 sc->sc_stats.ast_tx_swretrymax++;
3392 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3393 "%s: bf=%p, seqno=%d, exceeded retries\n",
3396 bf->bf_state.bfs_seqno);
3401 * A busy buffer can't be added to the retry list.
3402 * It needs to be cloned.
3404 if (bf->bf_flags & ATH_BUF_BUSY) {
3405 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3406 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3407 "%s: busy buffer clone: %p -> %p\n",
3414 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3415 "%s: busy buffer couldn't be cloned (%p)!\n",
3419 ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3422 ath_tx_tid_filt_comp_complete(sc, tid);
3428 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3429 struct ath_buf *bf_first, ath_bufhead *bf_q)
3431 struct ath_buf *bf, *bf_next, *nbf;
3433 ATH_TX_LOCK_ASSERT(sc);
3437 bf_next = bf->bf_next;
3438 bf->bf_next = NULL; /* Remove it from the aggr list */
3441 * Don't allow a filtered frame to live forever.
3443 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3444 sc->sc_stats.ast_tx_swretrymax++;
3445 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3446 "%s: bf=%p, seqno=%d, exceeded retries\n",
3449 bf->bf_state.bfs_seqno);
3450 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3454 if (bf->bf_flags & ATH_BUF_BUSY) {
3455 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3456 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3457 "%s: busy buffer cloned: %p -> %p",
3464 * If the buffer couldn't be cloned, add it to bf_q;
3465 * the caller will free the buffer(s) as required.
3468 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3469 "%s: buffer couldn't be cloned! (%p)\n",
3471 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3473 ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3479 ath_tx_tid_filt_comp_complete(sc, tid);
3483 * Suspend the queue because we need to TX a BAR.
3486 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
3489 ATH_TX_LOCK_ASSERT(sc);
3491 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3492 "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n",
3498 /* We shouldn't be called when bar_tx is 1 */
3500 device_printf(sc->sc_dev, "%s: bar_tx is 1?!\n",
3504 /* If we've already been called, just be patient. */
3511 /* Only one pause, no matter how many frames fail */
3512 ath_tx_tid_pause(sc, tid);
3516 * We've finished with BAR handling - either we succeeded or
3517 * failed. Either way, unsuspend TX.
3520 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
3523 ATH_TX_LOCK_ASSERT(sc);
3525 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3526 "%s: %6D: TID=%d, called\n",
3528 tid->an->an_node.ni_macaddr,
3532 if (tid->bar_tx == 0 || tid->bar_wait == 0) {
3533 device_printf(sc->sc_dev,
3534 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3536 tid->an->an_node.ni_macaddr,
3543 tid->bar_tx = tid->bar_wait = 0;
3544 ath_tx_tid_resume(sc, tid);
3548 * Return whether we're ready to TX a BAR frame.
3550 * Requires the TID lock be held.
3553 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
3556 ATH_TX_LOCK_ASSERT(sc);
3558 if (tid->bar_wait == 0 || tid->hwq_depth > 0)
3561 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3562 "%s: %6D: TID=%d, bar ready\n",
3564 tid->an->an_node.ni_macaddr,
3572 * Check whether the current TID is ready to have a BAR
3573 * TXed and if so, do the TX.
3575 * Since the TID/TXQ lock can't be held during a call to
3576 * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
3577 * sending the BAR and locking it again.
3579 * Eventually, the code to send the BAR should be broken out
3580 * from this routine so the lock doesn't have to be reacquired
3581 * just to be immediately dropped by the caller.
3584 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
3586 struct ieee80211_tx_ampdu *tap;
3588 ATH_TX_LOCK_ASSERT(sc);
3590 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3591 "%s: %6D: TID=%d, called\n",
3593 tid->an->an_node.ni_macaddr,
3597 tap = ath_tx_get_tx_tid(tid->an, tid->tid);
3600 * This is an error condition!
3602 if (tid->bar_wait == 0 || tid->bar_tx == 1) {
3603 device_printf(sc->sc_dev,
3604 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3606 tid->an->an_node.ni_macaddr,
3614 /* Don't do anything if we still have pending frames */
3615 if (tid->hwq_depth > 0) {
3616 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3617 "%s: %6D: TID=%d, hwq_depth=%d, waiting\n",
3619 tid->an->an_node.ni_macaddr,
3626 /* We're now about to TX */
3630 * Override the clrdmask configuration for the next frame,
3631 * just to get the ball rolling.
3633 ath_tx_set_clrdmask(sc, tid->an);
3636 * Calculate new BAW left edge, now that all frames have either
3637 * succeeded or failed.
3639 * XXX verify this is _actually_ the valid value to begin at!
3641 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3642 "%s: %6D: TID=%d, new BAW left edge=%d\n",
3644 tid->an->an_node.ni_macaddr,
3649 /* Try sending the BAR frame */
3650 /* We can't hold the lock here! */
3653 if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
3654 /* Success? Now we wait for notification that it's done */
3659 /* Failure? For now, warn loudly and continue */
3661 device_printf(sc->sc_dev,
3662 "%s: %6D: TID=%d, failed to TX BAR, continue!\n",
3664 tid->an->an_node.ni_macaddr,
3667 ath_tx_tid_bar_unsuspend(sc, tid);
3671 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3672 struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3675 ATH_TX_LOCK_ASSERT(sc);
3678 * If the current TID is running AMPDU, update
3681 if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3682 bf->bf_state.bfs_dobaw) {
3684 * Only remove the frame from the BAW if it's
3685 * been transmitted at least once; this means
3686 * the frame was in the BAW to begin with.
3688 if (bf->bf_state.bfs_retries > 0) {
3689 ath_tx_update_baw(sc, an, tid, bf);
3690 bf->bf_state.bfs_dobaw = 0;
3694 * This has become a non-fatal error now
3696 if (! bf->bf_state.bfs_addedbaw)
3697 device_printf(sc->sc_dev,
3698 "%s: wasn't added: seqno %d\n",
3699 __func__, SEQNO(bf->bf_state.bfs_seqno));
3703 /* Strip it out of an aggregate list if it was in one */
3706 /* Insert on the free queue to be freed by the caller */
3707 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3711 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
3712 const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3714 struct ieee80211_node *ni = &an->an_node;
3715 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3716 struct ieee80211_tx_ampdu *tap;
3718 tap = ath_tx_get_tx_tid(an, tid->tid);
3720 device_printf(sc->sc_dev,
3721 "%s: %s: node %p: bf=%p: addbaw=%d, dobaw=%d, "
3722 "seqno=%d, retry=%d\n",
3723 __func__, pfx, ni, bf,
3724 bf->bf_state.bfs_addedbaw,
3725 bf->bf_state.bfs_dobaw,
3726 SEQNO(bf->bf_state.bfs_seqno),
3727 bf->bf_state.bfs_retries);
3728 device_printf(sc->sc_dev,
3729 "%s: node %p: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
3733 txq->axq_aggr_depth);
3735 device_printf(sc->sc_dev,
3736 "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, isfiltered=%d\n",
3742 device_printf(sc->sc_dev,
3743 "%s: node %p: tid %d: "
3744 "sched=%d, paused=%d, "
3745 "incomp=%d, baw_head=%d, "
3746 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3747 __func__, ni, tid->tid,
3748 tid->sched, tid->paused,
3749 tid->incomp, tid->baw_head,
3750 tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3751 ni->ni_txseqs[tid->tid]);
3753 /* XXX Dump the frame, see what it is? */
3754 ieee80211_dump_pkt(ni->ni_ic,
3755 mtod(bf->bf_m, const uint8_t *),
3756 bf->bf_m->m_len, 0, -1);
3760 * Free any packets currently pending in the software TX queue.
3762 * This will be called when a node is being deleted.
3764 * It can also be called on an active node during an interface
3765 * reset or state transition.
3767 * (From Linux/reference):
3769 * TODO: For frame(s) that are in the retry state, we will reuse the
3770 * sequence number(s) without setting the retry bit. The
3771 * alternative is to give up on these and BAR the receiver's window
3775 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3776 struct ath_tid *tid, ath_bufhead *bf_cq)
3779 struct ieee80211_tx_ampdu *tap;
3780 struct ieee80211_node *ni = &an->an_node;
3783 tap = ath_tx_get_tx_tid(an, tid->tid);
3785 ATH_TX_LOCK_ASSERT(sc);
3787 /* Walk the queue, free frames */
3790 bf = ATH_TID_FIRST(tid);
3796 ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3800 ATH_TID_REMOVE(tid, bf, bf_list);
3801 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3804 /* And now, drain the filtered frame queue */
3807 bf = ATH_TID_FILT_FIRST(tid);
3812 ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3816 ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3817 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3821 * Override the clrdmask configuration for the next frame
3822 * in case there is some future transmission, just to get
3825 * This won't hurt things if the TID is about to be freed.
3827 ath_tx_set_clrdmask(sc, tid->an);
3830 * Now that it's completed, grab the TID lock and update
3831 * the sequence number and BAW window.
3832 * Because sequence numbers have been assigned to frames
3833 * that haven't been sent yet, it's entirely possible
3834 * we'll be called with some pending frames that have not
3837 * The cleaner solution is to do the sequence number allocation
3838 * when the packet is first transmitted - and thus the "retries"
3839 * check above would be enough to update the BAW/seqno.
3842 /* But don't do it for non-QoS TIDs */
3845 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3846 "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
3854 ni->ni_txseqs[tid->tid] = tap->txa_start;
3855 tid->baw_tail = tid->baw_head;
3860 * Reset the TID state. This must be only called once the node has
3861 * had its frames flushed from this TID, to ensure that no other
3862 * pause / unpause logic can kick in.
3865 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
3869 tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
3870 tid->paused = tid->sched = tid->addba_tx_pending = 0;
3871 tid->incomp = tid->cleanup_inprogress = 0;
3875 * If we have a bar_wait set, we need to unpause the TID
3876 * here. Otherwise once cleanup has finished, the TID won't
3877 * have the right paused counter.
3879 * XXX I'm not going through resume here - I don't want the
3880 * node to be rescheuled just yet. This however should be
3883 if (tid->bar_wait) {
3884 if (tid->paused > 0) {
3890 * XXX same with a currently filtered TID.
3892 * Since this is being called during a flush, we assume that
3893 * the filtered frame list is actually empty.
3895 * XXX TODO: add in a check to ensure that the filtered queue
3896 * depth is actually 0!
3898 if (tid->isfiltered) {
3899 if (tid->paused > 0) {
3905 * Clear BAR, filtered frames, scheduled and ADDBA pending.
3906 * The TID may be going through cleanup from the last association
3907 * where things in the BAW are still in the hardware queue.
3911 tid->isfiltered = 0;
3913 tid->addba_tx_pending = 0;
3916 * XXX TODO: it may just be enough to walk the HWQs and mark
3917 * frames for that node as non-aggregate; or mark the ath_node
3918 * with something that indicates that aggregation is no longer
3919 * occuring. Then we can just toss the BAW complaints and
3920 * do a complete hard reset of state here - no pause, no
3921 * complete counter, etc.
3927 * Flush all software queued packets for the given node.
3929 * This occurs when a completion handler frees the last buffer
3930 * for a node, and the node is thus freed. This causes the node
3931 * to be cleaned up, which ends up calling ath_tx_node_flush.
3934 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
3942 ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
3946 DPRINTF(sc, ATH_DEBUG_NODE,
3947 "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
3948 "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
3950 an->an_node.ni_macaddr,
3952 an->an_is_powersave,
3959 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
3960 struct ath_tid *atid = &an->an_tid[tid];
3963 ath_tx_tid_drain(sc, an, atid, &bf_cq);
3965 /* Remove this tid from the list of active tids */
3966 ath_tx_tid_unsched(sc, atid);
3968 /* Reset the per-TID pause, BAR, etc state */
3969 ath_tx_tid_reset(sc, atid);
3973 * Clear global leak count
3975 an->an_leak_count = 0;
3978 /* Handle completed frames */
3979 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3980 TAILQ_REMOVE(&bf_cq, bf, bf_list);
3981 ath_tx_default_comp(sc, bf, 0);
3986 * Drain all the software TXQs currently with traffic queued.
3989 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
3991 struct ath_tid *tid;
3999 * Iterate over all active tids for the given txq,
4000 * flushing and unsched'ing them
4002 while (! TAILQ_EMPTY(&txq->axq_tidq)) {
4003 tid = TAILQ_FIRST(&txq->axq_tidq);
4004 ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
4005 ath_tx_tid_unsched(sc, tid);
4010 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4011 TAILQ_REMOVE(&bf_cq, bf, bf_list);
4012 ath_tx_default_comp(sc, bf, 0);
4017 * Handle completion of non-aggregate session frames.
4019 * This (currently) doesn't implement software retransmission of
4020 * non-aggregate frames!
4022 * Software retransmission of non-aggregate frames needs to obey
4023 * the strict sequence number ordering, and drop any frames that
4026 * For now, filtered frames and frame transmission will cause
4027 * all kinds of issues. So we don't support them.
4029 * So anyone queuing frames via ath_tx_normal_xmit() or
4030 * ath_tx_hw_queue_norm() must override and set CLRDMASK.
4033 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4035 struct ieee80211_node *ni = bf->bf_node;
4036 struct ath_node *an = ATH_NODE(ni);
4037 int tid = bf->bf_state.bfs_tid;
4038 struct ath_tid *atid = &an->an_tid[tid];
4039 struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4041 /* The TID state is protected behind the TXQ lock */
4044 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4045 __func__, bf, fail, atid->hwq_depth - 1);
4051 * If the frame was filtered, stick it on the filter frame
4052 * queue and complain about it. It shouldn't happen!
4054 if ((ts->ts_status & HAL_TXERR_FILT) ||
4055 (ts->ts_status != 0 && atid->isfiltered)) {
4056 device_printf(sc->sc_dev,
4057 "%s: isfiltered=%d, ts_status=%d: huh?\n",
4061 ath_tx_tid_filt_comp_buf(sc, atid, bf);
4064 if (atid->isfiltered)
4065 device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
4066 if (atid->hwq_depth < 0)
4067 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4068 __func__, atid->hwq_depth);
4071 * If the queue is filtered, potentially mark it as complete
4072 * and reschedule it as needed.
4074 * This is required as there may be a subsequent TX descriptor
4075 * for this end-node that has CLRDMASK set, so it's quite possible
4076 * that a filtered frame will be followed by a non-filtered
4077 * (complete or otherwise) frame.
4079 * XXX should we do this before we complete the frame?
4081 if (atid->isfiltered)
4082 ath_tx_tid_filt_comp_complete(sc, atid);
4086 * punt to rate control if we're not being cleaned up
4087 * during a hw queue drain and the frame wanted an ACK.
4089 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4090 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4091 ts, bf->bf_state.bfs_pktlen,
4092 1, (ts->ts_status == 0) ? 0 : 1);
4094 ath_tx_default_comp(sc, bf, fail);
4098 * Handle cleanup of aggregate session packets that aren't
4101 * There's no need to update the BAW here - the session is being
4105 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4107 struct ieee80211_node *ni = bf->bf_node;
4108 struct ath_node *an = ATH_NODE(ni);
4109 int tid = bf->bf_state.bfs_tid;
4110 struct ath_tid *atid = &an->an_tid[tid];
4112 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4113 __func__, tid, atid->incomp);
4117 if (atid->incomp == 0) {
4118 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4119 "%s: TID %d: cleaned up! resume!\n",
4121 atid->cleanup_inprogress = 0;
4122 ath_tx_tid_resume(sc, atid);
4126 ath_tx_default_comp(sc, bf, 0);
4130 * Performs transmit side cleanup when TID changes from aggregated to
4133 * - Discard all retry frames from the s/w queue.
4134 * - Fix the tx completion function for all buffers in s/w queue.
4135 * - Count the number of unacked frames, and let transmit completion
4138 * The caller is responsible for pausing the TID.
4141 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
4144 struct ath_tid *atid = &an->an_tid[tid];
4145 struct ieee80211_tx_ampdu *tap;
4146 struct ath_buf *bf, *bf_next;
4148 ATH_TX_LOCK_ASSERT(sc);
4150 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4151 "%s: TID %d: called\n", __func__, tid);
4154 * Move the filtered frames to the TX queue, before
4155 * we run off and discard/process things.
4157 /* XXX this is really quite inefficient */
4158 while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
4159 ATH_TID_FILT_REMOVE(atid, bf, bf_list);
4160 ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4164 * Update the frames in the software TX queue:
4166 * + Discard retry frames in the queue
4167 * + Fix the completion function to be non-aggregate
4169 bf = ATH_TID_FIRST(atid);
4171 if (bf->bf_state.bfs_isretried) {
4172 bf_next = TAILQ_NEXT(bf, bf_list);
4173 ATH_TID_REMOVE(atid, bf, bf_list);
4174 if (bf->bf_state.bfs_dobaw) {
4175 ath_tx_update_baw(sc, an, atid, bf);
4176 if (! bf->bf_state.bfs_addedbaw)
4177 device_printf(sc->sc_dev,
4178 "%s: wasn't added: seqno %d\n",
4180 SEQNO(bf->bf_state.bfs_seqno));
4182 bf->bf_state.bfs_dobaw = 0;
4184 * Call the default completion handler with "fail" just
4185 * so upper levels are suitably notified about this.
4187 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4191 /* Give these the default completion handler */
4192 bf->bf_comp = ath_tx_normal_comp;
4193 bf = TAILQ_NEXT(bf, bf_list);
4196 /* The caller is required to pause the TID */
4199 ath_tx_tid_pause(sc, atid);
4203 * Calculate what hardware-queued frames exist based
4204 * on the current BAW size. Ie, what frames have been
4205 * added to the TX hardware queue for this TID but
4208 tap = ath_tx_get_tx_tid(an, tid);
4209 /* Need the lock - fiddling with BAW */
4210 while (atid->baw_head != atid->baw_tail) {
4211 if (atid->tx_buf[atid->baw_head]) {
4213 atid->cleanup_inprogress = 1;
4214 atid->tx_buf[atid->baw_head] = NULL;
4216 INCR(atid->baw_head, ATH_TID_MAX_BUFS);
4217 INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
4221 * If cleanup is required, defer TID scheduling
4222 * until all the HW queued packets have been
4225 if (! atid->cleanup_inprogress)
4226 ath_tx_tid_resume(sc, atid);
4228 if (atid->cleanup_inprogress)
4229 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4230 "%s: TID %d: cleanup needed: %d packets\n",
4231 __func__, tid, atid->incomp);
4233 /* Owner now must free completed frames */
4236 static struct ath_buf *
4237 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
4238 struct ath_tid *tid, struct ath_buf *bf)
4240 struct ath_buf *nbf;
4244 * Clone the buffer. This will handle the dma unmap and
4245 * copy the node reference to the new buffer. If this
4246 * works out, 'bf' will have no DMA mapping, no mbuf
4247 * pointer and no node reference.
4249 nbf = ath_buf_clone(sc, bf);
4252 device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n",
4257 /* Failed to clone */
4258 device_printf(sc->sc_dev,
4259 "%s: failed to clone a busy buffer\n",
4264 /* Setup the dma for the new buffer */
4265 error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4267 device_printf(sc->sc_dev,
4268 "%s: failed to setup dma for clone\n",
4271 * Put this at the head of the list, not tail;
4272 * that way it doesn't interfere with the
4273 * busy buffer logic (which uses the tail of
4277 ath_returnbuf_head(sc, nbf);
4278 ATH_TXBUF_UNLOCK(sc);
4282 /* Update BAW if required, before we free the original buf */
4283 if (bf->bf_state.bfs_dobaw)
4284 ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
4286 /* Free original buffer; return new buffer */
4287 ath_freebuf(sc, bf);
4293 * Handle retrying an unaggregate frame in an aggregate
4296 * If too many retries occur, pause the TID, wait for
4297 * any further retransmits (as there's no reason why
4298 * non-aggregate frames in an aggregate session are
4299 * transmitted in-order; they just have to be in-BAW)
4300 * and then queue a BAR.
4303 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4305 struct ieee80211_node *ni = bf->bf_node;
4306 struct ath_node *an = ATH_NODE(ni);
4307 int tid = bf->bf_state.bfs_tid;
4308 struct ath_tid *atid = &an->an_tid[tid];
4309 struct ieee80211_tx_ampdu *tap;
4313 tap = ath_tx_get_tx_tid(an, tid);
4316 * If the buffer is marked as busy, we can't directly
4317 * reuse it. Instead, try to clone the buffer.
4318 * If the clone is successful, recycle the old buffer.
4319 * If the clone is unsuccessful, set bfs_retries to max
4320 * to force the next bit of code to free the buffer
4323 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4324 (bf->bf_flags & ATH_BUF_BUSY)) {
4325 struct ath_buf *nbf;
4326 nbf = ath_tx_retry_clone(sc, an, atid, bf);
4328 /* bf has been freed at this point */
4331 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4334 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4335 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4336 "%s: exceeded retries; seqno %d\n",
4337 __func__, SEQNO(bf->bf_state.bfs_seqno));
4338 sc->sc_stats.ast_tx_swretrymax++;
4340 /* Update BAW anyway */
4341 if (bf->bf_state.bfs_dobaw) {
4342 ath_tx_update_baw(sc, an, atid, bf);
4343 if (! bf->bf_state.bfs_addedbaw)
4344 device_printf(sc->sc_dev,
4345 "%s: wasn't added: seqno %d\n",
4346 __func__, SEQNO(bf->bf_state.bfs_seqno));
4348 bf->bf_state.bfs_dobaw = 0;
4350 /* Suspend the TX queue and get ready to send the BAR */
4351 ath_tx_tid_bar_suspend(sc, atid);
4353 /* Send the BAR if there are no other frames waiting */
4354 if (ath_tx_tid_bar_tx_ready(sc, atid))
4355 ath_tx_tid_bar_tx(sc, atid);
4359 /* Free buffer, bf is free after this call */
4360 ath_tx_default_comp(sc, bf, 0);
4365 * This increments the retry counter as well as
4366 * sets the retry flag in the ath_buf and packet
4369 ath_tx_set_retry(sc, bf);
4370 sc->sc_stats.ast_tx_swretries++;
4373 * Insert this at the head of the queue, so it's
4374 * retried before any current/subsequent frames.
4376 ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4377 ath_tx_tid_sched(sc, atid);
4378 /* Send the BAR if there are no other frames waiting */
4379 if (ath_tx_tid_bar_tx_ready(sc, atid))
4380 ath_tx_tid_bar_tx(sc, atid);
4386 * Common code for aggregate excessive retry/subframe retry.
4387 * If retrying, queues buffers to bf_q. If not, frees the
4390 * XXX should unify this with ath_tx_aggr_retry_unaggr()
4393 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4396 struct ieee80211_node *ni = bf->bf_node;
4397 struct ath_node *an = ATH_NODE(ni);
4398 int tid = bf->bf_state.bfs_tid;
4399 struct ath_tid *atid = &an->an_tid[tid];
4401 ATH_TX_LOCK_ASSERT(sc);
4403 /* XXX clr11naggr should be done for all subframes */
4404 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4405 ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4407 /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4410 * If the buffer is marked as busy, we can't directly
4411 * reuse it. Instead, try to clone the buffer.
4412 * If the clone is successful, recycle the old buffer.
4413 * If the clone is unsuccessful, set bfs_retries to max
4414 * to force the next bit of code to free the buffer
4417 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4418 (bf->bf_flags & ATH_BUF_BUSY)) {
4419 struct ath_buf *nbf;
4420 nbf = ath_tx_retry_clone(sc, an, atid, bf);
4422 /* bf has been freed at this point */
4425 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4428 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4429 sc->sc_stats.ast_tx_swretrymax++;
4430 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4431 "%s: max retries: seqno %d\n",
4432 __func__, SEQNO(bf->bf_state.bfs_seqno));
4433 ath_tx_update_baw(sc, an, atid, bf);
4434 if (! bf->bf_state.bfs_addedbaw)
4435 device_printf(sc->sc_dev,
4436 "%s: wasn't added: seqno %d\n",
4437 __func__, SEQNO(bf->bf_state.bfs_seqno));
4438 bf->bf_state.bfs_dobaw = 0;
4442 ath_tx_set_retry(sc, bf);
4443 sc->sc_stats.ast_tx_swretries++;
4444 bf->bf_next = NULL; /* Just to make sure */
4446 /* Clear the aggregate state */
4447 bf->bf_state.bfs_aggr = 0;
4448 bf->bf_state.bfs_ndelim = 0; /* ??? needed? */
4449 bf->bf_state.bfs_nframes = 1;
4451 TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4456 * error pkt completion for an aggregate destination
4459 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4460 struct ath_tid *tid)
4462 struct ieee80211_node *ni = bf_first->bf_node;
4463 struct ath_node *an = ATH_NODE(ni);
4464 struct ath_buf *bf_next, *bf;
4467 struct ieee80211_tx_ampdu *tap;
4474 * Update rate control - all frames have failed.
4476 * XXX use the length in the first frame in the series;
4477 * XXX just so things are consistent for now.
4479 ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4480 &bf_first->bf_status.ds_txstat,
4481 bf_first->bf_state.bfs_pktlen,
4482 bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4485 tap = ath_tx_get_tx_tid(an, tid->tid);
4486 sc->sc_stats.ast_tx_aggr_failall++;
4488 /* Retry all subframes */
4491 bf_next = bf->bf_next;
4492 bf->bf_next = NULL; /* Remove it from the aggr list */
4493 sc->sc_stats.ast_tx_aggr_fail++;
4494 if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4497 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4502 /* Prepend all frames to the beginning of the queue */
4503 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4504 TAILQ_REMOVE(&bf_q, bf, bf_list);
4505 ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4509 * Schedule the TID to be re-tried.
4511 ath_tx_tid_sched(sc, tid);
4514 * send bar if we dropped any frames
4516 * Keep the txq lock held for now, as we need to ensure
4517 * that ni_txseqs[] is consistent (as it's being updated
4518 * in the ifnet TX context or raw TX context.)
4521 /* Suspend the TX queue and get ready to send the BAR */
4522 ath_tx_tid_bar_suspend(sc, tid);
4526 * Send BAR if required
4528 if (ath_tx_tid_bar_tx_ready(sc, tid))
4529 ath_tx_tid_bar_tx(sc, tid);
4533 /* Complete frames which errored out */
4534 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4535 TAILQ_REMOVE(&bf_cq, bf, bf_list);
4536 ath_tx_default_comp(sc, bf, 0);
4541 * Handle clean-up of packets from an aggregate list.
4543 * There's no need to update the BAW here - the session is being
4547 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4549 struct ath_buf *bf, *bf_next;
4550 struct ieee80211_node *ni = bf_first->bf_node;
4551 struct ath_node *an = ATH_NODE(ni);
4552 int tid = bf_first->bf_state.bfs_tid;
4553 struct ath_tid *atid = &an->an_tid[tid];
4564 if (atid->incomp == 0) {
4565 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4566 "%s: TID %d: cleaned up! resume!\n",
4568 atid->cleanup_inprogress = 0;
4569 ath_tx_tid_resume(sc, atid);
4572 /* Send BAR if required */
4573 /* XXX why would we send a BAR when transitioning to non-aggregation? */
4575 * XXX TODO: we should likely just tear down the BAR state here,
4576 * rather than sending a BAR.
4578 if (ath_tx_tid_bar_tx_ready(sc, atid))
4579 ath_tx_tid_bar_tx(sc, atid);
4583 /* Handle frame completion */
4586 bf_next = bf->bf_next;
4587 ath_tx_default_comp(sc, bf, 1);
4593 * Handle completion of an set of aggregate frames.
4595 * Note: the completion handler is the last descriptor in the aggregate,
4596 * not the last descriptor in the first frame.
4599 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4602 //struct ath_desc *ds = bf->bf_lastds;
4603 struct ieee80211_node *ni = bf_first->bf_node;
4604 struct ath_node *an = ATH_NODE(ni);
4605 int tid = bf_first->bf_state.bfs_tid;
4606 struct ath_tid *atid = &an->an_tid[tid];
4607 struct ath_tx_status ts;
4608 struct ieee80211_tx_ampdu *tap;
4614 struct ath_buf *bf, *bf_next;
4617 int nframes = 0, nbad = 0, nf;
4619 /* XXX there's too much on the stack? */
4620 struct ath_rc_series rc[ATH_RC_NUM];
4623 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4624 __func__, atid->hwq_depth);
4627 * Take a copy; this may be needed -after- bf_first
4628 * has been completed and freed.
4630 ts = bf_first->bf_status.ds_txstat;
4635 /* The TID state is kept behind the TXQ lock */
4639 if (atid->hwq_depth < 0)
4640 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4641 __func__, atid->hwq_depth);
4644 * If the TID is filtered, handle completing the filter
4645 * transition before potentially kicking it to the cleanup
4648 * XXX this is duplicate work, ew.
4650 if (atid->isfiltered)
4651 ath_tx_tid_filt_comp_complete(sc, atid);
4654 * Punt cleanup to the relevant function, not our problem now
4656 if (atid->cleanup_inprogress) {
4657 if (atid->isfiltered)
4658 device_printf(sc->sc_dev,
4659 "%s: isfiltered=1, normal_comp?\n",
4662 ath_tx_comp_cleanup_aggr(sc, bf_first);
4667 * If the frame is filtered, transition to filtered frame
4668 * mode and add this to the filtered frame list.
4670 * XXX TODO: figure out how this interoperates with
4671 * BAR, pause and cleanup states.
4673 if ((ts.ts_status & HAL_TXERR_FILT) ||
4674 (ts.ts_status != 0 && atid->isfiltered)) {
4676 device_printf(sc->sc_dev,
4677 "%s: isfiltered=1, fail=%d\n", __func__, fail);
4678 ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4680 /* Remove from BAW */
4681 TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4682 if (bf->bf_state.bfs_addedbaw)
4684 if (bf->bf_state.bfs_dobaw) {
4685 ath_tx_update_baw(sc, an, atid, bf);
4686 if (! bf->bf_state.bfs_addedbaw)
4687 device_printf(sc->sc_dev,
4688 "%s: wasn't added: seqno %d\n",
4690 SEQNO(bf->bf_state.bfs_seqno));
4692 bf->bf_state.bfs_dobaw = 0;
4695 * If any intermediate frames in the BAW were dropped when
4696 * handling filtering things, send a BAR.
4699 ath_tx_tid_bar_suspend(sc, atid);
4702 * Finish up by sending a BAR if required and freeing
4703 * the frames outside of the TX lock.
4705 goto finish_send_bar;
4709 * XXX for now, use the first frame in the aggregate for
4710 * XXX rate control completion; it's at least consistent.
4712 pktlen = bf_first->bf_state.bfs_pktlen;
4715 * Handle errors first!
4717 * Here, handle _any_ error as a "exceeded retries" error.
4718 * Later on (when filtered frames are to be specially handled)
4719 * it'll have to be expanded.
4722 if (ts.ts_status & HAL_TXERR_XRETRY) {
4724 if (ts.ts_status != 0) {
4726 ath_tx_comp_aggr_error(sc, bf_first, atid);
4730 tap = ath_tx_get_tx_tid(an, tid);
4733 * extract starting sequence and block-ack bitmap
4735 /* XXX endian-ness of seq_st, ba? */
4736 seq_st = ts.ts_seqnum;
4737 hasba = !! (ts.ts_flags & HAL_TX_BA);
4738 tx_ok = (ts.ts_status == 0);
4739 isaggr = bf_first->bf_state.bfs_aggr;
4740 ba[0] = ts.ts_ba_low;
4741 ba[1] = ts.ts_ba_high;
4744 * Copy the TX completion status and the rate control
4745 * series from the first descriptor, as it may be freed
4746 * before the rate control code can get its grubby fingers
4749 memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4751 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4752 "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4753 "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4754 __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4755 isaggr, seq_st, hasba, ba[0], ba[1]);
4758 * The reference driver doesn't do this; it simply ignores
4759 * this check in its entirety.
4761 * I've seen this occur when using iperf to send traffic
4762 * out tid 1 - the aggregate frames are all marked as TID 1,
4763 * but the TXSTATUS has TID=0. So, let's just ignore this
4767 /* Occasionally, the MAC sends a tx status for the wrong TID. */
4768 if (tid != ts.ts_tid) {
4769 device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n",
4770 __func__, tid, ts.ts_tid);
4775 /* AR5416 BA bug; this requires an interface reset */
4776 if (isaggr && tx_ok && (! hasba)) {
4777 device_printf(sc->sc_dev,
4778 "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4780 __func__, hasba, tx_ok, isaggr, seq_st);
4781 /* XXX TODO: schedule an interface reset */
4783 ath_printtxbuf(sc, bf_first,
4784 sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
4789 * Walk the list of frames, figure out which ones were correctly
4790 * sent and which weren't.
4793 nf = bf_first->bf_state.bfs_nframes;
4795 /* bf_first is going to be invalid once this list is walked */
4799 * Walk the list of completed frames and determine
4800 * which need to be completed and which need to be
4803 * For completed frames, the completion functions need
4804 * to be called at the end of this function as the last
4805 * node reference may free the node.
4807 * Finally, since the TXQ lock can't be held during the
4808 * completion callback (to avoid lock recursion),
4809 * the completion calls have to be done outside of the
4814 ba_index = ATH_BA_INDEX(seq_st,
4815 SEQNO(bf->bf_state.bfs_seqno));
4816 bf_next = bf->bf_next;
4817 bf->bf_next = NULL; /* Remove it from the aggr list */
4819 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4820 "%s: checking bf=%p seqno=%d; ack=%d\n",
4821 __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
4822 ATH_BA_ISSET(ba, ba_index));
4824 if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
4825 sc->sc_stats.ast_tx_aggr_ok++;
4826 ath_tx_update_baw(sc, an, atid, bf);
4827 bf->bf_state.bfs_dobaw = 0;
4828 if (! bf->bf_state.bfs_addedbaw)
4829 device_printf(sc->sc_dev,
4830 "%s: wasn't added: seqno %d\n",
4831 __func__, SEQNO(bf->bf_state.bfs_seqno));
4833 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4835 sc->sc_stats.ast_tx_aggr_fail++;
4836 if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4839 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4847 * Now that the BAW updates have been done, unlock
4849 * txseq is grabbed before the lock is released so we
4850 * have a consistent view of what -was- in the BAW.
4851 * Anything after this point will not yet have been
4854 txseq = tap->txa_start;
4858 device_printf(sc->sc_dev,
4859 "%s: num frames seen=%d; bf nframes=%d\n",
4860 __func__, nframes, nf);
4863 * Now we know how many frames were bad, call the rate
4867 ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
4871 * send bar if we dropped any frames
4874 /* Suspend the TX queue and get ready to send the BAR */
4876 ath_tx_tid_bar_suspend(sc, atid);
4880 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4881 "%s: txa_start now %d\n", __func__, tap->txa_start);
4885 /* Prepend all frames to the beginning of the queue */
4886 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4887 TAILQ_REMOVE(&bf_q, bf, bf_list);
4888 ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4892 * Reschedule to grab some further frames.
4894 ath_tx_tid_sched(sc, atid);
4897 * If the queue is filtered, re-schedule as required.
4899 * This is required as there may be a subsequent TX descriptor
4900 * for this end-node that has CLRDMASK set, so it's quite possible
4901 * that a filtered frame will be followed by a non-filtered
4902 * (complete or otherwise) frame.
4904 * XXX should we do this before we complete the frame?
4906 if (atid->isfiltered)
4907 ath_tx_tid_filt_comp_complete(sc, atid);
4912 * Send BAR if required
4914 if (ath_tx_tid_bar_tx_ready(sc, atid))
4915 ath_tx_tid_bar_tx(sc, atid);
4919 /* Do deferred completion */
4920 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4921 TAILQ_REMOVE(&bf_cq, bf, bf_list);
4922 ath_tx_default_comp(sc, bf, 0);
4927 * Handle completion of unaggregated frames in an ADDBA
4930 * Fail is set to 1 if the entry is being freed via a call to
4931 * ath_tx_draintxq().
4934 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
4936 struct ieee80211_node *ni = bf->bf_node;
4937 struct ath_node *an = ATH_NODE(ni);
4938 int tid = bf->bf_state.bfs_tid;
4939 struct ath_tid *atid = &an->an_tid[tid];
4940 struct ath_tx_status ts;
4944 * Take a copy of this; filtering/cloning the frame may free the
4947 ts = bf->bf_status.ds_txstat;
4950 * Update rate control status here, before we possibly
4951 * punt to retry or cleanup.
4953 * Do it outside of the TXQ lock.
4955 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4956 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4957 &bf->bf_status.ds_txstat,
4958 bf->bf_state.bfs_pktlen,
4959 1, (ts.ts_status == 0) ? 0 : 1);
4962 * This is called early so atid->hwq_depth can be tracked.
4963 * This unfortunately means that it's released and regrabbed
4964 * during retry and cleanup. That's rather inefficient.
4968 if (tid == IEEE80211_NONQOS_TID)
4969 device_printf(sc->sc_dev, "%s: TID=16!\n", __func__);
4971 DPRINTF(sc, ATH_DEBUG_SW_TX,
4972 "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
4973 __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
4974 SEQNO(bf->bf_state.bfs_seqno));
4977 if (atid->hwq_depth < 0)
4978 device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4979 __func__, atid->hwq_depth);
4982 * If the TID is filtered, handle completing the filter
4983 * transition before potentially kicking it to the cleanup
4986 if (atid->isfiltered)
4987 ath_tx_tid_filt_comp_complete(sc, atid);
4990 * If a cleanup is in progress, punt to comp_cleanup;
4991 * rather than handling it here. It's thus their
4992 * responsibility to clean up, call the completion
4993 * function in net80211, etc.
4995 if (atid->cleanup_inprogress) {
4996 if (atid->isfiltered)
4997 device_printf(sc->sc_dev,
4998 "%s: isfiltered=1, normal_comp?\n",
5001 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
5003 ath_tx_comp_cleanup_unaggr(sc, bf);
5008 * XXX TODO: how does cleanup, BAR and filtered frame handling
5011 * If the frame is filtered OR if it's any failure but
5012 * the TID is filtered, the frame must be added to the
5013 * filtered frame list.
5015 * However - a busy buffer can't be added to the filtered
5016 * list as it will end up being recycled without having
5017 * been made available for the hardware.
5019 if ((ts.ts_status & HAL_TXERR_FILT) ||
5020 (ts.ts_status != 0 && atid->isfiltered)) {
5024 device_printf(sc->sc_dev,
5025 "%s: isfiltered=1, fail=%d\n",
5028 freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
5030 /* Remove from BAW */
5031 if (bf->bf_state.bfs_addedbaw)
5033 if (bf->bf_state.bfs_dobaw) {
5034 ath_tx_update_baw(sc, an, atid, bf);
5035 if (! bf->bf_state.bfs_addedbaw)
5036 device_printf(sc->sc_dev,
5037 "%s: wasn't added: seqno %d\n",
5038 __func__, SEQNO(bf->bf_state.bfs_seqno));
5040 bf->bf_state.bfs_dobaw = 0;
5044 * If the frame couldn't be filtered, treat it as a drop and
5045 * prepare to send a BAR.
5047 if (freeframe && drops)
5048 ath_tx_tid_bar_suspend(sc, atid);
5051 * Send BAR if required
5053 if (ath_tx_tid_bar_tx_ready(sc, atid))
5054 ath_tx_tid_bar_tx(sc, atid);
5058 * If freeframe is set, then the frame couldn't be
5059 * cloned and bf is still valid. Just complete/free it.
5062 ath_tx_default_comp(sc, bf, fail);
5068 * Don't bother with the retry check if all frames
5069 * are being failed (eg during queue deletion.)
5072 if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5074 if (fail == 0 && ts.ts_status != 0) {
5076 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5078 ath_tx_aggr_retry_unaggr(sc, bf);
5082 /* Success? Complete */
5083 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5084 __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5085 if (bf->bf_state.bfs_dobaw) {
5086 ath_tx_update_baw(sc, an, atid, bf);
5087 bf->bf_state.bfs_dobaw = 0;
5088 if (! bf->bf_state.bfs_addedbaw)
5089 device_printf(sc->sc_dev,
5090 "%s: wasn't added: seqno %d\n",
5091 __func__, SEQNO(bf->bf_state.bfs_seqno));
5095 * If the queue is filtered, re-schedule as required.
5097 * This is required as there may be a subsequent TX descriptor
5098 * for this end-node that has CLRDMASK set, so it's quite possible
5099 * that a filtered frame will be followed by a non-filtered
5100 * (complete or otherwise) frame.
5102 * XXX should we do this before we complete the frame?
5104 if (atid->isfiltered)
5105 ath_tx_tid_filt_comp_complete(sc, atid);
5108 * Send BAR if required
5110 if (ath_tx_tid_bar_tx_ready(sc, atid))
5111 ath_tx_tid_bar_tx(sc, atid);
5115 ath_tx_default_comp(sc, bf, fail);
5116 /* bf is freed at this point */
5120 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5122 if (bf->bf_state.bfs_aggr)
5123 ath_tx_aggr_comp_aggr(sc, bf, fail);
5125 ath_tx_aggr_comp_unaggr(sc, bf, fail);
5129 * Schedule some packets from the given node/TID to the hardware.
5131 * This is the aggregate version.
5134 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5135 struct ath_tid *tid)
5138 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5139 struct ieee80211_tx_ampdu *tap;
5140 ATH_AGGR_STATUS status;
5143 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5144 ATH_TX_LOCK_ASSERT(sc);
5147 * XXX TODO: If we're called for a queue that we're leaking frames to,
5148 * ensure we only leak one.
5151 tap = ath_tx_get_tx_tid(an, tid->tid);
5153 if (tid->tid == IEEE80211_NONQOS_TID)
5154 device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n",
5158 status = ATH_AGGR_DONE;
5161 * If the upper layer has paused the TID, don't
5162 * queue any further packets.
5164 * This can also occur from the completion task because
5165 * of packet loss; but as its serialised with this code,
5166 * it won't "appear" half way through queuing packets.
5168 if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5171 bf = ATH_TID_FIRST(tid);
5177 * If the packet doesn't fall within the BAW (eg a NULL
5178 * data frame), schedule it directly; continue.
5180 if (! bf->bf_state.bfs_dobaw) {
5181 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5182 "%s: non-baw packet\n",
5184 ATH_TID_REMOVE(tid, bf, bf_list);
5186 if (bf->bf_state.bfs_nframes > 1)
5187 device_printf(sc->sc_dev,
5188 "%s: aggr=%d, nframes=%d\n",
5190 bf->bf_state.bfs_aggr,
5191 bf->bf_state.bfs_nframes);
5194 * This shouldn't happen - such frames shouldn't
5195 * ever have been queued as an aggregate in the
5196 * first place. However, make sure the fields
5197 * are correctly setup just to be totally sure.
5199 bf->bf_state.bfs_aggr = 0;
5200 bf->bf_state.bfs_nframes = 1;
5202 /* Update CLRDMASK just before this frame is queued */
5203 ath_tx_update_clrdmask(sc, tid, bf);
5205 ath_tx_do_ratelookup(sc, bf);
5206 ath_tx_calc_duration(sc, bf);
5207 ath_tx_calc_protection(sc, bf);
5208 ath_tx_set_rtscts(sc, bf);
5209 ath_tx_rate_fill_rcflags(sc, bf);
5210 ath_tx_setds(sc, bf);
5211 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5213 sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5215 /* Queue the packet; continue */
5222 * Do a rate control lookup on the first frame in the
5223 * list. The rate control code needs that to occur
5224 * before it can determine whether to TX.
5225 * It's inaccurate because the rate control code doesn't
5226 * really "do" aggregate lookups, so it only considers
5227 * the size of the first frame.
5229 ath_tx_do_ratelookup(sc, bf);
5230 bf->bf_state.bfs_rc[3].rix = 0;
5231 bf->bf_state.bfs_rc[3].tries = 0;
5233 ath_tx_calc_duration(sc, bf);
5234 ath_tx_calc_protection(sc, bf);
5236 ath_tx_set_rtscts(sc, bf);
5237 ath_tx_rate_fill_rcflags(sc, bf);
5239 status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5241 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5242 "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5245 * No frames to be picked up - out of BAW
5247 if (TAILQ_EMPTY(&bf_q))
5251 * This assumes that the descriptor list in the ath_bufhead
5252 * are already linked together via bf_next pointers.
5254 bf = TAILQ_FIRST(&bf_q);
5256 if (status == ATH_AGGR_8K_LIMITED)
5257 sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5260 * If it's the only frame send as non-aggregate
5261 * assume that ath_tx_form_aggr() has checked
5262 * whether it's in the BAW and added it appropriately.
5264 if (bf->bf_state.bfs_nframes == 1) {
5265 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5266 "%s: single-frame aggregate\n", __func__);
5268 /* Update CLRDMASK just before this frame is queued */
5269 ath_tx_update_clrdmask(sc, tid, bf);
5271 bf->bf_state.bfs_aggr = 0;
5272 bf->bf_state.bfs_ndelim = 0;
5273 ath_tx_setds(sc, bf);
5274 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5275 if (status == ATH_AGGR_BAW_CLOSED)
5276 sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5278 sc->sc_aggr_stats.aggr_single_pkt++;
5280 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5281 "%s: multi-frame aggregate: %d frames, "
5283 __func__, bf->bf_state.bfs_nframes,
5284 bf->bf_state.bfs_al);
5285 bf->bf_state.bfs_aggr = 1;
5286 sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5287 sc->sc_aggr_stats.aggr_aggr_pkt++;
5289 /* Update CLRDMASK just before this frame is queued */
5290 ath_tx_update_clrdmask(sc, tid, bf);
5293 * Calculate the duration/protection as required.
5295 ath_tx_calc_duration(sc, bf);
5296 ath_tx_calc_protection(sc, bf);
5299 * Update the rate and rtscts information based on the
5300 * rate decision made by the rate control code;
5301 * the first frame in the aggregate needs it.
5303 ath_tx_set_rtscts(sc, bf);
5306 * Setup the relevant descriptor fields
5307 * for aggregation. The first descriptor
5308 * already points to the rest in the chain.
5310 ath_tx_setds_11n(sc, bf);
5314 /* Set completion handler, multi-frame aggregate or not */
5315 bf->bf_comp = ath_tx_aggr_comp;
5317 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
5318 device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
5321 * Update leak count and frame config if were leaking frames.
5323 * XXX TODO: it should update all frames in an aggregate
5326 ath_tx_leak_count_update(sc, tid, bf);
5329 ath_tx_handoff(sc, txq, bf);
5331 /* Track outstanding buffer count to hardware */
5332 /* aggregates are "one" buffer */
5336 * Break out if ath_tx_form_aggr() indicated
5337 * there can't be any further progress (eg BAW is full.)
5338 * Checking for an empty txq is done above.
5340 * XXX locking on txq here?
5342 if (txq->axq_aggr_depth >= sc->sc_hwq_limit ||
5343 (status == ATH_AGGR_BAW_CLOSED ||
5344 status == ATH_AGGR_LEAK_CLOSED))
5350 * Schedule some packets from the given node/TID to the hardware.
5353 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5354 struct ath_tid *tid)
5357 struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5359 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5360 __func__, an, tid->tid);
5362 ATH_TX_LOCK_ASSERT(sc);
5364 /* Check - is AMPDU pending or running? then print out something */
5365 if (ath_tx_ampdu_pending(sc, an, tid->tid))
5366 device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n",
5367 __func__, tid->tid);
5368 if (ath_tx_ampdu_running(sc, an, tid->tid))
5369 device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n",
5370 __func__, tid->tid);
5375 * If the upper layers have paused the TID, don't
5376 * queue any further packets.
5378 * XXX if we are leaking frames, make sure we decrement
5379 * that counter _and_ we continue here.
5381 if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5384 bf = ATH_TID_FIRST(tid);
5389 ATH_TID_REMOVE(tid, bf, bf_list);
5392 if (tid->tid != bf->bf_state.bfs_tid) {
5393 device_printf(sc->sc_dev, "%s: bfs_tid %d !="
5395 __func__, bf->bf_state.bfs_tid, tid->tid);
5397 /* Normal completion handler */
5398 bf->bf_comp = ath_tx_normal_comp;
5401 * Override this for now, until the non-aggregate
5402 * completion handler correctly handles software retransmits.
5404 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
5406 /* Update CLRDMASK just before this frame is queued */
5407 ath_tx_update_clrdmask(sc, tid, bf);
5409 /* Program descriptors + rate control */
5410 ath_tx_do_ratelookup(sc, bf);
5411 ath_tx_calc_duration(sc, bf);
5412 ath_tx_calc_protection(sc, bf);
5413 ath_tx_set_rtscts(sc, bf);
5414 ath_tx_rate_fill_rcflags(sc, bf);
5415 ath_tx_setds(sc, bf);
5418 * Update the current leak count if
5419 * we're leaking frames; and set the
5420 * MORE flag as appropriate.
5422 ath_tx_leak_count_update(sc, tid, bf);
5424 /* Track outstanding buffer count to hardware */
5425 /* aggregates are "one" buffer */
5428 /* Punt to hardware or software txq */
5429 ath_tx_handoff(sc, txq, bf);
5434 * Schedule some packets to the given hardware queue.
5436 * This function walks the list of TIDs (ie, ath_node TIDs
5437 * with queued traffic) and attempts to schedule traffic
5440 * TID scheduling is implemented as a FIFO, with TIDs being
5441 * added to the end of the queue after some frames have been
5445 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5447 struct ath_tid *tid, *next, *last;
5449 ATH_TX_LOCK_ASSERT(sc);
5452 * Don't schedule if the hardware queue is busy.
5453 * This (hopefully) gives some more time to aggregate
5454 * some packets in the aggregation queue.
5456 if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
5457 sc->sc_aggr_stats.aggr_sched_nopkt++;
5461 last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5463 TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5465 * Suspend paused queues here; they'll be resumed
5466 * once the addba completes or times out.
5468 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5469 __func__, tid->tid, tid->paused);
5470 ath_tx_tid_unsched(sc, tid);
5472 * This node may be in power-save and we're leaking
5473 * a frame; be careful.
5475 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
5478 if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5479 ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5481 ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5483 /* Not empty? Re-schedule */
5484 if (tid->axq_depth != 0)
5485 ath_tx_tid_sched(sc, tid);
5488 * Give the software queue time to aggregate more
5489 * packets. If we aren't running aggregation then
5490 * we should still limit the hardware queue depth.
5492 if (txq->axq_depth >= sc->sc_hwq_limit) {
5497 * If this was the last entry on the original list, stop.
5498 * Otherwise nodes that have been rescheduled onto the end
5499 * of the TID FIFO list will just keep being rescheduled.
5501 * XXX What should we do about nodes that were paused
5502 * but are pending a leaking frame in response to a ps-poll?
5503 * They'll be put at the front of the list; so they'll
5504 * prematurely trigger this condition! Ew.
5516 * Return net80211 TID struct pointer, or NULL for none
5518 struct ieee80211_tx_ampdu *
5519 ath_tx_get_tx_tid(struct ath_node *an, int tid)
5521 struct ieee80211_node *ni = &an->an_node;
5522 struct ieee80211_tx_ampdu *tap;
5524 if (tid == IEEE80211_NONQOS_TID)
5527 tap = &ni->ni_tx_ampdu[tid];
5532 * Is AMPDU-TX running?
5535 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5537 struct ieee80211_tx_ampdu *tap;
5539 if (tid == IEEE80211_NONQOS_TID)
5542 tap = ath_tx_get_tx_tid(an, tid);
5544 return 0; /* Not valid; default to not running */
5546 return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5550 * Is AMPDU-TX negotiation pending?
5553 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5555 struct ieee80211_tx_ampdu *tap;
5557 if (tid == IEEE80211_NONQOS_TID)
5560 tap = ath_tx_get_tx_tid(an, tid);
5562 return 0; /* Not valid; default to not pending */
5564 return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5568 * Is AMPDU-TX pending for the given TID?
5573 * Method to handle sending an ADDBA request.
5575 * We tap this so the relevant flags can be set to pause the TID
5576 * whilst waiting for the response.
5578 * XXX there's no timeout handler we can override?
5581 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5582 int dialogtoken, int baparamset, int batimeout)
5584 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5585 int tid = tap->txa_tid;
5586 struct ath_node *an = ATH_NODE(ni);
5587 struct ath_tid *atid = &an->an_tid[tid];
5590 * XXX danger Will Robinson!
5592 * Although the taskqueue may be running and scheduling some more
5593 * packets, these should all be _before_ the addba sequence number.
5594 * However, net80211 will keep self-assigning sequence numbers
5595 * until addba has been negotiated.
5597 * In the past, these packets would be "paused" (which still works
5598 * fine, as they're being scheduled to the driver in the same
5599 * serialised method which is calling the addba request routine)
5600 * and when the aggregation session begins, they'll be dequeued
5601 * as aggregate packets and added to the BAW. However, now there's
5602 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5603 * packets. Thus they never get included in the BAW tracking and
5604 * this can cause the initial burst of packets after the addba
5605 * negotiation to "hang", as they quickly fall outside the BAW.
5607 * The "eventual" solution should be to tag these packets with
5608 * dobaw. Although net80211 has given us a sequence number,
5609 * it'll be "after" the left edge of the BAW and thus it'll
5614 * This is a bit annoying. Until net80211 HT code inherits some
5615 * (any) locking, we may have this called in parallel BUT only
5616 * one response/timeout will be called. Grr.
5618 if (atid->addba_tx_pending == 0) {
5619 ath_tx_tid_pause(sc, atid);
5620 atid->addba_tx_pending = 1;
5624 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5625 "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
5629 dialogtoken, baparamset, batimeout);
5630 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5631 "%s: txa_start=%d, ni_txseqs=%d\n",
5632 __func__, tap->txa_start, ni->ni_txseqs[tid]);
5634 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5639 * Handle an ADDBA response.
5641 * We unpause the queue so TX'ing can resume.
5643 * Any packets TX'ed from this point should be "aggregate" (whether
5644 * aggregate or not) so the BAW is updated.
5646 * Note! net80211 keeps self-assigning sequence numbers until
5647 * ampdu is negotiated. This means the initially-negotiated BAW left
5648 * edge won't match the ni->ni_txseq.
5650 * So, being very dirty, the BAW left edge is "slid" here to match
5653 * What likely SHOULD happen is that all packets subsequent to the
5654 * addba request should be tagged as aggregate and queued as non-aggregate
5655 * frames; thus updating the BAW. For now though, I'll just slide the
5659 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5660 int status, int code, int batimeout)
5662 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5663 int tid = tap->txa_tid;
5664 struct ath_node *an = ATH_NODE(ni);
5665 struct ath_tid *atid = &an->an_tid[tid];
5668 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5669 "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
5672 status, code, batimeout);
5674 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5675 "%s: txa_start=%d, ni_txseqs=%d\n",
5676 __func__, tap->txa_start, ni->ni_txseqs[tid]);
5679 * Call this first, so the interface flags get updated
5680 * before the TID is unpaused. Otherwise a race condition
5681 * exists where the unpaused TID still doesn't yet have
5682 * IEEE80211_AGGR_RUNNING set.
5684 r = sc->sc_addba_response(ni, tap, status, code, batimeout);
5687 atid->addba_tx_pending = 0;
5690 * Slide the BAW left edge to wherever net80211 left it for us.
5691 * Read above for more information.
5693 tap->txa_start = ni->ni_txseqs[tid];
5694 ath_tx_tid_resume(sc, atid);
5701 * Stop ADDBA on a queue.
5703 * This can be called whilst BAR TX is currently active on the queue,
5704 * so make sure this is unblocked before continuing.
5707 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
5709 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5710 int tid = tap->txa_tid;
5711 struct ath_node *an = ATH_NODE(ni);
5712 struct ath_tid *atid = &an->an_tid[tid];
5716 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
5722 * Pause TID traffic early, so there aren't any races
5723 * Unblock the pending BAR held traffic, if it's currently paused.
5726 ath_tx_tid_pause(sc, atid);
5727 if (atid->bar_wait) {
5729 * bar_unsuspend() expects bar_tx == 1, as it should be
5730 * called from the TX completion path. This quietens
5731 * the warning. It's cleared for us anyway.
5734 ath_tx_tid_bar_unsuspend(sc, atid);
5738 /* There's no need to hold the TXQ lock here */
5739 sc->sc_addba_stop(ni, tap);
5742 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
5743 * it'll set the cleanup flag, and it'll be unpaused once
5744 * things have been cleaned up.
5748 ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
5751 /* Handle completing frames and fail them */
5752 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5753 TAILQ_REMOVE(&bf_cq, bf, bf_list);
5754 ath_tx_default_comp(sc, bf, 1);
5760 * Handle a node reassociation.
5762 * We may have a bunch of frames queued to the hardware; those need
5763 * to be marked as cleanup.
5766 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
5768 struct ath_tid *tid;
5775 ATH_TX_UNLOCK_ASSERT(sc);
5778 for (i = 0; i < IEEE80211_TID_SIZE; i++) {
5779 tid = &an->an_tid[i];
5780 if (tid->hwq_depth == 0)
5782 ath_tx_tid_pause(sc, tid);
5783 DPRINTF(sc, ATH_DEBUG_NODE,
5784 "%s: %6D: TID %d: cleaning up TID\n",
5786 an->an_node.ni_macaddr,
5789 ath_tx_tid_cleanup(sc, an, i, &bf_cq);
5793 /* Handle completing frames and fail them */
5794 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5795 TAILQ_REMOVE(&bf_cq, bf, bf_list);
5796 ath_tx_default_comp(sc, bf, 1);
5801 * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
5802 * it simply tears down the aggregation session. Ew.
5804 * It however will call ieee80211_ampdu_stop() which will call
5805 * ic->ic_addba_stop().
5807 * XXX This uses a hard-coded max BAR count value; the whole
5808 * XXX BAR TX success or failure should be better handled!
5811 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5814 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5815 int tid = tap->txa_tid;
5816 struct ath_node *an = ATH_NODE(ni);
5817 struct ath_tid *atid = &an->an_tid[tid];
5818 int attempts = tap->txa_attempts;
5820 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
5821 "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d\n",
5830 /* Note: This may update the BAW details */
5831 sc->sc_bar_response(ni, tap, status);
5833 /* Unpause the TID */
5835 * XXX if this is attempt=50, the TID will be downgraded
5836 * XXX to a non-aggregate session. So we must unpause the
5837 * XXX TID here or it'll never be done.
5839 * Also, don't call it if bar_tx/bar_wait are 0; something
5840 * has beaten us to the punch? (XXX figure out what?)
5842 if (status == 0 || attempts == 50) {
5844 if (atid->bar_tx == 0 || atid->bar_wait == 0)
5845 device_printf(sc->sc_dev,
5846 "%s: huh? bar_tx=%d, bar_wait=%d\n",
5848 atid->bar_tx, atid->bar_wait);
5850 ath_tx_tid_bar_unsuspend(sc, atid);
5856 * This is called whenever the pending ADDBA request times out.
5857 * Unpause and reschedule the TID.
5860 ath_addba_response_timeout(struct ieee80211_node *ni,
5861 struct ieee80211_tx_ampdu *tap)
5863 struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
5864 int tid = tap->txa_tid;
5865 struct ath_node *an = ATH_NODE(ni);
5866 struct ath_tid *atid = &an->an_tid[tid];
5868 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5869 "%s: %6D: TID=%d, called; resuming\n",
5876 atid->addba_tx_pending = 0;
5879 /* Note: This updates the aggregate state to (again) pending */
5880 sc->sc_addba_response_timeout(ni, tap);
5882 /* Unpause the TID; which reschedules it */
5884 ath_tx_tid_resume(sc, atid);
5889 * Check if a node is asleep or not.
5892 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
5895 ATH_TX_LOCK_ASSERT(sc);
5897 return (an->an_is_powersave);
5901 * Mark a node as currently "in powersaving."
5902 * This suspends all traffic on the node.
5904 * This must be called with the node/tx locks free.
5906 * XXX TODO: the locking silliness below is due to how the node
5907 * locking currently works. Right now, the node lock is grabbed
5908 * to do rate control lookups and these are done with the TX
5909 * queue lock held. This means the node lock can't be grabbed
5910 * first here or a LOR will occur.
5912 * Eventually (hopefully!) the TX path code will only grab
5913 * the TXQ lock when transmitting and the ath_node lock when
5914 * doing node/TID operations. There are other complications -
5915 * the sched/unsched operations involve walking the per-txq
5916 * 'active tid' list and this requires both locks to be held.
5919 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
5921 struct ath_tid *atid;
5922 struct ath_txq *txq;
5925 ATH_TX_UNLOCK_ASSERT(sc);
5927 /* Suspend all traffic on the node */
5930 if (an->an_is_powersave) {
5931 device_printf(sc->sc_dev,
5932 "%s: %6D: node was already asleep!\n",
5934 an->an_node.ni_macaddr,
5940 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
5941 atid = &an->an_tid[tid];
5942 txq = sc->sc_ac2q[atid->ac];
5944 ath_tx_tid_pause(sc, atid);
5947 /* Mark node as in powersaving */
5948 an->an_is_powersave = 1;
5954 * Mark a node as currently "awake."
5955 * This resumes all traffic to the node.
5958 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
5960 struct ath_tid *atid;
5961 struct ath_txq *txq;
5964 ATH_TX_UNLOCK_ASSERT(sc);
5969 if (an->an_is_powersave == 0) {
5971 device_printf(sc->sc_dev,
5972 "%s: an=%p: node was already awake\n",
5977 /* Mark node as awake */
5978 an->an_is_powersave = 0;
5980 * Clear any pending leaked frame requests
5982 an->an_leak_count = 0;
5984 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
5985 atid = &an->an_tid[tid];
5986 txq = sc->sc_ac2q[atid->ac];
5988 ath_tx_tid_resume(sc, atid);
5994 ath_legacy_dma_txsetup(struct ath_softc *sc)
5997 /* nothing new needed */
6002 ath_legacy_dma_txteardown(struct ath_softc *sc)
6005 /* nothing new needed */
6010 ath_xmit_setup_legacy(struct ath_softc *sc)
6013 * For now, just set the descriptor length to sizeof(ath_desc);
6014 * worry about extracting the real length out of the HAL later.
6016 sc->sc_tx_desclen = sizeof(struct ath_desc);
6017 sc->sc_tx_statuslen = sizeof(struct ath_desc);
6018 sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */
6020 sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
6021 sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
6022 sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
6024 sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
6025 sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
6027 sc->sc_tx.xmit_drain = ath_legacy_tx_drain;