2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
3 * Copyright (c) 2017 The FreeBSD Foundation
6 * Portions of this software were developed by Landon Fuller
7 * under sponsorship from the FreeBSD Foundation.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
16 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
17 * redistribution must be conditioned upon including a substantially
18 * similar Disclaimer requirement for further binary redistribution.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
24 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
25 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
26 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
29 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGES.
36 #ifndef _BHND_BHND_TYPES_H_
37 #define _BHND_BHND_TYPES_H_
39 #include <sys/types.h>
41 #include "nvram/bhnd_nvram.h"
43 /** bhnd(4) device classes. */
45 BHND_DEVCLASS_CC, /**< chipcommon i/o controller */
46 BHND_DEVCLASS_CC_B, /**< chipcommon auxiliary controller */
47 BHND_DEVCLASS_PMU, /**< pmu controller */
48 BHND_DEVCLASS_PCI, /**< pci host/device bridge */
49 BHND_DEVCLASS_PCIE, /**< pcie host/device bridge */
50 BHND_DEVCLASS_PCCARD, /**< pcmcia host/device bridge */
51 BHND_DEVCLASS_RAM, /**< internal RAM/SRAM */
52 BHND_DEVCLASS_MEMC, /**< memory controller */
53 BHND_DEVCLASS_ENET, /**< 802.3 MAC/PHY */
54 BHND_DEVCLASS_ENET_MAC, /**< 802.3 MAC */
55 BHND_DEVCLASS_ENET_PHY, /**< 802.3 PHY */
56 BHND_DEVCLASS_WLAN, /**< 802.11 MAC/PHY/Radio */
57 BHND_DEVCLASS_WLAN_MAC, /**< 802.11 MAC */
58 BHND_DEVCLASS_WLAN_PHY, /**< 802.11 PHY */
59 BHND_DEVCLASS_CPU, /**< cpu core */
60 BHND_DEVCLASS_SOC_ROUTER, /**< interconnect router */
61 BHND_DEVCLASS_SOC_BRIDGE, /**< interconnect host bridge */
62 BHND_DEVCLASS_EROM, /**< bus device enumeration ROM */
63 BHND_DEVCLASS_NVRAM, /**< nvram/flash controller */
64 BHND_DEVCLASS_USB_HOST, /**< USB host controller */
65 BHND_DEVCLASS_USB_DEV, /**< USB device controller */
66 BHND_DEVCLASS_USB_DUAL, /**< USB host/device controller */
68 BHND_DEVCLASS_OTHER = 1000, /**< other / unknown */
69 BHND_DEVCLASS_INVALID /**< no/invalid class */
72 /** bhnd(4) platform services. */
74 BHND_SERVICE_CHIPC, /**< chipcommon service; implements the bhnd_chipc interface */
75 BHND_SERVICE_PMU, /**< pmu service; implements the bhnd_pmu interface */
76 BHND_SERVICE_NVRAM, /**< nvram service; implements the bhnd_nvram interface */
78 BHND_SERVICE_ANY = 1000, /**< match on any service type */
84 * Only BHND_PORT_DEVICE is guaranteed to be supported by all bhnd(4) bus
88 BHND_PORT_DEVICE = 0, /**< device memory */
89 BHND_PORT_BRIDGE = 1, /**< bridge memory */
90 BHND_PORT_AGENT = 2, /**< interconnect agent/wrapper */
94 * bhnd(4) attachment types.
97 BHND_ATTACH_ADAPTER = 0, /**< A bridged card, such as a PCI WiFi chipset */
98 BHND_ATTACH_NATIVE = 1 /**< A bus resident on the native host, such as
99 * the primary or secondary bus of an embedded
104 * bhnd(4) clock types.
108 * Dynamically select an appropriate clock source based on all
109 * outstanding clock requests.
111 BHND_CLOCK_DYN = (1 << 0),
114 * Idle Low-Power (ILP).
116 * No register access is required, or long request latency is
119 BHND_CLOCK_ILP = (1 << 1),
122 * Active Low-Power (ALP).
124 * Low-latency register access and low-rate DMA.
126 BHND_CLOCK_ALP = (1 << 2),
129 * High Throughput (HT).
131 * High bus throughput and lowest-latency register access.
133 BHND_CLOCK_HT = (1 << 3)
137 * Given two clock types, return the type with the highest precedence.
139 static inline bhnd_clock
140 bhnd_clock_max(bhnd_clock a, bhnd_clock b) {
141 return (a > b ? a : b);
145 * bhnd(4) clock sources.
149 * Clock is provided by the PCI bus clock
153 /** Clock is provided by a crystal. */
154 BHND_CLKSRC_XTAL = 1,
156 /** Clock is provided by a low power oscillator. */
159 /** Clock source is unknown */
160 BHND_CLKSRC_UNKNOWN = 3
163 /** Evaluates to true if @p cls is a device class that can be configured
164 * as a host bridge device. */
165 #define BHND_DEVCLASS_SUPPORTS_HOSTB(cls) \
166 ((cls) == BHND_DEVCLASS_PCI || (cls) == BHND_DEVCLASS_PCIE || \
167 (cls) == BHND_DEVCLASS_PCCARD)
172 * @note While the interconnect may support 64-bit addressing, not
173 * all bridges and SoC CPUs will.
175 typedef uint64_t bhnd_addr_t;
176 #define BHND_ADDR_MAX UINT64_MAX /**< Maximum bhnd_addr_t value */
178 /** BHND bus size. */
179 typedef uint64_t bhnd_size_t;
180 #define BHND_SIZE_MAX UINT64_MAX /**< Maximum bhnd_size_t value */
183 #endif /* _BHND_BHND_TYPES_H_ */