2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
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12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
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32 #ifndef _BHND_BHND_TYPES_H_
33 #define _BHND_BHND_TYPES_H_
35 #include <sys/types.h>
37 /** bhnd(4) device classes. */
39 BHND_DEVCLASS_CC, /**< chipcommon i/o controller */
40 BHND_DEVCLASS_CC_B, /**< chipcommon auxiliary controller */
41 BHND_DEVCLASS_PMU, /**< pmu controller */
42 BHND_DEVCLASS_PCI, /**< pci host/device bridge */
43 BHND_DEVCLASS_PCIE, /**< pcie host/device bridge */
44 BHND_DEVCLASS_PCCARD, /**< pcmcia host/device bridge */
45 BHND_DEVCLASS_RAM, /**< internal RAM/SRAM */
46 BHND_DEVCLASS_MEMC, /**< memory controller */
47 BHND_DEVCLASS_ENET, /**< 802.3 MAC/PHY */
48 BHND_DEVCLASS_ENET_MAC, /**< 802.3 MAC */
49 BHND_DEVCLASS_ENET_PHY, /**< 802.3 PHY */
50 BHND_DEVCLASS_WLAN, /**< 802.11 MAC/PHY/Radio */
51 BHND_DEVCLASS_WLAN_MAC, /**< 802.11 MAC */
52 BHND_DEVCLASS_WLAN_PHY, /**< 802.11 PHY */
53 BHND_DEVCLASS_CPU, /**< cpu core */
54 BHND_DEVCLASS_SOC_ROUTER, /**< interconnect router */
55 BHND_DEVCLASS_SOC_BRIDGE, /**< interconnect host bridge */
56 BHND_DEVCLASS_EROM, /**< bus device enumeration ROM */
57 BHND_DEVCLASS_NVRAM, /**< nvram/flash controller */
58 BHND_DEVCLASS_OTHER, /**< other / unknown */
60 BHND_DEVCLASS_INVALID /**< no/invalid class */
67 * Only BHND_PORT_DEVICE is guaranteed to be supported by all bhnd(4) bus
71 BHND_PORT_DEVICE = 0, /**< device memory */
72 BHND_PORT_BRIDGE = 1, /**< bridge memory */
73 BHND_PORT_AGENT = 2, /**< interconnect agent/wrapper */
77 /** Evaluates to true if @p cls is a device class that can be configured
78 * as a host bridge device. */
79 #define BHND_DEVCLASS_SUPPORTS_HOSTB(cls) \
80 ((cls) == BHND_DEVCLASS_PCI || (cls) == BHND_DEVCLASS_PCIE || \
81 (cls) == BHND_DEVCLASS_PCCARD)
86 * @note While the interconnect may support 64-bit addressing, not
87 * all bridges and SoC CPUs will.
89 typedef uint64_t bhnd_addr_t;
90 #define BHND_ADDR_MAX UINT64_MAX /**< Maximum bhnd_addr_t value */
93 typedef uint64_t bhnd_size_t;
94 #define BHND_SIZE_MAX UINT64_MAX /**< Maximum bhnd_size_t value */
97 #endif /* _BHND_BHND_TYPES_H_ */