2 * Copyright (c) 2017 The FreeBSD Foundation
5 * This software was developed by Landon Fuller under sponsorship from
6 * the FreeBSD Foundation.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
35 #include <sys/param.h>
36 #include <sys/kernel.h>
39 #include <sys/limits.h>
40 #include <sys/module.h>
42 #include <machine/_inttypes.h>
43 #include <machine/bus.h>
45 #include <machine/resource.h>
47 #include <dev/bhnd/bhnd.h>
48 #include <dev/gpio/gpiobusvar.h>
52 #include "bhnd_nvram_map.h"
55 #include "chipc_gpiovar.h"
58 * ChipCommon GPIO driver
61 static int chipc_gpio_check_flags(
62 struct chipc_gpio_softc *sc,
63 uint32_t pin_num, uint32_t flags,
64 chipc_gpio_pin_mode *mode);
65 static int chipc_gpio_pin_update(
66 struct chipc_gpio_softc *sc,
67 struct chipc_gpio_update *update,
68 uint32_t pin_num, uint32_t flags);
69 static int chipc_gpio_commit_update(
70 struct chipc_gpio_softc *sc,
71 struct chipc_gpio_update *update);
72 static chipc_gpio_pin_mode chipc_gpio_pin_get_mode(
73 struct chipc_gpio_softc *sc,
78 static u_long chipc_gpio_debug = 0;
79 TUNABLE_ULONG("hw.bhnd_chipc.gpio_debug", &chipc_gpio_debug);
82 /** Allow userspace GPIO access on bridged network (e.g. wi-fi)
84 CC_GPIO_DEBUG_ADAPTER_GPIOC = 1 << 0,
87 #define CC_GPIO_DEBUG(_type) (CC_GPIO_DEBUG_ ## _type & chipc_gpio_debug)
89 static struct bhnd_device_quirk chipc_gpio_quirks[];
91 /* Supported parent core device identifiers */
92 static const struct bhnd_device chipc_gpio_devices[] = {
93 BHND_DEVICE(BCM, CC, "Broadcom ChipCommon GPIO", chipc_gpio_quirks),
97 /* Device quirks table */
98 static struct bhnd_device_quirk chipc_gpio_quirks[] = {
99 BHND_CORE_QUIRK (HWREV_LTE(10), CC_GPIO_QUIRK_NO_EVENTS),
100 BHND_CORE_QUIRK (HWREV_LTE(15), CC_GPIO_QUIRK_NO_DCTIMER),
101 BHND_CORE_QUIRK (HWREV_LTE(19), CC_GPIO_QUIRK_NO_PULLUPDOWN),
103 BHND_DEVICE_QUIRK_END
107 chipc_gpio_probe(device_t dev)
109 const struct bhnd_device *id;
112 /* Look for compatible chipc parent */
113 chipc = device_get_parent(dev);
114 id = bhnd_device_lookup(chipc, chipc_gpio_devices,
115 sizeof(chipc_gpio_devices[0]));
119 device_set_desc(dev, id->desc);
120 return (BUS_PROBE_NOWILDCARD);
124 chipc_gpio_attach(device_t dev)
126 struct chipc_gpio_softc *sc;
130 chipc = device_get_parent(dev);
132 sc = device_get_softc(dev);
134 sc->quirks = bhnd_device_quirks(chipc, chipc_gpio_devices,
135 sizeof(chipc_gpio_devices[0]));
137 /* If this is a bridged wi-fi adapter, we don't want to support
138 * userspace requests via gpioc(4) */
139 if (bhnd_get_attach_type(chipc) == BHND_ATTACH_ADAPTER) {
140 if (!CC_GPIO_DEBUG(ADAPTER_GPIOC))
141 sc->quirks |= CC_GPIO_QUIRK_NO_GPIOC;
144 CC_GPIO_LOCK_INIT(sc);
147 sc->mem_res = bhnd_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
148 RF_ACTIVE|RF_SHAREABLE);
149 if (sc->mem_res == NULL) {
150 device_printf(dev, "failed to allocate chipcommon registers\n");
156 * If hardware 'pulsate' support is available, set the timer duty-cycle
157 * to either the NVRAM 'leddc' value if available, or the default duty
160 if (!CC_GPIO_QUIRK(sc, NO_DCTIMER)) {
163 error = bhnd_nvram_getvar_uint32(chipc, BHND_NVAR_LEDDC,
165 if (error == ENOENT) {
166 /* Fall back on default duty cycle */
167 dctimerval = CHIPC_GPIOTIMERVAL_DEFAULT;
169 device_printf(dev, "error reading %s from NVRAM: %d\n",
170 BHND_NVAR_LEDDC, error);
174 CC_GPIO_WR4(sc, CHIPC_GPIOTIMERVAL, dctimerval);
177 /* Attach gpioc/gpiobus */
178 if (CC_GPIO_QUIRK(sc, NO_GPIOC)) {
181 if ((sc->gpiobus = gpiobus_attach_bus(dev)) == NULL) {
182 device_printf(dev, "failed to attach gpiobus\n");
188 /* Register as the bus GPIO provider */
189 if ((error = bhnd_register_provider(dev, BHND_SERVICE_GPIO))) {
190 device_printf(dev, "failed to register gpio with bus: %d\n",
198 device_delete_children(dev);
200 if (sc->mem_res != NULL) {
201 bhnd_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid,
205 CC_GPIO_LOCK_DESTROY(sc);
211 chipc_gpio_detach(device_t dev)
213 struct chipc_gpio_softc *sc;
216 sc = device_get_softc(dev);
218 if ((error = bus_generic_detach(dev)))
221 if ((error = bhnd_deregister_provider(dev, BHND_SERVICE_ANY)))
224 bhnd_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res);
225 CC_GPIO_LOCK_DESTROY(sc);
231 chipc_gpio_get_bus(device_t dev)
233 struct chipc_gpio_softc *sc = device_get_softc(dev);
235 return (sc->gpiobus);
239 chipc_gpio_pin_max(device_t dev, int *maxpin)
241 *maxpin = CC_GPIO_NPINS-1;
246 chipc_gpio_pin_set(device_t dev, uint32_t pin_num, uint32_t pin_value)
248 struct chipc_gpio_softc *sc;
252 sc = device_get_softc(dev);
255 if (!CC_GPIO_VALID_PIN(pin_num))
271 switch (chipc_gpio_pin_get_mode(sc, pin_num)) {
272 case CC_GPIO_PIN_INPUT:
273 case CC_GPIO_PIN_TRISTATE:
277 case CC_GPIO_PIN_OUTPUT:
278 CC_GPIO_WRFLAG(sc, pin_num, GPIOOUT, pin_high);
288 chipc_gpio_pin_get(device_t dev, uint32_t pin_num, uint32_t *pin_value)
290 struct chipc_gpio_softc *sc;
293 if (!CC_GPIO_VALID_PIN(pin_num))
296 sc = device_get_softc(dev);
301 switch (chipc_gpio_pin_get_mode(sc, pin_num)) {
302 case CC_GPIO_PIN_INPUT:
303 pin_high = CC_GPIO_RDFLAG(sc, pin_num, GPIOIN);
306 case CC_GPIO_PIN_OUTPUT:
307 pin_high = CC_GPIO_RDFLAG(sc, pin_num, GPIOOUT);
310 case CC_GPIO_PIN_TRISTATE:
317 *pin_value = pin_high ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
323 chipc_gpio_pin_toggle(device_t dev, uint32_t pin_num)
325 struct chipc_gpio_softc *sc;
329 if (!CC_GPIO_VALID_PIN(pin_num))
332 sc = device_get_softc(dev);
337 switch (chipc_gpio_pin_get_mode(sc, pin_num)) {
338 case CC_GPIO_PIN_INPUT:
339 case CC_GPIO_PIN_TRISTATE:
343 case CC_GPIO_PIN_OUTPUT:
344 pin_high = CC_GPIO_RDFLAG(sc, pin_num, GPIOOUT);
345 CC_GPIO_WRFLAG(sc, pin_num, GPIOOUT, !pin_high);
355 chipc_gpio_pin_getcaps(device_t dev, uint32_t pin_num, uint32_t *caps)
357 struct chipc_gpio_softc *sc = device_get_softc(dev);
359 if (!CC_GPIO_VALID_PIN(pin_num))
362 *caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_TRISTATE);
364 if (!CC_GPIO_QUIRK(sc, NO_PULLUPDOWN))
365 *caps |= (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
367 if (!CC_GPIO_QUIRK(sc, NO_DCTIMER))
368 *caps |= GPIO_PIN_PULSATE;
374 chipc_gpio_pin_getflags(device_t dev, uint32_t pin_num, uint32_t *flags)
376 struct chipc_gpio_softc *sc = device_get_softc(dev);
378 if (!CC_GPIO_VALID_PIN(pin_num))
383 switch (chipc_gpio_pin_get_mode(sc, pin_num)) {
384 case CC_GPIO_PIN_INPUT:
385 *flags = GPIO_PIN_INPUT;
387 if (!CC_GPIO_QUIRK(sc, NO_PULLUPDOWN)) {
388 if (CC_GPIO_RDFLAG(sc, pin_num, GPIOPU)) {
389 *flags |= GPIO_PIN_PULLUP;
390 } else if (CC_GPIO_RDFLAG(sc, pin_num, GPIOPD)) {
391 *flags |= GPIO_PIN_PULLDOWN;
396 case CC_GPIO_PIN_OUTPUT:
397 *flags = GPIO_PIN_OUTPUT;
399 if (!CC_GPIO_QUIRK(sc, NO_DCTIMER)) {
400 if (CC_GPIO_RDFLAG(sc, pin_num, GPIOTIMEROUTMASK))
401 *flags |= GPIO_PIN_PULSATE;
406 case CC_GPIO_PIN_TRISTATE:
407 *flags = GPIO_PIN_TRISTATE|GPIO_PIN_OUTPUT;
417 chipc_gpio_pin_getname(device_t dev, uint32_t pin_num, char *name)
421 if (!CC_GPIO_VALID_PIN(pin_num))
424 ret = snprintf(name, GPIOMAXNAME, "bhnd_gpio%02" PRIu32, pin_num);
429 if (ret >= GPIOMAXNAME)
436 chipc_gpio_pin_setflags(device_t dev, uint32_t pin_num, uint32_t flags)
438 struct chipc_gpio_softc *sc;
439 struct chipc_gpio_update upd;
442 sc = device_get_softc(dev);
444 if (!CC_GPIO_VALID_PIN(pin_num))
447 /* Produce an update descriptor */
448 memset(&upd, 0, sizeof(upd));
449 if ((error = chipc_gpio_pin_update(sc, &upd, pin_num, flags)))
452 /* Commit the update */
454 error = chipc_gpio_commit_update(sc, &upd);
461 chipc_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
462 uint32_t change_pins, uint32_t *orig_pins)
464 struct chipc_gpio_softc *sc;
465 struct chipc_gpio_update upd;
466 uint32_t out, outen, ctrl;
470 sc = device_get_softc(dev);
472 if (first_pin >= CC_GPIO_NPINS)
475 /* Determine the actual number of referenced pins */
476 if (clear_pins == 0 && change_pins == 0) {
477 num_pins = CC_GPIO_NPINS - first_pin;
479 int num_clear_pins, num_change_pins;
481 num_clear_pins = flsl((u_long)clear_pins);
482 num_change_pins = flsl((u_long)change_pins);
483 num_pins = MAX(num_clear_pins, num_change_pins);
486 /* Validate the full pin range */
487 if (!CC_GPIO_VALID_PINS(first_pin, num_pins))
490 /* Produce an update descriptor for all pins, relative to the current
493 memset(&upd, 0, sizeof(upd));
495 out = CC_GPIO_RD4(sc, CHIPC_GPIOOUT);
496 outen = CC_GPIO_RD4(sc, CHIPC_GPIOOUTEN);
497 ctrl = CC_GPIO_RD4(sc, CHIPC_GPIOCTRL);
499 for (uint32_t i = 0; i < num_pins; i++) {
505 /* The pin must be configured for output */
506 if ((outen & (1 << pin)) == 0) {
511 /* The pin must not tristated */
512 if ((ctrl & (1 << pin)) != 0) {
517 /* Fetch current state */
518 if (out & (1 << pin)) {
524 /* Apply clear/toggle request */
525 if (clear_pins & (1 << pin))
528 if (change_pins & (1 << pin))
529 pin_high = !pin_high;
531 /* Add to our update descriptor */
532 CC_GPIO_UPDATE(&upd, pin, out, pin_high);
535 /* Commit the update */
536 error = chipc_gpio_commit_update(sc, &upd);
543 chipc_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
546 struct chipc_gpio_softc *sc;
547 struct chipc_gpio_update upd;
550 sc = device_get_softc(dev);
552 if (!CC_GPIO_VALID_PINS(first_pin, num_pins))
555 /* Produce an update descriptor */
556 memset(&upd, 0, sizeof(upd));
557 for (uint32_t i = 0; i < num_pins; i++) {
561 flags = pin_flags[i];
563 /* As per the gpio_config_32 API documentation, any pins for
564 * which neither GPIO_PIN_OUTPUT or GPIO_PIN_INPUT are set
565 * should be ignored and left unmodified */
566 if ((flags & (GPIO_PIN_OUTPUT|GPIO_PIN_INPUT)) == 0)
569 if ((error = chipc_gpio_pin_update(sc, &upd, pin, flags)))
573 /* Commit the update */
575 error = chipc_gpio_commit_update(sc, &upd);
583 * Commit a single @p reg register update.
586 chipc_gpio_commit_reg(struct chipc_gpio_softc *sc, bus_size_t offset,
587 struct chipc_gpio_reg *reg)
591 CC_GPIO_LOCK_ASSERT(sc, MA_OWNED);
596 value = bhnd_bus_read_4(sc->mem_res, offset);
600 bhnd_bus_write_4(sc->mem_res, offset, value);
604 * Commit the set of GPIO register updates described by @p update.
607 chipc_gpio_commit_update(struct chipc_gpio_softc *sc,
608 struct chipc_gpio_update *update)
610 CC_GPIO_LOCK_ASSERT(sc, MA_OWNED);
612 /* Commit pulldown/pullup before potentially disabling an output pin */
613 chipc_gpio_commit_reg(sc, CHIPC_GPIOPD, &update->pulldown);
614 chipc_gpio_commit_reg(sc, CHIPC_GPIOPU, &update->pullup);
616 /* Commit output settings before potentially enabling an output pin */
617 chipc_gpio_commit_reg(sc, CHIPC_GPIOTIMEROUTMASK,
618 &update->timeroutmask);
619 chipc_gpio_commit_reg(sc, CHIPC_GPIOOUT, &update->out);
621 /* Commit input/output/tristate modes */
622 chipc_gpio_commit_reg(sc, CHIPC_GPIOOUTEN, &update->outen);
623 chipc_gpio_commit_reg(sc, CHIPC_GPIOCTRL, &update->ctrl);
629 * Apply the changes described by @p flags for @p pin_num to the given @p update
633 chipc_gpio_pin_update(struct chipc_gpio_softc *sc,
634 struct chipc_gpio_update *update, uint32_t pin_num, uint32_t flags)
636 chipc_gpio_pin_mode mode;
639 if (!CC_GPIO_VALID_PIN(pin_num))
642 /* Verify flag compatibility and determine the pin mode */
643 if ((error = chipc_gpio_check_flags(sc, pin_num, flags, &mode)))
646 /* Apply the mode-specific changes */
648 case CC_GPIO_PIN_INPUT:
649 CC_GPIO_UPDATE(update, pin_num, pullup, false);
650 CC_GPIO_UPDATE(update, pin_num, pulldown, false);
651 CC_GPIO_UPDATE(update, pin_num, out, false);
652 CC_GPIO_UPDATE(update, pin_num, outen, false);
653 CC_GPIO_UPDATE(update, pin_num, timeroutmask, false);
654 CC_GPIO_UPDATE(update, pin_num, ctrl, false);
656 if (flags & GPIO_PIN_PULLUP) {
657 CC_GPIO_UPDATE(update, pin_num, pullup, true);
658 } else if (flags & GPIO_PIN_PULLDOWN) {
659 CC_GPIO_UPDATE(update, pin_num, pulldown, true);
664 case CC_GPIO_PIN_OUTPUT:
665 CC_GPIO_UPDATE(update, pin_num, pullup, false);
666 CC_GPIO_UPDATE(update, pin_num, pulldown, false);
667 CC_GPIO_UPDATE(update, pin_num, outen, true);
668 CC_GPIO_UPDATE(update, pin_num, timeroutmask, false);
669 CC_GPIO_UPDATE(update, pin_num, ctrl, false);
671 if (flags & GPIO_PIN_PRESET_HIGH) {
672 CC_GPIO_UPDATE(update, pin_num, out, true);
673 } else if (flags & GPIO_PIN_PRESET_LOW) {
674 CC_GPIO_UPDATE(update, pin_num, out, false);
677 if (flags & GPIO_PIN_PULSATE)
678 CC_GPIO_UPDATE(update, pin_num, timeroutmask, true);
682 case CC_GPIO_PIN_TRISTATE:
683 CC_GPIO_UPDATE(update, pin_num, pullup, false);
684 CC_GPIO_UPDATE(update, pin_num, pulldown, false);
685 CC_GPIO_UPDATE(update, pin_num, out, false);
686 CC_GPIO_UPDATE(update, pin_num, outen, false);
687 CC_GPIO_UPDATE(update, pin_num, timeroutmask, false);
688 CC_GPIO_UPDATE(update, pin_num, ctrl, true);
690 if (flags & GPIO_PIN_OUTPUT)
691 CC_GPIO_UPDATE(update, pin_num, outen, true);
696 device_printf(sc->dev, "unknown pin mode %d\n", mode);
701 * Verify that @p flags are valid for use with @p pin_num, and on success,
702 * return the pin mode described by @p flags in @p mode.
704 * @param sc GPIO driver instance state.
705 * @param pin_num The pin number to configure.
706 * @param flags The pin flags to be validated.
707 * @param[out] mode On success, will be populated with the GPIO pin mode
708 * defined by @p flags.
711 * @retval EINVAL if @p flags are invalid.
714 chipc_gpio_check_flags(struct chipc_gpio_softc *sc, uint32_t pin_num,
715 uint32_t flags, chipc_gpio_pin_mode *mode)
717 uint32_t mode_flag, input_flag, output_flag;
719 CC_GPIO_ASSERT_VALID_PIN(sc, pin_num);
721 mode_flag = flags & (GPIO_PIN_OUTPUT | GPIO_PIN_INPUT |
723 output_flag = flags & (GPIO_PIN_PRESET_HIGH | GPIO_PIN_PRESET_LOW
725 input_flag = flags & (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN);
728 case GPIO_PIN_OUTPUT:
729 /* No input flag(s) should be set */
733 /* Validate our output flag(s) */
734 switch (output_flag) {
735 case GPIO_PIN_PRESET_HIGH:
736 case GPIO_PIN_PRESET_LOW:
737 case (GPIO_PIN_PRESET_HIGH|GPIO_PIN_PULSATE):
738 case (GPIO_PIN_PRESET_LOW|GPIO_PIN_PULSATE):
740 /* Check for unhandled flags */
741 if ((flags & ~(mode_flag | output_flag)) != 0)
744 *mode = CC_GPIO_PIN_OUTPUT;
748 /* Incompatible output flags */
753 /* No output flag(s) should be set */
754 if (output_flag != 0)
757 /* Validate our input flag(s) */
758 switch (input_flag) {
759 case GPIO_PIN_PULLUP:
760 case GPIO_PIN_PULLDOWN:
762 /* Check for unhandled flags */
763 if ((flags & ~(mode_flag | input_flag)) != 0)
766 *mode = CC_GPIO_PIN_INPUT;
770 /* Incompatible input flags */
776 case (GPIO_PIN_TRISTATE|GPIO_PIN_OUTPUT):
777 case GPIO_PIN_TRISTATE:
778 /* No input or output flag(s) should be set */
779 if (input_flag != 0 || output_flag != 0)
782 /* Check for unhandled flags */
783 if ((flags & ~mode_flag) != 0)
786 *mode = CC_GPIO_PIN_TRISTATE;
790 /* Incompatible mode flags */
796 * Return the current pin mode for @p pin_num.
798 * @param sc GPIO driver instance state.
799 * @param pin_num The pin number to query.
801 static chipc_gpio_pin_mode
802 chipc_gpio_pin_get_mode(struct chipc_gpio_softc *sc, uint32_t pin_num)
804 CC_GPIO_LOCK_ASSERT(sc, MA_OWNED);
805 CC_GPIO_ASSERT_VALID_PIN(sc, pin_num);
807 if (CC_GPIO_RDFLAG(sc, pin_num, GPIOCTRL)) {
808 return (CC_GPIO_PIN_TRISTATE);
809 } else if (CC_GPIO_RDFLAG(sc, pin_num, GPIOOUTEN)) {
810 return (CC_GPIO_PIN_OUTPUT);
812 return (CC_GPIO_PIN_INPUT);
816 static device_method_t chipc_gpio_methods[] = {
817 /* Device interface */
818 DEVMETHOD(device_probe, chipc_gpio_probe),
819 DEVMETHOD(device_attach, chipc_gpio_attach),
820 DEVMETHOD(device_detach, chipc_gpio_detach),
823 DEVMETHOD(gpio_get_bus, chipc_gpio_get_bus),
824 DEVMETHOD(gpio_pin_max, chipc_gpio_pin_max),
825 DEVMETHOD(gpio_pin_getname, chipc_gpio_pin_getname),
826 DEVMETHOD(gpio_pin_getflags, chipc_gpio_pin_getflags),
827 DEVMETHOD(gpio_pin_getcaps, chipc_gpio_pin_getcaps),
828 DEVMETHOD(gpio_pin_setflags, chipc_gpio_pin_setflags),
829 DEVMETHOD(gpio_pin_get, chipc_gpio_pin_get),
830 DEVMETHOD(gpio_pin_set, chipc_gpio_pin_set),
831 DEVMETHOD(gpio_pin_toggle, chipc_gpio_pin_toggle),
832 DEVMETHOD(gpio_pin_access_32, chipc_gpio_pin_access_32),
833 DEVMETHOD(gpio_pin_config_32, chipc_gpio_pin_config_32),
838 static devclass_t gpio_devclass;
840 DEFINE_CLASS_0(gpio, chipc_gpio_driver, chipc_gpio_methods, sizeof(struct chipc_gpio_softc));
841 EARLY_DRIVER_MODULE(chipc_gpio, bhnd_chipc, chipc_gpio_driver,
842 gpio_devclass, NULL, NULL, BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
844 MODULE_DEPEND(chipc_gpio, bhnd, 1, 1, 1);
845 MODULE_DEPEND(chipc_gpio, gpiobus, 1, 1, 1);
846 MODULE_VERSION(chipc_gpio, 1);