2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
5 * Copyright (C) 2010, Broadcom Corporation.
8 * This file is derived from the hndpmu.h header contributed by Broadcom
9 * to to the Linux staging repository, as well as later revisions of hndpmu.h
10 * distributed with the Asus RT-N16 firmware source code release.
12 * Permission to use, copy, modify, and/or distribute this software for any
13 * purpose with or without fee is hereby granted, provided that the above
14 * copyright notice and this permission notice appear in all copies.
16 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
17 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
20 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
21 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
22 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
27 #ifndef _BHND_CORES_PMU_BHND_PMU_PRIVATE_H_
28 #define _BHND_CORES_PMU_BHND_PMU_PRIVATE_H_
30 #include <sys/types.h>
32 #include "bhnd_pmuvar.h"
35 #define BHND_PMU_READ_4(_sc, _reg) (_sc)->io->rd4((_reg), (_sc)->io_ctx)
36 #define BHND_PMU_WRITE_4(_sc, _reg, _val) \
37 (_sc)->io->wr4((_reg), (_val), (_sc)->io_ctx)
39 #define BHND_PMU_AND_4(_sc, _reg, _val) \
40 BHND_PMU_WRITE_4((_sc), (_reg), \
41 BHND_PMU_READ_4((_sc), (_reg)) & (_val))
42 #define BHND_PMU_OR_4(_sc, _reg, _val) \
43 BHND_PMU_WRITE_4((_sc), (_reg), \
44 BHND_PMU_READ_4((_sc), (_reg)) | (_val))
46 /* Indirect register support */
47 #define BHND_PMU_IND_READ(_sc, _src, _reg) \
48 bhnd_pmu_ind_read((_sc)->io, (_sc)->io_ctx, \
49 BHND_PMU_ ## _src ## _ADDR, BHND_PMU_ ## _src ## _DATA, (_reg))
50 #define BHND_PMU_IND_WRITE(_sc, _src, _reg, _val, _mask) \
51 bhnd_pmu_ind_write((_sc)->io, (_sc)->io_ctx, \
52 BHND_PMU_ ## _src ## _ADDR, \
53 BHND_PMU_ ## _src ## _DATA, (_reg), (_val), (_mask))
55 /* Chip Control indirect registers */
56 #define BHND_PMU_CCTRL_READ(_sc, _reg) \
57 BHND_PMU_IND_READ((_sc), CHIP_CONTROL, (_reg))
58 #define BHND_PMU_CCTRL_WRITE(_sc, _reg, _val, _mask) \
59 BHND_PMU_IND_WRITE((_sc), CHIP_CONTROL, (_reg), (_val), (_mask))
61 /* Regulator Control indirect registers */
62 #define BHND_PMU_REGCTRL_READ(_sc, _reg) \
63 BHND_PMU_IND_READ((_sc), REG_CONTROL, (_reg))
64 #define BHND_PMU_REGCTRL_WRITE(_sc, _reg, _val, _mask) \
65 BHND_PMU_IND_WRITE((_sc), REG_CONTROL, (_reg), (_val), (_mask))
67 /* PLL Control indirect registers */
68 #define BHND_PMU_PLL_READ(_sc, _reg) \
69 BHND_PMU_IND_READ((_sc), PLL_CONTROL, (_reg))
70 #define BHND_PMU_PLL_WRITE(_sc, _reg, _val, _mask) \
71 BHND_PMU_IND_WRITE((_sc), PLL_CONTROL, (_reg), (_val), (_mask))
74 /** FVCO frequencies, in Hz */
76 FVCO_880 = 880 * 1000, /**< 880MHz */
77 FVCO_1760 = 1760 * 1000, /**< 1760MHz */
78 FVCO_1440 = 1440 * 1000, /**< 1440MHz */
79 FVCO_960 = 960 * 1000, /**< 960MHz */
82 /** LDO voltage tunables */
84 SET_LDO_VOLTAGE_LDO1 = 1,
85 SET_LDO_VOLTAGE_LDO2 = 2,
86 SET_LDO_VOLTAGE_LDO3 = 3,
87 SET_LDO_VOLTAGE_PAREF = 4,
88 SET_LDO_VOLTAGE_CLDO_PWM = 5,
89 SET_LDO_VOLTAGE_CLDO_BURST = 6,
90 SET_LDO_VOLTAGE_CBUCK_PWM = 7,
91 SET_LDO_VOLTAGE_CBUCK_BURST = 8,
92 SET_LDO_VOLTAGE_LNLDO1 = 9,
93 SET_LDO_VOLTAGE_LNLDO2_SEL = 10,
97 uint32_t bhnd_pmu_ind_read(const struct bhnd_pmu_io *io, void *io_ctx,
98 bus_size_t addr, bus_size_t data, uint32_t reg);
99 void bhnd_pmu_ind_write(const struct bhnd_pmu_io *io, void *io_ctx,
100 bus_size_t addr, bus_size_t data, uint32_t reg,
101 uint32_t val, uint32_t mask);
103 int bhnd_pmu_init(struct bhnd_pmu_softc *sc);
104 void bhnd_pmu_pll_init(struct bhnd_pmu_softc *sc, uint32_t xtalfreq);
105 int bhnd_pmu_res_init(struct bhnd_pmu_softc *sc);
106 void bhnd_pmu_swreg_init(struct bhnd_pmu_softc *sc);
108 uint32_t bhnd_pmu_force_ilp(struct bhnd_pmu_softc *sc, bool force);
110 void bhnd_pmu_set_switcher_voltage(struct bhnd_pmu_softc *sc,
111 uint8_t bb_voltage, uint8_t rf_voltage);
112 int bhnd_pmu_set_ldo_voltage(struct bhnd_pmu_softc *sc,
113 uint8_t ldo, uint8_t voltage);
114 int bhnd_pmu_fast_pwrup_delay(struct bhnd_pmu_softc *sc,
116 void bhnd_pmu_rcal(struct bhnd_pmu_softc *sc);
117 int bhnd_pmu_set_spuravoid(struct bhnd_pmu_softc *sc,
118 bhnd_pmu_spuravoid spuravoid);
120 bool bhnd_pmu_is_otp_powered(struct bhnd_pmu_softc *sc);
121 uint32_t bhnd_pmu_measure_alpclk(struct bhnd_pmu_softc *sc);
123 int bhnd_pmu_radio_enable(struct bhnd_pmu_softc *sc,
124 device_t d11core, bool enable);
126 uint32_t bhnd_pmu_waitforclk_on_backplane(struct bhnd_pmu_softc *sc,
127 uint32_t clk, uint32_t delay);
129 int bhnd_pmu_otp_power(struct bhnd_pmu_softc *sc, bool on);
130 void bhnd_pmu_sdiod_drive_strength_init(struct bhnd_pmu_softc *sc,
131 uint32_t drivestrength);
133 int bhnd_pmu_paref_ldo_enable(struct bhnd_pmu_softc *sc,
136 #endif /* _BHND_CORES_PMU_BHND_PMU_PRIVATE_H_ */