2 * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
3 * Copyright (C) 2010, Broadcom Corporation.
6 * This file is derived from the hndpmu.h header contributed by Broadcom
7 * to to the Linux staging repository, as well as later revisions of hndpmu.h
8 * distributed with the Asus RT-N16 firmware source code release.
10 * Permission to use, copy, modify, and/or distribute this software for any
11 * purpose with or without fee is hereby granted, provided that the above
12 * copyright notice and this permission notice appear in all copies.
14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
17 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
19 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
20 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
25 #ifndef _BHND_CORES_PMU_BHND_PMU_PRIVATE_H_
26 #define _BHND_CORES_PMU_BHND_PMU_PRIVATE_H_
28 #include <sys/types.h>
30 #include "bhnd_pmuvar.h"
33 #define BHND_PMU_READ_4(_sc, _reg) (_sc)->io->rd4((_reg), (_sc)->io_ctx)
34 #define BHND_PMU_WRITE_4(_sc, _reg, _val) \
35 (_sc)->io->wr4((_reg), (_val), (_sc)->io_ctx)
37 #define BHND_PMU_AND_4(_sc, _reg, _val) \
38 BHND_PMU_WRITE_4((_sc), (_reg), \
39 BHND_PMU_READ_4((_sc), (_reg)) & (_val))
40 #define BHND_PMU_OR_4(_sc, _reg, _val) \
41 BHND_PMU_WRITE_4((_sc), (_reg), \
42 BHND_PMU_READ_4((_sc), (_reg)) | (_val))
44 /* Indirect register support */
45 #define BHND_PMU_IND_READ(_sc, _src, _reg) \
46 bhnd_pmu_ind_read((_sc)->io, (_sc)->io_ctx, \
47 BHND_PMU_ ## _src ## _ADDR, BHND_PMU_ ## _src ## _DATA, (_reg))
48 #define BHND_PMU_IND_WRITE(_sc, _src, _reg, _val, _mask) \
49 bhnd_pmu_ind_write((_sc)->io, (_sc)->io_ctx, \
50 BHND_PMU_ ## _src ## _ADDR, \
51 BHND_PMU_ ## _src ## _DATA, (_reg), (_val), (_mask))
53 /* Chip Control indirect registers */
54 #define BHND_PMU_CCTRL_READ(_sc, _reg) \
55 BHND_PMU_IND_READ((_sc), CHIPCTL, (_reg))
56 #define BHND_PMU_CCTRL_WRITE(_sc, _reg, _val, _mask) \
57 BHND_PMU_IND_WRITE((_sc), CHIPCTL, (_reg), (_val), (_mask))
59 /* Register Control indirect registers */
60 #define BHND_PMU_REGCTRL_READ(_sc, _reg) \
61 BHND_PMU_IND_READ((_sc), REG_CONTROL, (_reg))
62 #define BHND_PMU_REGCTRL_WRITE(_sc, _reg, _val, _mask) \
63 BHND_PMU_IND_WRITE((_sc), REG_CONTROL, (_reg), (_val), (_mask))
65 /* PLL Control indirect registers */
66 #define BHND_PMU_PLL_READ(_sc, _reg) \
67 BHND_PMU_IND_READ((_sc), PLL_CONTROL, (_reg))
68 #define BHND_PMU_PLL_WRITE(_sc, _reg, _val, _mask) \
69 BHND_PMU_IND_WRITE((_sc), PLL_CONTROL, (_reg), (_val), (_mask))
72 /** FVCO frequencies, in Hz */
74 FVCO_880 = 880 * 1000, /**< 880MHz */
75 FVCO_1760 = 1760 * 1000, /**< 1760MHz */
76 FVCO_1440 = 1440 * 1000, /**< 1440MHz */
77 FVCO_960 = 960 * 1000, /**< 960MHz */
80 /** LDO voltage tunables */
82 SET_LDO_VOLTAGE_LDO1 = 1,
83 SET_LDO_VOLTAGE_LDO2 = 2,
84 SET_LDO_VOLTAGE_LDO3 = 3,
85 SET_LDO_VOLTAGE_PAREF = 4,
86 SET_LDO_VOLTAGE_CLDO_PWM = 5,
87 SET_LDO_VOLTAGE_CLDO_BURST = 6,
88 SET_LDO_VOLTAGE_CBUCK_PWM = 7,
89 SET_LDO_VOLTAGE_CBUCK_BURST = 8,
90 SET_LDO_VOLTAGE_LNLDO1 = 9,
91 SET_LDO_VOLTAGE_LNLDO2_SEL = 10,
95 uint32_t bhnd_pmu_ind_read(const struct bhnd_pmu_io *io, void *io_ctx,
96 bus_size_t addr, bus_size_t data, uint32_t reg);
97 void bhnd_pmu_ind_write(const struct bhnd_pmu_io *io, void *io_ctx,
98 bus_size_t addr, bus_size_t data, uint32_t reg,
99 uint32_t val, uint32_t mask);
101 bool bhnd_pmu_wait_clkst(struct bhnd_pmu_softc *sc, device_t dev,
102 struct bhnd_resource *r, bus_size_t clkst_reg,
103 uint32_t value, uint32_t mask);
105 int bhnd_pmu_init(struct bhnd_pmu_softc *sc);
106 void bhnd_pmu_pll_init(struct bhnd_pmu_softc *sc, uint32_t xtalfreq);
107 int bhnd_pmu_res_init(struct bhnd_pmu_softc *sc);
108 void bhnd_pmu_swreg_init(struct bhnd_pmu_softc *sc);
110 uint32_t bhnd_pmu_force_ilp(struct bhnd_pmu_softc *sc, bool force);
112 void bhnd_pmu_set_switcher_voltage(struct bhnd_pmu_softc *sc,
113 uint8_t bb_voltage, uint8_t rf_voltage);
114 void bhnd_pmu_set_ldo_voltage(struct bhnd_pmu_softc *sc,
115 uint8_t ldo, uint8_t voltage);
116 int bhnd_pmu_fast_pwrup_delay(struct bhnd_pmu_softc *sc,
117 uint16_t *pwrup_delay);
118 void bhnd_pmu_rcal(struct bhnd_pmu_softc *sc);
119 void bhnd_pmu_spuravoid(struct bhnd_pmu_softc *sc,
122 bool bhnd_pmu_is_otp_powered(struct bhnd_pmu_softc *sc);
123 uint32_t bhnd_pmu_measure_alpclk(struct bhnd_pmu_softc *sc);
125 int bhnd_pmu_radio_enable(struct bhnd_pmu_softc *sc,
126 device_t d11core, bool enable);
128 uint32_t bhnd_pmu_waitforclk_on_backplane(struct bhnd_pmu_softc *sc,
129 uint32_t clk, uint32_t delay);
131 int bhnd_pmu_otp_power(struct bhnd_pmu_softc *sc, bool on);
132 void bhnd_pmu_sdiod_drive_strength_init(struct bhnd_pmu_softc *sc,
133 uint32_t drivestrength);
135 void bhnd_pmu_paref_ldo_enable(struct bhnd_pmu_softc *sc,
138 #endif /* _BHND_CORES_PMU_BHND_PMU_PRIVATE_H_ */