2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
3 * Copyright (c) 2017 The FreeBSD Foundation
6 * Portions of this software were developed by Landon Fuller
7 * under sponsorship from the FreeBSD Foundation.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
16 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
17 * redistribution must be conditioned upon including a substantially
18 * similar Disclaimer requirement for further binary redistribution.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
24 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
25 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
26 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
29 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGES.
36 #ifndef _SIBA_SIBAVAR_H_
37 #define _SIBA_SIBAVAR_H_
39 #include <sys/param.h>
41 #include <sys/limits.h>
43 #include <sys/mutex.h>
45 #include <machine/bus.h>
51 * Internal definitions shared by siba(4) driver implementations.
54 struct siba_addrspace;
55 struct siba_cfg_block;
60 int siba_probe(device_t dev);
61 int siba_attach(device_t dev);
62 int siba_detach(device_t dev);
63 int siba_resume(device_t dev);
64 int siba_suspend(device_t dev);
65 u_int siba_get_intr_count(device_t dev, device_t child);
66 int siba_get_intr_ivec(device_t dev, device_t child,
67 u_int intr, u_int *ivec);
69 uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor);
71 struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow,
72 u_int core_idx, int unit);
74 int siba_add_children(device_t bus);
76 struct siba_devinfo *siba_alloc_dinfo(device_t dev);
77 int siba_init_dinfo(device_t dev,
78 struct siba_devinfo *dinfo,
79 const struct siba_core_id *core_id);
80 void siba_free_dinfo(device_t dev, device_t child,
81 struct siba_devinfo *dinfo);
83 u_int siba_port_count(struct siba_core_id *core_id,
84 bhnd_port_type port_type);
85 bool siba_is_port_valid(struct siba_core_id *core_id,
86 bhnd_port_type port_type, u_int port);
88 u_int siba_port_region_count(
89 struct siba_core_id *core_id,
90 bhnd_port_type port_type, u_int port);
92 int siba_cfg_index(struct siba_core_id *core_id,
93 bhnd_port_type type, u_int port, u_int region,
96 int siba_addrspace_index(struct siba_core_id *core_id,
97 bhnd_port_type type, u_int port, u_int region,
100 u_int siba_addrspace_device_port(u_int addrspace);
101 u_int siba_addrspace_device_region(u_int addrspace);
103 u_int siba_cfg_agent_port(u_int cfg);
104 u_int siba_cfg_agent_region(u_int cfg);
106 struct siba_addrspace *siba_find_addrspace(struct siba_devinfo *dinfo,
107 bhnd_port_type type, u_int port, u_int region);
109 struct siba_cfg_block *siba_find_cfg_block(struct siba_devinfo *dinfo,
110 bhnd_port_type type, u_int port, u_int region);
112 int siba_append_dinfo_region(struct siba_devinfo *dinfo,
113 uint8_t sid, uint32_t base, uint32_t size,
114 uint32_t bus_reserved);
116 u_int siba_admatch_offset(uint8_t addrspace);
117 int siba_parse_admatch(uint32_t am, uint32_t *addr,
120 void siba_write_target_state(device_t dev,
121 struct siba_devinfo *dinfo, bus_size_t reg,
122 uint32_t value, uint32_t mask);
123 int siba_wait_target_state(device_t dev,
124 struct siba_devinfo *dinfo, bus_size_t reg,
125 uint32_t value, uint32_t mask, u_int usec);
128 /* Sonics configuration register blocks */
129 #define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */
130 #define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */
131 #define SIBA_MAX_CFG SIBA_CFG_NUM_2_3 /**< maximum number of supported config
134 #define SIBA_CFG_RID_BASE 100 /**< base resource ID for SIBA_CFG* register allocations */
135 #define SIBA_CFG_RID(_dinfo, _cfg) \
136 (SIBA_CFG_RID_BASE + (_cfg) + \
137 (_dinfo->core_id.core_info.core_idx * SIBA_MAX_CFG))
139 /* Sonics/OCP address space mappings */
140 #define SIBA_CORE_ADDRSPACE 0 /**< Address space mapping the primary
143 #define SIBA_MAX_ADDRSPACE 4 /**< Maximum number of Sonics/OCP
144 * address space mappings for a
147 /* bhnd(4) (port,region) representation of siba address space mappings */
148 #define SIBA_MAX_PORT 2 /**< maximum number of advertised
151 /** siba(4) address space descriptor */
152 struct siba_addrspace {
153 uint32_t sa_base; /**< base address */
154 uint32_t sa_size; /**< size */
155 int sa_rid; /**< bus resource id */
156 uint32_t sa_bus_reserved;/**< number of bytes at high end of
157 * address space reserved for the bus */
160 /** siba(4) config block descriptor */
161 struct siba_cfg_block {
162 uint32_t cb_base; /**< base address */
163 uint32_t cb_size; /**< size */
164 int cb_rid; /**< bus resource id */
167 /** siba(4) backplane interrupt flag descriptor */
169 u_int flag; /**< backplane flag # */
170 bool mapped; /**< if an irq has been mapped */
171 int rid; /**< bus resource id, or -1 if unassigned */
172 rman_res_t irq; /**< the mapped bus irq, if any */
176 * siba(4) per-core identification info.
178 struct siba_core_id {
179 struct bhnd_core_info core_info; /**< standard bhnd(4) core info */
180 uint16_t sonics_vendor; /**< OCP vendor identifier used to generate
181 * the JEDEC-106 bhnd(4) vendor identifier. */
182 uint8_t sonics_rev; /**< sonics backplane revision code */
183 uint8_t num_addrspace; /**< number of address ranges mapped to
185 uint8_t num_cfg_blocks; /**< number of Sonics configuration register
186 blocks mapped to the core's enumeration
191 * siba(4) per-core PMU allocation state.
194 SIBA_PMU_NONE, /**< If the core has not yet allocated PMU state */
195 SIBA_PMU_BHND, /**< If standard bhnd(4) PMU support should be used */
196 SIBA_PMU_PWRCTL, /**< If legacy PWRCTL PMU support should be used */
197 SIBA_PMU_FIXED, /**< If legacy fixed (no-op) PMU support should be used */
201 * siba(4) per-device info
203 struct siba_devinfo {
204 struct resource_list resources; /**< per-core memory regions. */
205 struct siba_core_id core_id; /**< core identification info */
206 struct siba_addrspace addrspace[SIBA_MAX_ADDRSPACE]; /**< memory map descriptors */
207 struct siba_cfg_block cfg[SIBA_MAX_CFG]; /**< config block descriptors */
208 struct siba_intr intr; /**< interrupt flag descriptor, if any */
209 bool intr_en; /**< if true, core has an assigned interrupt flag */
211 struct bhnd_resource *cfg_res[SIBA_MAX_CFG]; /**< bus-mapped config block registers */
212 int cfg_rid[SIBA_MAX_CFG]; /**< bus-mapped config block resource IDs */
213 siba_pmu_state pmu_state; /**< per-core PMU state */
215 void *bhnd_info; /**< if SIBA_PMU_BHND, bhnd(4)-managed per-core PMU info. */
216 device_t pwrctl; /**< if SIBA_PMU_PWRCTL, legacy PWRCTL provider. */
220 /** siba(4) per-instance state */
222 struct bhnd_softc bhnd_sc; /**< bhnd state */
223 device_t dev; /**< siba device */
224 struct mtx mtx; /**< state mutex */
228 #define SIBA_LOCK_INIT(sc) \
229 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), NULL, MTX_DEF)
230 #define SIBA_LOCK(sc) mtx_lock(&(sc)->mtx)
231 #define SIBA_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
232 #define SIBA_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what)
233 #define SIBA_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
235 #endif /* _SIBA_SIBAVAR_H_ */