]> CyberLeo.Net >> Repos - FreeBSD/FreeBSD.git/blob - sys/dev/bnxt/bnxt.h
Merge llvm, clang, lld, lldb, compiler-rt and libc++ r302069, and update
[FreeBSD/FreeBSD.git] / sys / dev / bnxt / bnxt.h
1 /*-
2  * Broadcom NetXtreme-C/E network driver.
3  *
4  * Copyright (c) 2016 Broadcom, All Rights Reserved.
5  * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26  * THE POSSIBILITY OF SUCH DAMAGE.
27  */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #ifndef _BNXT_H
33 #define _BNXT_H
34
35 #include <sys/types.h>
36 #include <sys/bus.h>
37 #include <sys/bus_dma.h>
38 #include <sys/socket.h>
39 #include <sys/sysctl.h>
40 #include <sys/taskqueue.h>
41
42 #include <net/ethernet.h>
43 #include <net/if.h>
44 #include <net/if_var.h>
45 #include <net/iflib.h>
46
47 #include "hsi_struct_def.h"
48
49 /* PCI IDs */
50 #define BROADCOM_VENDOR_ID      0x14E4
51
52 #define BCM57301        0x16c8
53 #define BCM57302        0x16c9
54 #define BCM57304        0x16ca
55 #define BCM57311        0x16ce
56 #define BCM57312        0x16cf
57 #define BCM57314        0x16df
58 #define BCM57402        0x16d0
59 #define BCM57402_NPAR   0x16d4
60 #define BCM57404        0x16d1
61 #define BCM57404_NPAR   0x16e7
62 #define BCM57406        0x16d2
63 #define BCM57406_NPAR   0x16e8
64 #define BCM57407        0x16d5
65 #define BCM57407_NPAR   0x16ea
66 #define BCM57407_SFP    0x16e9
67 #define BCM57412        0x16d6
68 #define BCM57412_NPAR1  0x16de
69 #define BCM57412_NPAR2  0x16eb
70 #define BCM57414        0x16d7
71 #define BCM57414_NPAR1  0x16ec
72 #define BCM57414_NPAR2  0x16ed
73 #define BCM57416        0x16d8
74 #define BCM57416_NPAR1  0x16ee
75 #define BCM57416_NPAR2  0x16ef
76 #define BCM57416_SFP    0x16e3
77 #define BCM57417        0x16d9
78 #define BCM57417_NPAR1  0x16c0
79 #define BCM57417_NPAR2  0x16cc
80 #define BCM57417_SFP    0x16e2
81 #define BCM58700        0x16cd
82 #define NETXTREME_C_VF1 0x16cb
83 #define NETXTREME_C_VF2 0x16e1
84 #define NETXTREME_C_VF3 0x16e5
85 #define NETXTREME_E_VF1 0x16c1
86 #define NETXTREME_E_VF2 0x16d3
87 #define NETXTREME_E_VF3 0x16dc
88
89 #define CSUM_OFFLOAD            (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
90                                  CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
91                                  CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
92
93 #define BNXT_MAX_MTU    9000
94
95 #define BNXT_RSS_HASH_TYPE_TCPV4        0
96 #define BNXT_RSS_HASH_TYPE_UDPV4        1
97 #define BNXT_RSS_HASH_TYPE_IPV4         2
98 #define BNXT_RSS_HASH_TYPE_TCPV6        3
99 #define BNXT_RSS_HASH_TYPE_UDPV6        4
100 #define BNXT_RSS_HASH_TYPE_IPV6         5
101 #define BNXT_GET_RSS_PROFILE_ID(rss_hash_type) ((rss_hash_type >> 1) & 0x1F)
102
103 #define BNXT_NO_MORE_WOL_FILTERS        0xFFFF
104 #define bnxt_wol_supported(softc)       ((softc)->flags & BNXT_FLAG_WOL_CAP)
105
106 /* Completion related defines */
107 #define CMP_VALID(cmp, v_bit) \
108         ((!!(((struct cmpl_base *)(cmp))->info3_v & htole32(CMPL_BASE_V))) == !!(v_bit) )
109
110 #define NEXT_CP_CONS_V(ring, cons, v_bit) do {                              \
111         if (__predict_false(++(cons) == (ring)->ring_size))                 \
112                 ((cons) = 0, (v_bit) = !v_bit);                             \
113 } while (0)
114
115 #define RING_NEXT(ring, idx) (__predict_false(idx + 1 == (ring)->ring_size) ? \
116                                                                 0 : idx + 1)
117
118 #define CMPL_PREFETCH_NEXT(cpr, idx)                                        \
119         __builtin_prefetch(&((struct cmpl_base *)(cpr)->ring.vaddr)[((idx) +\
120             (CACHE_LINE_SIZE / sizeof(struct cmpl_base))) &                 \
121             ((cpr)->ring.ring_size - 1)])
122
123 /*
124  * If we update the index, a write barrier is needed after the write to ensure
125  * the completion ring has space before the RX/TX ring does.  Since we can't
126  * make the RX and AG doorbells covered by the same barrier without remapping
127  * MSI-X vectors, we create the barrier over the enture doorbell bar.
128  * TODO: Remap the MSI-X vectors to allow a barrier to only cover the doorbells
129  *       for a single ring group.
130  *
131  * A barrier of just the size of the write is used to ensure the ordering
132  * remains correct and no writes are lost.
133  */
134 #define BNXT_CP_DISABLE_DB(ring) do {                                       \
135         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
136             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
137             BUS_SPACE_BARRIER_WRITE);                                       \
138         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
139             (ring)->softc->doorbell_bar.handle, 0,                          \
140             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
141         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
142             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
143             htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_MASK));          \
144 } while (0)
145
146 #define BNXT_CP_ENABLE_DB(ring) do {                                        \
147         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
148             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
149             BUS_SPACE_BARRIER_WRITE);                                       \
150         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
151             (ring)->softc->doorbell_bar.handle, 0,                          \
152             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
153         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
154             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
155             htole32(CMPL_DOORBELL_KEY_CMPL));                               \
156 } while (0)
157
158 #define BNXT_CP_IDX_ENABLE_DB(ring, cons) do {                              \
159         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
160             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
161             BUS_SPACE_BARRIER_WRITE);                                       \
162         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
163             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
164             htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID |      \
165             (cons)));                                                       \
166         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
167             (ring)->softc->doorbell_bar.handle, 0,                          \
168             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
169 } while (0)
170
171 #define BNXT_CP_IDX_DISABLE_DB(ring, cons) do {                             \
172         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
173             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
174             BUS_SPACE_BARRIER_WRITE);                                       \
175         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
176             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
177             htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID |      \
178             CMPL_DOORBELL_MASK | (cons)));                                  \
179         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
180             (ring)->softc->doorbell_bar.handle, 0,                          \
181             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
182 } while (0)
183
184 #define BNXT_TX_DB(ring, idx) do {                                          \
185         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
186             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
187             BUS_SPACE_BARRIER_WRITE);                                       \
188         bus_space_write_4(                                                  \
189             (ring)->softc->doorbell_bar.tag,                                \
190             (ring)->softc->doorbell_bar.handle,                             \
191             (ring)->doorbell, htole32(TX_DOORBELL_KEY_TX | (idx)));         \
192 } while (0)
193
194 #define BNXT_RX_DB(ring, idx) do {                                          \
195         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
196             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
197             BUS_SPACE_BARRIER_WRITE);                                       \
198         bus_space_write_4(                                                  \
199             (ring)->softc->doorbell_bar.tag,                                \
200             (ring)->softc->doorbell_bar.handle,                             \
201             (ring)->doorbell, htole32(RX_DOORBELL_KEY_RX | (idx)));         \
202 } while (0)
203
204 /* Lock macros */
205 #define BNXT_HWRM_LOCK_INIT(_softc, _name) \
206     mtx_init(&(_softc)->hwrm_lock, _name, "BNXT HWRM Lock", MTX_DEF)
207 #define BNXT_HWRM_LOCK(_softc)          mtx_lock(&(_softc)->hwrm_lock)
208 #define BNXT_HWRM_UNLOCK(_softc)        mtx_unlock(&(_softc)->hwrm_lock)
209 #define BNXT_HWRM_LOCK_DESTROY(_softc)  mtx_destroy(&(_softc)->hwrm_lock)
210 #define BNXT_HWRM_LOCK_ASSERT(_softc)   mtx_assert(&(_softc)->hwrm_lock,    \
211     MA_OWNED)
212
213 /* Chip info */
214 #define BNXT_TSO_SIZE   UINT16_MAX
215
216 /* NVRAM access */
217 enum bnxt_nvm_directory_type {
218         BNX_DIR_TYPE_UNUSED = 0,
219         BNX_DIR_TYPE_PKG_LOG = 1,
220         BNX_DIR_TYPE_UPDATE = 2,
221         BNX_DIR_TYPE_CHIMP_PATCH = 3,
222         BNX_DIR_TYPE_BOOTCODE = 4,
223         BNX_DIR_TYPE_VPD = 5,
224         BNX_DIR_TYPE_EXP_ROM_MBA = 6,
225         BNX_DIR_TYPE_AVS = 7,
226         BNX_DIR_TYPE_PCIE = 8,
227         BNX_DIR_TYPE_PORT_MACRO = 9,
228         BNX_DIR_TYPE_APE_FW = 10,
229         BNX_DIR_TYPE_APE_PATCH = 11,
230         BNX_DIR_TYPE_KONG_FW = 12,
231         BNX_DIR_TYPE_KONG_PATCH = 13,
232         BNX_DIR_TYPE_BONO_FW = 14,
233         BNX_DIR_TYPE_BONO_PATCH = 15,
234         BNX_DIR_TYPE_TANG_FW = 16,
235         BNX_DIR_TYPE_TANG_PATCH = 17,
236         BNX_DIR_TYPE_BOOTCODE_2 = 18,
237         BNX_DIR_TYPE_CCM = 19,
238         BNX_DIR_TYPE_PCI_CFG = 20,
239         BNX_DIR_TYPE_TSCF_UCODE = 21,
240         BNX_DIR_TYPE_ISCSI_BOOT = 22,
241         BNX_DIR_TYPE_ISCSI_BOOT_IPV6 = 24,
242         BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6 = 25,
243         BNX_DIR_TYPE_ISCSI_BOOT_CFG6 = 26,
244         BNX_DIR_TYPE_EXT_PHY = 27,
245         BNX_DIR_TYPE_SHARED_CFG = 40,
246         BNX_DIR_TYPE_PORT_CFG = 41,
247         BNX_DIR_TYPE_FUNC_CFG = 42,
248         BNX_DIR_TYPE_MGMT_CFG = 48,
249         BNX_DIR_TYPE_MGMT_DATA = 49,
250         BNX_DIR_TYPE_MGMT_WEB_DATA = 50,
251         BNX_DIR_TYPE_MGMT_WEB_META = 51,
252         BNX_DIR_TYPE_MGMT_EVENT_LOG = 52,
253         BNX_DIR_TYPE_MGMT_AUDIT_LOG = 53
254 };
255
256 enum bnxnvm_pkglog_field_index {
257         BNX_PKG_LOG_FIELD_IDX_INSTALLED_TIMESTAMP       = 0,
258         BNX_PKG_LOG_FIELD_IDX_PKG_DESCRIPTION           = 1,
259         BNX_PKG_LOG_FIELD_IDX_PKG_VERSION               = 2,
260         BNX_PKG_LOG_FIELD_IDX_PKG_TIMESTAMP             = 3,
261         BNX_PKG_LOG_FIELD_IDX_PKG_CHECKSUM              = 4,
262         BNX_PKG_LOG_FIELD_IDX_INSTALLED_ITEMS           = 5,
263         BNX_PKG_LOG_FIELD_IDX_INSTALLED_MASK            = 6
264 };
265
266 #define BNX_DIR_ORDINAL_FIRST           0
267 #define BNX_DIR_EXT_NONE                0
268
269 struct bnxt_bar_info {
270         struct resource         *res;
271         bus_space_tag_t         tag;
272         bus_space_handle_t      handle;
273         bus_size_t              size;
274         int                     rid;
275 };
276
277 struct bnxt_link_info {
278         uint8_t         media_type;
279         uint8_t         transceiver;
280         uint8_t         phy_addr;
281         uint8_t         phy_link_status;
282         uint8_t         wire_speed;
283         uint8_t         loop_back;
284         uint8_t         link_up;
285         uint8_t         last_link_up;
286         uint8_t         duplex;
287         uint8_t         last_duplex;
288         uint8_t         pause;
289         uint8_t         last_pause;
290         uint8_t         auto_pause;
291         uint8_t         force_pause;
292         uint8_t         duplex_setting;
293         uint8_t         auto_mode;
294 #define PHY_VER_LEN             3
295         uint8_t         phy_ver[PHY_VER_LEN];
296         uint8_t         phy_type;
297         uint16_t        link_speed;
298         uint16_t        support_speeds;
299         uint16_t        auto_link_speeds;
300         uint16_t        auto_link_speed;
301         uint16_t        force_link_speed;
302         uint32_t        preemphasis;
303
304         /* copy of requested setting */
305         uint8_t         autoneg;
306 #define BNXT_AUTONEG_SPEED      1
307 #define BNXT_AUTONEG_FLOW_CTRL  2
308         uint8_t         req_duplex;
309         uint8_t         req_flow_ctrl;
310         uint16_t        req_link_speed;
311 };
312
313 enum bnxt_cp_type {
314         BNXT_DEFAULT,
315         BNXT_TX,
316         BNXT_RX,
317         BNXT_SHARED
318 };
319
320 struct bnxt_cos_queue {
321         uint8_t id;
322         uint8_t profile;
323 };
324
325 struct bnxt_func_info {
326         uint32_t        fw_fid;
327         uint8_t         mac_addr[ETHER_ADDR_LEN];
328         uint16_t        max_rsscos_ctxs;
329         uint16_t        max_cp_rings;
330         uint16_t        max_tx_rings;
331         uint16_t        max_rx_rings;
332         uint16_t        max_hw_ring_grps;
333         uint16_t        max_irqs;
334         uint16_t        max_l2_ctxs;
335         uint16_t        max_vnics;
336         uint16_t        max_stat_ctxs;
337 };
338
339 struct bnxt_pf_info {
340 #define BNXT_FIRST_PF_FID       1
341 #define BNXT_FIRST_VF_FID       128
342         uint8_t         port_id;
343         uint32_t        first_vf_id;
344         uint16_t        active_vfs;
345         uint16_t        max_vfs;
346         uint32_t        max_encap_records;
347         uint32_t        max_decap_records;
348         uint32_t        max_tx_em_flows;
349         uint32_t        max_tx_wm_flows;
350         uint32_t        max_rx_em_flows;
351         uint32_t        max_rx_wm_flows;
352         unsigned long   *vf_event_bmap;
353         uint16_t        hwrm_cmd_req_pages;
354         void            *hwrm_cmd_req_addr[4];
355         bus_addr_t      hwrm_cmd_req_dma_addr[4];
356 };
357
358 struct bnxt_vf_info {
359         uint16_t        fw_fid;
360         uint8_t         mac_addr[ETHER_ADDR_LEN];
361         uint16_t        max_rsscos_ctxs;
362         uint16_t        max_cp_rings;
363         uint16_t        max_tx_rings;
364         uint16_t        max_rx_rings;
365         uint16_t        max_hw_ring_grps;
366         uint16_t        max_l2_ctxs;
367         uint16_t        max_irqs;
368         uint16_t        max_vnics;
369         uint16_t        max_stat_ctxs;
370         uint32_t        vlan;
371 #define BNXT_VF_QOS             0x1
372 #define BNXT_VF_SPOOFCHK        0x2
373 #define BNXT_VF_LINK_FORCED     0x4
374 #define BNXT_VF_LINK_UP         0x8
375         uint32_t        flags;
376         uint32_t        func_flags; /* func cfg flags */
377         uint32_t        min_tx_rate;
378         uint32_t        max_tx_rate;
379         void            *hwrm_cmd_req_addr;
380         bus_addr_t      hwrm_cmd_req_dma_addr;
381 };
382
383 #define BNXT_FLAG_VF            (1<<1)
384
385 #define BNXT_PF(softc)          (!((softc)->flags & BNXT_FLAG_VF))
386 #define BNXT_VF(softc)          ((softc)->flags & BNXT_FLAG_VF)
387
388 struct bnxt_vlan_tag {
389         SLIST_ENTRY(bnxt_vlan_tag) next;
390         uint16_t        tpid;
391         uint16_t        tag;
392 };
393
394 struct bnxt_vnic_info {
395         uint16_t        id;
396         uint16_t        def_ring_grp;
397         uint16_t        cos_rule;
398         uint16_t        lb_rule;
399         uint16_t        mru;
400
401         uint32_t        rx_mask;
402         bool            vlan_only;
403         struct iflib_dma_info mc_list;
404         int             mc_list_count;
405 #define BNXT_MAX_MC_ADDRS               16
406
407         uint32_t        flags;
408 #define BNXT_VNIC_FLAG_DEFAULT          0x01
409 #define BNXT_VNIC_FLAG_BD_STALL         0x02
410 #define BNXT_VNIC_FLAG_VLAN_STRIP       0x04
411
412         uint64_t        filter_id;
413         uint32_t        flow_id;
414
415         uint16_t        rss_id;
416         uint32_t        rss_hash_type;
417         uint8_t         rss_hash_key[HW_HASH_KEY_SIZE];
418         struct iflib_dma_info rss_hash_key_tbl;
419         struct iflib_dma_info   rss_grp_tbl;
420         SLIST_HEAD(vlan_head, bnxt_vlan_tag) vlan_tags;
421         struct iflib_dma_info vlan_tag_list;
422 };
423
424 struct bnxt_grp_info {
425         uint16_t        stats_ctx;
426         uint16_t        grp_id;
427         uint16_t        rx_ring_id;
428         uint16_t        cp_ring_id;
429         uint16_t        ag_ring_id;
430 };
431
432 struct bnxt_ring {
433         uint64_t                paddr;
434         vm_offset_t             doorbell;
435         caddr_t                 vaddr;
436         struct bnxt_softc       *softc;
437         uint32_t                ring_size;      /* Must be a power of two */
438         uint16_t                id;             /* Logical ID */
439         uint16_t                phys_id;
440 };
441
442 struct bnxt_cp_ring {
443         struct bnxt_ring        ring;
444         struct if_irq           irq;
445         uint32_t                cons;
446         bool                    v_bit;          /* Value of valid bit */
447         struct ctx_hw_stats     *stats;
448         uint32_t                stats_ctx_id;
449         uint32_t                last_idx;       /* Used by RX rings only
450                                                  * set to the last read pidx
451                                                  */
452 };
453
454 struct bnxt_full_tpa_start {
455         struct rx_tpa_start_cmpl low;
456         struct rx_tpa_start_cmpl_hi high;
457 };
458
459 /* All the version information for the part */
460 #define BNXT_VERSTR_SIZE        (3*3+2+1)       /* ie: "255.255.255\0" */
461 #define BNXT_NAME_SIZE          17
462 struct bnxt_ver_info {
463         uint8_t         hwrm_if_major;
464         uint8_t         hwrm_if_minor;
465         uint8_t         hwrm_if_update;
466         char            hwrm_if_ver[BNXT_VERSTR_SIZE];
467         char            driver_hwrm_if_ver[BNXT_VERSTR_SIZE];
468         char            hwrm_fw_ver[BNXT_VERSTR_SIZE];
469         char            mgmt_fw_ver[BNXT_VERSTR_SIZE];
470         char            netctrl_fw_ver[BNXT_VERSTR_SIZE];
471         char            roce_fw_ver[BNXT_VERSTR_SIZE];
472         char            phy_ver[BNXT_VERSTR_SIZE];
473         char            pkg_ver[64];
474
475         char            hwrm_fw_name[BNXT_NAME_SIZE];
476         char            mgmt_fw_name[BNXT_NAME_SIZE];
477         char            netctrl_fw_name[BNXT_NAME_SIZE];
478         char            roce_fw_name[BNXT_NAME_SIZE];
479         char            phy_vendor[BNXT_NAME_SIZE];
480         char            phy_partnumber[BNXT_NAME_SIZE];
481
482         uint16_t        chip_num;
483         uint8_t         chip_rev;
484         uint8_t         chip_metal;
485         uint8_t         chip_bond_id;
486         uint8_t         chip_type;
487
488         uint8_t         hwrm_min_major;
489         uint8_t         hwrm_min_minor;
490         uint8_t         hwrm_min_update;
491
492         struct sysctl_ctx_list  ver_ctx;
493         struct sysctl_oid       *ver_oid;
494 };
495
496 struct bnxt_nvram_info {
497         uint16_t        mfg_id;
498         uint16_t        device_id;
499         uint32_t        sector_size;
500         uint32_t        size;
501         uint32_t        reserved_size;
502         uint32_t        available_size;
503
504         struct sysctl_ctx_list  nvm_ctx;
505         struct sysctl_oid       *nvm_oid;
506 };
507
508 struct bnxt_softc {
509         device_t        dev;
510         if_ctx_t        ctx;
511         if_softc_ctx_t  scctx;
512         if_shared_ctx_t sctx;
513         struct ifmedia  *media;
514
515         struct bnxt_bar_info    hwrm_bar;
516         struct bnxt_bar_info    doorbell_bar;
517         struct bnxt_link_info   link_info;
518 #define BNXT_FLAG_NPAR          0x1
519 #define BNXT_FLAG_WOL_CAP       0x2
520         uint32_t                flags;
521         uint32_t                total_msix;
522
523         struct bnxt_func_info   func;
524         struct bnxt_pf_info     pf;
525         struct bnxt_vf_info     vf;
526
527         uint16_t                hwrm_cmd_seq;
528         uint32_t                hwrm_cmd_timeo; /* milliseconds */
529         struct iflib_dma_info   hwrm_cmd_resp;
530         /* Interrupt info for HWRM */
531         struct if_irq           irq;
532         struct mtx              hwrm_lock;
533         uint16_t                hwrm_max_req_len;
534
535 #define BNXT_MAX_QUEUE          8
536         uint8_t                 max_tc;
537         struct bnxt_cos_queue   q_info[BNXT_MAX_QUEUE];
538
539         struct iflib_dma_info   hw_rx_port_stats;
540         struct iflib_dma_info   hw_tx_port_stats;
541         struct rx_port_stats    *rx_port_stats;
542         struct tx_port_stats    *tx_port_stats;
543
544         int                     num_cp_rings;
545
546         struct bnxt_ring        *tx_rings;
547         struct bnxt_cp_ring     *tx_cp_rings;
548         struct iflib_dma_info   tx_stats;
549         int                     ntxqsets;
550
551         struct bnxt_vnic_info   vnic_info;
552         struct bnxt_ring        *ag_rings;
553         struct bnxt_ring        *rx_rings;
554         struct bnxt_cp_ring     *rx_cp_rings;
555         struct bnxt_grp_info    *grp_info;
556         struct iflib_dma_info   rx_stats;
557         int                     nrxqsets;
558
559         struct bnxt_cp_ring     def_cp_ring;
560         struct iflib_dma_info   def_cp_ring_mem;
561         struct grouptask        def_cp_task;
562
563         struct sysctl_ctx_list  hw_stats;
564         struct sysctl_oid       *hw_stats_oid;
565
566         struct bnxt_full_tpa_start *tpa_start;
567         struct bnxt_ver_info    *ver_info;
568         struct bnxt_nvram_info  *nvm_info;
569         bool wol;
570         uint8_t wol_filter_id;
571 };
572
573 struct bnxt_filter_info {
574         STAILQ_ENTRY(bnxt_filter_info) next;
575         uint64_t        fw_l2_filter_id;
576 #define INVALID_MAC_INDEX ((uint16_t)-1)
577         uint16_t        mac_index;
578
579         /* Filter Characteristics */
580         uint32_t        flags;
581         uint32_t        enables;
582         uint8_t         l2_addr[ETHER_ADDR_LEN];
583         uint8_t         l2_addr_mask[ETHER_ADDR_LEN];
584         uint16_t        l2_ovlan;
585         uint16_t        l2_ovlan_mask;
586         uint16_t        l2_ivlan;
587         uint16_t        l2_ivlan_mask;
588         uint8_t         t_l2_addr[ETHER_ADDR_LEN];
589         uint8_t         t_l2_addr_mask[ETHER_ADDR_LEN];
590         uint16_t        t_l2_ovlan;
591         uint16_t        t_l2_ovlan_mask;
592         uint16_t        t_l2_ivlan;
593         uint16_t        t_l2_ivlan_mask;
594         uint8_t         tunnel_type;
595         uint16_t        mirror_vnic_id;
596         uint32_t        vni;
597         uint8_t         pri_hint;
598         uint64_t        l2_filter_id_hint;
599 };
600
601 /* Function declarations */
602 void bnxt_report_link(struct bnxt_softc *softc);
603 bool bnxt_check_hwrm_version(struct bnxt_softc *softc);
604
605 #endif /* _BNXT_H */