sys/dev/bnxt/bnxt.h

   1 /*-
   2  * Broadcom NetXtreme-C/E network driver.
   3  *
   4  * Copyright (c) 2016 Broadcom, All Rights Reserved.
   5  * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
  20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  26  * THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #ifndef _BNXT_H
  33 #define _BNXT_H
  34
  35 #include <sys/param.h>
  36 #include <sys/socket.h>
  37 #include <sys/sysctl.h>
  38 #include <sys/taskqueue.h>
  39
  40 #include <machine/bus.h>
  41
  42 #include <net/ethernet.h>
  43 #include <net/if.h>
  44 #include <net/if_var.h>
  45 #include <net/iflib.h>
  46
  47 #include "hsi_struct_def.h"
  48
  49 /* PCI IDs */
  50 #define BROADCOM_VENDOR_ID      0x14E4
  51
  52 #define BCM57301        0x16c8
  53 #define BCM57302        0x16c9
  54 #define BCM57304        0x16ca
  55 #define BCM57311        0x16ce
  56 #define BCM57312        0x16cf
  57 #define BCM57314        0x16df
  58 #define BCM57402        0x16d0
  59 #define BCM57402_NPAR   0x16d4
  60 #define BCM57404        0x16d1
  61 #define BCM57404_NPAR   0x16e7
  62 #define BCM57406        0x16d2
  63 #define BCM57406_NPAR   0x16e8
  64 #define BCM57407        0x16d5
  65 #define BCM57407_NPAR   0x16ea
  66 #define BCM57407_SFP    0x16e9
  67 #define BCM57412        0x16d6
  68 #define BCM57412_NPAR1  0x16de
  69 #define BCM57412_NPAR2  0x16eb
  70 #define BCM57414        0x16d7
  71 #define BCM57414_NPAR1  0x16ec
  72 #define BCM57414_NPAR2  0x16ed
  73 #define BCM57416        0x16d8
  74 #define BCM57416_NPAR1  0x16ee
  75 #define BCM57416_NPAR2  0x16ef
  76 #define BCM57416_SFP    0x16e3
  77 #define BCM57417        0x16d9
  78 #define BCM57417_NPAR1  0x16c0
  79 #define BCM57417_NPAR2  0x16cc
  80 #define BCM57417_SFP    0x16e2
  81 #define BCM57454        0x1614
  82 #define BCM58700        0x16cd
  83 #define NETXTREME_C_VF1 0x16cb
  84 #define NETXTREME_C_VF2 0x16e1
  85 #define NETXTREME_C_VF3 0x16e5
  86 #define NETXTREME_E_VF1 0x16c1
  87 #define NETXTREME_E_VF2 0x16d3
  88 #define NETXTREME_E_VF3 0x16dc
  89
  90 #define CSUM_OFFLOAD            (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
  91                                  CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
  92                                  CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
  93
  94 #define BNXT_MAX_MTU    9000
  95
  96 #define BNXT_RSS_HASH_TYPE_TCPV4        0
  97 #define BNXT_RSS_HASH_TYPE_UDPV4        1
  98 #define BNXT_RSS_HASH_TYPE_IPV4         2
  99 #define BNXT_RSS_HASH_TYPE_TCPV6        3
 100 #define BNXT_RSS_HASH_TYPE_UDPV6        4
 101 #define BNXT_RSS_HASH_TYPE_IPV6         5
 102 #define BNXT_GET_RSS_PROFILE_ID(rss_hash_type) ((rss_hash_type >> 1) & 0x1F)
 103
 104 #define BNXT_NO_MORE_WOL_FILTERS        0xFFFF
 105 #define bnxt_wol_supported(softc)       (!((softc)->flags & BNXT_FLAG_VF) && \
 106                                           ((softc)->flags & BNXT_FLAG_WOL_CAP ))
 107
 108 /* Completion related defines */
 109 #define CMP_VALID(cmp, v_bit) \
 110         ((!!(((struct cmpl_base *)(cmp))->info3_v & htole32(CMPL_BASE_V))) == !!(v_bit) )
 111
 112 #define NEXT_CP_CONS_V(ring, cons, v_bit) do {                              \
 113         if (__predict_false(++(cons) == (ring)->ring_size))                 \
 114                 ((cons) = 0, (v_bit) = !v_bit);                             \
 115 } while (0)
 116
 117 #define RING_NEXT(ring, idx) (__predict_false(idx + 1 == (ring)->ring_size) ? \
 118                                                                 0 : idx + 1)
 119
 120 #define CMPL_PREFETCH_NEXT(cpr, idx)                                        \
 121         __builtin_prefetch(&((struct cmpl_base *)(cpr)->ring.vaddr)[((idx) +\
 122             (CACHE_LINE_SIZE / sizeof(struct cmpl_base))) &                 \
 123             ((cpr)->ring.ring_size - 1)])
 124
 125 /*
 126  * If we update the index, a write barrier is needed after the write to ensure
 127  * the completion ring has space before the RX/TX ring does.  Since we can't
 128  * make the RX and AG doorbells covered by the same barrier without remapping
 129  * MSI-X vectors, we create the barrier over the enture doorbell bar.
 130  * TODO: Remap the MSI-X vectors to allow a barrier to only cover the doorbells
 131  *       for a single ring group.
 132  *
 133  * A barrier of just the size of the write is used to ensure the ordering
 134  * remains correct and no writes are lost.
 135  */
 136 #define BNXT_CP_DISABLE_DB(ring) do {                                       \
 137         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 138             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
 139             BUS_SPACE_BARRIER_WRITE);                                       \
 140         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 141             (ring)->softc->doorbell_bar.handle, 0,                          \
 142             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
 143         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
 144             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
 145             htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_MASK));          \
 146 } while (0)
 147
 148 #define BNXT_CP_ENABLE_DB(ring) do {                                        \
 149         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 150             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
 151             BUS_SPACE_BARRIER_WRITE);                                       \
 152         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 153             (ring)->softc->doorbell_bar.handle, 0,                          \
 154             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
 155         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
 156             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
 157             htole32(CMPL_DOORBELL_KEY_CMPL));                               \
 158 } while (0)
 159
 160 #define BNXT_CP_IDX_ENABLE_DB(ring, cons) do {                              \
 161         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 162             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
 163             BUS_SPACE_BARRIER_WRITE);                                       \
 164         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
 165             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
 166             htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID |      \
 167             (cons)));                                                       \
 168         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 169             (ring)->softc->doorbell_bar.handle, 0,                          \
 170             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
 171 } while (0)
 172
 173 #define BNXT_CP_IDX_DISABLE_DB(ring, cons) do {                             \
 174         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 175             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
 176             BUS_SPACE_BARRIER_WRITE);                                       \
 177         bus_space_write_4((ring)->softc->doorbell_bar.tag,                  \
 178             (ring)->softc->doorbell_bar.handle, (ring)->doorbell,           \
 179             htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID |      \
 180             CMPL_DOORBELL_MASK | (cons)));                                  \
 181         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 182             (ring)->softc->doorbell_bar.handle, 0,                          \
 183             (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE);     \
 184 } while (0)
 185
 186 #define BNXT_TX_DB(ring, idx) do {                                          \
 187         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 188             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
 189             BUS_SPACE_BARRIER_WRITE);                                       \
 190         bus_space_write_4(                                                  \
 191             (ring)->softc->doorbell_bar.tag,                                \
 192             (ring)->softc->doorbell_bar.handle,                             \
 193             (ring)->doorbell, htole32(TX_DOORBELL_KEY_TX | (idx)));         \
 194 } while (0)
 195
 196 #define BNXT_RX_DB(ring, idx) do {                                          \
 197         bus_space_barrier((ring)->softc->doorbell_bar.tag,                  \
 198             (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4,        \
 199             BUS_SPACE_BARRIER_WRITE);                                       \
 200         bus_space_write_4(                                                  \
 201             (ring)->softc->doorbell_bar.tag,                                \
 202             (ring)->softc->doorbell_bar.handle,                             \
 203             (ring)->doorbell, htole32(RX_DOORBELL_KEY_RX | (idx)));         \
 204 } while (0)
 205
 206 /* Lock macros */
 207 #define BNXT_HWRM_LOCK_INIT(_softc, _name) \
 208     mtx_init(&(_softc)->hwrm_lock, _name, "BNXT HWRM Lock", MTX_DEF)
 209 #define BNXT_HWRM_LOCK(_softc)          mtx_lock(&(_softc)->hwrm_lock)
 210 #define BNXT_HWRM_UNLOCK(_softc)        mtx_unlock(&(_softc)->hwrm_lock)
 211 #define BNXT_HWRM_LOCK_DESTROY(_softc)  mtx_destroy(&(_softc)->hwrm_lock)
 212 #define BNXT_HWRM_LOCK_ASSERT(_softc)   mtx_assert(&(_softc)->hwrm_lock,    \
 213     MA_OWNED)
 214 #define BNXT_IS_FLOW_CTRL_CHANGED(link_info)                                \
 215         ((link_info->last_flow_ctrl.tx != link_info->flow_ctrl.tx) ||       \
 216          (link_info->last_flow_ctrl.rx != link_info->flow_ctrl.rx) ||       \
 217          (link_info->last_flow_ctrl.autoneg != link_info->flow_ctrl.autoneg))
 218
 219 /* Chip info */
 220 #define BNXT_TSO_SIZE   UINT16_MAX
 221
 222 #define min_t(type, x, y) ({                    \
 223         type __min1 = (x);                      \
 224         type __min2 = (y);                      \
 225         __min1 < __min2 ? __min1 : __min2; })
 226
 227 #define max_t(type, x, y) ({                    \
 228         type __max1 = (x);                      \
 229         type __max2 = (y);                      \
 230         __max1 > __max2 ? __max1 : __max2; })
 231
 232 #define clamp_t(type, _x, min, max)     min_t(type, max_t(type, _x, min), max)
 233
 234 /* NVRAM access */
 235 enum bnxt_nvm_directory_type {
 236         BNX_DIR_TYPE_UNUSED = 0,
 237         BNX_DIR_TYPE_PKG_LOG = 1,
 238         BNX_DIR_TYPE_UPDATE = 2,
 239         BNX_DIR_TYPE_CHIMP_PATCH = 3,
 240         BNX_DIR_TYPE_BOOTCODE = 4,
 241         BNX_DIR_TYPE_VPD = 5,
 242         BNX_DIR_TYPE_EXP_ROM_MBA = 6,
 243         BNX_DIR_TYPE_AVS = 7,
 244         BNX_DIR_TYPE_PCIE = 8,
 245         BNX_DIR_TYPE_PORT_MACRO = 9,
 246         BNX_DIR_TYPE_APE_FW = 10,
 247         BNX_DIR_TYPE_APE_PATCH = 11,
 248         BNX_DIR_TYPE_KONG_FW = 12,
 249         BNX_DIR_TYPE_KONG_PATCH = 13,
 250         BNX_DIR_TYPE_BONO_FW = 14,
 251         BNX_DIR_TYPE_BONO_PATCH = 15,
 252         BNX_DIR_TYPE_TANG_FW = 16,
 253         BNX_DIR_TYPE_TANG_PATCH = 17,
 254         BNX_DIR_TYPE_BOOTCODE_2 = 18,
 255         BNX_DIR_TYPE_CCM = 19,
 256         BNX_DIR_TYPE_PCI_CFG = 20,
 257         BNX_DIR_TYPE_TSCF_UCODE = 21,
 258         BNX_DIR_TYPE_ISCSI_BOOT = 22,
 259         BNX_DIR_TYPE_ISCSI_BOOT_IPV6 = 24,
 260         BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6 = 25,
 261         BNX_DIR_TYPE_ISCSI_BOOT_CFG6 = 26,
 262         BNX_DIR_TYPE_EXT_PHY = 27,
 263         BNX_DIR_TYPE_SHARED_CFG = 40,
 264         BNX_DIR_TYPE_PORT_CFG = 41,
 265         BNX_DIR_TYPE_FUNC_CFG = 42,
 266         BNX_DIR_TYPE_MGMT_CFG = 48,
 267         BNX_DIR_TYPE_MGMT_DATA = 49,
 268         BNX_DIR_TYPE_MGMT_WEB_DATA = 50,
 269         BNX_DIR_TYPE_MGMT_WEB_META = 51,
 270         BNX_DIR_TYPE_MGMT_EVENT_LOG = 52,
 271         BNX_DIR_TYPE_MGMT_AUDIT_LOG = 53
 272 };
 273
 274 enum bnxnvm_pkglog_field_index {
 275         BNX_PKG_LOG_FIELD_IDX_INSTALLED_TIMESTAMP       = 0,
 276         BNX_PKG_LOG_FIELD_IDX_PKG_DESCRIPTION           = 1,
 277         BNX_PKG_LOG_FIELD_IDX_PKG_VERSION               = 2,
 278         BNX_PKG_LOG_FIELD_IDX_PKG_TIMESTAMP             = 3,
 279         BNX_PKG_LOG_FIELD_IDX_PKG_CHECKSUM              = 4,
 280         BNX_PKG_LOG_FIELD_IDX_INSTALLED_ITEMS           = 5,
 281         BNX_PKG_LOG_FIELD_IDX_INSTALLED_MASK            = 6
 282 };
 283
 284 #define BNX_DIR_ORDINAL_FIRST           0
 285 #define BNX_DIR_EXT_NONE                0
 286
 287 struct bnxt_bar_info {
 288         struct resource         *res;
 289         bus_space_tag_t         tag;
 290         bus_space_handle_t      handle;
 291         bus_size_t              size;
 292         int                     rid;
 293 };
 294
 295 struct bnxt_flow_ctrl {
 296         bool rx;
 297         bool tx;
 298         bool autoneg;
 299 };
 300
 301 struct bnxt_link_info {
 302         uint8_t         media_type;
 303         uint8_t         transceiver;
 304         uint8_t         phy_addr;
 305         uint8_t         phy_link_status;
 306         uint8_t         wire_speed;
 307         uint8_t         loop_back;
 308         uint8_t         link_up;
 309         uint8_t         last_link_up;
 310         uint8_t         duplex;
 311         uint8_t         last_duplex;
 312         struct bnxt_flow_ctrl   flow_ctrl;
 313         struct bnxt_flow_ctrl   last_flow_ctrl;
 314         uint8_t         duplex_setting;
 315         uint8_t         auto_mode;
 316 #define PHY_VER_LEN             3
 317         uint8_t         phy_ver[PHY_VER_LEN];
 318         uint8_t         phy_type;
 319         uint16_t        link_speed;
 320         uint16_t        support_speeds;
 321         uint16_t        auto_link_speeds;
 322         uint16_t        auto_link_speed;
 323         uint16_t        force_link_speed;
 324         uint32_t        preemphasis;
 325
 326         /* copy of requested setting */
 327         uint8_t         autoneg;
 328 #define BNXT_AUTONEG_SPEED      1
 329 #define BNXT_AUTONEG_FLOW_CTRL  2
 330         uint8_t         req_duplex;
 331         uint16_t        req_link_speed;
 332 };
 333
 334 enum bnxt_cp_type {
 335         BNXT_DEFAULT,
 336         BNXT_TX,
 337         BNXT_RX,
 338         BNXT_SHARED
 339 };
 340
 341 struct bnxt_cos_queue {
 342         uint8_t id;
 343         uint8_t profile;
 344 };
 345
 346 struct bnxt_func_info {
 347         uint32_t        fw_fid;
 348         uint8_t         mac_addr[ETHER_ADDR_LEN];
 349         uint16_t        max_rsscos_ctxs;
 350         uint16_t        max_cp_rings;
 351         uint16_t        max_tx_rings;
 352         uint16_t        max_rx_rings;
 353         uint16_t        max_hw_ring_grps;
 354         uint16_t        max_irqs;
 355         uint16_t        max_l2_ctxs;
 356         uint16_t        max_vnics;
 357         uint16_t        max_stat_ctxs;
 358 };
 359
 360 struct bnxt_pf_info {
 361 #define BNXT_FIRST_PF_FID       1
 362 #define BNXT_FIRST_VF_FID       128
 363         uint8_t         port_id;
 364         uint32_t        first_vf_id;
 365         uint16_t        active_vfs;
 366         uint16_t        max_vfs;
 367         uint32_t        max_encap_records;
 368         uint32_t        max_decap_records;
 369         uint32_t        max_tx_em_flows;
 370         uint32_t        max_tx_wm_flows;
 371         uint32_t        max_rx_em_flows;
 372         uint32_t        max_rx_wm_flows;
 373         unsigned long   *vf_event_bmap;
 374         uint16_t        hwrm_cmd_req_pages;
 375         void            *hwrm_cmd_req_addr[4];
 376         bus_addr_t      hwrm_cmd_req_dma_addr[4];
 377 };
 378
 379 struct bnxt_vf_info {
 380         uint16_t        fw_fid;
 381         uint8_t         mac_addr[ETHER_ADDR_LEN];
 382         uint16_t        max_rsscos_ctxs;
 383         uint16_t        max_cp_rings;
 384         uint16_t        max_tx_rings;
 385         uint16_t        max_rx_rings;
 386         uint16_t        max_hw_ring_grps;
 387         uint16_t        max_l2_ctxs;
 388         uint16_t        max_irqs;
 389         uint16_t        max_vnics;
 390         uint16_t        max_stat_ctxs;
 391         uint32_t        vlan;
 392 #define BNXT_VF_QOS             0x1
 393 #define BNXT_VF_SPOOFCHK        0x2
 394 #define BNXT_VF_LINK_FORCED     0x4
 395 #define BNXT_VF_LINK_UP         0x8
 396         uint32_t        flags;
 397         uint32_t        func_flags; /* func cfg flags */
 398         uint32_t        min_tx_rate;
 399         uint32_t        max_tx_rate;
 400         void            *hwrm_cmd_req_addr;
 401         bus_addr_t      hwrm_cmd_req_dma_addr;
 402 };
 403
 404
 405 #define BNXT_PF(softc)          (!((softc)->flags & BNXT_FLAG_VF))
 406 #define BNXT_VF(softc)          ((softc)->flags & BNXT_FLAG_VF)
 407
 408 struct bnxt_vlan_tag {
 409         SLIST_ENTRY(bnxt_vlan_tag) next;
 410         uint16_t        tpid;
 411         uint16_t        tag;
 412 };
 413
 414 struct bnxt_vnic_info {
 415         uint16_t        id;
 416         uint16_t        def_ring_grp;
 417         uint16_t        cos_rule;
 418         uint16_t        lb_rule;
 419         uint16_t        mru;
 420
 421         uint32_t        rx_mask;
 422         bool            vlan_only;
 423         struct iflib_dma_info mc_list;
 424         int             mc_list_count;
 425 #define BNXT_MAX_MC_ADDRS               16
 426
 427         uint32_t        flags;
 428 #define BNXT_VNIC_FLAG_DEFAULT          0x01
 429 #define BNXT_VNIC_FLAG_BD_STALL         0x02
 430 #define BNXT_VNIC_FLAG_VLAN_STRIP       0x04
 431
 432         uint64_t        filter_id;
 433         uint32_t        flow_id;
 434
 435         uint16_t        rss_id;
 436         uint32_t        rss_hash_type;
 437         uint8_t         rss_hash_key[HW_HASH_KEY_SIZE];
 438         struct iflib_dma_info rss_hash_key_tbl;
 439         struct iflib_dma_info   rss_grp_tbl;
 440         SLIST_HEAD(vlan_head, bnxt_vlan_tag) vlan_tags;
 441         struct iflib_dma_info vlan_tag_list;
 442 };
 443
 444 struct bnxt_grp_info {
 445         uint16_t        stats_ctx;
 446         uint16_t        grp_id;
 447         uint16_t        rx_ring_id;
 448         uint16_t        cp_ring_id;
 449         uint16_t        ag_ring_id;
 450 };
 451
 452 struct bnxt_ring {
 453         uint64_t                paddr;
 454         vm_offset_t             doorbell;
 455         caddr_t                 vaddr;
 456         struct bnxt_softc       *softc;
 457         uint32_t                ring_size;      /* Must be a power of two */
 458         uint16_t                id;             /* Logical ID */
 459         uint16_t                phys_id;
 460         struct bnxt_full_tpa_start *tpa_start;
 461 };
 462
 463 struct bnxt_cp_ring {
 464         struct bnxt_ring        ring;
 465         struct if_irq           irq;
 466         uint32_t                cons;
 467         bool                    v_bit;          /* Value of valid bit */
 468         struct ctx_hw_stats     *stats;
 469         uint32_t                stats_ctx_id;
 470         uint32_t                last_idx;       /* Used by RX rings only
 471                                                  * set to the last read pidx
 472                                                  */
 473 };
 474
 475 struct bnxt_full_tpa_start {
 476         struct rx_tpa_start_cmpl low;
 477         struct rx_tpa_start_cmpl_hi high;
 478 };
 479
 480 /* All the version information for the part */
 481 #define BNXT_VERSTR_SIZE        (3*3+2+1)       /* ie: "255.255.255\0" */
 482 #define BNXT_NAME_SIZE          17
 483 struct bnxt_ver_info {
 484         uint8_t         hwrm_if_major;
 485         uint8_t         hwrm_if_minor;
 486         uint8_t         hwrm_if_update;
 487         char            hwrm_if_ver[BNXT_VERSTR_SIZE];
 488         char            driver_hwrm_if_ver[BNXT_VERSTR_SIZE];
 489         char            hwrm_fw_ver[BNXT_VERSTR_SIZE];
 490         char            mgmt_fw_ver[BNXT_VERSTR_SIZE];
 491         char            netctrl_fw_ver[BNXT_VERSTR_SIZE];
 492         char            roce_fw_ver[BNXT_VERSTR_SIZE];
 493         char            phy_ver[BNXT_VERSTR_SIZE];
 494         char            pkg_ver[64];
 495
 496         char            hwrm_fw_name[BNXT_NAME_SIZE];
 497         char            mgmt_fw_name[BNXT_NAME_SIZE];
 498         char            netctrl_fw_name[BNXT_NAME_SIZE];
 499         char            roce_fw_name[BNXT_NAME_SIZE];
 500         char            phy_vendor[BNXT_NAME_SIZE];
 501         char            phy_partnumber[BNXT_NAME_SIZE];
 502
 503         uint16_t        chip_num;
 504         uint8_t         chip_rev;
 505         uint8_t         chip_metal;
 506         uint8_t         chip_bond_id;
 507         uint8_t         chip_type;
 508
 509         uint8_t         hwrm_min_major;
 510         uint8_t         hwrm_min_minor;
 511         uint8_t         hwrm_min_update;
 512
 513         struct sysctl_ctx_list  ver_ctx;
 514         struct sysctl_oid       *ver_oid;
 515 };
 516
 517 struct bnxt_nvram_info {
 518         uint16_t        mfg_id;
 519         uint16_t        device_id;
 520         uint32_t        sector_size;
 521         uint32_t        size;
 522         uint32_t        reserved_size;
 523         uint32_t        available_size;
 524
 525         struct sysctl_ctx_list  nvm_ctx;
 526         struct sysctl_oid       *nvm_oid;
 527 };
 528
 529 struct bnxt_func_qcfg {
 530         uint16_t alloc_completion_rings;
 531         uint16_t alloc_tx_rings;
 532         uint16_t alloc_rx_rings;
 533         uint16_t alloc_vnics;
 534 };
 535
 536 struct bnxt_hw_lro {
 537         uint16_t enable;
 538         uint16_t is_mode_gro;
 539         uint16_t max_agg_segs;
 540         uint16_t max_aggs;
 541         uint32_t min_agg_len;
 542 };
 543
 544 struct bnxt_softc {
 545         device_t        dev;
 546         if_ctx_t        ctx;
 547         if_softc_ctx_t  scctx;
 548         if_shared_ctx_t sctx;
 549         struct ifmedia  *media;
 550
 551         struct bnxt_bar_info    hwrm_bar;
 552         struct bnxt_bar_info    doorbell_bar;
 553         struct bnxt_link_info   link_info;
 554 #define BNXT_FLAG_VF            0x0001
 555 #define BNXT_FLAG_NPAR          0x0002
 556 #define BNXT_FLAG_WOL_CAP       0x0004
 557         uint32_t                flags;
 558         uint32_t                total_msix;
 559
 560         struct bnxt_func_info   func;
 561         struct bnxt_func_qcfg   fn_qcfg;
 562         struct bnxt_pf_info     pf;
 563         struct bnxt_vf_info     vf;
 564
 565         uint16_t                hwrm_cmd_seq;
 566         uint32_t                hwrm_cmd_timeo; /* milliseconds */
 567         struct iflib_dma_info   hwrm_cmd_resp;
 568         /* Interrupt info for HWRM */
 569         struct if_irq           irq;
 570         struct mtx              hwrm_lock;
 571         uint16_t                hwrm_max_req_len;
 572
 573 #define BNXT_MAX_QUEUE          8
 574         uint8_t                 max_tc;
 575         struct bnxt_cos_queue   q_info[BNXT_MAX_QUEUE];
 576
 577         uint64_t                admin_ticks;
 578         struct iflib_dma_info   hw_rx_port_stats;
 579         struct iflib_dma_info   hw_tx_port_stats;
 580         struct rx_port_stats    *rx_port_stats;
 581         struct tx_port_stats    *tx_port_stats;
 582
 583         int                     num_cp_rings;
 584
 585         struct bnxt_ring        *tx_rings;
 586         struct bnxt_cp_ring     *tx_cp_rings;
 587         struct iflib_dma_info   tx_stats;
 588         int                     ntxqsets;
 589
 590         struct bnxt_vnic_info   vnic_info;
 591         struct bnxt_ring        *ag_rings;
 592         struct bnxt_ring        *rx_rings;
 593         struct bnxt_cp_ring     *rx_cp_rings;
 594         struct bnxt_grp_info    *grp_info;
 595         struct iflib_dma_info   rx_stats;
 596         int                     nrxqsets;
 597
 598         struct bnxt_cp_ring     def_cp_ring;
 599         struct iflib_dma_info   def_cp_ring_mem;
 600         struct grouptask        def_cp_task;
 601
 602         struct sysctl_ctx_list  hw_stats;
 603         struct sysctl_oid       *hw_stats_oid;
 604         struct sysctl_ctx_list  hw_lro_ctx;
 605         struct sysctl_oid       *hw_lro_oid;
 606         struct sysctl_ctx_list  flow_ctrl_ctx;
 607         struct sysctl_oid       *flow_ctrl_oid;
 608
 609         struct bnxt_ver_info    *ver_info;
 610         struct bnxt_nvram_info  *nvm_info;
 611         bool wol;
 612         struct bnxt_hw_lro      hw_lro;
 613         uint8_t wol_filter_id;
 614         uint16_t                rx_coal_usecs;
 615         uint16_t                rx_coal_usecs_irq;
 616         uint16_t                rx_coal_frames;
 617         uint16_t                rx_coal_frames_irq;
 618         uint16_t                tx_coal_usecs;
 619         uint16_t                tx_coal_usecs_irq;
 620         uint16_t                tx_coal_frames;
 621         uint16_t                tx_coal_frames_irq;
 622
 623 #define BNXT_USEC_TO_COAL_TIMER(x)      ((x) * 25 / 2)
 624 #define BNXT_DEF_STATS_COAL_TICKS        1000000
 625 #define BNXT_MIN_STATS_COAL_TICKS         250000
 626 #define BNXT_MAX_STATS_COAL_TICKS        1000000
 627
 628 };
 629
 630 struct bnxt_filter_info {
 631         STAILQ_ENTRY(bnxt_filter_info) next;
 632         uint64_t        fw_l2_filter_id;
 633 #define INVALID_MAC_INDEX ((uint16_t)-1)
 634         uint16_t        mac_index;
 635
 636         /* Filter Characteristics */
 637         uint32_t        flags;
 638         uint32_t        enables;
 639         uint8_t         l2_addr[ETHER_ADDR_LEN];
 640         uint8_t         l2_addr_mask[ETHER_ADDR_LEN];
 641         uint16_t        l2_ovlan;
 642         uint16_t        l2_ovlan_mask;
 643         uint16_t        l2_ivlan;
 644         uint16_t        l2_ivlan_mask;
 645         uint8_t         t_l2_addr[ETHER_ADDR_LEN];
 646         uint8_t         t_l2_addr_mask[ETHER_ADDR_LEN];
 647         uint16_t        t_l2_ovlan;
 648         uint16_t        t_l2_ovlan_mask;
 649         uint16_t        t_l2_ivlan;
 650         uint16_t        t_l2_ivlan_mask;
 651         uint8_t         tunnel_type;
 652         uint16_t        mirror_vnic_id;
 653         uint32_t        vni;
 654         uint8_t         pri_hint;
 655         uint64_t        l2_filter_id_hint;
 656 };
 657
 658 /* Function declarations */
 659 void bnxt_report_link(struct bnxt_softc *softc);
 660 bool bnxt_check_hwrm_version(struct bnxt_softc *softc);
 661
 662 #endif /* _BNXT_H */