2 * Broadcom NetXtreme-C/E network driver.
4 * Copyright (c) 2016 Broadcom, All Rights Reserved.
5 * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
35 #include <sys/param.h>
36 #include <sys/socket.h>
37 #include <sys/sysctl.h>
38 #include <sys/taskqueue.h>
40 #include <machine/bus.h>
42 #include <net/ethernet.h>
44 #include <net/if_var.h>
45 #include <net/iflib.h>
47 #include "hsi_struct_def.h"
50 #define BROADCOM_VENDOR_ID 0x14E4
52 #define BCM57301 0x16c8
53 #define BCM57302 0x16c9
54 #define BCM57304 0x16ca
55 #define BCM57311 0x16ce
56 #define BCM57312 0x16cf
57 #define BCM57314 0x16df
58 #define BCM57402 0x16d0
59 #define BCM57402_NPAR 0x16d4
60 #define BCM57404 0x16d1
61 #define BCM57404_NPAR 0x16e7
62 #define BCM57406 0x16d2
63 #define BCM57406_NPAR 0x16e8
64 #define BCM57407 0x16d5
65 #define BCM57407_NPAR 0x16ea
66 #define BCM57407_SFP 0x16e9
67 #define BCM57412 0x16d6
68 #define BCM57412_NPAR1 0x16de
69 #define BCM57412_NPAR2 0x16eb
70 #define BCM57414 0x16d7
71 #define BCM57414_NPAR1 0x16ec
72 #define BCM57414_NPAR2 0x16ed
73 #define BCM57416 0x16d8
74 #define BCM57416_NPAR1 0x16ee
75 #define BCM57416_NPAR2 0x16ef
76 #define BCM57416_SFP 0x16e3
77 #define BCM57417 0x16d9
78 #define BCM57417_NPAR1 0x16c0
79 #define BCM57417_NPAR2 0x16cc
80 #define BCM57417_SFP 0x16e2
81 #define BCM57454 0x1614
82 #define BCM58700 0x16cd
83 #define NETXTREME_C_VF1 0x16cb
84 #define NETXTREME_C_VF2 0x16e1
85 #define NETXTREME_C_VF3 0x16e5
86 #define NETXTREME_E_VF1 0x16c1
87 #define NETXTREME_E_VF2 0x16d3
88 #define NETXTREME_E_VF3 0x16dc
90 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
91 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
92 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
94 #define BNXT_MAX_MTU 9000
96 #define BNXT_RSS_HASH_TYPE_TCPV4 0
97 #define BNXT_RSS_HASH_TYPE_UDPV4 1
98 #define BNXT_RSS_HASH_TYPE_IPV4 2
99 #define BNXT_RSS_HASH_TYPE_TCPV6 3
100 #define BNXT_RSS_HASH_TYPE_UDPV6 4
101 #define BNXT_RSS_HASH_TYPE_IPV6 5
102 #define BNXT_GET_RSS_PROFILE_ID(rss_hash_type) ((rss_hash_type >> 1) & 0x1F)
104 #define BNXT_NO_MORE_WOL_FILTERS 0xFFFF
105 #define bnxt_wol_supported(softc) (!((softc)->flags & BNXT_FLAG_VF) && \
106 ((softc)->flags & BNXT_FLAG_WOL_CAP ))
108 /* Completion related defines */
109 #define CMP_VALID(cmp, v_bit) \
110 ((!!(((struct cmpl_base *)(cmp))->info3_v & htole32(CMPL_BASE_V))) == !!(v_bit) )
112 #define NEXT_CP_CONS_V(ring, cons, v_bit) do { \
113 if (__predict_false(++(cons) == (ring)->ring_size)) \
114 ((cons) = 0, (v_bit) = !v_bit); \
117 #define RING_NEXT(ring, idx) (__predict_false(idx + 1 == (ring)->ring_size) ? \
120 #define CMPL_PREFETCH_NEXT(cpr, idx) \
121 __builtin_prefetch(&((struct cmpl_base *)(cpr)->ring.vaddr)[((idx) +\
122 (CACHE_LINE_SIZE / sizeof(struct cmpl_base))) & \
123 ((cpr)->ring.ring_size - 1)])
126 * If we update the index, a write barrier is needed after the write to ensure
127 * the completion ring has space before the RX/TX ring does. Since we can't
128 * make the RX and AG doorbells covered by the same barrier without remapping
129 * MSI-X vectors, we create the barrier over the enture doorbell bar.
130 * TODO: Remap the MSI-X vectors to allow a barrier to only cover the doorbells
131 * for a single ring group.
133 * A barrier of just the size of the write is used to ensure the ordering
134 * remains correct and no writes are lost.
136 #define BNXT_CP_DISABLE_DB(ring) do { \
137 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
138 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
139 BUS_SPACE_BARRIER_WRITE); \
140 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
141 (ring)->softc->doorbell_bar.handle, 0, \
142 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
143 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
144 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
145 htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_MASK)); \
148 #define BNXT_CP_ENABLE_DB(ring) do { \
149 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
150 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
151 BUS_SPACE_BARRIER_WRITE); \
152 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
153 (ring)->softc->doorbell_bar.handle, 0, \
154 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
155 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
156 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
157 htole32(CMPL_DOORBELL_KEY_CMPL)); \
160 #define BNXT_CP_IDX_ENABLE_DB(ring, cons) do { \
161 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
162 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
163 BUS_SPACE_BARRIER_WRITE); \
164 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
165 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
166 htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID | \
168 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
169 (ring)->softc->doorbell_bar.handle, 0, \
170 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
173 #define BNXT_CP_IDX_DISABLE_DB(ring, cons) do { \
174 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
175 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
176 BUS_SPACE_BARRIER_WRITE); \
177 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
178 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
179 htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID | \
180 CMPL_DOORBELL_MASK | (cons))); \
181 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
182 (ring)->softc->doorbell_bar.handle, 0, \
183 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
186 #define BNXT_TX_DB(ring, idx) do { \
187 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
188 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
189 BUS_SPACE_BARRIER_WRITE); \
191 (ring)->softc->doorbell_bar.tag, \
192 (ring)->softc->doorbell_bar.handle, \
193 (ring)->doorbell, htole32(TX_DOORBELL_KEY_TX | (idx))); \
196 #define BNXT_RX_DB(ring, idx) do { \
197 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
198 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
199 BUS_SPACE_BARRIER_WRITE); \
201 (ring)->softc->doorbell_bar.tag, \
202 (ring)->softc->doorbell_bar.handle, \
203 (ring)->doorbell, htole32(RX_DOORBELL_KEY_RX | (idx))); \
207 #define BNXT_HWRM_LOCK_INIT(_softc, _name) \
208 mtx_init(&(_softc)->hwrm_lock, _name, "BNXT HWRM Lock", MTX_DEF)
209 #define BNXT_HWRM_LOCK(_softc) mtx_lock(&(_softc)->hwrm_lock)
210 #define BNXT_HWRM_UNLOCK(_softc) mtx_unlock(&(_softc)->hwrm_lock)
211 #define BNXT_HWRM_LOCK_DESTROY(_softc) mtx_destroy(&(_softc)->hwrm_lock)
212 #define BNXT_HWRM_LOCK_ASSERT(_softc) mtx_assert(&(_softc)->hwrm_lock, \
214 #define BNXT_IS_FLOW_CTRL_CHANGED(link_info) \
215 ((link_info->last_flow_ctrl.tx != link_info->flow_ctrl.tx) || \
216 (link_info->last_flow_ctrl.rx != link_info->flow_ctrl.rx) || \
217 (link_info->last_flow_ctrl.autoneg != link_info->flow_ctrl.autoneg))
220 #define BNXT_TSO_SIZE UINT16_MAX
222 #define min_t(type, x, y) ({ \
225 __min1 < __min2 ? __min1 : __min2; })
227 #define max_t(type, x, y) ({ \
230 __max1 > __max2 ? __max1 : __max2; })
232 #define clamp_t(type, _x, min, max) min_t(type, max_t(type, _x, min), max)
234 #define BNXT_IFMEDIA_ADD(supported, fw_speed, ifm_speed) do { \
235 if ((supported) & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_ ## fw_speed) \
236 ifmedia_add(softc->media, IFM_ETHER | (ifm_speed), 0, NULL); \
240 enum bnxt_nvm_directory_type {
241 BNX_DIR_TYPE_UNUSED = 0,
242 BNX_DIR_TYPE_PKG_LOG = 1,
243 BNX_DIR_TYPE_UPDATE = 2,
244 BNX_DIR_TYPE_CHIMP_PATCH = 3,
245 BNX_DIR_TYPE_BOOTCODE = 4,
246 BNX_DIR_TYPE_VPD = 5,
247 BNX_DIR_TYPE_EXP_ROM_MBA = 6,
248 BNX_DIR_TYPE_AVS = 7,
249 BNX_DIR_TYPE_PCIE = 8,
250 BNX_DIR_TYPE_PORT_MACRO = 9,
251 BNX_DIR_TYPE_APE_FW = 10,
252 BNX_DIR_TYPE_APE_PATCH = 11,
253 BNX_DIR_TYPE_KONG_FW = 12,
254 BNX_DIR_TYPE_KONG_PATCH = 13,
255 BNX_DIR_TYPE_BONO_FW = 14,
256 BNX_DIR_TYPE_BONO_PATCH = 15,
257 BNX_DIR_TYPE_TANG_FW = 16,
258 BNX_DIR_TYPE_TANG_PATCH = 17,
259 BNX_DIR_TYPE_BOOTCODE_2 = 18,
260 BNX_DIR_TYPE_CCM = 19,
261 BNX_DIR_TYPE_PCI_CFG = 20,
262 BNX_DIR_TYPE_TSCF_UCODE = 21,
263 BNX_DIR_TYPE_ISCSI_BOOT = 22,
264 BNX_DIR_TYPE_ISCSI_BOOT_IPV6 = 24,
265 BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6 = 25,
266 BNX_DIR_TYPE_ISCSI_BOOT_CFG6 = 26,
267 BNX_DIR_TYPE_EXT_PHY = 27,
268 BNX_DIR_TYPE_SHARED_CFG = 40,
269 BNX_DIR_TYPE_PORT_CFG = 41,
270 BNX_DIR_TYPE_FUNC_CFG = 42,
271 BNX_DIR_TYPE_MGMT_CFG = 48,
272 BNX_DIR_TYPE_MGMT_DATA = 49,
273 BNX_DIR_TYPE_MGMT_WEB_DATA = 50,
274 BNX_DIR_TYPE_MGMT_WEB_META = 51,
275 BNX_DIR_TYPE_MGMT_EVENT_LOG = 52,
276 BNX_DIR_TYPE_MGMT_AUDIT_LOG = 53
279 enum bnxnvm_pkglog_field_index {
280 BNX_PKG_LOG_FIELD_IDX_INSTALLED_TIMESTAMP = 0,
281 BNX_PKG_LOG_FIELD_IDX_PKG_DESCRIPTION = 1,
282 BNX_PKG_LOG_FIELD_IDX_PKG_VERSION = 2,
283 BNX_PKG_LOG_FIELD_IDX_PKG_TIMESTAMP = 3,
284 BNX_PKG_LOG_FIELD_IDX_PKG_CHECKSUM = 4,
285 BNX_PKG_LOG_FIELD_IDX_INSTALLED_ITEMS = 5,
286 BNX_PKG_LOG_FIELD_IDX_INSTALLED_MASK = 6
289 #define BNX_DIR_ORDINAL_FIRST 0
290 #define BNX_DIR_EXT_NONE 0
292 struct bnxt_bar_info {
293 struct resource *res;
295 bus_space_handle_t handle;
300 struct bnxt_flow_ctrl {
306 struct bnxt_link_info {
310 uint8_t phy_link_status;
314 uint8_t last_link_up;
317 struct bnxt_flow_ctrl flow_ctrl;
318 struct bnxt_flow_ctrl last_flow_ctrl;
319 uint8_t duplex_setting;
321 #define PHY_VER_LEN 3
322 uint8_t phy_ver[PHY_VER_LEN];
325 uint16_t support_speeds;
326 uint16_t auto_link_speeds;
327 uint16_t auto_link_speed;
328 uint16_t force_link_speed;
329 uint32_t preemphasis;
331 /* copy of requested setting */
333 #define BNXT_AUTONEG_SPEED 1
334 #define BNXT_AUTONEG_FLOW_CTRL 2
336 uint16_t req_link_speed;
346 struct bnxt_cos_queue {
351 struct bnxt_func_info {
353 uint8_t mac_addr[ETHER_ADDR_LEN];
354 uint16_t max_rsscos_ctxs;
355 uint16_t max_cp_rings;
356 uint16_t max_tx_rings;
357 uint16_t max_rx_rings;
358 uint16_t max_hw_ring_grps;
360 uint16_t max_l2_ctxs;
362 uint16_t max_stat_ctxs;
365 struct bnxt_pf_info {
366 #define BNXT_FIRST_PF_FID 1
367 #define BNXT_FIRST_VF_FID 128
369 uint32_t first_vf_id;
372 uint32_t max_encap_records;
373 uint32_t max_decap_records;
374 uint32_t max_tx_em_flows;
375 uint32_t max_tx_wm_flows;
376 uint32_t max_rx_em_flows;
377 uint32_t max_rx_wm_flows;
378 unsigned long *vf_event_bmap;
379 uint16_t hwrm_cmd_req_pages;
380 void *hwrm_cmd_req_addr[4];
381 bus_addr_t hwrm_cmd_req_dma_addr[4];
384 struct bnxt_vf_info {
386 uint8_t mac_addr[ETHER_ADDR_LEN];
387 uint16_t max_rsscos_ctxs;
388 uint16_t max_cp_rings;
389 uint16_t max_tx_rings;
390 uint16_t max_rx_rings;
391 uint16_t max_hw_ring_grps;
392 uint16_t max_l2_ctxs;
395 uint16_t max_stat_ctxs;
397 #define BNXT_VF_QOS 0x1
398 #define BNXT_VF_SPOOFCHK 0x2
399 #define BNXT_VF_LINK_FORCED 0x4
400 #define BNXT_VF_LINK_UP 0x8
402 uint32_t func_flags; /* func cfg flags */
403 uint32_t min_tx_rate;
404 uint32_t max_tx_rate;
405 void *hwrm_cmd_req_addr;
406 bus_addr_t hwrm_cmd_req_dma_addr;
410 #define BNXT_PF(softc) (!((softc)->flags & BNXT_FLAG_VF))
411 #define BNXT_VF(softc) ((softc)->flags & BNXT_FLAG_VF)
413 struct bnxt_vlan_tag {
414 SLIST_ENTRY(bnxt_vlan_tag) next;
419 struct bnxt_vnic_info {
421 uint16_t def_ring_grp;
428 struct iflib_dma_info mc_list;
430 #define BNXT_MAX_MC_ADDRS 16
433 #define BNXT_VNIC_FLAG_DEFAULT 0x01
434 #define BNXT_VNIC_FLAG_BD_STALL 0x02
435 #define BNXT_VNIC_FLAG_VLAN_STRIP 0x04
441 uint32_t rss_hash_type;
442 uint8_t rss_hash_key[HW_HASH_KEY_SIZE];
443 struct iflib_dma_info rss_hash_key_tbl;
444 struct iflib_dma_info rss_grp_tbl;
445 SLIST_HEAD(vlan_head, bnxt_vlan_tag) vlan_tags;
446 struct iflib_dma_info vlan_tag_list;
449 struct bnxt_grp_info {
459 vm_offset_t doorbell;
461 struct bnxt_softc *softc;
462 uint32_t ring_size; /* Must be a power of two */
463 uint16_t id; /* Logical ID */
465 struct bnxt_full_tpa_start *tpa_start;
468 struct bnxt_cp_ring {
469 struct bnxt_ring ring;
472 bool v_bit; /* Value of valid bit */
473 struct ctx_hw_stats *stats;
474 uint32_t stats_ctx_id;
475 uint32_t last_idx; /* Used by RX rings only
476 * set to the last read pidx
480 struct bnxt_full_tpa_start {
481 struct rx_tpa_start_cmpl low;
482 struct rx_tpa_start_cmpl_hi high;
485 /* All the version information for the part */
486 #define BNXT_VERSTR_SIZE (3*3+2+1) /* ie: "255.255.255\0" */
487 #define BNXT_NAME_SIZE 17
488 struct bnxt_ver_info {
489 uint8_t hwrm_if_major;
490 uint8_t hwrm_if_minor;
491 uint8_t hwrm_if_update;
492 char hwrm_if_ver[BNXT_VERSTR_SIZE];
493 char driver_hwrm_if_ver[BNXT_VERSTR_SIZE];
494 char hwrm_fw_ver[BNXT_VERSTR_SIZE];
495 char mgmt_fw_ver[BNXT_VERSTR_SIZE];
496 char netctrl_fw_ver[BNXT_VERSTR_SIZE];
497 char roce_fw_ver[BNXT_VERSTR_SIZE];
498 char phy_ver[BNXT_VERSTR_SIZE];
501 char hwrm_fw_name[BNXT_NAME_SIZE];
502 char mgmt_fw_name[BNXT_NAME_SIZE];
503 char netctrl_fw_name[BNXT_NAME_SIZE];
504 char roce_fw_name[BNXT_NAME_SIZE];
505 char phy_vendor[BNXT_NAME_SIZE];
506 char phy_partnumber[BNXT_NAME_SIZE];
511 uint8_t chip_bond_id;
514 uint8_t hwrm_min_major;
515 uint8_t hwrm_min_minor;
516 uint8_t hwrm_min_update;
518 struct sysctl_ctx_list ver_ctx;
519 struct sysctl_oid *ver_oid;
522 struct bnxt_nvram_info {
525 uint32_t sector_size;
527 uint32_t reserved_size;
528 uint32_t available_size;
530 struct sysctl_ctx_list nvm_ctx;
531 struct sysctl_oid *nvm_oid;
534 struct bnxt_func_qcfg {
535 uint16_t alloc_completion_rings;
536 uint16_t alloc_tx_rings;
537 uint16_t alloc_rx_rings;
538 uint16_t alloc_vnics;
543 uint16_t is_mode_gro;
544 uint16_t max_agg_segs;
546 uint32_t min_agg_len;
552 if_softc_ctx_t scctx;
553 if_shared_ctx_t sctx;
554 struct ifmedia *media;
556 struct bnxt_bar_info hwrm_bar;
557 struct bnxt_bar_info doorbell_bar;
558 struct bnxt_link_info link_info;
559 #define BNXT_FLAG_VF 0x0001
560 #define BNXT_FLAG_NPAR 0x0002
561 #define BNXT_FLAG_WOL_CAP 0x0004
565 struct bnxt_func_info func;
566 struct bnxt_func_qcfg fn_qcfg;
567 struct bnxt_pf_info pf;
568 struct bnxt_vf_info vf;
570 uint16_t hwrm_cmd_seq;
571 uint32_t hwrm_cmd_timeo; /* milliseconds */
572 struct iflib_dma_info hwrm_cmd_resp;
573 /* Interrupt info for HWRM */
575 struct mtx hwrm_lock;
576 uint16_t hwrm_max_req_len;
578 #define BNXT_MAX_QUEUE 8
580 struct bnxt_cos_queue q_info[BNXT_MAX_QUEUE];
582 uint64_t admin_ticks;
583 struct iflib_dma_info hw_rx_port_stats;
584 struct iflib_dma_info hw_tx_port_stats;
585 struct rx_port_stats *rx_port_stats;
586 struct tx_port_stats *tx_port_stats;
590 struct bnxt_ring *tx_rings;
591 struct bnxt_cp_ring *tx_cp_rings;
592 struct iflib_dma_info tx_stats;
595 struct bnxt_vnic_info vnic_info;
596 struct bnxt_ring *ag_rings;
597 struct bnxt_ring *rx_rings;
598 struct bnxt_cp_ring *rx_cp_rings;
599 struct bnxt_grp_info *grp_info;
600 struct iflib_dma_info rx_stats;
603 struct bnxt_cp_ring def_cp_ring;
604 struct iflib_dma_info def_cp_ring_mem;
605 struct grouptask def_cp_task;
607 struct sysctl_ctx_list hw_stats;
608 struct sysctl_oid *hw_stats_oid;
609 struct sysctl_ctx_list hw_lro_ctx;
610 struct sysctl_oid *hw_lro_oid;
611 struct sysctl_ctx_list flow_ctrl_ctx;
612 struct sysctl_oid *flow_ctrl_oid;
614 struct bnxt_ver_info *ver_info;
615 struct bnxt_nvram_info *nvm_info;
617 struct bnxt_hw_lro hw_lro;
618 uint8_t wol_filter_id;
619 uint16_t rx_coal_usecs;
620 uint16_t rx_coal_usecs_irq;
621 uint16_t rx_coal_frames;
622 uint16_t rx_coal_frames_irq;
623 uint16_t tx_coal_usecs;
624 uint16_t tx_coal_usecs_irq;
625 uint16_t tx_coal_frames;
626 uint16_t tx_coal_frames_irq;
628 #define BNXT_USEC_TO_COAL_TIMER(x) ((x) * 25 / 2)
629 #define BNXT_DEF_STATS_COAL_TICKS 1000000
630 #define BNXT_MIN_STATS_COAL_TICKS 250000
631 #define BNXT_MAX_STATS_COAL_TICKS 1000000
635 struct bnxt_filter_info {
636 STAILQ_ENTRY(bnxt_filter_info) next;
637 uint64_t fw_l2_filter_id;
638 #define INVALID_MAC_INDEX ((uint16_t)-1)
641 /* Filter Characteristics */
644 uint8_t l2_addr[ETHER_ADDR_LEN];
645 uint8_t l2_addr_mask[ETHER_ADDR_LEN];
647 uint16_t l2_ovlan_mask;
649 uint16_t l2_ivlan_mask;
650 uint8_t t_l2_addr[ETHER_ADDR_LEN];
651 uint8_t t_l2_addr_mask[ETHER_ADDR_LEN];
653 uint16_t t_l2_ovlan_mask;
655 uint16_t t_l2_ivlan_mask;
657 uint16_t mirror_vnic_id;
660 uint64_t l2_filter_id_hint;
663 /* Function declarations */
664 void bnxt_report_link(struct bnxt_softc *softc);
665 bool bnxt_check_hwrm_version(struct bnxt_softc *softc);