2 * Broadcom NetXtreme-C/E network driver.
4 * Copyright (c) 2016 Broadcom, All Rights Reserved.
5 * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
35 #include <sys/param.h>
36 #include <sys/socket.h>
37 #include <sys/sysctl.h>
38 #include <sys/taskqueue.h>
40 #include <machine/bus.h>
42 #include <net/ethernet.h>
44 #include <net/if_var.h>
45 #include <net/iflib.h>
47 #include "hsi_struct_def.h"
50 #define BROADCOM_VENDOR_ID 0x14E4
52 #define BCM57301 0x16c8
53 #define BCM57302 0x16c9
54 #define BCM57304 0x16ca
55 #define BCM57311 0x16ce
56 #define BCM57312 0x16cf
57 #define BCM57314 0x16df
58 #define BCM57402 0x16d0
59 #define BCM57402_NPAR 0x16d4
60 #define BCM57404 0x16d1
61 #define BCM57404_NPAR 0x16e7
62 #define BCM57406 0x16d2
63 #define BCM57406_NPAR 0x16e8
64 #define BCM57407 0x16d5
65 #define BCM57407_NPAR 0x16ea
66 #define BCM57407_SFP 0x16e9
67 #define BCM57412 0x16d6
68 #define BCM57412_NPAR1 0x16de
69 #define BCM57412_NPAR2 0x16eb
70 #define BCM57414 0x16d7
71 #define BCM57414_NPAR1 0x16ec
72 #define BCM57414_NPAR2 0x16ed
73 #define BCM57416 0x16d8
74 #define BCM57416_NPAR1 0x16ee
75 #define BCM57416_NPAR2 0x16ef
76 #define BCM57416_SFP 0x16e3
77 #define BCM57417 0x16d9
78 #define BCM57417_NPAR1 0x16c0
79 #define BCM57417_NPAR2 0x16cc
80 #define BCM57417_SFP 0x16e2
81 #define BCM57454 0x1614
82 #define BCM58700 0x16cd
83 #define NETXTREME_C_VF1 0x16cb
84 #define NETXTREME_C_VF2 0x16e1
85 #define NETXTREME_C_VF3 0x16e5
86 #define NETXTREME_E_VF1 0x16c1
87 #define NETXTREME_E_VF2 0x16d3
88 #define NETXTREME_E_VF3 0x16dc
90 /* Maximum numbers of RX and TX descriptors. iflib requires this to be a power
91 * of two. The hardware has no particular limitation. */
92 #define BNXT_MAX_RXD ((INT32_MAX >> 1) + 1)
93 #define BNXT_MAX_TXD ((INT32_MAX >> 1) + 1)
95 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
96 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
97 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
99 #define BNXT_MAX_MTU 9000
101 #define BNXT_RSS_HASH_TYPE_TCPV4 0
102 #define BNXT_RSS_HASH_TYPE_UDPV4 1
103 #define BNXT_RSS_HASH_TYPE_IPV4 2
104 #define BNXT_RSS_HASH_TYPE_TCPV6 3
105 #define BNXT_RSS_HASH_TYPE_UDPV6 4
106 #define BNXT_RSS_HASH_TYPE_IPV6 5
107 #define BNXT_GET_RSS_PROFILE_ID(rss_hash_type) ((rss_hash_type >> 1) & 0x1F)
109 #define BNXT_NO_MORE_WOL_FILTERS 0xFFFF
110 #define bnxt_wol_supported(softc) (!((softc)->flags & BNXT_FLAG_VF) && \
111 ((softc)->flags & BNXT_FLAG_WOL_CAP ))
113 /* Completion related defines */
114 #define CMP_VALID(cmp, v_bit) \
115 ((!!(((struct cmpl_base *)(cmp))->info3_v & htole32(CMPL_BASE_V))) == !!(v_bit) )
117 #define NEXT_CP_CONS_V(ring, cons, v_bit) do { \
118 if (__predict_false(++(cons) == (ring)->ring_size)) \
119 ((cons) = 0, (v_bit) = !v_bit); \
122 #define RING_NEXT(ring, idx) (__predict_false(idx + 1 == (ring)->ring_size) ? \
125 #define CMPL_PREFETCH_NEXT(cpr, idx) \
126 __builtin_prefetch(&((struct cmpl_base *)(cpr)->ring.vaddr)[((idx) +\
127 (CACHE_LINE_SIZE / sizeof(struct cmpl_base))) & \
128 ((cpr)->ring.ring_size - 1)])
131 * If we update the index, a write barrier is needed after the write to ensure
132 * the completion ring has space before the RX/TX ring does. Since we can't
133 * make the RX and AG doorbells covered by the same barrier without remapping
134 * MSI-X vectors, we create the barrier over the enture doorbell bar.
135 * TODO: Remap the MSI-X vectors to allow a barrier to only cover the doorbells
136 * for a single ring group.
138 * A barrier of just the size of the write is used to ensure the ordering
139 * remains correct and no writes are lost.
141 #define BNXT_CP_DISABLE_DB(ring) do { \
142 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
143 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
144 BUS_SPACE_BARRIER_WRITE); \
145 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
146 (ring)->softc->doorbell_bar.handle, 0, \
147 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
148 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
149 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
150 htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_MASK)); \
153 #define BNXT_CP_ENABLE_DB(ring) do { \
154 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
155 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
156 BUS_SPACE_BARRIER_WRITE); \
157 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
158 (ring)->softc->doorbell_bar.handle, 0, \
159 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
160 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
161 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
162 htole32(CMPL_DOORBELL_KEY_CMPL)); \
165 #define BNXT_CP_IDX_ENABLE_DB(ring, cons) do { \
166 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
167 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
168 BUS_SPACE_BARRIER_WRITE); \
169 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
170 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
171 htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID | \
173 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
174 (ring)->softc->doorbell_bar.handle, 0, \
175 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
178 #define BNXT_CP_IDX_DISABLE_DB(ring, cons) do { \
179 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
180 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
181 BUS_SPACE_BARRIER_WRITE); \
182 bus_space_write_4((ring)->softc->doorbell_bar.tag, \
183 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, \
184 htole32(CMPL_DOORBELL_KEY_CMPL | CMPL_DOORBELL_IDX_VALID | \
185 CMPL_DOORBELL_MASK | (cons))); \
186 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
187 (ring)->softc->doorbell_bar.handle, 0, \
188 (ring)->softc->doorbell_bar.size, BUS_SPACE_BARRIER_WRITE); \
191 #define BNXT_TX_DB(ring, idx) do { \
192 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
193 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
194 BUS_SPACE_BARRIER_WRITE); \
196 (ring)->softc->doorbell_bar.tag, \
197 (ring)->softc->doorbell_bar.handle, \
198 (ring)->doorbell, htole32(TX_DOORBELL_KEY_TX | (idx))); \
201 #define BNXT_RX_DB(ring, idx) do { \
202 bus_space_barrier((ring)->softc->doorbell_bar.tag, \
203 (ring)->softc->doorbell_bar.handle, (ring)->doorbell, 4, \
204 BUS_SPACE_BARRIER_WRITE); \
206 (ring)->softc->doorbell_bar.tag, \
207 (ring)->softc->doorbell_bar.handle, \
208 (ring)->doorbell, htole32(RX_DOORBELL_KEY_RX | (idx))); \
212 #define BNXT_HWRM_LOCK_INIT(_softc, _name) \
213 mtx_init(&(_softc)->hwrm_lock, _name, "BNXT HWRM Lock", MTX_DEF)
214 #define BNXT_HWRM_LOCK(_softc) mtx_lock(&(_softc)->hwrm_lock)
215 #define BNXT_HWRM_UNLOCK(_softc) mtx_unlock(&(_softc)->hwrm_lock)
216 #define BNXT_HWRM_LOCK_DESTROY(_softc) mtx_destroy(&(_softc)->hwrm_lock)
217 #define BNXT_HWRM_LOCK_ASSERT(_softc) mtx_assert(&(_softc)->hwrm_lock, \
219 #define BNXT_IS_FLOW_CTRL_CHANGED(link_info) \
220 ((link_info->last_flow_ctrl.tx != link_info->flow_ctrl.tx) || \
221 (link_info->last_flow_ctrl.rx != link_info->flow_ctrl.rx) || \
222 (link_info->last_flow_ctrl.autoneg != link_info->flow_ctrl.autoneg))
225 #define BNXT_TSO_SIZE UINT16_MAX
227 #define min_t(type, x, y) ({ \
230 __min1 < __min2 ? __min1 : __min2; })
232 #define max_t(type, x, y) ({ \
235 __max1 > __max2 ? __max1 : __max2; })
237 #define clamp_t(type, _x, min, max) min_t(type, max_t(type, _x, min), max)
239 #define BNXT_IFMEDIA_ADD(supported, fw_speed, ifm_speed) do { \
240 if ((supported) & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_ ## fw_speed) \
241 ifmedia_add(softc->media, IFM_ETHER | (ifm_speed), 0, NULL); \
244 #define BNXT_MIN_FRAME_SIZE 52 /* Frames must be padded to this size for some A0 chips */
247 enum bnxt_nvm_directory_type {
248 BNX_DIR_TYPE_UNUSED = 0,
249 BNX_DIR_TYPE_PKG_LOG = 1,
250 BNX_DIR_TYPE_UPDATE = 2,
251 BNX_DIR_TYPE_CHIMP_PATCH = 3,
252 BNX_DIR_TYPE_BOOTCODE = 4,
253 BNX_DIR_TYPE_VPD = 5,
254 BNX_DIR_TYPE_EXP_ROM_MBA = 6,
255 BNX_DIR_TYPE_AVS = 7,
256 BNX_DIR_TYPE_PCIE = 8,
257 BNX_DIR_TYPE_PORT_MACRO = 9,
258 BNX_DIR_TYPE_APE_FW = 10,
259 BNX_DIR_TYPE_APE_PATCH = 11,
260 BNX_DIR_TYPE_KONG_FW = 12,
261 BNX_DIR_TYPE_KONG_PATCH = 13,
262 BNX_DIR_TYPE_BONO_FW = 14,
263 BNX_DIR_TYPE_BONO_PATCH = 15,
264 BNX_DIR_TYPE_TANG_FW = 16,
265 BNX_DIR_TYPE_TANG_PATCH = 17,
266 BNX_DIR_TYPE_BOOTCODE_2 = 18,
267 BNX_DIR_TYPE_CCM = 19,
268 BNX_DIR_TYPE_PCI_CFG = 20,
269 BNX_DIR_TYPE_TSCF_UCODE = 21,
270 BNX_DIR_TYPE_ISCSI_BOOT = 22,
271 BNX_DIR_TYPE_ISCSI_BOOT_IPV6 = 24,
272 BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6 = 25,
273 BNX_DIR_TYPE_ISCSI_BOOT_CFG6 = 26,
274 BNX_DIR_TYPE_EXT_PHY = 27,
275 BNX_DIR_TYPE_SHARED_CFG = 40,
276 BNX_DIR_TYPE_PORT_CFG = 41,
277 BNX_DIR_TYPE_FUNC_CFG = 42,
278 BNX_DIR_TYPE_MGMT_CFG = 48,
279 BNX_DIR_TYPE_MGMT_DATA = 49,
280 BNX_DIR_TYPE_MGMT_WEB_DATA = 50,
281 BNX_DIR_TYPE_MGMT_WEB_META = 51,
282 BNX_DIR_TYPE_MGMT_EVENT_LOG = 52,
283 BNX_DIR_TYPE_MGMT_AUDIT_LOG = 53
286 enum bnxnvm_pkglog_field_index {
287 BNX_PKG_LOG_FIELD_IDX_INSTALLED_TIMESTAMP = 0,
288 BNX_PKG_LOG_FIELD_IDX_PKG_DESCRIPTION = 1,
289 BNX_PKG_LOG_FIELD_IDX_PKG_VERSION = 2,
290 BNX_PKG_LOG_FIELD_IDX_PKG_TIMESTAMP = 3,
291 BNX_PKG_LOG_FIELD_IDX_PKG_CHECKSUM = 4,
292 BNX_PKG_LOG_FIELD_IDX_INSTALLED_ITEMS = 5,
293 BNX_PKG_LOG_FIELD_IDX_INSTALLED_MASK = 6
296 #define BNX_DIR_ORDINAL_FIRST 0
297 #define BNX_DIR_EXT_NONE 0
299 struct bnxt_bar_info {
300 struct resource *res;
302 bus_space_handle_t handle;
307 struct bnxt_flow_ctrl {
313 struct bnxt_link_info {
317 uint8_t phy_link_status;
321 uint8_t last_link_up;
324 struct bnxt_flow_ctrl flow_ctrl;
325 struct bnxt_flow_ctrl last_flow_ctrl;
326 uint8_t duplex_setting;
328 #define PHY_VER_LEN 3
329 uint8_t phy_ver[PHY_VER_LEN];
332 uint16_t support_speeds;
333 uint16_t auto_link_speeds;
334 uint16_t auto_link_speed;
335 uint16_t force_link_speed;
336 uint32_t preemphasis;
338 /* copy of requested setting */
340 #define BNXT_AUTONEG_SPEED 1
341 #define BNXT_AUTONEG_FLOW_CTRL 2
343 uint16_t req_link_speed;
353 struct bnxt_cos_queue {
358 struct bnxt_func_info {
360 uint8_t mac_addr[ETHER_ADDR_LEN];
361 uint16_t max_rsscos_ctxs;
362 uint16_t max_cp_rings;
363 uint16_t max_tx_rings;
364 uint16_t max_rx_rings;
365 uint16_t max_hw_ring_grps;
367 uint16_t max_l2_ctxs;
369 uint16_t max_stat_ctxs;
372 struct bnxt_pf_info {
373 #define BNXT_FIRST_PF_FID 1
374 #define BNXT_FIRST_VF_FID 128
376 uint32_t first_vf_id;
379 uint32_t max_encap_records;
380 uint32_t max_decap_records;
381 uint32_t max_tx_em_flows;
382 uint32_t max_tx_wm_flows;
383 uint32_t max_rx_em_flows;
384 uint32_t max_rx_wm_flows;
385 unsigned long *vf_event_bmap;
386 uint16_t hwrm_cmd_req_pages;
387 void *hwrm_cmd_req_addr[4];
388 bus_addr_t hwrm_cmd_req_dma_addr[4];
391 struct bnxt_vf_info {
393 uint8_t mac_addr[ETHER_ADDR_LEN];
394 uint16_t max_rsscos_ctxs;
395 uint16_t max_cp_rings;
396 uint16_t max_tx_rings;
397 uint16_t max_rx_rings;
398 uint16_t max_hw_ring_grps;
399 uint16_t max_l2_ctxs;
402 uint16_t max_stat_ctxs;
404 #define BNXT_VF_QOS 0x1
405 #define BNXT_VF_SPOOFCHK 0x2
406 #define BNXT_VF_LINK_FORCED 0x4
407 #define BNXT_VF_LINK_UP 0x8
409 uint32_t func_flags; /* func cfg flags */
410 uint32_t min_tx_rate;
411 uint32_t max_tx_rate;
412 void *hwrm_cmd_req_addr;
413 bus_addr_t hwrm_cmd_req_dma_addr;
417 #define BNXT_PF(softc) (!((softc)->flags & BNXT_FLAG_VF))
418 #define BNXT_VF(softc) ((softc)->flags & BNXT_FLAG_VF)
420 struct bnxt_vlan_tag {
421 SLIST_ENTRY(bnxt_vlan_tag) next;
426 struct bnxt_vnic_info {
428 uint16_t def_ring_grp;
435 struct iflib_dma_info mc_list;
437 #define BNXT_MAX_MC_ADDRS 16
440 #define BNXT_VNIC_FLAG_DEFAULT 0x01
441 #define BNXT_VNIC_FLAG_BD_STALL 0x02
442 #define BNXT_VNIC_FLAG_VLAN_STRIP 0x04
448 uint32_t rss_hash_type;
449 uint8_t rss_hash_key[HW_HASH_KEY_SIZE];
450 struct iflib_dma_info rss_hash_key_tbl;
451 struct iflib_dma_info rss_grp_tbl;
452 SLIST_HEAD(vlan_head, bnxt_vlan_tag) vlan_tags;
453 struct iflib_dma_info vlan_tag_list;
456 struct bnxt_grp_info {
466 vm_offset_t doorbell;
468 struct bnxt_softc *softc;
469 uint32_t ring_size; /* Must be a power of two */
470 uint16_t id; /* Logical ID */
472 struct bnxt_full_tpa_start *tpa_start;
475 struct bnxt_cp_ring {
476 struct bnxt_ring ring;
479 bool v_bit; /* Value of valid bit */
480 struct ctx_hw_stats *stats;
481 uint32_t stats_ctx_id;
482 uint32_t last_idx; /* Used by RX rings only
483 * set to the last read pidx
487 struct bnxt_full_tpa_start {
488 struct rx_tpa_start_cmpl low;
489 struct rx_tpa_start_cmpl_hi high;
492 /* All the version information for the part */
493 #define BNXT_VERSTR_SIZE (3*3+2+1) /* ie: "255.255.255\0" */
494 #define BNXT_NAME_SIZE 17
495 struct bnxt_ver_info {
496 uint8_t hwrm_if_major;
497 uint8_t hwrm_if_minor;
498 uint8_t hwrm_if_update;
499 char hwrm_if_ver[BNXT_VERSTR_SIZE];
500 char driver_hwrm_if_ver[BNXT_VERSTR_SIZE];
501 char hwrm_fw_ver[BNXT_VERSTR_SIZE];
502 char mgmt_fw_ver[BNXT_VERSTR_SIZE];
503 char netctrl_fw_ver[BNXT_VERSTR_SIZE];
504 char roce_fw_ver[BNXT_VERSTR_SIZE];
505 char phy_ver[BNXT_VERSTR_SIZE];
508 char hwrm_fw_name[BNXT_NAME_SIZE];
509 char mgmt_fw_name[BNXT_NAME_SIZE];
510 char netctrl_fw_name[BNXT_NAME_SIZE];
511 char roce_fw_name[BNXT_NAME_SIZE];
512 char phy_vendor[BNXT_NAME_SIZE];
513 char phy_partnumber[BNXT_NAME_SIZE];
518 uint8_t chip_bond_id;
521 uint8_t hwrm_min_major;
522 uint8_t hwrm_min_minor;
523 uint8_t hwrm_min_update;
525 struct sysctl_ctx_list ver_ctx;
526 struct sysctl_oid *ver_oid;
529 struct bnxt_nvram_info {
532 uint32_t sector_size;
534 uint32_t reserved_size;
535 uint32_t available_size;
537 struct sysctl_ctx_list nvm_ctx;
538 struct sysctl_oid *nvm_oid;
541 struct bnxt_func_qcfg {
542 uint16_t alloc_completion_rings;
543 uint16_t alloc_tx_rings;
544 uint16_t alloc_rx_rings;
545 uint16_t alloc_vnics;
550 uint16_t is_mode_gro;
551 uint16_t max_agg_segs;
553 uint32_t min_agg_len;
559 if_softc_ctx_t scctx;
560 if_shared_ctx_t sctx;
561 struct ifmedia *media;
563 struct bnxt_bar_info hwrm_bar;
564 struct bnxt_bar_info doorbell_bar;
565 struct bnxt_link_info link_info;
566 #define BNXT_FLAG_VF 0x0001
567 #define BNXT_FLAG_NPAR 0x0002
568 #define BNXT_FLAG_WOL_CAP 0x0004
569 #define BNXT_FLAG_SHORT_CMD 0x0008
573 struct bnxt_func_info func;
574 struct bnxt_func_qcfg fn_qcfg;
575 struct bnxt_pf_info pf;
576 struct bnxt_vf_info vf;
578 uint16_t hwrm_cmd_seq;
579 uint32_t hwrm_cmd_timeo; /* milliseconds */
580 struct iflib_dma_info hwrm_cmd_resp;
581 struct iflib_dma_info hwrm_short_cmd_req_addr;
582 /* Interrupt info for HWRM */
584 struct mtx hwrm_lock;
585 uint16_t hwrm_max_req_len;
587 #define BNXT_MAX_QUEUE 8
589 struct bnxt_cos_queue q_info[BNXT_MAX_QUEUE];
591 uint64_t admin_ticks;
592 struct iflib_dma_info hw_rx_port_stats;
593 struct iflib_dma_info hw_tx_port_stats;
594 struct rx_port_stats *rx_port_stats;
595 struct tx_port_stats *tx_port_stats;
599 struct bnxt_ring *tx_rings;
600 struct bnxt_cp_ring *tx_cp_rings;
601 struct iflib_dma_info tx_stats;
604 struct bnxt_vnic_info vnic_info;
605 struct bnxt_ring *ag_rings;
606 struct bnxt_ring *rx_rings;
607 struct bnxt_cp_ring *rx_cp_rings;
608 struct bnxt_grp_info *grp_info;
609 struct iflib_dma_info rx_stats;
612 struct bnxt_cp_ring def_cp_ring;
613 struct iflib_dma_info def_cp_ring_mem;
614 struct grouptask def_cp_task;
616 struct sysctl_ctx_list hw_stats;
617 struct sysctl_oid *hw_stats_oid;
618 struct sysctl_ctx_list hw_lro_ctx;
619 struct sysctl_oid *hw_lro_oid;
620 struct sysctl_ctx_list flow_ctrl_ctx;
621 struct sysctl_oid *flow_ctrl_oid;
623 struct bnxt_ver_info *ver_info;
624 struct bnxt_nvram_info *nvm_info;
626 struct bnxt_hw_lro hw_lro;
627 uint8_t wol_filter_id;
628 uint16_t rx_coal_usecs;
629 uint16_t rx_coal_usecs_irq;
630 uint16_t rx_coal_frames;
631 uint16_t rx_coal_frames_irq;
632 uint16_t tx_coal_usecs;
633 uint16_t tx_coal_usecs_irq;
634 uint16_t tx_coal_frames;
635 uint16_t tx_coal_frames_irq;
637 #define BNXT_USEC_TO_COAL_TIMER(x) ((x) * 25 / 2)
638 #define BNXT_DEF_STATS_COAL_TICKS 1000000
639 #define BNXT_MIN_STATS_COAL_TICKS 250000
640 #define BNXT_MAX_STATS_COAL_TICKS 1000000
644 struct bnxt_filter_info {
645 STAILQ_ENTRY(bnxt_filter_info) next;
646 uint64_t fw_l2_filter_id;
647 #define INVALID_MAC_INDEX ((uint16_t)-1)
650 /* Filter Characteristics */
653 uint8_t l2_addr[ETHER_ADDR_LEN];
654 uint8_t l2_addr_mask[ETHER_ADDR_LEN];
656 uint16_t l2_ovlan_mask;
658 uint16_t l2_ivlan_mask;
659 uint8_t t_l2_addr[ETHER_ADDR_LEN];
660 uint8_t t_l2_addr_mask[ETHER_ADDR_LEN];
662 uint16_t t_l2_ovlan_mask;
664 uint16_t t_l2_ivlan_mask;
666 uint16_t mirror_vnic_id;
669 uint64_t l2_filter_id_hint;
672 /* Function declarations */
673 void bnxt_report_link(struct bnxt_softc *softc);
674 bool bnxt_check_hwrm_version(struct bnxt_softc *softc);