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1 /*-
2  * Broadcom NetXtreme-C/E network driver.
3  *
4  * Copyright (c) 2016 Broadcom, All Rights Reserved.
5  * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26  * THE POSSIBILITY OF SUCH DAMAGE.
27  */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #include <sys/endian.h>
33 #include <sys/bitstring.h>
34
35 #include "bnxt.h"
36 #include "bnxt_hwrm.h"
37 #include "hsi_struct_def.h"
38
39 static int bnxt_hwrm_err_map(uint16_t err);
40 static inline int _is_valid_ether_addr(uint8_t *);
41 static inline void get_random_ether_addr(uint8_t *);
42 static void     bnxt_hwrm_set_link_common(struct bnxt_softc *softc,
43                     struct hwrm_port_phy_cfg_input *req);
44 static void     bnxt_hwrm_set_pause_common(struct bnxt_softc *softc,
45                     struct hwrm_port_phy_cfg_input *req);
46 static void     bnxt_hwrm_set_eee(struct bnxt_softc *softc,
47                     struct hwrm_port_phy_cfg_input *req);
48 static int      _hwrm_send_message(struct bnxt_softc *, void *, uint32_t);
49 static int      hwrm_send_message(struct bnxt_softc *, void *, uint32_t);
50 static void bnxt_hwrm_cmd_hdr_init(struct bnxt_softc *, void *, uint16_t);
51
52 /* NVRam stuff has a five minute timeout */
53 #define BNXT_NVM_TIMEO  (5 * 60 * 1000)
54
55 static int
56 bnxt_hwrm_err_map(uint16_t err)
57 {
58         int rc;
59
60         switch (err) {
61         case HWRM_ERR_CODE_SUCCESS:
62                 return 0;
63         case HWRM_ERR_CODE_INVALID_PARAMS:
64         case HWRM_ERR_CODE_INVALID_FLAGS:
65         case HWRM_ERR_CODE_INVALID_ENABLES:
66                 return EINVAL;
67         case HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED:
68                 return EACCES;
69         case HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR:
70                 return ENOMEM;
71         case HWRM_ERR_CODE_CMD_NOT_SUPPORTED:
72                 return ENOSYS;
73         case HWRM_ERR_CODE_FAIL:
74                 return EIO;
75         case HWRM_ERR_CODE_HWRM_ERROR:
76         case HWRM_ERR_CODE_UNKNOWN_ERR:
77         default:
78                 return EDOOFUS;
79         }
80
81         return rc;
82 }
83
84 int
85 bnxt_alloc_hwrm_dma_mem(struct bnxt_softc *softc)
86 {
87         int rc;
88
89         rc = iflib_dma_alloc(softc->ctx, PAGE_SIZE, &softc->hwrm_cmd_resp,
90             BUS_DMA_NOWAIT);
91         return rc;
92 }
93
94 void
95 bnxt_free_hwrm_dma_mem(struct bnxt_softc *softc)
96 {
97         if (softc->hwrm_cmd_resp.idi_vaddr)
98                 iflib_dma_free(&softc->hwrm_cmd_resp);
99         softc->hwrm_cmd_resp.idi_vaddr = NULL;
100         return;
101 }
102
103 static void
104 bnxt_hwrm_cmd_hdr_init(struct bnxt_softc *softc, void *request,
105     uint16_t req_type)
106 {
107         struct input *req = request;
108
109         req->req_type = htole16(req_type);
110         req->cmpl_ring = 0xffff;
111         req->target_id = 0xffff;
112         req->resp_addr = htole64(softc->hwrm_cmd_resp.idi_paddr);
113 }
114
115 static int
116 _hwrm_send_message(struct bnxt_softc *softc, void *msg, uint32_t msg_len)
117 {
118         struct input *req = msg;
119         struct hwrm_err_output *resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
120         uint32_t *data = msg;
121         int i;
122         uint16_t cp_ring_id;
123         uint8_t *valid;
124         uint16_t err;
125
126         /* TODO: DMASYNC in here. */
127         req->seq_id = htole16(softc->hwrm_cmd_seq++);
128         memset(resp, 0, PAGE_SIZE);
129         cp_ring_id = le16toh(req->cmpl_ring);
130
131         /* Write request msg to hwrm channel */
132         for (i = 0; i < msg_len; i += 4) {
133                 bus_space_write_4(softc->hwrm_bar.tag,
134                                   softc->hwrm_bar.handle,
135                                   i, *data);
136                 data++;
137         }
138
139         /* Clear to the end of the request buffer */
140         for (i = msg_len; i < HWRM_MAX_REQ_LEN; i += 4)
141                 bus_space_write_4(softc->hwrm_bar.tag, softc->hwrm_bar.handle,
142                     i, 0);
143
144         /* Ring channel doorbell */
145         bus_space_write_4(softc->hwrm_bar.tag,
146                           softc->hwrm_bar.handle,
147                           0x100, htole32(1));
148
149         /* Check if response len is updated */
150         for (i = 0; i < softc->hwrm_cmd_timeo; i++) {
151                 if (resp->resp_len && resp->resp_len <= 4096)
152                         break;
153                 DELAY(1000);
154         }
155         if (i >= softc->hwrm_cmd_timeo) {
156                 device_printf(softc->dev,
157                     "Timeout sending %s: (timeout: %u) seq: %d\n",
158                     GET_HWRM_REQ_TYPE(req->req_type), softc->hwrm_cmd_timeo,
159                     le16toh(req->seq_id));
160                 return ETIMEDOUT;
161         }
162         /* Last byte of resp contains the valid key */
163         valid = (uint8_t *)resp + resp->resp_len - 1;
164         for (i = 0; i < softc->hwrm_cmd_timeo; i++) {
165                 if (*valid == HWRM_RESP_VALID_KEY)
166                         break;
167                 DELAY(1000);
168         }
169         if (i >= softc->hwrm_cmd_timeo) {
170                 device_printf(softc->dev, "Timeout sending %s: "
171                     "(timeout: %u) msg {0x%x 0x%x} len:%d v: %d\n",
172                     GET_HWRM_REQ_TYPE(req->req_type),
173                     softc->hwrm_cmd_timeo, le16toh(req->req_type),
174                     le16toh(req->seq_id), msg_len,
175                     *valid);
176                 return ETIMEDOUT;
177         }
178
179         err = le16toh(resp->error_code);
180         if (err) {
181                 /* HWRM_ERR_CODE_FAIL is a "normal" error, don't log */
182                 if (err != HWRM_ERR_CODE_FAIL) {
183                         device_printf(softc->dev,
184                             "%s command returned %s error.\n",
185                             GET_HWRM_REQ_TYPE(req->req_type),
186                             GET_HWRM_ERROR_CODE(err));
187                 }
188                 return bnxt_hwrm_err_map(err);
189         }
190
191         return 0;
192 }
193
194 static int
195 hwrm_send_message(struct bnxt_softc *softc, void *msg, uint32_t msg_len)
196 {
197         int rc;
198
199         BNXT_HWRM_LOCK(softc);
200         rc = _hwrm_send_message(softc, msg, msg_len);
201         BNXT_HWRM_UNLOCK(softc);
202         return rc;
203 }
204
205 int
206 bnxt_hwrm_queue_qportcfg(struct bnxt_softc *softc)
207 {
208         struct hwrm_queue_qportcfg_input req = {0};
209         struct hwrm_queue_qportcfg_output *resp =
210             (void *)softc->hwrm_cmd_resp.idi_vaddr;
211
212         int     rc = 0;
213         uint8_t *qptr;
214
215         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_QUEUE_QPORTCFG);
216
217         BNXT_HWRM_LOCK(softc);
218         rc = _hwrm_send_message(softc, &req, sizeof(req));
219         if (rc)
220                 goto qportcfg_exit;
221
222         if (!resp->max_configurable_queues) {
223                 rc = -EINVAL;
224                 goto qportcfg_exit;
225         }
226         softc->max_tc = resp->max_configurable_queues;
227         if (softc->max_tc > BNXT_MAX_QUEUE)
228                 softc->max_tc = BNXT_MAX_QUEUE;
229
230         qptr = &resp->queue_id0;
231         for (int i = 0; i < softc->max_tc; i++) {
232                 softc->q_info[i].id = *qptr++;
233                 softc->q_info[i].profile = *qptr++;
234         }
235
236 qportcfg_exit:
237         BNXT_HWRM_UNLOCK(softc);
238         return (rc);
239 }
240
241
242 int
243 bnxt_hwrm_ver_get(struct bnxt_softc *softc)
244 {
245         struct hwrm_ver_get_input       req = {0};
246         struct hwrm_ver_get_output      *resp =
247             (void *)softc->hwrm_cmd_resp.idi_vaddr;
248         int                             rc;
249         const char nastr[] = "<not installed>";
250         const char naver[] = "<N/A>";
251
252         softc->hwrm_max_req_len = HWRM_MAX_REQ_LEN;
253         softc->hwrm_cmd_timeo = 1000;
254         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VER_GET);
255
256         req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
257         req.hwrm_intf_min = HWRM_VERSION_MINOR;
258         req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
259
260         BNXT_HWRM_LOCK(softc);
261         rc = _hwrm_send_message(softc, &req, sizeof(req));
262         if (rc)
263                 goto fail;
264
265         snprintf(softc->ver_info->hwrm_if_ver, BNXT_VERSTR_SIZE, "%d.%d.%d",
266             resp->hwrm_intf_maj, resp->hwrm_intf_min, resp->hwrm_intf_upd);
267         softc->ver_info->hwrm_if_major = resp->hwrm_intf_maj;
268         softc->ver_info->hwrm_if_minor = resp->hwrm_intf_min;
269         softc->ver_info->hwrm_if_update = resp->hwrm_intf_upd;
270         snprintf(softc->ver_info->hwrm_fw_ver, BNXT_VERSTR_SIZE, "%d.%d.%d",
271             resp->hwrm_fw_maj, resp->hwrm_fw_min, resp->hwrm_fw_bld);
272         strlcpy(softc->ver_info->driver_hwrm_if_ver, HWRM_VERSION_STR,
273             BNXT_VERSTR_SIZE);
274         strlcpy(softc->ver_info->hwrm_fw_name, resp->hwrm_fw_name,
275             BNXT_NAME_SIZE);
276
277         if (resp->mgmt_fw_maj == 0 && resp->mgmt_fw_min == 0 &&
278             resp->mgmt_fw_bld == 0) {
279                 strlcpy(softc->ver_info->mgmt_fw_ver, naver, BNXT_VERSTR_SIZE);
280                 strlcpy(softc->ver_info->mgmt_fw_name, nastr, BNXT_NAME_SIZE);
281         }
282         else {
283                 snprintf(softc->ver_info->mgmt_fw_ver, BNXT_VERSTR_SIZE,
284                     "%d.%d.%d", resp->mgmt_fw_maj, resp->mgmt_fw_min,
285                     resp->mgmt_fw_bld);
286                 strlcpy(softc->ver_info->mgmt_fw_name, resp->mgmt_fw_name,
287                     BNXT_NAME_SIZE);
288         }
289         if (resp->netctrl_fw_maj == 0 && resp->netctrl_fw_min == 0 &&
290             resp->netctrl_fw_bld == 0) {
291                 strlcpy(softc->ver_info->netctrl_fw_ver, naver,
292                     BNXT_VERSTR_SIZE);
293                 strlcpy(softc->ver_info->netctrl_fw_name, nastr,
294                     BNXT_NAME_SIZE);
295         }
296         else {
297                 snprintf(softc->ver_info->netctrl_fw_ver, BNXT_VERSTR_SIZE,
298                     "%d.%d.%d", resp->netctrl_fw_maj, resp->netctrl_fw_min,
299                     resp->netctrl_fw_bld);
300                 strlcpy(softc->ver_info->netctrl_fw_name, resp->netctrl_fw_name,
301                     BNXT_NAME_SIZE);
302         }
303         if (resp->roce_fw_maj == 0 && resp->roce_fw_min == 0 &&
304             resp->roce_fw_bld == 0) {
305                 strlcpy(softc->ver_info->roce_fw_ver, naver, BNXT_VERSTR_SIZE);
306                 strlcpy(softc->ver_info->roce_fw_name, nastr, BNXT_NAME_SIZE);
307         }
308         else {
309                 snprintf(softc->ver_info->roce_fw_ver, BNXT_VERSTR_SIZE,
310                     "%d.%d.%d", resp->roce_fw_maj, resp->roce_fw_min,
311                     resp->roce_fw_bld);
312                 strlcpy(softc->ver_info->roce_fw_name, resp->roce_fw_name,
313                     BNXT_NAME_SIZE);
314         }
315         softc->ver_info->chip_num = le16toh(resp->chip_num);
316         softc->ver_info->chip_rev = resp->chip_rev;
317         softc->ver_info->chip_metal = resp->chip_metal;
318         softc->ver_info->chip_bond_id = resp->chip_bond_id;
319         softc->ver_info->chip_type = resp->chip_platform_type;
320
321         if (resp->max_req_win_len)
322                 softc->hwrm_max_req_len = le16toh(resp->max_req_win_len);
323         if (resp->def_req_timeout)
324                 softc->hwrm_cmd_timeo = le16toh(resp->def_req_timeout);
325
326 fail:
327         BNXT_HWRM_UNLOCK(softc);
328         return rc;
329 }
330
331 int
332 bnxt_hwrm_func_drv_rgtr(struct bnxt_softc *softc)
333 {
334         struct hwrm_func_drv_rgtr_input req = {0};
335
336         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_RGTR);
337
338         req.enables = htole32(HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER |
339             HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE);
340         req.os_type = htole16(HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD);
341
342         req.ver_maj = __FreeBSD_version / 100000;
343         req.ver_min = (__FreeBSD_version / 1000) % 100;
344         req.ver_upd = (__FreeBSD_version / 100) % 10;
345
346         return hwrm_send_message(softc, &req, sizeof(req));
347 }
348
349
350 int
351 bnxt_hwrm_func_drv_unrgtr(struct bnxt_softc *softc, bool shutdown)
352 {
353         struct hwrm_func_drv_unrgtr_input req = {0};
354
355         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_UNRGTR);
356         if (shutdown == true)
357                 req.flags |=
358                     HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN;
359         return hwrm_send_message(softc, &req, sizeof(req));
360 }
361
362
363 static inline int
364 _is_valid_ether_addr(uint8_t *addr)
365 {
366         char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
367
368         if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN)))
369                 return (FALSE);
370
371         return (TRUE);
372 }
373
374 static inline void
375 get_random_ether_addr(uint8_t *addr)
376 {
377         uint8_t temp[ETHER_ADDR_LEN];
378
379         arc4rand(&temp, sizeof(temp), 0);
380         temp[0] &= 0xFE;
381         temp[0] |= 0x02;
382         bcopy(temp, addr, sizeof(temp));
383 }
384
385 int
386 bnxt_hwrm_func_qcaps(struct bnxt_softc *softc)
387 {
388         int rc = 0;
389         struct hwrm_func_qcaps_input req = {0};
390         struct hwrm_func_qcaps_output *resp =
391             (void *)softc->hwrm_cmd_resp.idi_vaddr;
392         struct bnxt_func_info *func = &softc->func;
393
394         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_QCAPS);
395         req.fid = htole16(0xffff);
396
397         BNXT_HWRM_LOCK(softc);
398         rc = _hwrm_send_message(softc, &req, sizeof(req));
399         if (rc)
400                 goto fail;
401
402         if (resp->flags &
403             htole32(HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED))
404                 softc->flags |= BNXT_FLAG_WOL_CAP;
405
406         func->fw_fid = le16toh(resp->fid);
407         memcpy(func->mac_addr, resp->mac_address, ETHER_ADDR_LEN);
408         func->max_rsscos_ctxs = le16toh(resp->max_rsscos_ctx);
409         func->max_cp_rings = le16toh(resp->max_cmpl_rings);
410         func->max_tx_rings = le16toh(resp->max_tx_rings);
411         func->max_rx_rings = le16toh(resp->max_rx_rings);
412         func->max_hw_ring_grps = le32toh(resp->max_hw_ring_grps);
413         if (!func->max_hw_ring_grps)
414                 func->max_hw_ring_grps = func->max_tx_rings;
415         func->max_l2_ctxs = le16toh(resp->max_l2_ctxs);
416         func->max_vnics = le16toh(resp->max_vnics);
417         func->max_stat_ctxs = le16toh(resp->max_stat_ctx);
418         if (BNXT_PF(softc)) {
419                 struct bnxt_pf_info *pf = &softc->pf;
420
421                 pf->port_id = le16toh(resp->port_id);
422                 pf->first_vf_id = le16toh(resp->first_vf_id);
423                 pf->max_vfs = le16toh(resp->max_vfs);
424                 pf->max_encap_records = le32toh(resp->max_encap_records);
425                 pf->max_decap_records = le32toh(resp->max_decap_records);
426                 pf->max_tx_em_flows = le32toh(resp->max_tx_em_flows);
427                 pf->max_tx_wm_flows = le32toh(resp->max_tx_wm_flows);
428                 pf->max_rx_em_flows = le32toh(resp->max_rx_em_flows);
429                 pf->max_rx_wm_flows = le32toh(resp->max_rx_wm_flows);
430         }
431         if (!_is_valid_ether_addr(func->mac_addr)) {
432                 device_printf(softc->dev, "Invalid ethernet address, generating random locally administered address\n");
433                 get_random_ether_addr(func->mac_addr);
434         }
435
436 fail:
437         BNXT_HWRM_UNLOCK(softc);
438         return rc;
439 }
440
441 int 
442 bnxt_hwrm_func_qcfg(struct bnxt_softc *softc)
443 {
444         struct hwrm_func_qcfg_input req = {0};
445         struct hwrm_func_qcfg_output *resp =
446             (void *)softc->hwrm_cmd_resp.idi_vaddr;
447         struct bnxt_func_qcfg *fn_qcfg = &softc->fn_qcfg;
448         int rc;
449
450         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_QCFG);
451         req.fid = htole16(0xffff);
452         BNXT_HWRM_LOCK(softc);
453         rc = _hwrm_send_message(softc, &req, sizeof(req));
454         if (rc)
455                 goto fail;
456
457         fn_qcfg->alloc_completion_rings = le16toh(resp->alloc_cmpl_rings);
458         fn_qcfg->alloc_tx_rings = le16toh(resp->alloc_tx_rings);
459         fn_qcfg->alloc_rx_rings = le16toh(resp->alloc_rx_rings);
460         fn_qcfg->alloc_vnics = le16toh(resp->alloc_vnics);
461 fail:
462         BNXT_HWRM_UNLOCK(softc);
463         return rc;
464 }
465
466 int
467 bnxt_hwrm_func_reset(struct bnxt_softc *softc)
468 {
469         struct hwrm_func_reset_input req = {0};
470
471         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_RESET);
472         req.enables = 0;
473
474         return hwrm_send_message(softc, &req, sizeof(req));
475 }
476
477 static void
478 bnxt_hwrm_set_link_common(struct bnxt_softc *softc,
479     struct hwrm_port_phy_cfg_input *req)
480 {
481         uint8_t autoneg = softc->link_info.autoneg;
482         uint16_t fw_link_speed = softc->link_info.req_link_speed;
483
484         if (autoneg & BNXT_AUTONEG_SPEED) {
485                 req->auto_mode |=
486                     HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS;
487
488                 req->enables |=
489                     htole32(HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE);
490                 req->flags |=
491                     htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG);
492         } else {
493                 req->force_link_speed = htole16(fw_link_speed);
494                 req->flags |= htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE);
495         }
496
497         /* tell chimp that the setting takes effect immediately */
498         req->flags |= htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY);
499 }
500
501
502 static void
503 bnxt_hwrm_set_pause_common(struct bnxt_softc *softc,
504     struct hwrm_port_phy_cfg_input *req)
505 {
506         if (softc->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) {
507                 req->auto_pause =
508                     HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE;
509                 if (softc->link_info.req_flow_ctrl &
510                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)
511                         req->auto_pause |=
512                             HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
513                 if (softc->link_info.req_flow_ctrl &
514                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX)
515                         req->auto_pause |=
516                             HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
517                 req->enables |=
518                     htole32(HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE);
519         } else {
520                 if (softc->link_info.req_flow_ctrl &
521                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)
522                         req->force_pause |=
523                             HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
524                 if (softc->link_info.req_flow_ctrl &
525                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX)
526                         req->force_pause |=
527                             HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
528                 req->enables |=
529                         htole32(HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE);
530                 req->auto_pause = req->force_pause;
531                 req->enables |= htole32(
532                     HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE);
533         }
534 }
535
536
537 /* JFV this needs interface connection */
538 static void
539 bnxt_hwrm_set_eee(struct bnxt_softc *softc, struct hwrm_port_phy_cfg_input *req)
540 {
541         /* struct ethtool_eee *eee = &softc->eee; */
542         bool    eee_enabled = false;
543
544         if (eee_enabled) {
545 #if 0
546                 uint16_t eee_speeds;
547                 uint32_t flags = HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE;
548
549                 if (eee->tx_lpi_enabled)
550                         flags |= HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI;
551
552                 req->flags |= htole32(flags);
553                 eee_speeds = bnxt_get_fw_auto_link_speeds(eee->advertised);
554                 req->eee_link_speed_mask = htole16(eee_speeds);
555                 req->tx_lpi_timer = htole32(eee->tx_lpi_timer);
556 #endif
557         } else {
558                 req->flags |=
559                     htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE);
560         }
561 }
562
563
564 int
565 bnxt_hwrm_set_link_setting(struct bnxt_softc *softc, bool set_pause,
566     bool set_eee)
567 {
568         struct hwrm_port_phy_cfg_input req = {0};
569
570         if (softc->flags & BNXT_FLAG_NPAR)
571                 return ENOTSUP;
572
573         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_PHY_CFG);
574         if (set_pause)
575                 bnxt_hwrm_set_pause_common(softc, &req);
576
577         bnxt_hwrm_set_link_common(softc, &req);
578         if (set_eee)
579                 bnxt_hwrm_set_eee(softc, &req);
580         return hwrm_send_message(softc, &req, sizeof(req));
581 }
582
583
584 int
585 bnxt_hwrm_set_pause(struct bnxt_softc *softc)
586 {
587         struct hwrm_port_phy_cfg_input req = {0};
588         int rc;
589
590         if (softc->flags & BNXT_FLAG_NPAR)
591                 return ENOTSUP;
592
593         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_PHY_CFG);
594         bnxt_hwrm_set_pause_common(softc, &req);
595
596         if (softc->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)
597                 bnxt_hwrm_set_link_common(softc, &req);
598
599         BNXT_HWRM_LOCK(softc);
600         rc = _hwrm_send_message(softc, &req, sizeof(req));
601         if (!rc && !(softc->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)) {
602                 /* since changing of pause setting doesn't trigger any link
603                  * change event, the driver needs to update the current pause
604                  * result upon successfully return of the phy_cfg command */
605                 softc->link_info.pause =
606                 softc->link_info.force_pause = softc->link_info.req_flow_ctrl;
607                 softc->link_info.auto_pause = 0;
608                 bnxt_report_link(softc);
609         }
610         BNXT_HWRM_UNLOCK(softc);
611         return rc;
612 }
613
614 int
615 bnxt_hwrm_vnic_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
616 {
617         struct hwrm_vnic_cfg_input req = {0};
618         struct hwrm_vnic_cfg_output *resp;
619
620         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
621         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_CFG);
622
623         if (vnic->flags & BNXT_VNIC_FLAG_DEFAULT)
624                 req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT);
625         if (vnic->flags & BNXT_VNIC_FLAG_BD_STALL)
626                 req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE);
627         if (vnic->flags & BNXT_VNIC_FLAG_VLAN_STRIP)
628                 req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE);
629         req.enables = htole32(HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP |
630             HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE |
631             HWRM_VNIC_CFG_INPUT_ENABLES_MRU);
632         req.vnic_id = htole16(vnic->id);
633         req.dflt_ring_grp = htole16(vnic->def_ring_grp);
634         req.rss_rule = htole16(vnic->rss_id);
635         req.cos_rule = htole16(vnic->cos_rule);
636         req.lb_rule = htole16(vnic->lb_rule);
637         req.mru = htole16(vnic->mru);
638
639         return hwrm_send_message(softc, &req, sizeof(req));
640 }
641
642 int
643 bnxt_hwrm_vnic_alloc(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
644 {
645         struct hwrm_vnic_alloc_input req = {0};
646         struct hwrm_vnic_alloc_output *resp =
647             (void *)softc->hwrm_cmd_resp.idi_vaddr;
648         int rc;
649
650         if (vnic->id != (uint16_t)HWRM_NA_SIGNATURE) {
651                 device_printf(softc->dev,
652                     "Attempt to re-allocate vnic %04x\n", vnic->id);
653                 return EDOOFUS;
654         }
655
656         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_ALLOC);
657
658         if (vnic->flags & BNXT_VNIC_FLAG_DEFAULT)
659                 req.flags = htole32(HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT);
660
661         BNXT_HWRM_LOCK(softc);
662         rc = _hwrm_send_message(softc, &req, sizeof(req));
663         if (rc)
664                 goto fail;
665
666         vnic->id = le32toh(resp->vnic_id);
667
668 fail:
669         BNXT_HWRM_UNLOCK(softc);
670         return (rc);
671 }
672
673 int
674 bnxt_hwrm_vnic_ctx_alloc(struct bnxt_softc *softc, uint16_t *ctx_id)
675 {
676         struct hwrm_vnic_rss_cos_lb_ctx_alloc_input req = {0};
677         struct hwrm_vnic_rss_cos_lb_ctx_alloc_output *resp =
678             (void *)softc->hwrm_cmd_resp.idi_vaddr;
679         int rc;
680
681         if (*ctx_id != (uint16_t)HWRM_NA_SIGNATURE) {
682                 device_printf(softc->dev,
683                     "Attempt to re-allocate vnic ctx %04x\n", *ctx_id);
684                 return EDOOFUS;
685         }
686
687         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_RSS_COS_LB_CTX_ALLOC);
688
689         BNXT_HWRM_LOCK(softc);
690         rc = _hwrm_send_message(softc, &req, sizeof(req));
691         if (rc)
692                 goto fail;
693
694         *ctx_id = le32toh(resp->rss_cos_lb_ctx_id);
695
696 fail:
697         BNXT_HWRM_UNLOCK(softc);
698         return (rc);
699 }
700
701 int
702 bnxt_hwrm_ring_grp_alloc(struct bnxt_softc *softc, struct bnxt_grp_info *grp)
703 {
704         struct hwrm_ring_grp_alloc_input req = {0};
705         struct hwrm_ring_grp_alloc_output *resp;
706         int rc = 0;
707
708         if (grp->grp_id != (uint16_t)HWRM_NA_SIGNATURE) {
709                 device_printf(softc->dev,
710                     "Attempt to re-allocate ring group %04x\n", grp->grp_id);
711                 return EDOOFUS;
712         }
713
714         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
715         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_RING_GRP_ALLOC);
716         req.cr = htole16(grp->cp_ring_id);
717         req.rr = htole16(grp->rx_ring_id);
718         req.ar = htole16(grp->ag_ring_id);
719         req.sc = htole16(grp->stats_ctx);
720
721         BNXT_HWRM_LOCK(softc);
722         rc = _hwrm_send_message(softc, &req, sizeof(req));
723         if (rc)
724                 goto fail;
725
726         grp->grp_id = le32toh(resp->ring_group_id);
727
728 fail:
729         BNXT_HWRM_UNLOCK(softc);
730         return rc;
731 }
732
733 /*
734  * Ring allocation message to the firmware
735  */
736 int
737 bnxt_hwrm_ring_alloc(struct bnxt_softc *softc, uint8_t type,
738     struct bnxt_ring *ring, uint16_t cmpl_ring_id, uint32_t stat_ctx_id,
739     bool irq)
740 {
741         struct hwrm_ring_alloc_input req = {0};
742         struct hwrm_ring_alloc_output *resp;
743         int rc;
744
745         if (ring->phys_id != (uint16_t)HWRM_NA_SIGNATURE) {
746                 device_printf(softc->dev,
747                     "Attempt to re-allocate ring %04x\n", ring->phys_id);
748                 return EDOOFUS;
749         }
750
751         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
752         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_RING_ALLOC);
753         req.enables = htole32(0);
754         req.fbo = htole32(0);
755
756         if (stat_ctx_id != HWRM_NA_SIGNATURE) {
757                 req.enables |= htole32(
758                     HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID);
759                 req.stat_ctx_id = htole32(stat_ctx_id);
760         }
761         req.ring_type = type;
762         req.page_tbl_addr = htole64(ring->paddr);
763         req.length = htole32(ring->ring_size);
764         req.logical_id = htole16(ring->id);
765         req.cmpl_ring_id = htole16(cmpl_ring_id);
766         req.queue_id = htole16(softc->q_info[0].id);
767 #if 0
768         /* MODE_POLL appears to crash the firmware */
769         if (irq)
770                 req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX;
771         else
772                 req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_POLL;
773 #else
774         req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX;
775 #endif
776         BNXT_HWRM_LOCK(softc);
777         rc = _hwrm_send_message(softc, &req, sizeof(req));
778         if (rc)
779                 goto fail;
780
781         ring->phys_id = le16toh(resp->ring_id);
782
783 fail:
784         BNXT_HWRM_UNLOCK(softc);
785         return rc;
786 }
787
788 int
789 bnxt_hwrm_stat_ctx_alloc(struct bnxt_softc *softc, struct bnxt_cp_ring *cpr,
790     uint64_t paddr)
791 {
792         struct hwrm_stat_ctx_alloc_input req = {0};
793         struct hwrm_stat_ctx_alloc_output *resp;
794         int rc = 0;
795
796         if (cpr->stats_ctx_id != HWRM_NA_SIGNATURE) {
797                 device_printf(softc->dev,
798                     "Attempt to re-allocate stats ctx %08x\n",
799                     cpr->stats_ctx_id);
800                 return EDOOFUS;
801         }
802
803         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
804         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_STAT_CTX_ALLOC);
805
806         req.update_period_ms = htole32(1000);
807         req.stats_dma_addr = htole64(paddr);
808
809         BNXT_HWRM_LOCK(softc);
810         rc = _hwrm_send_message(softc, &req, sizeof(req));
811         if (rc)
812                 goto fail;
813
814         cpr->stats_ctx_id = le32toh(resp->stat_ctx_id);
815
816 fail:
817         BNXT_HWRM_UNLOCK(softc);
818
819         return rc;
820 }
821
822 int
823 bnxt_hwrm_port_qstats(struct bnxt_softc *softc)
824 {
825         struct hwrm_port_qstats_input req = {0};
826         int rc = 0;
827
828         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_QSTATS);
829
830         req.port_id = htole16(softc->pf.port_id);
831         req.rx_stat_host_addr = htole64(softc->hw_rx_port_stats.idi_paddr);
832         req.tx_stat_host_addr = htole64(softc->hw_tx_port_stats.idi_paddr);
833
834         BNXT_HWRM_LOCK(softc);
835         rc = _hwrm_send_message(softc, &req, sizeof(req));
836         BNXT_HWRM_UNLOCK(softc);
837
838         return rc;
839 }
840
841 int
842 bnxt_hwrm_cfa_l2_set_rx_mask(struct bnxt_softc *softc,
843     struct bnxt_vnic_info *vnic)
844 {
845         struct hwrm_cfa_l2_set_rx_mask_input req = {0};
846         struct bnxt_vlan_tag *tag;
847         uint32_t *tags;
848         uint32_t num_vlan_tags = 0;;
849         uint32_t i;
850         uint32_t mask = vnic->rx_mask;
851         int rc;
852
853         SLIST_FOREACH(tag, &vnic->vlan_tags, next)
854                 num_vlan_tags++;
855
856         if (num_vlan_tags) {
857                 if (!(mask &
858                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN)) {
859                         if (!vnic->vlan_only)
860                                 mask |= HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN;
861                         else
862                                 mask |=
863                                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY;
864                 }
865                 if (vnic->vlan_tag_list.idi_vaddr) {
866                         iflib_dma_free(&vnic->vlan_tag_list);
867                         vnic->vlan_tag_list.idi_vaddr = NULL;
868                 }
869                 rc = iflib_dma_alloc(softc->ctx, 4 * num_vlan_tags,
870                     &vnic->vlan_tag_list, BUS_DMA_NOWAIT);
871                 if (rc)
872                         return rc;
873                 tags = (uint32_t *)vnic->vlan_tag_list.idi_vaddr;
874
875                 i = 0;
876                 SLIST_FOREACH(tag, &vnic->vlan_tags, next) {
877                         tags[i] = htole32((tag->tpid << 16) | tag->tag);
878                         i++;
879                 }
880         }
881         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_CFA_L2_SET_RX_MASK);
882
883         req.vnic_id = htole32(vnic->id);
884         req.mask = htole32(mask);
885         req.mc_tbl_addr = htole64(vnic->mc_list.idi_paddr);
886         req.num_mc_entries = htole32(vnic->mc_list_count);
887         req.vlan_tag_tbl_addr = htole64(vnic->vlan_tag_list.idi_paddr);
888         req.num_vlan_tags = htole32(num_vlan_tags);
889         return hwrm_send_message(softc, &req, sizeof(req));
890 }
891
892
893 int
894 bnxt_hwrm_set_filter(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
895 {
896         struct hwrm_cfa_l2_filter_alloc_input   req = {0};
897         struct hwrm_cfa_l2_filter_alloc_output  *resp;
898         uint32_t enables = 0;
899         int rc = 0;
900
901         if (vnic->filter_id != -1) {
902                 device_printf(softc->dev,
903                     "Attempt to re-allocate l2 ctx filter\n");
904                 return EDOOFUS;
905         }
906
907         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
908         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_CFA_L2_FILTER_ALLOC);
909
910         req.flags = htole32(HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX);
911         enables = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR
912             | HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK
913             | HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID;
914         req.enables = htole32(enables);
915         req.dst_id = htole16(vnic->id);
916         memcpy(req.l2_addr, if_getlladdr(iflib_get_ifp(softc->ctx)),
917             ETHER_ADDR_LEN);
918         memset(&req.l2_addr_mask, 0xff, sizeof(req.l2_addr_mask));
919
920         BNXT_HWRM_LOCK(softc);
921         rc = _hwrm_send_message(softc, &req, sizeof(req));
922         if (rc)
923                 goto fail;
924
925         vnic->filter_id = le64toh(resp->l2_filter_id);
926         vnic->flow_id = le64toh(resp->flow_id);
927
928 fail:
929         BNXT_HWRM_UNLOCK(softc);
930         return (rc);
931 }
932
933 int
934 bnxt_hwrm_rss_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic,
935     uint32_t hash_type)
936 {
937         struct hwrm_vnic_rss_cfg_input  req = {0};
938         struct hwrm_vnic_rss_cfg_output *resp;
939
940         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
941         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_RSS_CFG);
942
943         req.hash_type = htole32(hash_type);
944         req.ring_grp_tbl_addr = htole64(vnic->rss_grp_tbl.idi_paddr);
945         req.hash_key_tbl_addr = htole64(vnic->rss_hash_key_tbl.idi_paddr);
946         req.rss_ctx_idx = htole16(vnic->rss_id);
947
948         return hwrm_send_message(softc, &req, sizeof(req));
949 }
950
951 int
952 bnxt_cfg_async_cr(struct bnxt_softc *softc)
953 {
954         int rc = 0;
955         
956         if (BNXT_PF(softc)) {
957                 struct hwrm_func_cfg_input req = {0};
958
959                 bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_CFG);
960
961                 req.fid = 0xffff;
962                 req.enables = htole32(HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR);
963                 req.async_event_cr = softc->def_cp_ring.ring.phys_id;
964
965                 rc = hwrm_send_message(softc, &req, sizeof(req));
966         }
967         else {
968                 struct hwrm_func_vf_cfg_input req = {0};
969
970                 bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_VF_CFG);
971
972                 req.enables = htole32(HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR);
973                 req.async_event_cr = softc->def_cp_ring.ring.phys_id;
974
975                 rc = hwrm_send_message(softc, &req, sizeof(req));
976         }
977         return rc;
978 }
979
980 void
981 bnxt_validate_hw_lro_settings(struct bnxt_softc *softc)
982 {
983         softc->hw_lro.enable = min(softc->hw_lro.enable, 1);
984
985         softc->hw_lro.is_mode_gro = min(softc->hw_lro.is_mode_gro, 1);
986
987         softc->hw_lro.max_agg_segs = min(softc->hw_lro.max_agg_segs,
988                 HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX);
989
990         softc->hw_lro.max_aggs = min(softc->hw_lro.max_aggs,
991                 HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX);
992
993         softc->hw_lro.min_agg_len = min(softc->hw_lro.min_agg_len, BNXT_MAX_MTU);
994 }
995
996 int
997 bnxt_hwrm_vnic_tpa_cfg(struct bnxt_softc *softc)
998 {
999         struct hwrm_vnic_tpa_cfg_input req = {0};
1000         uint32_t flags;
1001
1002         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_TPA_CFG);
1003
1004         if (softc->hw_lro.enable) {
1005                 flags = HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA |
1006                         HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA |
1007                         HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN |
1008                         HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ;
1009                 
1010                 if (softc->hw_lro.is_mode_gro)
1011                         flags |= HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO;
1012                 else
1013                         flags |= HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE;
1014                         
1015                 req.flags = htole32(flags);
1016
1017                 req.enables = htole32(HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS |
1018                                 HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS |
1019                                 HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN);
1020
1021                 req.max_agg_segs = htole16(softc->hw_lro.max_agg_segs);
1022                 req.max_aggs = htole16(softc->hw_lro.max_aggs);
1023                 req.min_agg_len = htole32(softc->hw_lro.min_agg_len);
1024         }
1025
1026         req.vnic_id = htole16(softc->vnic_info.id);
1027
1028         return hwrm_send_message(softc, &req, sizeof(req));
1029 }
1030
1031 int
1032 bnxt_hwrm_nvm_find_dir_entry(struct bnxt_softc *softc, uint16_t type,
1033     uint16_t *ordinal, uint16_t ext, uint16_t *index, bool use_index,
1034     uint8_t search_opt, uint32_t *data_length, uint32_t *item_length,
1035     uint32_t *fw_ver)
1036 {
1037         struct hwrm_nvm_find_dir_entry_input req = {0};
1038         struct hwrm_nvm_find_dir_entry_output *resp =
1039             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1040         int     rc = 0;
1041         uint32_t old_timeo;
1042
1043         MPASS(ordinal);
1044
1045         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_FIND_DIR_ENTRY);
1046         if (use_index) {
1047                 req.enables = htole32(
1048                     HWRM_NVM_FIND_DIR_ENTRY_INPUT_ENABLES_DIR_IDX_VALID);
1049                 req.dir_idx = htole16(*index);
1050         }
1051         req.dir_type = htole16(type);
1052         req.dir_ordinal = htole16(*ordinal);
1053         req.dir_ext = htole16(ext);
1054         req.opt_ordinal = search_opt;
1055
1056         BNXT_HWRM_LOCK(softc);
1057         old_timeo = softc->hwrm_cmd_timeo;
1058         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1059         rc = _hwrm_send_message(softc, &req, sizeof(req));
1060         softc->hwrm_cmd_timeo = old_timeo;
1061         if (rc)
1062                 goto exit;
1063
1064         if (item_length)
1065                 *item_length = le32toh(resp->dir_item_length);
1066         if (data_length)
1067                 *data_length = le32toh(resp->dir_data_length);
1068         if (fw_ver)
1069                 *fw_ver = le32toh(resp->fw_ver);
1070         *ordinal = le16toh(resp->dir_ordinal);
1071         if (index)
1072                 *index = le16toh(resp->dir_idx);
1073
1074 exit:
1075         BNXT_HWRM_UNLOCK(softc);
1076         return (rc);
1077 }
1078
1079 int
1080 bnxt_hwrm_nvm_read(struct bnxt_softc *softc, uint16_t index, uint32_t offset,
1081     uint32_t length, struct iflib_dma_info *data)
1082 {
1083         struct hwrm_nvm_read_input req = {0};
1084         int rc;
1085         uint32_t old_timeo;
1086
1087         if (length > data->idi_size) {
1088                 rc = EINVAL;
1089                 goto exit;
1090         }
1091         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_READ);
1092         req.host_dest_addr = htole64(data->idi_paddr);
1093         req.dir_idx = htole16(index);
1094         req.offset = htole32(offset);
1095         req.len = htole32(length);
1096         BNXT_HWRM_LOCK(softc);
1097         old_timeo = softc->hwrm_cmd_timeo;
1098         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1099         rc = _hwrm_send_message(softc, &req, sizeof(req));
1100         softc->hwrm_cmd_timeo = old_timeo;
1101         BNXT_HWRM_UNLOCK(softc);
1102         if (rc)
1103                 goto exit;
1104         bus_dmamap_sync(data->idi_tag, data->idi_map, BUS_DMASYNC_POSTREAD);
1105
1106         goto exit;
1107
1108 exit:
1109         return rc;
1110 }
1111
1112 int
1113 bnxt_hwrm_nvm_modify(struct bnxt_softc *softc, uint16_t index, uint32_t offset,
1114     void *data, bool cpyin, uint32_t length)
1115 {
1116         struct hwrm_nvm_modify_input req = {0};
1117         struct iflib_dma_info dma_data;
1118         int rc;
1119         uint32_t old_timeo;
1120
1121         if (length == 0 || !data)
1122                 return EINVAL;
1123         rc = iflib_dma_alloc(softc->ctx, length, &dma_data,
1124             BUS_DMA_NOWAIT);
1125         if (rc)
1126                 return ENOMEM;
1127         if (cpyin) {
1128                 rc = copyin(data, dma_data.idi_vaddr, length);
1129                 if (rc)
1130                         goto exit;
1131         }
1132         else
1133                 memcpy(dma_data.idi_vaddr, data, length);
1134         bus_dmamap_sync(dma_data.idi_tag, dma_data.idi_map,
1135             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1136
1137         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_MODIFY);
1138         req.host_src_addr = htole64(dma_data.idi_paddr);
1139         req.dir_idx = htole16(index);
1140         req.offset = htole32(offset);
1141         req.len = htole32(length);
1142         BNXT_HWRM_LOCK(softc);
1143         old_timeo = softc->hwrm_cmd_timeo;
1144         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1145         rc = _hwrm_send_message(softc, &req, sizeof(req));
1146         softc->hwrm_cmd_timeo = old_timeo;
1147         BNXT_HWRM_UNLOCK(softc);
1148
1149 exit:
1150         iflib_dma_free(&dma_data);
1151         return rc;
1152 }
1153
1154 int
1155 bnxt_hwrm_fw_reset(struct bnxt_softc *softc, uint8_t processor,
1156     uint8_t *selfreset)
1157 {
1158         struct hwrm_fw_reset_input req = {0};
1159         struct hwrm_fw_reset_output *resp =
1160             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1161         int rc;
1162
1163         MPASS(selfreset);
1164
1165         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_RESET);
1166         req.embedded_proc_type = processor;
1167         req.selfrst_status = *selfreset;
1168
1169         BNXT_HWRM_LOCK(softc);
1170         rc = _hwrm_send_message(softc, &req, sizeof(req));
1171         if (rc)
1172                 goto exit;
1173         *selfreset = resp->selfrst_status;
1174
1175 exit:
1176         BNXT_HWRM_UNLOCK(softc);
1177         return rc;
1178 }
1179
1180 int
1181 bnxt_hwrm_fw_qstatus(struct bnxt_softc *softc, uint8_t type, uint8_t *selfreset)
1182 {
1183         struct hwrm_fw_qstatus_input req = {0};
1184         struct hwrm_fw_qstatus_output *resp =
1185             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1186         int rc;
1187
1188         MPASS(selfreset);
1189
1190         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_QSTATUS);
1191         req.embedded_proc_type = type;
1192
1193         BNXT_HWRM_LOCK(softc);
1194         rc = _hwrm_send_message(softc, &req, sizeof(req));
1195         if (rc)
1196                 goto exit;
1197         *selfreset = resp->selfrst_status;
1198
1199 exit:
1200         BNXT_HWRM_UNLOCK(softc);
1201         return rc;
1202 }
1203
1204 int
1205 bnxt_hwrm_nvm_write(struct bnxt_softc *softc, void *data, bool cpyin,
1206     uint16_t type, uint16_t ordinal, uint16_t ext, uint16_t attr,
1207     uint16_t option, uint32_t data_length, bool keep, uint32_t *item_length,
1208     uint16_t *index)
1209 {
1210         struct hwrm_nvm_write_input req = {0};
1211         struct hwrm_nvm_write_output *resp =
1212             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1213         struct iflib_dma_info dma_data;
1214         int rc;
1215         uint32_t old_timeo;
1216
1217         if (data_length) {
1218                 rc = iflib_dma_alloc(softc->ctx, data_length, &dma_data,
1219                     BUS_DMA_NOWAIT);
1220                 if (rc)
1221                         return ENOMEM;
1222                 if (cpyin) {
1223                         rc = copyin(data, dma_data.idi_vaddr, data_length);
1224                         if (rc)
1225                                 goto early_exit;
1226                 }
1227                 else
1228                         memcpy(dma_data.idi_vaddr, data, data_length);
1229                 bus_dmamap_sync(dma_data.idi_tag, dma_data.idi_map,
1230                     BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1231         }
1232         else
1233                 dma_data.idi_paddr = 0;
1234
1235         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_WRITE);
1236
1237         req.host_src_addr = htole64(dma_data.idi_paddr);
1238         req.dir_type = htole16(type);
1239         req.dir_ordinal = htole16(ordinal);
1240         req.dir_ext = htole16(ext);
1241         req.dir_attr = htole16(attr);
1242         req.dir_data_length = htole32(data_length);
1243         req.option = htole16(option);
1244         if (keep) {
1245                 req.flags =
1246                     htole16(HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG);
1247         }
1248         if (item_length)
1249                 req.dir_item_length = htole32(*item_length);
1250
1251         BNXT_HWRM_LOCK(softc);
1252         old_timeo = softc->hwrm_cmd_timeo;
1253         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1254         rc = _hwrm_send_message(softc, &req, sizeof(req));
1255         softc->hwrm_cmd_timeo = old_timeo;
1256         if (rc)
1257                 goto exit;
1258         if (item_length)
1259                 *item_length = le32toh(resp->dir_item_length);
1260         if (index)
1261                 *index = le16toh(resp->dir_idx);
1262
1263 exit:
1264         BNXT_HWRM_UNLOCK(softc);
1265 early_exit:
1266         if (data_length)
1267                 iflib_dma_free(&dma_data);
1268         return rc;
1269 }
1270
1271 int
1272 bnxt_hwrm_nvm_erase_dir_entry(struct bnxt_softc *softc, uint16_t index)
1273 {
1274         struct hwrm_nvm_erase_dir_entry_input req = {0};
1275         uint32_t old_timeo;
1276         int rc;
1277
1278         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_ERASE_DIR_ENTRY);
1279         req.dir_idx = htole16(index);
1280         BNXT_HWRM_LOCK(softc);
1281         old_timeo = softc->hwrm_cmd_timeo;
1282         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1283         rc = _hwrm_send_message(softc, &req, sizeof(req));
1284         softc->hwrm_cmd_timeo = old_timeo;
1285         BNXT_HWRM_UNLOCK(softc);
1286         return rc;
1287 }
1288
1289 int
1290 bnxt_hwrm_nvm_get_dir_info(struct bnxt_softc *softc, uint32_t *entries,
1291     uint32_t *entry_length)
1292 {
1293         struct hwrm_nvm_get_dir_info_input req = {0};
1294         struct hwrm_nvm_get_dir_info_output *resp =
1295             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1296         int rc;
1297         uint32_t old_timeo;
1298
1299         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_GET_DIR_INFO);
1300
1301         BNXT_HWRM_LOCK(softc);
1302         old_timeo = softc->hwrm_cmd_timeo;
1303         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1304         rc = _hwrm_send_message(softc, &req, sizeof(req));
1305         softc->hwrm_cmd_timeo = old_timeo;
1306         if (rc)
1307                 goto exit;
1308
1309         if (entries)
1310                 *entries = le32toh(resp->entries);
1311         if (entry_length)
1312                 *entry_length = le32toh(resp->entry_length);
1313
1314 exit:
1315         BNXT_HWRM_UNLOCK(softc);
1316         return rc;
1317 }
1318
1319 int
1320 bnxt_hwrm_nvm_get_dir_entries(struct bnxt_softc *softc, uint32_t *entries,
1321     uint32_t *entry_length, struct iflib_dma_info *dma_data)
1322 {
1323         struct hwrm_nvm_get_dir_entries_input req = {0};
1324         uint32_t ent;
1325         uint32_t ent_len;
1326         int rc;
1327         uint32_t old_timeo;
1328
1329         if (!entries)
1330                 entries = &ent;
1331         if (!entry_length)
1332                 entry_length = &ent_len;
1333
1334         rc = bnxt_hwrm_nvm_get_dir_info(softc, entries, entry_length);
1335         if (rc)
1336                 goto exit;
1337         if (*entries * *entry_length > dma_data->idi_size) {
1338                 rc = EINVAL;
1339                 goto exit;
1340         }
1341
1342         /*
1343          * TODO: There's a race condition here that could blow up DMA memory...
1344          *       we need to allocate the max size, not the currently in use
1345          *       size.  The command should totally have a max size here.
1346          */
1347         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_GET_DIR_ENTRIES);
1348         req.host_dest_addr = htole64(dma_data->idi_paddr);
1349         BNXT_HWRM_LOCK(softc);
1350         old_timeo = softc->hwrm_cmd_timeo;
1351         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1352         rc = _hwrm_send_message(softc, &req, sizeof(req));
1353         softc->hwrm_cmd_timeo = old_timeo;
1354         BNXT_HWRM_UNLOCK(softc);
1355         if (rc)
1356                 goto exit;
1357         bus_dmamap_sync(dma_data->idi_tag, dma_data->idi_map,
1358             BUS_DMASYNC_POSTWRITE);
1359
1360 exit:
1361         return rc;
1362 }
1363
1364 int
1365 bnxt_hwrm_nvm_get_dev_info(struct bnxt_softc *softc, uint16_t *mfg_id,
1366     uint16_t *device_id, uint32_t *sector_size, uint32_t *nvram_size,
1367     uint32_t *reserved_size, uint32_t *available_size)
1368 {
1369         struct hwrm_nvm_get_dev_info_input req = {0};
1370         struct hwrm_nvm_get_dev_info_output *resp =
1371             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1372         int rc;
1373         uint32_t old_timeo;
1374
1375         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_GET_DEV_INFO);
1376
1377         BNXT_HWRM_LOCK(softc);
1378         old_timeo = softc->hwrm_cmd_timeo;
1379         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1380         rc = _hwrm_send_message(softc, &req, sizeof(req));
1381         softc->hwrm_cmd_timeo = old_timeo;
1382         if (rc)
1383                 goto exit;
1384
1385         if (mfg_id)
1386                 *mfg_id = le16toh(resp->manufacturer_id);
1387         if (device_id)
1388                 *device_id = le16toh(resp->device_id);
1389         if (sector_size)
1390                 *sector_size = le32toh(resp->sector_size);
1391         if (nvram_size)
1392                 *nvram_size = le32toh(resp->nvram_size);
1393         if (reserved_size)
1394                 *reserved_size = le32toh(resp->reserved_size);
1395         if (available_size)
1396                 *available_size = le32toh(resp->available_size);
1397
1398 exit:
1399         BNXT_HWRM_UNLOCK(softc);
1400         return rc;
1401 }
1402
1403 int
1404 bnxt_hwrm_nvm_install_update(struct bnxt_softc *softc,
1405     uint32_t install_type, uint64_t *installed_items, uint8_t *result,
1406     uint8_t *problem_item, uint8_t *reset_required)
1407 {
1408         struct hwrm_nvm_install_update_input req = {0};
1409         struct hwrm_nvm_install_update_output *resp =
1410             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1411         int rc;
1412         uint32_t old_timeo;
1413
1414         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_INSTALL_UPDATE);
1415         req.install_type = htole32(install_type);
1416
1417         BNXT_HWRM_LOCK(softc);
1418         old_timeo = softc->hwrm_cmd_timeo;
1419         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1420         rc = _hwrm_send_message(softc, &req, sizeof(req));
1421         softc->hwrm_cmd_timeo = old_timeo;
1422         if (rc)
1423                 goto exit;
1424
1425         if (installed_items)
1426                 *installed_items = le32toh(resp->installed_items);
1427         if (result)
1428                 *result = resp->result;
1429         if (problem_item)
1430                 *problem_item = resp->problem_item;
1431         if (reset_required)
1432                 *reset_required = resp->reset_required;
1433
1434 exit:
1435         BNXT_HWRM_UNLOCK(softc);
1436         return rc;
1437 }
1438
1439 int
1440 bnxt_hwrm_nvm_verify_update(struct bnxt_softc *softc, uint16_t type,
1441     uint16_t ordinal, uint16_t ext)
1442 {
1443         struct hwrm_nvm_verify_update_input req = {0};
1444         uint32_t old_timeo;
1445         int rc;
1446
1447         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_VERIFY_UPDATE);
1448
1449         req.dir_type = htole16(type);
1450         req.dir_ordinal = htole16(ordinal);
1451         req.dir_ext = htole16(ext);
1452
1453         BNXT_HWRM_LOCK(softc);
1454         old_timeo = softc->hwrm_cmd_timeo;
1455         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1456         rc = _hwrm_send_message(softc, &req, sizeof(req));
1457         softc->hwrm_cmd_timeo = old_timeo;
1458         BNXT_HWRM_UNLOCK(softc);
1459         return rc;
1460 }
1461
1462 int
1463 bnxt_hwrm_fw_get_time(struct bnxt_softc *softc, uint16_t *year, uint8_t *month,
1464     uint8_t *day, uint8_t *hour, uint8_t *minute, uint8_t *second,
1465     uint16_t *millisecond, uint16_t *zone)
1466 {
1467         struct hwrm_fw_get_time_input req = {0};
1468         struct hwrm_fw_get_time_output *resp =
1469             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1470         int rc;
1471
1472         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_GET_TIME);
1473
1474         BNXT_HWRM_LOCK(softc);
1475         rc = _hwrm_send_message(softc, &req, sizeof(req));
1476         if (rc)
1477                 goto exit;
1478
1479         if (year)
1480                 *year = le16toh(resp->year);
1481         if (month)
1482                 *month = resp->month;
1483         if (day)
1484                 *day = resp->day;
1485         if (hour)
1486                 *hour = resp->hour;
1487         if (minute)
1488                 *minute = resp->minute;
1489         if (second)
1490                 *second = resp->second;
1491         if (millisecond)
1492                 *millisecond = le16toh(resp->millisecond);
1493         if (zone)
1494                 *zone = le16toh(resp->zone);
1495
1496 exit:
1497         BNXT_HWRM_UNLOCK(softc);
1498         return rc;
1499 }
1500
1501 int
1502 bnxt_hwrm_fw_set_time(struct bnxt_softc *softc, uint16_t year, uint8_t month,
1503     uint8_t day, uint8_t hour, uint8_t minute, uint8_t second,
1504     uint16_t millisecond, uint16_t zone)
1505 {
1506         struct hwrm_fw_set_time_input req = {0};
1507
1508         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_SET_TIME);
1509
1510         req.year = htole16(year);
1511         req.month = month;
1512         req.day = day;
1513         req.hour = hour;
1514         req.minute = minute;
1515         req.second = second;
1516         req.millisecond = htole16(millisecond);
1517         req.zone = htole16(zone);
1518         return hwrm_send_message(softc, &req, sizeof(req));
1519 }
1520
1521 int
1522 bnxt_hwrm_port_phy_qcfg(struct bnxt_softc *softc)
1523 {
1524         struct bnxt_link_info *link_info = &softc->link_info;
1525         struct hwrm_port_phy_qcfg_input req = {0};
1526         struct hwrm_port_phy_qcfg_output *resp =
1527             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1528         int rc = 0;
1529
1530         BNXT_HWRM_LOCK(softc);
1531         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_PHY_QCFG);
1532
1533         rc = _hwrm_send_message(softc, &req, sizeof(req));
1534         if (rc)
1535                 goto exit;
1536
1537         link_info->phy_link_status = resp->link;
1538         link_info->duplex =  resp->duplex_cfg;
1539         link_info->pause = resp->pause;
1540         link_info->auto_mode = resp->auto_mode;
1541         link_info->auto_pause = resp->auto_pause;
1542         link_info->force_pause = resp->force_pause;
1543         link_info->duplex_setting = resp->duplex_cfg;
1544         if (link_info->phy_link_status == HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK)
1545                 link_info->link_speed = le16toh(resp->link_speed);
1546         else
1547                 link_info->link_speed = 0;
1548         link_info->force_link_speed = le16toh(resp->force_link_speed);
1549         link_info->auto_link_speed = le16toh(resp->auto_link_speed);
1550         link_info->support_speeds = le16toh(resp->support_speeds);
1551         link_info->auto_link_speeds = le16toh(resp->auto_link_speed_mask);
1552         link_info->preemphasis = le32toh(resp->preemphasis);
1553         link_info->phy_ver[0] = resp->phy_maj;
1554         link_info->phy_ver[1] = resp->phy_min;
1555         link_info->phy_ver[2] = resp->phy_bld;
1556         snprintf(softc->ver_info->phy_ver, sizeof(softc->ver_info->phy_ver),
1557             "%d.%d.%d", link_info->phy_ver[0], link_info->phy_ver[1],
1558             link_info->phy_ver[2]);
1559         strlcpy(softc->ver_info->phy_vendor, resp->phy_vendor_name,
1560             BNXT_NAME_SIZE);
1561         strlcpy(softc->ver_info->phy_partnumber, resp->phy_vendor_partnumber,
1562             BNXT_NAME_SIZE);
1563         link_info->media_type = resp->media_type;
1564         link_info->phy_type = resp->phy_type;
1565         link_info->transceiver = resp->xcvr_pkg_type;
1566         link_info->phy_addr = resp->eee_config_phy_addr &
1567             HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK;
1568
1569 exit:
1570         BNXT_HWRM_UNLOCK(softc);
1571         return rc;
1572 }
1573
1574 uint16_t
1575 bnxt_hwrm_get_wol_fltrs(struct bnxt_softc *softc, uint16_t handle)
1576 {
1577         struct hwrm_wol_filter_qcfg_input req = {0};
1578         struct hwrm_wol_filter_qcfg_output *resp =
1579                         (void *)softc->hwrm_cmd_resp.idi_vaddr;
1580         uint16_t next_handle = 0;
1581         int rc;
1582
1583         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_QCFG);
1584         req.port_id = htole16(softc->pf.port_id);
1585         req.handle = htole16(handle);
1586         rc = hwrm_send_message(softc, &req, sizeof(req));
1587         if (!rc) {
1588                 next_handle = le16toh(resp->next_handle);
1589                 if (next_handle != 0) {
1590                         if (resp->wol_type ==
1591                                 HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_MAGICPKT) {
1592                                 softc->wol = 1;
1593                                 softc->wol_filter_id = resp->wol_filter_id;
1594                         }
1595                 }
1596         }
1597         return next_handle;
1598 }
1599
1600 int
1601 bnxt_hwrm_alloc_wol_fltr(struct bnxt_softc *softc)
1602 {
1603         struct hwrm_wol_filter_alloc_input req = {0};
1604         struct hwrm_wol_filter_alloc_output *resp =
1605                 (void *)softc->hwrm_cmd_resp.idi_vaddr;
1606         int rc;
1607
1608         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_ALLOC);
1609         req.port_id = htole16(softc->pf.port_id);
1610         req.wol_type = HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_MAGICPKT;
1611         req.enables =
1612                 htole32(HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_MAC_ADDRESS);
1613         memcpy(req.mac_address, softc->func.mac_addr, ETHER_ADDR_LEN);
1614         rc = hwrm_send_message(softc, &req, sizeof(req));
1615         if (!rc)
1616                 softc->wol_filter_id = resp->wol_filter_id;
1617
1618         return rc;
1619 }
1620
1621 int
1622 bnxt_hwrm_free_wol_fltr(struct bnxt_softc *softc)
1623 {
1624         struct hwrm_wol_filter_free_input req = {0};
1625
1626         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_FREE);
1627         req.port_id = htole16(softc->pf.port_id);
1628         req.enables =
1629                 htole32(HWRM_WOL_FILTER_FREE_INPUT_ENABLES_WOL_FILTER_ID);
1630         req.wol_filter_id = softc->wol_filter_id;
1631         return hwrm_send_message(softc, &req, sizeof(req));
1632 }
1633
1634 static void bnxt_hwrm_set_coal_params(struct bnxt_softc *softc, uint32_t max_frames,
1635         uint32_t buf_tmrs, uint16_t flags,
1636         struct hwrm_ring_cmpl_ring_cfg_aggint_params_input *req)
1637 {
1638         req->flags = htole16(flags);
1639         req->num_cmpl_dma_aggr = htole16((uint16_t)max_frames);
1640         req->num_cmpl_dma_aggr_during_int = htole16(max_frames >> 16);
1641         req->cmpl_aggr_dma_tmr = htole16((uint16_t)buf_tmrs);
1642         req->cmpl_aggr_dma_tmr_during_int = htole16(buf_tmrs >> 16);
1643         /* Minimum time between 2 interrupts set to buf_tmr x 2 */
1644         req->int_lat_tmr_min = htole16((uint16_t)buf_tmrs * 2);
1645         req->int_lat_tmr_max = htole16((uint16_t)buf_tmrs * 4);
1646         req->num_cmpl_aggr_int = htole16((uint16_t)max_frames * 4);
1647 }
1648
1649
1650 int bnxt_hwrm_set_coal(struct bnxt_softc *softc)
1651 {
1652         int i, rc = 0;
1653         struct hwrm_ring_cmpl_ring_cfg_aggint_params_input req_rx = {0},
1654                                                            req_tx = {0}, *req;
1655         uint16_t max_buf, max_buf_irq;
1656         uint16_t buf_tmr, buf_tmr_irq;
1657         uint32_t flags;
1658
1659         bnxt_hwrm_cmd_hdr_init(softc, &req_rx,
1660                                HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS);
1661         bnxt_hwrm_cmd_hdr_init(softc, &req_tx,
1662                                HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS);
1663
1664         /* Each rx completion (2 records) should be DMAed immediately.
1665          * DMA 1/4 of the completion buffers at a time.
1666          */
1667         max_buf = min_t(uint16_t, softc->rx_coal_frames / 4, 2);
1668         /* max_buf must not be zero */
1669         max_buf = clamp_t(uint16_t, max_buf, 1, 63);
1670         max_buf_irq = clamp_t(uint16_t, softc->rx_coal_frames_irq, 1, 63);
1671         buf_tmr = BNXT_USEC_TO_COAL_TIMER(softc->rx_coal_usecs);
1672         /* buf timer set to 1/4 of interrupt timer */
1673         buf_tmr = max_t(uint16_t, buf_tmr / 4, 1);
1674         buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(softc->rx_coal_usecs_irq);
1675         buf_tmr_irq = max_t(uint16_t, buf_tmr_irq, 1);
1676
1677         flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET;
1678
1679         /* RING_IDLE generates more IRQs for lower latency.  Enable it only
1680          * if coal_usecs is less than 25 us.
1681          */
1682         if (softc->rx_coal_usecs < 25)
1683                 flags |= HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_RING_IDLE;
1684
1685         bnxt_hwrm_set_coal_params(softc, max_buf_irq << 16 | max_buf,
1686                                   buf_tmr_irq << 16 | buf_tmr, flags, &req_rx);
1687
1688         /* max_buf must not be zero */
1689         max_buf = clamp_t(uint16_t, softc->tx_coal_frames, 1, 63);
1690         max_buf_irq = clamp_t(uint16_t, softc->tx_coal_frames_irq, 1, 63);
1691         buf_tmr = BNXT_USEC_TO_COAL_TIMER(softc->tx_coal_usecs);
1692         /* buf timer set to 1/4 of interrupt timer */
1693         buf_tmr = max_t(uint16_t, buf_tmr / 4, 1);
1694         buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(softc->tx_coal_usecs_irq);
1695         buf_tmr_irq = max_t(uint16_t, buf_tmr_irq, 1);
1696         flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET;
1697         bnxt_hwrm_set_coal_params(softc, max_buf_irq << 16 | max_buf,
1698                                   buf_tmr_irq << 16 | buf_tmr, flags, &req_tx);
1699
1700         for (i = 0; i < softc->nrxqsets; i++) {
1701
1702                 
1703                 req = &req_rx;
1704                 /*
1705                  * TBD:
1706                  *      Check if Tx also needs to be done
1707                  *      So far, Tx processing has been done in softirq contest
1708                  *
1709                  * req = &req_tx;
1710                  */
1711                 req->ring_id = htole16(softc->grp_info[i].cp_ring_id);
1712
1713                 rc = hwrm_send_message(softc, req, sizeof(*req));
1714                 if (rc)
1715                         break;
1716         }
1717         return rc;
1718 }
1719
1720
1721
1722 int bnxt_hwrm_func_rgtr_async_events(struct bnxt_softc *softc, unsigned long *bmap,
1723                                      int bmap_size)
1724 {
1725         struct hwrm_func_drv_rgtr_input req = {0};
1726         bitstr_t *async_events_bmap;
1727         uint32_t *events;
1728         int i;
1729
1730         async_events_bmap = bit_alloc(256, M_DEVBUF, M_WAITOK|M_ZERO);
1731         events = (uint32_t *)async_events_bmap;
1732
1733         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_RGTR);
1734
1735         req.enables =
1736                 htole32(HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD);
1737
1738         memset(async_events_bmap, 0, sizeof(256 / 8));
1739
1740         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE);
1741         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD);
1742         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED);
1743         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE);
1744         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE);
1745
1746         if (bmap && bmap_size) {
1747                 for (i = 0; i < bmap_size; i++) {
1748                         if (bit_test(bmap, i))
1749                                 bit_set(async_events_bmap, i);
1750                 }
1751         }
1752
1753         for (i = 0; i < 8; i++)
1754                 req.async_event_fwd[i] |= htole32(events[i]);
1755
1756         free(async_events_bmap, M_DEVBUF);
1757
1758         return hwrm_send_message(softc, &req, sizeof(req));
1759 }