sys/dev/bnxt/bnxt_hwrm.c

   1 /*-
   2  * Broadcom NetXtreme-C/E network driver.
   3  *
   4  * Copyright (c) 2016 Broadcom, All Rights Reserved.
   5  * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
  20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  26  * THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/endian.h>
  33 #include <sys/bitstring.h>
  34
  35 #include "bnxt.h"
  36 #include "bnxt_hwrm.h"
  37 #include "hsi_struct_def.h"
  38
  39 static int bnxt_hwrm_err_map(uint16_t err);
  40 static inline int _is_valid_ether_addr(uint8_t *);
  41 static inline void get_random_ether_addr(uint8_t *);
  42 static void     bnxt_hwrm_set_link_common(struct bnxt_softc *softc,
  43                     struct hwrm_port_phy_cfg_input *req);
  44 static void     bnxt_hwrm_set_pause_common(struct bnxt_softc *softc,
  45                     struct hwrm_port_phy_cfg_input *req);
  46 static void     bnxt_hwrm_set_eee(struct bnxt_softc *softc,
  47                     struct hwrm_port_phy_cfg_input *req);
  48 static int      _hwrm_send_message(struct bnxt_softc *, void *, uint32_t);
  49 static int      hwrm_send_message(struct bnxt_softc *, void *, uint32_t);
  50 static void bnxt_hwrm_cmd_hdr_init(struct bnxt_softc *, void *, uint16_t);
  51
  52 /* NVRam stuff has a five minute timeout */
  53 #define BNXT_NVM_TIMEO  (5 * 60 * 1000)
  54
  55 static int
  56 bnxt_hwrm_err_map(uint16_t err)
  57 {
  58         int rc;
  59
  60         switch (err) {
  61         case HWRM_ERR_CODE_SUCCESS:
  62                 return 0;
  63         case HWRM_ERR_CODE_INVALID_PARAMS:
  64         case HWRM_ERR_CODE_INVALID_FLAGS:
  65         case HWRM_ERR_CODE_INVALID_ENABLES:
  66                 return EINVAL;
  67         case HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED:
  68                 return EACCES;
  69         case HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR:
  70                 return ENOMEM;
  71         case HWRM_ERR_CODE_CMD_NOT_SUPPORTED:
  72                 return ENOSYS;
  73         case HWRM_ERR_CODE_FAIL:
  74                 return EIO;
  75         case HWRM_ERR_CODE_HWRM_ERROR:
  76         case HWRM_ERR_CODE_UNKNOWN_ERR:
  77         default:
  78                 return EDOOFUS;
  79         }
  80
  81         return rc;
  82 }
  83
  84 int
  85 bnxt_alloc_hwrm_dma_mem(struct bnxt_softc *softc)
  86 {
  87         int rc;
  88
  89         rc = iflib_dma_alloc(softc->ctx, PAGE_SIZE, &softc->hwrm_cmd_resp,
  90             BUS_DMA_NOWAIT);
  91         return rc;
  92 }
  93
  94 void
  95 bnxt_free_hwrm_dma_mem(struct bnxt_softc *softc)
  96 {
  97         if (softc->hwrm_cmd_resp.idi_vaddr)
  98                 iflib_dma_free(&softc->hwrm_cmd_resp);
  99         softc->hwrm_cmd_resp.idi_vaddr = NULL;
 100         return;
 101 }
 102
 103 static void
 104 bnxt_hwrm_cmd_hdr_init(struct bnxt_softc *softc, void *request,
 105     uint16_t req_type)
 106 {
 107         struct input *req = request;
 108
 109         req->req_type = htole16(req_type);
 110         req->cmpl_ring = 0xffff;
 111         req->target_id = 0xffff;
 112         req->resp_addr = htole64(softc->hwrm_cmd_resp.idi_paddr);
 113 }
 114
 115 static int
 116 _hwrm_send_message(struct bnxt_softc *softc, void *msg, uint32_t msg_len)
 117 {
 118         struct input *req = msg;
 119         struct hwrm_err_output *resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 120         uint32_t *data = msg;
 121         int i;
 122         uint16_t cp_ring_id;
 123         uint8_t *valid;
 124         uint16_t err;
 125
 126         /* TODO: DMASYNC in here. */
 127         req->seq_id = htole16(softc->hwrm_cmd_seq++);
 128         memset(resp, 0, PAGE_SIZE);
 129         cp_ring_id = le16toh(req->cmpl_ring);
 130
 131         /* Write request msg to hwrm channel */
 132         for (i = 0; i < msg_len; i += 4) {
 133                 bus_space_write_4(softc->hwrm_bar.tag,
 134                                   softc->hwrm_bar.handle,
 135                                   i, *data);
 136                 data++;
 137         }
 138
 139         /* Clear to the end of the request buffer */
 140         for (i = msg_len; i < HWRM_MAX_REQ_LEN; i += 4)
 141                 bus_space_write_4(softc->hwrm_bar.tag, softc->hwrm_bar.handle,
 142                     i, 0);
 143
 144         /* Ring channel doorbell */
 145         bus_space_write_4(softc->hwrm_bar.tag,
 146                           softc->hwrm_bar.handle,
 147                           0x100, htole32(1));
 148
 149         /* Check if response len is updated */
 150         for (i = 0; i < softc->hwrm_cmd_timeo; i++) {
 151                 if (resp->resp_len && resp->resp_len <= 4096)
 152                         break;
 153                 DELAY(1000);
 154         }
 155         if (i >= softc->hwrm_cmd_timeo) {
 156                 device_printf(softc->dev,
 157                     "Timeout sending %s: (timeout: %u) seq: %d\n",
 158                     GET_HWRM_REQ_TYPE(req->req_type), softc->hwrm_cmd_timeo,
 159                     le16toh(req->seq_id));
 160                 return ETIMEDOUT;
 161         }
 162         /* Last byte of resp contains the valid key */
 163         valid = (uint8_t *)resp + resp->resp_len - 1;
 164         for (i = 0; i < softc->hwrm_cmd_timeo; i++) {
 165                 if (*valid == HWRM_RESP_VALID_KEY)
 166                         break;
 167                 DELAY(1000);
 168         }
 169         if (i >= softc->hwrm_cmd_timeo) {
 170                 device_printf(softc->dev, "Timeout sending %s: "
 171                     "(timeout: %u) msg {0x%x 0x%x} len:%d v: %d\n",
 172                     GET_HWRM_REQ_TYPE(req->req_type),
 173                     softc->hwrm_cmd_timeo, le16toh(req->req_type),
 174                     le16toh(req->seq_id), msg_len,
 175                     *valid);
 176                 return ETIMEDOUT;
 177         }
 178
 179         err = le16toh(resp->error_code);
 180         if (err) {
 181                 /* HWRM_ERR_CODE_FAIL is a "normal" error, don't log */
 182                 if (err != HWRM_ERR_CODE_FAIL) {
 183                         device_printf(softc->dev,
 184                             "%s command returned %s error.\n",
 185                             GET_HWRM_REQ_TYPE(req->req_type),
 186                             GET_HWRM_ERROR_CODE(err));
 187                 }
 188                 return bnxt_hwrm_err_map(err);
 189         }
 190
 191         return 0;
 192 }
 193
 194 static int
 195 hwrm_send_message(struct bnxt_softc *softc, void *msg, uint32_t msg_len)
 196 {
 197         int rc;
 198
 199         BNXT_HWRM_LOCK(softc);
 200         rc = _hwrm_send_message(softc, msg, msg_len);
 201         BNXT_HWRM_UNLOCK(softc);
 202         return rc;
 203 }
 204
 205 int
 206 bnxt_hwrm_queue_qportcfg(struct bnxt_softc *softc)
 207 {
 208         struct hwrm_queue_qportcfg_input req = {0};
 209         struct hwrm_queue_qportcfg_output *resp =
 210             (void *)softc->hwrm_cmd_resp.idi_vaddr;
 211
 212         int     rc = 0;
 213         uint8_t *qptr;
 214
 215         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_QUEUE_QPORTCFG);
 216
 217         BNXT_HWRM_LOCK(softc);
 218         rc = _hwrm_send_message(softc, &req, sizeof(req));
 219         if (rc)
 220                 goto qportcfg_exit;
 221
 222         if (!resp->max_configurable_queues) {
 223                 rc = -EINVAL;
 224                 goto qportcfg_exit;
 225         }
 226         softc->max_tc = resp->max_configurable_queues;
 227         if (softc->max_tc > BNXT_MAX_QUEUE)
 228                 softc->max_tc = BNXT_MAX_QUEUE;
 229
 230         qptr = &resp->queue_id0;
 231         for (int i = 0; i < softc->max_tc; i++) {
 232                 softc->q_info[i].id = *qptr++;
 233                 softc->q_info[i].profile = *qptr++;
 234         }
 235
 236 qportcfg_exit:
 237         BNXT_HWRM_UNLOCK(softc);
 238         return (rc);
 239 }
 240
 241
 242 int
 243 bnxt_hwrm_ver_get(struct bnxt_softc *softc)
 244 {
 245         struct hwrm_ver_get_input       req = {0};
 246         struct hwrm_ver_get_output      *resp =
 247             (void *)softc->hwrm_cmd_resp.idi_vaddr;
 248         int                             rc;
 249         const char nastr[] = "<not installed>";
 250         const char naver[] = "<N/A>";
 251
 252         softc->hwrm_max_req_len = HWRM_MAX_REQ_LEN;
 253         softc->hwrm_cmd_timeo = 1000;
 254         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VER_GET);
 255
 256         req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
 257         req.hwrm_intf_min = HWRM_VERSION_MINOR;
 258         req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
 259
 260         BNXT_HWRM_LOCK(softc);
 261         rc = _hwrm_send_message(softc, &req, sizeof(req));
 262         if (rc)
 263                 goto fail;
 264
 265         snprintf(softc->ver_info->hwrm_if_ver, BNXT_VERSTR_SIZE, "%d.%d.%d",
 266             resp->hwrm_intf_maj, resp->hwrm_intf_min, resp->hwrm_intf_upd);
 267         softc->ver_info->hwrm_if_major = resp->hwrm_intf_maj;
 268         softc->ver_info->hwrm_if_minor = resp->hwrm_intf_min;
 269         softc->ver_info->hwrm_if_update = resp->hwrm_intf_upd;
 270         snprintf(softc->ver_info->hwrm_fw_ver, BNXT_VERSTR_SIZE, "%d.%d.%d",
 271             resp->hwrm_fw_maj, resp->hwrm_fw_min, resp->hwrm_fw_bld);
 272         strlcpy(softc->ver_info->driver_hwrm_if_ver, HWRM_VERSION_STR,
 273             BNXT_VERSTR_SIZE);
 274         strlcpy(softc->ver_info->hwrm_fw_name, resp->hwrm_fw_name,
 275             BNXT_NAME_SIZE);
 276
 277         if (resp->mgmt_fw_maj == 0 && resp->mgmt_fw_min == 0 &&
 278             resp->mgmt_fw_bld == 0) {
 279                 strlcpy(softc->ver_info->mgmt_fw_ver, naver, BNXT_VERSTR_SIZE);
 280                 strlcpy(softc->ver_info->mgmt_fw_name, nastr, BNXT_NAME_SIZE);
 281         }
 282         else {
 283                 snprintf(softc->ver_info->mgmt_fw_ver, BNXT_VERSTR_SIZE,
 284                     "%d.%d.%d", resp->mgmt_fw_maj, resp->mgmt_fw_min,
 285                     resp->mgmt_fw_bld);
 286                 strlcpy(softc->ver_info->mgmt_fw_name, resp->mgmt_fw_name,
 287                     BNXT_NAME_SIZE);
 288         }
 289         if (resp->netctrl_fw_maj == 0 && resp->netctrl_fw_min == 0 &&
 290             resp->netctrl_fw_bld == 0) {
 291                 strlcpy(softc->ver_info->netctrl_fw_ver, naver,
 292                     BNXT_VERSTR_SIZE);
 293                 strlcpy(softc->ver_info->netctrl_fw_name, nastr,
 294                     BNXT_NAME_SIZE);
 295         }
 296         else {
 297                 snprintf(softc->ver_info->netctrl_fw_ver, BNXT_VERSTR_SIZE,
 298                     "%d.%d.%d", resp->netctrl_fw_maj, resp->netctrl_fw_min,
 299                     resp->netctrl_fw_bld);
 300                 strlcpy(softc->ver_info->netctrl_fw_name, resp->netctrl_fw_name,
 301                     BNXT_NAME_SIZE);
 302         }
 303         if (resp->roce_fw_maj == 0 && resp->roce_fw_min == 0 &&
 304             resp->roce_fw_bld == 0) {
 305                 strlcpy(softc->ver_info->roce_fw_ver, naver, BNXT_VERSTR_SIZE);
 306                 strlcpy(softc->ver_info->roce_fw_name, nastr, BNXT_NAME_SIZE);
 307         }
 308         else {
 309                 snprintf(softc->ver_info->roce_fw_ver, BNXT_VERSTR_SIZE,
 310                     "%d.%d.%d", resp->roce_fw_maj, resp->roce_fw_min,
 311                     resp->roce_fw_bld);
 312                 strlcpy(softc->ver_info->roce_fw_name, resp->roce_fw_name,
 313                     BNXT_NAME_SIZE);
 314         }
 315         softc->ver_info->chip_num = le16toh(resp->chip_num);
 316         softc->ver_info->chip_rev = resp->chip_rev;
 317         softc->ver_info->chip_metal = resp->chip_metal;
 318         softc->ver_info->chip_bond_id = resp->chip_bond_id;
 319         softc->ver_info->chip_type = resp->chip_platform_type;
 320
 321         if (resp->max_req_win_len)
 322                 softc->hwrm_max_req_len = le16toh(resp->max_req_win_len);
 323         if (resp->def_req_timeout)
 324                 softc->hwrm_cmd_timeo = le16toh(resp->def_req_timeout);
 325
 326 fail:
 327         BNXT_HWRM_UNLOCK(softc);
 328         return rc;
 329 }
 330
 331 int
 332 bnxt_hwrm_func_drv_rgtr(struct bnxt_softc *softc)
 333 {
 334         struct hwrm_func_drv_rgtr_input req = {0};
 335
 336         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_RGTR);
 337
 338         req.enables = htole32(HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER |
 339             HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE);
 340         req.os_type = htole16(HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD);
 341
 342         req.ver_maj = __FreeBSD_version / 100000;
 343         req.ver_min = (__FreeBSD_version / 1000) % 100;
 344         req.ver_upd = (__FreeBSD_version / 100) % 10;
 345
 346         return hwrm_send_message(softc, &req, sizeof(req));
 347 }
 348
 349
 350 int
 351 bnxt_hwrm_func_drv_unrgtr(struct bnxt_softc *softc, bool shutdown)
 352 {
 353         struct hwrm_func_drv_unrgtr_input req = {0};
 354
 355         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_UNRGTR);
 356         if (shutdown == true)
 357                 req.flags |=
 358                     HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN;
 359         return hwrm_send_message(softc, &req, sizeof(req));
 360 }
 361
 362
 363 static inline int
 364 _is_valid_ether_addr(uint8_t *addr)
 365 {
 366         char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
 367
 368         if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN)))
 369                 return (FALSE);
 370
 371         return (TRUE);
 372 }
 373
 374 static inline void
 375 get_random_ether_addr(uint8_t *addr)
 376 {
 377         uint8_t temp[ETHER_ADDR_LEN];
 378
 379         arc4rand(&temp, sizeof(temp), 0);
 380         temp[0] &= 0xFE;
 381         temp[0] |= 0x02;
 382         bcopy(temp, addr, sizeof(temp));
 383 }
 384
 385 int
 386 bnxt_hwrm_func_qcaps(struct bnxt_softc *softc)
 387 {
 388         int rc = 0;
 389         struct hwrm_func_qcaps_input req = {0};
 390         struct hwrm_func_qcaps_output *resp =
 391             (void *)softc->hwrm_cmd_resp.idi_vaddr;
 392         struct bnxt_func_info *func = &softc->func;
 393
 394         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_QCAPS);
 395         req.fid = htole16(0xffff);
 396
 397         BNXT_HWRM_LOCK(softc);
 398         rc = _hwrm_send_message(softc, &req, sizeof(req));
 399         if (rc)
 400                 goto fail;
 401
 402         if (resp->flags &
 403             htole32(HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED))
 404                 softc->flags |= BNXT_FLAG_WOL_CAP;
 405
 406         func->fw_fid = le16toh(resp->fid);
 407         memcpy(func->mac_addr, resp->mac_address, ETHER_ADDR_LEN);
 408         func->max_rsscos_ctxs = le16toh(resp->max_rsscos_ctx);
 409         func->max_cp_rings = le16toh(resp->max_cmpl_rings);
 410         func->max_tx_rings = le16toh(resp->max_tx_rings);
 411         func->max_rx_rings = le16toh(resp->max_rx_rings);
 412         func->max_hw_ring_grps = le32toh(resp->max_hw_ring_grps);
 413         if (!func->max_hw_ring_grps)
 414                 func->max_hw_ring_grps = func->max_tx_rings;
 415         func->max_l2_ctxs = le16toh(resp->max_l2_ctxs);
 416         func->max_vnics = le16toh(resp->max_vnics);
 417         func->max_stat_ctxs = le16toh(resp->max_stat_ctx);
 418         if (BNXT_PF(softc)) {
 419                 struct bnxt_pf_info *pf = &softc->pf;
 420
 421                 pf->port_id = le16toh(resp->port_id);
 422                 pf->first_vf_id = le16toh(resp->first_vf_id);
 423                 pf->max_vfs = le16toh(resp->max_vfs);
 424                 pf->max_encap_records = le32toh(resp->max_encap_records);
 425                 pf->max_decap_records = le32toh(resp->max_decap_records);
 426                 pf->max_tx_em_flows = le32toh(resp->max_tx_em_flows);
 427                 pf->max_tx_wm_flows = le32toh(resp->max_tx_wm_flows);
 428                 pf->max_rx_em_flows = le32toh(resp->max_rx_em_flows);
 429                 pf->max_rx_wm_flows = le32toh(resp->max_rx_wm_flows);
 430         }
 431         if (!_is_valid_ether_addr(func->mac_addr)) {
 432                 device_printf(softc->dev, "Invalid ethernet address, generating random locally administered address\n");
 433                 get_random_ether_addr(func->mac_addr);
 434         }
 435
 436 fail:
 437         BNXT_HWRM_UNLOCK(softc);
 438         return rc;
 439 }
 440
 441 int
 442 bnxt_hwrm_func_reset(struct bnxt_softc *softc)
 443 {
 444         struct hwrm_func_reset_input req = {0};
 445
 446         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_RESET);
 447         req.enables = 0;
 448
 449         return hwrm_send_message(softc, &req, sizeof(req));
 450 }
 451
 452 static void
 453 bnxt_hwrm_set_link_common(struct bnxt_softc *softc,
 454     struct hwrm_port_phy_cfg_input *req)
 455 {
 456         uint8_t autoneg = softc->link_info.autoneg;
 457         uint16_t fw_link_speed = softc->link_info.req_link_speed;
 458
 459         if (autoneg & BNXT_AUTONEG_SPEED) {
 460                 req->auto_mode |=
 461                     HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS;
 462
 463                 req->enables |=
 464                     htole32(HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE);
 465                 req->flags |=
 466                     htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG);
 467         } else {
 468                 req->force_link_speed = htole16(fw_link_speed);
 469                 req->flags |= htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE);
 470         }
 471
 472         /* tell chimp that the setting takes effect immediately */
 473         req->flags |= htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY);
 474 }
 475
 476
 477 static void
 478 bnxt_hwrm_set_pause_common(struct bnxt_softc *softc,
 479     struct hwrm_port_phy_cfg_input *req)
 480 {
 481         if (softc->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) {
 482                 req->auto_pause =
 483                     HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE;
 484                 if (softc->link_info.req_flow_ctrl &
 485                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)
 486                         req->auto_pause |=
 487                             HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 488                 if (softc->link_info.req_flow_ctrl &
 489                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX)
 490                         req->auto_pause |=
 491                             HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 492                 req->enables |=
 493                     htole32(HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE);
 494         } else {
 495                 if (softc->link_info.req_flow_ctrl &
 496                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)
 497                         req->force_pause |=
 498                             HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 499                 if (softc->link_info.req_flow_ctrl &
 500                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX)
 501                         req->force_pause |=
 502                             HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 503                 req->enables |=
 504                         htole32(HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE);
 505                 req->auto_pause = req->force_pause;
 506                 req->enables |= htole32(
 507                     HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE);
 508         }
 509 }
 510
 511
 512 /* JFV this needs interface connection */
 513 static void
 514 bnxt_hwrm_set_eee(struct bnxt_softc *softc, struct hwrm_port_phy_cfg_input *req)
 515 {
 516         /* struct ethtool_eee *eee = &softc->eee; */
 517         bool    eee_enabled = false;
 518
 519         if (eee_enabled) {
 520 #if 0
 521                 uint16_t eee_speeds;
 522                 uint32_t flags = HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE;
 523
 524                 if (eee->tx_lpi_enabled)
 525                         flags |= HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI;
 526
 527                 req->flags |= htole32(flags);
 528                 eee_speeds = bnxt_get_fw_auto_link_speeds(eee->advertised);
 529                 req->eee_link_speed_mask = htole16(eee_speeds);
 530                 req->tx_lpi_timer = htole32(eee->tx_lpi_timer);
 531 #endif
 532         } else {
 533                 req->flags |=
 534                     htole32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE);
 535         }
 536 }
 537
 538
 539 int
 540 bnxt_hwrm_set_link_setting(struct bnxt_softc *softc, bool set_pause,
 541     bool set_eee)
 542 {
 543         struct hwrm_port_phy_cfg_input req = {0};
 544
 545         if (softc->flags & BNXT_FLAG_NPAR)
 546                 return ENOTSUP;
 547
 548         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_PHY_CFG);
 549         if (set_pause)
 550                 bnxt_hwrm_set_pause_common(softc, &req);
 551
 552         bnxt_hwrm_set_link_common(softc, &req);
 553         if (set_eee)
 554                 bnxt_hwrm_set_eee(softc, &req);
 555         return hwrm_send_message(softc, &req, sizeof(req));
 556 }
 557
 558
 559 int
 560 bnxt_hwrm_set_pause(struct bnxt_softc *softc)
 561 {
 562         struct hwrm_port_phy_cfg_input req = {0};
 563         int rc;
 564
 565         if (softc->flags & BNXT_FLAG_NPAR)
 566                 return ENOTSUP;
 567
 568         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_PHY_CFG);
 569         bnxt_hwrm_set_pause_common(softc, &req);
 570
 571         if (softc->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)
 572                 bnxt_hwrm_set_link_common(softc, &req);
 573
 574         BNXT_HWRM_LOCK(softc);
 575         rc = _hwrm_send_message(softc, &req, sizeof(req));
 576         if (!rc && !(softc->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)) {
 577                 /* since changing of pause setting doesn't trigger any link
 578                  * change event, the driver needs to update the current pause
 579                  * result upon successfully return of the phy_cfg command */
 580                 softc->link_info.pause =
 581                 softc->link_info.force_pause = softc->link_info.req_flow_ctrl;
 582                 softc->link_info.auto_pause = 0;
 583                 bnxt_report_link(softc);
 584         }
 585         BNXT_HWRM_UNLOCK(softc);
 586         return rc;
 587 }
 588
 589 int
 590 bnxt_hwrm_vnic_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
 591 {
 592         struct hwrm_vnic_cfg_input req = {0};
 593         struct hwrm_vnic_cfg_output *resp;
 594
 595         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 596         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_CFG);
 597
 598         if (vnic->flags & BNXT_VNIC_FLAG_DEFAULT)
 599                 req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT);
 600         if (vnic->flags & BNXT_VNIC_FLAG_BD_STALL)
 601                 req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE);
 602         if (vnic->flags & BNXT_VNIC_FLAG_VLAN_STRIP)
 603                 req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE);
 604         req.enables = htole32(HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP |
 605             HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE |
 606             HWRM_VNIC_CFG_INPUT_ENABLES_MRU);
 607         req.vnic_id = htole16(vnic->id);
 608         req.dflt_ring_grp = htole16(vnic->def_ring_grp);
 609         req.rss_rule = htole16(vnic->rss_id);
 610         req.cos_rule = htole16(vnic->cos_rule);
 611         req.lb_rule = htole16(vnic->lb_rule);
 612         req.mru = htole16(vnic->mru);
 613
 614         return hwrm_send_message(softc, &req, sizeof(req));
 615 }
 616
 617 int
 618 bnxt_hwrm_vnic_alloc(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
 619 {
 620         struct hwrm_vnic_alloc_input req = {0};
 621         struct hwrm_vnic_alloc_output *resp =
 622             (void *)softc->hwrm_cmd_resp.idi_vaddr;
 623         int rc;
 624
 625         if (vnic->id != (uint16_t)HWRM_NA_SIGNATURE) {
 626                 device_printf(softc->dev,
 627                     "Attempt to re-allocate vnic %04x\n", vnic->id);
 628                 return EDOOFUS;
 629         }
 630
 631         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_ALLOC);
 632
 633         if (vnic->flags & BNXT_VNIC_FLAG_DEFAULT)
 634                 req.flags = htole32(HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT);
 635
 636         BNXT_HWRM_LOCK(softc);
 637         rc = _hwrm_send_message(softc, &req, sizeof(req));
 638         if (rc)
 639                 goto fail;
 640
 641         vnic->id = le32toh(resp->vnic_id);
 642
 643 fail:
 644         BNXT_HWRM_UNLOCK(softc);
 645         return (rc);
 646 }
 647
 648 int
 649 bnxt_hwrm_vnic_ctx_alloc(struct bnxt_softc *softc, uint16_t *ctx_id)
 650 {
 651         struct hwrm_vnic_rss_cos_lb_ctx_alloc_input req = {0};
 652         struct hwrm_vnic_rss_cos_lb_ctx_alloc_output *resp =
 653             (void *)softc->hwrm_cmd_resp.idi_vaddr;
 654         int rc;
 655
 656         if (*ctx_id != (uint16_t)HWRM_NA_SIGNATURE) {
 657                 device_printf(softc->dev,
 658                     "Attempt to re-allocate vnic ctx %04x\n", *ctx_id);
 659                 return EDOOFUS;
 660         }
 661
 662         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_RSS_COS_LB_CTX_ALLOC);
 663
 664         BNXT_HWRM_LOCK(softc);
 665         rc = _hwrm_send_message(softc, &req, sizeof(req));
 666         if (rc)
 667                 goto fail;
 668
 669         *ctx_id = le32toh(resp->rss_cos_lb_ctx_id);
 670
 671 fail:
 672         BNXT_HWRM_UNLOCK(softc);
 673         return (rc);
 674 }
 675
 676 int
 677 bnxt_hwrm_ring_grp_alloc(struct bnxt_softc *softc, struct bnxt_grp_info *grp)
 678 {
 679         struct hwrm_ring_grp_alloc_input req = {0};
 680         struct hwrm_ring_grp_alloc_output *resp;
 681         int rc = 0;
 682
 683         if (grp->grp_id != (uint16_t)HWRM_NA_SIGNATURE) {
 684                 device_printf(softc->dev,
 685                     "Attempt to re-allocate ring group %04x\n", grp->grp_id);
 686                 return EDOOFUS;
 687         }
 688
 689         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 690         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_RING_GRP_ALLOC);
 691         req.cr = htole16(grp->cp_ring_id);
 692         req.rr = htole16(grp->rx_ring_id);
 693         req.ar = htole16(grp->ag_ring_id);
 694         req.sc = htole16(grp->stats_ctx);
 695
 696         BNXT_HWRM_LOCK(softc);
 697         rc = _hwrm_send_message(softc, &req, sizeof(req));
 698         if (rc)
 699                 goto fail;
 700
 701         grp->grp_id = le32toh(resp->ring_group_id);
 702
 703 fail:
 704         BNXT_HWRM_UNLOCK(softc);
 705         return rc;
 706 }
 707
 708 /*
 709  * Ring allocation message to the firmware
 710  */
 711 int
 712 bnxt_hwrm_ring_alloc(struct bnxt_softc *softc, uint8_t type,
 713     struct bnxt_ring *ring, uint16_t cmpl_ring_id, uint32_t stat_ctx_id,
 714     bool irq)
 715 {
 716         struct hwrm_ring_alloc_input req = {0};
 717         struct hwrm_ring_alloc_output *resp;
 718         int rc;
 719
 720         if (ring->phys_id != (uint16_t)HWRM_NA_SIGNATURE) {
 721                 device_printf(softc->dev,
 722                     "Attempt to re-allocate ring %04x\n", ring->phys_id);
 723                 return EDOOFUS;
 724         }
 725
 726         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 727         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_RING_ALLOC);
 728         req.enables = htole32(0);
 729         req.fbo = htole32(0);
 730
 731         if (stat_ctx_id != HWRM_NA_SIGNATURE) {
 732                 req.enables |= htole32(
 733                     HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID);
 734                 req.stat_ctx_id = htole32(stat_ctx_id);
 735         }
 736         req.ring_type = type;
 737         req.page_tbl_addr = htole64(ring->paddr);
 738         req.length = htole32(ring->ring_size);
 739         req.logical_id = htole16(ring->id);
 740         req.cmpl_ring_id = htole16(cmpl_ring_id);
 741         req.queue_id = htole16(softc->q_info[0].id);
 742 #if 0
 743         /* MODE_POLL appears to crash the firmware */
 744         if (irq)
 745                 req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX;
 746         else
 747                 req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_POLL;
 748 #else
 749         req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX;
 750 #endif
 751         BNXT_HWRM_LOCK(softc);
 752         rc = _hwrm_send_message(softc, &req, sizeof(req));
 753         if (rc)
 754                 goto fail;
 755
 756         ring->phys_id = le16toh(resp->ring_id);
 757
 758 fail:
 759         BNXT_HWRM_UNLOCK(softc);
 760         return rc;
 761 }
 762
 763 int
 764 bnxt_hwrm_stat_ctx_alloc(struct bnxt_softc *softc, struct bnxt_cp_ring *cpr,
 765     uint64_t paddr)
 766 {
 767         struct hwrm_stat_ctx_alloc_input req = {0};
 768         struct hwrm_stat_ctx_alloc_output *resp;
 769         int rc = 0;
 770
 771         if (cpr->stats_ctx_id != HWRM_NA_SIGNATURE) {
 772                 device_printf(softc->dev,
 773                     "Attempt to re-allocate stats ctx %08x\n",
 774                     cpr->stats_ctx_id);
 775                 return EDOOFUS;
 776         }
 777
 778         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 779         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_STAT_CTX_ALLOC);
 780
 781         req.update_period_ms = htole32(1000);
 782         req.stats_dma_addr = htole64(paddr);
 783
 784         BNXT_HWRM_LOCK(softc);
 785         rc = _hwrm_send_message(softc, &req, sizeof(req));
 786         if (rc)
 787                 goto fail;
 788
 789         cpr->stats_ctx_id = le32toh(resp->stat_ctx_id);
 790
 791 fail:
 792         BNXT_HWRM_UNLOCK(softc);
 793
 794         return rc;
 795 }
 796
 797 int
 798 bnxt_hwrm_cfa_l2_set_rx_mask(struct bnxt_softc *softc,
 799     struct bnxt_vnic_info *vnic)
 800 {
 801         struct hwrm_cfa_l2_set_rx_mask_input req = {0};
 802         struct bnxt_vlan_tag *tag;
 803         uint32_t *tags;
 804         uint32_t num_vlan_tags = 0;;
 805         uint32_t i;
 806         uint32_t mask = vnic->rx_mask;
 807         int rc;
 808
 809         SLIST_FOREACH(tag, &vnic->vlan_tags, next)
 810                 num_vlan_tags++;
 811
 812         if (num_vlan_tags) {
 813                 if (!(mask &
 814                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN)) {
 815                         if (!vnic->vlan_only)
 816                                 mask |= HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN;
 817                         else
 818                                 mask |=
 819                                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY;
 820                 }
 821                 if (vnic->vlan_tag_list.idi_vaddr) {
 822                         iflib_dma_free(&vnic->vlan_tag_list);
 823                         vnic->vlan_tag_list.idi_vaddr = NULL;
 824                 }
 825                 rc = iflib_dma_alloc(softc->ctx, 4 * num_vlan_tags,
 826                     &vnic->vlan_tag_list, BUS_DMA_NOWAIT);
 827                 if (rc)
 828                         return rc;
 829                 tags = (uint32_t *)vnic->vlan_tag_list.idi_vaddr;
 830
 831                 i = 0;
 832                 SLIST_FOREACH(tag, &vnic->vlan_tags, next) {
 833                         tags[i] = htole32((tag->tpid << 16) | tag->tag);
 834                         i++;
 835                 }
 836         }
 837         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_CFA_L2_SET_RX_MASK);
 838
 839         req.vnic_id = htole32(vnic->id);
 840         req.mask = htole32(mask);
 841         req.mc_tbl_addr = htole64(vnic->mc_list.idi_paddr);
 842         req.num_mc_entries = htole32(vnic->mc_list_count);
 843         req.vlan_tag_tbl_addr = htole64(vnic->vlan_tag_list.idi_paddr);
 844         req.num_vlan_tags = htole32(num_vlan_tags);
 845         return hwrm_send_message(softc, &req, sizeof(req));
 846 }
 847
 848
 849 int
 850 bnxt_hwrm_set_filter(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
 851 {
 852         struct hwrm_cfa_l2_filter_alloc_input   req = {0};
 853         struct hwrm_cfa_l2_filter_alloc_output  *resp;
 854         uint32_t enables = 0;
 855         int rc = 0;
 856
 857         if (vnic->filter_id != -1) {
 858                 device_printf(softc->dev,
 859                     "Attempt to re-allocate l2 ctx filter\n");
 860                 return EDOOFUS;
 861         }
 862
 863         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 864         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_CFA_L2_FILTER_ALLOC);
 865
 866         req.flags = htole32(HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX);
 867         enables = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR
 868             | HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK
 869             | HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID;
 870         req.enables = htole32(enables);
 871         req.dst_id = htole16(vnic->id);
 872         memcpy(req.l2_addr, if_getlladdr(iflib_get_ifp(softc->ctx)),
 873             ETHER_ADDR_LEN);
 874         memset(&req.l2_addr_mask, 0xff, sizeof(req.l2_addr_mask));
 875
 876         BNXT_HWRM_LOCK(softc);
 877         rc = _hwrm_send_message(softc, &req, sizeof(req));
 878         if (rc)
 879                 goto fail;
 880
 881         vnic->filter_id = le64toh(resp->l2_filter_id);
 882         vnic->flow_id = le64toh(resp->flow_id);
 883
 884 fail:
 885         BNXT_HWRM_UNLOCK(softc);
 886         return (rc);
 887 }
 888
 889 int
 890 bnxt_hwrm_rss_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic,
 891     uint32_t hash_type)
 892 {
 893         struct hwrm_vnic_rss_cfg_input  req = {0};
 894         struct hwrm_vnic_rss_cfg_output *resp;
 895
 896         resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
 897         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_RSS_CFG);
 898
 899         req.hash_type = htole32(hash_type);
 900         req.ring_grp_tbl_addr = htole64(vnic->rss_grp_tbl.idi_paddr);
 901         req.hash_key_tbl_addr = htole64(vnic->rss_hash_key_tbl.idi_paddr);
 902         req.rss_ctx_idx = htole16(vnic->rss_id);
 903
 904         return hwrm_send_message(softc, &req, sizeof(req));
 905 }
 906
 907 int
 908 bnxt_hwrm_func_cfg(struct bnxt_softc *softc)
 909 {
 910         struct hwrm_func_cfg_input req = {0};
 911
 912         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_CFG);
 913
 914         req.fid = 0xffff;
 915         req.enables = htole32(HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR);
 916
 917         req.async_event_cr = softc->def_cp_ring.ring.phys_id;
 918
 919         return hwrm_send_message(softc, &req, sizeof(req));
 920 }
 921
 922 int
 923 bnxt_hwrm_vnic_tpa_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic,
 924     uint32_t flags)
 925 {
 926         struct hwrm_vnic_tpa_cfg_input req = {0};
 927
 928         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_TPA_CFG);
 929
 930         req.flags = htole32(flags);
 931         req.vnic_id = htole16(vnic->id);
 932         req.enables = htole32(HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS |
 933             HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS |
 934             /* HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER | */
 935             HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN);
 936         /* TODO: Calculate this based on ring size? */
 937         req.max_agg_segs = htole16(3);
 938         /* Base this in the allocated TPA start size... */
 939         req.max_aggs = htole16(7);
 940         /*
 941          * TODO: max_agg_timer?
 942          * req.mag_agg_timer = htole32(XXX);
 943          */
 944         req.min_agg_len = htole32(0);
 945
 946         return hwrm_send_message(softc, &req, sizeof(req));
 947 }
 948
 949 int
 950 bnxt_hwrm_nvm_find_dir_entry(struct bnxt_softc *softc, uint16_t type,
 951     uint16_t *ordinal, uint16_t ext, uint16_t *index, bool use_index,
 952     uint8_t search_opt, uint32_t *data_length, uint32_t *item_length,
 953     uint32_t *fw_ver)
 954 {
 955         struct hwrm_nvm_find_dir_entry_input req = {0};
 956         struct hwrm_nvm_find_dir_entry_output *resp =
 957             (void *)softc->hwrm_cmd_resp.idi_vaddr;
 958         int     rc = 0;
 959         uint32_t old_timeo;
 960
 961         MPASS(ordinal);
 962
 963         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_FIND_DIR_ENTRY);
 964         if (use_index) {
 965                 req.enables = htole32(
 966                     HWRM_NVM_FIND_DIR_ENTRY_INPUT_ENABLES_DIR_IDX_VALID);
 967                 req.dir_idx = htole16(*index);
 968         }
 969         req.dir_type = htole16(type);
 970         req.dir_ordinal = htole16(*ordinal);
 971         req.dir_ext = htole16(ext);
 972         req.opt_ordinal = search_opt;
 973
 974         BNXT_HWRM_LOCK(softc);
 975         old_timeo = softc->hwrm_cmd_timeo;
 976         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
 977         rc = _hwrm_send_message(softc, &req, sizeof(req));
 978         softc->hwrm_cmd_timeo = old_timeo;
 979         if (rc)
 980                 goto exit;
 981
 982         if (item_length)
 983                 *item_length = le32toh(resp->dir_item_length);
 984         if (data_length)
 985                 *data_length = le32toh(resp->dir_data_length);
 986         if (fw_ver)
 987                 *fw_ver = le32toh(resp->fw_ver);
 988         *ordinal = le16toh(resp->dir_ordinal);
 989         if (index)
 990                 *index = le16toh(resp->dir_idx);
 991
 992 exit:
 993         BNXT_HWRM_UNLOCK(softc);
 994         return (rc);
 995 }
 996
 997 int
 998 bnxt_hwrm_nvm_read(struct bnxt_softc *softc, uint16_t index, uint32_t offset,
 999     uint32_t length, struct iflib_dma_info *data)
1000 {
1001         struct hwrm_nvm_read_input req = {0};
1002         int rc;
1003         uint32_t old_timeo;
1004
1005         if (length > data->idi_size) {
1006                 rc = EINVAL;
1007                 goto exit;
1008         }
1009         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_READ);
1010         req.host_dest_addr = htole64(data->idi_paddr);
1011         req.dir_idx = htole16(index);
1012         req.offset = htole32(offset);
1013         req.len = htole32(length);
1014         BNXT_HWRM_LOCK(softc);
1015         old_timeo = softc->hwrm_cmd_timeo;
1016         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1017         rc = _hwrm_send_message(softc, &req, sizeof(req));
1018         softc->hwrm_cmd_timeo = old_timeo;
1019         BNXT_HWRM_UNLOCK(softc);
1020         if (rc)
1021                 goto exit;
1022         bus_dmamap_sync(data->idi_tag, data->idi_map, BUS_DMASYNC_POSTREAD);
1023
1024         goto exit;
1025
1026 exit:
1027         return rc;
1028 }
1029
1030 int
1031 bnxt_hwrm_nvm_modify(struct bnxt_softc *softc, uint16_t index, uint32_t offset,
1032     void *data, bool cpyin, uint32_t length)
1033 {
1034         struct hwrm_nvm_modify_input req = {0};
1035         struct iflib_dma_info dma_data;
1036         int rc;
1037         uint32_t old_timeo;
1038
1039         if (length == 0 || !data)
1040                 return EINVAL;
1041         rc = iflib_dma_alloc(softc->ctx, length, &dma_data,
1042             BUS_DMA_NOWAIT);
1043         if (rc)
1044                 return ENOMEM;
1045         if (cpyin) {
1046                 rc = copyin(data, dma_data.idi_vaddr, length);
1047                 if (rc)
1048                         goto exit;
1049         }
1050         else
1051                 memcpy(dma_data.idi_vaddr, data, length);
1052         bus_dmamap_sync(dma_data.idi_tag, dma_data.idi_map,
1053             BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1054
1055         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_MODIFY);
1056         req.host_src_addr = htole64(dma_data.idi_paddr);
1057         req.dir_idx = htole16(index);
1058         req.offset = htole32(offset);
1059         req.len = htole32(length);
1060         BNXT_HWRM_LOCK(softc);
1061         old_timeo = softc->hwrm_cmd_timeo;
1062         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1063         rc = _hwrm_send_message(softc, &req, sizeof(req));
1064         softc->hwrm_cmd_timeo = old_timeo;
1065         BNXT_HWRM_UNLOCK(softc);
1066
1067 exit:
1068         iflib_dma_free(&dma_data);
1069         return rc;
1070 }
1071
1072 int
1073 bnxt_hwrm_fw_reset(struct bnxt_softc *softc, uint8_t processor,
1074     uint8_t *selfreset)
1075 {
1076         struct hwrm_fw_reset_input req = {0};
1077         struct hwrm_fw_reset_output *resp =
1078             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1079         int rc;
1080
1081         MPASS(selfreset);
1082
1083         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_RESET);
1084         req.embedded_proc_type = processor;
1085         req.selfrst_status = *selfreset;
1086
1087         BNXT_HWRM_LOCK(softc);
1088         rc = _hwrm_send_message(softc, &req, sizeof(req));
1089         if (rc)
1090                 goto exit;
1091         *selfreset = resp->selfrst_status;
1092
1093 exit:
1094         BNXT_HWRM_UNLOCK(softc);
1095         return rc;
1096 }
1097
1098 int
1099 bnxt_hwrm_fw_qstatus(struct bnxt_softc *softc, uint8_t type, uint8_t *selfreset)
1100 {
1101         struct hwrm_fw_qstatus_input req = {0};
1102         struct hwrm_fw_qstatus_output *resp =
1103             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1104         int rc;
1105
1106         MPASS(selfreset);
1107
1108         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_QSTATUS);
1109         req.embedded_proc_type = type;
1110
1111         BNXT_HWRM_LOCK(softc);
1112         rc = _hwrm_send_message(softc, &req, sizeof(req));
1113         if (rc)
1114                 goto exit;
1115         *selfreset = resp->selfrst_status;
1116
1117 exit:
1118         BNXT_HWRM_UNLOCK(softc);
1119         return rc;
1120 }
1121
1122 int
1123 bnxt_hwrm_nvm_write(struct bnxt_softc *softc, void *data, bool cpyin,
1124     uint16_t type, uint16_t ordinal, uint16_t ext, uint16_t attr,
1125     uint16_t option, uint32_t data_length, bool keep, uint32_t *item_length,
1126     uint16_t *index)
1127 {
1128         struct hwrm_nvm_write_input req = {0};
1129         struct hwrm_nvm_write_output *resp =
1130             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1131         struct iflib_dma_info dma_data;
1132         int rc;
1133         uint32_t old_timeo;
1134
1135         if (data_length) {
1136                 rc = iflib_dma_alloc(softc->ctx, data_length, &dma_data,
1137                     BUS_DMA_NOWAIT);
1138                 if (rc)
1139                         return ENOMEM;
1140                 if (cpyin) {
1141                         rc = copyin(data, dma_data.idi_vaddr, data_length);
1142                         if (rc)
1143                                 goto early_exit;
1144                 }
1145                 else
1146                         memcpy(dma_data.idi_vaddr, data, data_length);
1147                 bus_dmamap_sync(dma_data.idi_tag, dma_data.idi_map,
1148                     BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1149         }
1150         else
1151                 dma_data.idi_paddr = 0;
1152
1153         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_WRITE);
1154
1155         req.host_src_addr = htole64(dma_data.idi_paddr);
1156         req.dir_type = htole16(type);
1157         req.dir_ordinal = htole16(ordinal);
1158         req.dir_ext = htole16(ext);
1159         req.dir_attr = htole16(attr);
1160         req.dir_data_length = htole32(data_length);
1161         req.option = htole16(option);
1162         if (keep) {
1163                 req.flags =
1164                     htole16(HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG);
1165         }
1166         if (item_length)
1167                 req.dir_item_length = htole32(*item_length);
1168
1169         BNXT_HWRM_LOCK(softc);
1170         old_timeo = softc->hwrm_cmd_timeo;
1171         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1172         rc = _hwrm_send_message(softc, &req, sizeof(req));
1173         softc->hwrm_cmd_timeo = old_timeo;
1174         if (rc)
1175                 goto exit;
1176         if (item_length)
1177                 *item_length = le32toh(resp->dir_item_length);
1178         if (index)
1179                 *index = le16toh(resp->dir_idx);
1180
1181 exit:
1182         BNXT_HWRM_UNLOCK(softc);
1183 early_exit:
1184         if (data_length)
1185                 iflib_dma_free(&dma_data);
1186         return rc;
1187 }
1188
1189 int
1190 bnxt_hwrm_nvm_erase_dir_entry(struct bnxt_softc *softc, uint16_t index)
1191 {
1192         struct hwrm_nvm_erase_dir_entry_input req = {0};
1193         uint32_t old_timeo;
1194         int rc;
1195
1196         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_ERASE_DIR_ENTRY);
1197         req.dir_idx = htole16(index);
1198         BNXT_HWRM_LOCK(softc);
1199         old_timeo = softc->hwrm_cmd_timeo;
1200         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1201         rc = _hwrm_send_message(softc, &req, sizeof(req));
1202         softc->hwrm_cmd_timeo = old_timeo;
1203         BNXT_HWRM_UNLOCK(softc);
1204         return rc;
1205 }
1206
1207 int
1208 bnxt_hwrm_nvm_get_dir_info(struct bnxt_softc *softc, uint32_t *entries,
1209     uint32_t *entry_length)
1210 {
1211         struct hwrm_nvm_get_dir_info_input req = {0};
1212         struct hwrm_nvm_get_dir_info_output *resp =
1213             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1214         int rc;
1215         uint32_t old_timeo;
1216
1217         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_GET_DIR_INFO);
1218
1219         BNXT_HWRM_LOCK(softc);
1220         old_timeo = softc->hwrm_cmd_timeo;
1221         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1222         rc = _hwrm_send_message(softc, &req, sizeof(req));
1223         softc->hwrm_cmd_timeo = old_timeo;
1224         if (rc)
1225                 goto exit;
1226
1227         if (entries)
1228                 *entries = le32toh(resp->entries);
1229         if (entry_length)
1230                 *entry_length = le32toh(resp->entry_length);
1231
1232 exit:
1233         BNXT_HWRM_UNLOCK(softc);
1234         return rc;
1235 }
1236
1237 int
1238 bnxt_hwrm_nvm_get_dir_entries(struct bnxt_softc *softc, uint32_t *entries,
1239     uint32_t *entry_length, struct iflib_dma_info *dma_data)
1240 {
1241         struct hwrm_nvm_get_dir_entries_input req = {0};
1242         uint32_t ent;
1243         uint32_t ent_len;
1244         int rc;
1245         uint32_t old_timeo;
1246
1247         if (!entries)
1248                 entries = &ent;
1249         if (!entry_length)
1250                 entry_length = &ent_len;
1251
1252         rc = bnxt_hwrm_nvm_get_dir_info(softc, entries, entry_length);
1253         if (rc)
1254                 goto exit;
1255         if (*entries * *entry_length > dma_data->idi_size) {
1256                 rc = EINVAL;
1257                 goto exit;
1258         }
1259
1260         /*
1261          * TODO: There's a race condition here that could blow up DMA memory...
1262          *       we need to allocate the max size, not the currently in use
1263          *       size.  The command should totally have a max size here.
1264          */
1265         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_GET_DIR_ENTRIES);
1266         req.host_dest_addr = htole64(dma_data->idi_paddr);
1267         BNXT_HWRM_LOCK(softc);
1268         old_timeo = softc->hwrm_cmd_timeo;
1269         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1270         rc = _hwrm_send_message(softc, &req, sizeof(req));
1271         softc->hwrm_cmd_timeo = old_timeo;
1272         BNXT_HWRM_UNLOCK(softc);
1273         if (rc)
1274                 goto exit;
1275         bus_dmamap_sync(dma_data->idi_tag, dma_data->idi_map,
1276             BUS_DMASYNC_POSTWRITE);
1277
1278 exit:
1279         return rc;
1280 }
1281
1282 int
1283 bnxt_hwrm_nvm_get_dev_info(struct bnxt_softc *softc, uint16_t *mfg_id,
1284     uint16_t *device_id, uint32_t *sector_size, uint32_t *nvram_size,
1285     uint32_t *reserved_size, uint32_t *available_size)
1286 {
1287         struct hwrm_nvm_get_dev_info_input req = {0};
1288         struct hwrm_nvm_get_dev_info_output *resp =
1289             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1290         int rc;
1291         uint32_t old_timeo;
1292
1293         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_GET_DEV_INFO);
1294
1295         BNXT_HWRM_LOCK(softc);
1296         old_timeo = softc->hwrm_cmd_timeo;
1297         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1298         rc = _hwrm_send_message(softc, &req, sizeof(req));
1299         softc->hwrm_cmd_timeo = old_timeo;
1300         if (rc)
1301                 goto exit;
1302
1303         if (mfg_id)
1304                 *mfg_id = le16toh(resp->manufacturer_id);
1305         if (device_id)
1306                 *device_id = le16toh(resp->device_id);
1307         if (sector_size)
1308                 *sector_size = le32toh(resp->sector_size);
1309         if (nvram_size)
1310                 *nvram_size = le32toh(resp->nvram_size);
1311         if (reserved_size)
1312                 *reserved_size = le32toh(resp->reserved_size);
1313         if (available_size)
1314                 *available_size = le32toh(resp->available_size);
1315
1316 exit:
1317         BNXT_HWRM_UNLOCK(softc);
1318         return rc;
1319 }
1320
1321 int
1322 bnxt_hwrm_nvm_install_update(struct bnxt_softc *softc,
1323     uint32_t install_type, uint64_t *installed_items, uint8_t *result,
1324     uint8_t *problem_item, uint8_t *reset_required)
1325 {
1326         struct hwrm_nvm_install_update_input req = {0};
1327         struct hwrm_nvm_install_update_output *resp =
1328             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1329         int rc;
1330         uint32_t old_timeo;
1331
1332         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_INSTALL_UPDATE);
1333         req.install_type = htole32(install_type);
1334
1335         BNXT_HWRM_LOCK(softc);
1336         old_timeo = softc->hwrm_cmd_timeo;
1337         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1338         rc = _hwrm_send_message(softc, &req, sizeof(req));
1339         softc->hwrm_cmd_timeo = old_timeo;
1340         if (rc)
1341                 goto exit;
1342
1343         if (installed_items)
1344                 *installed_items = le32toh(resp->installed_items);
1345         if (result)
1346                 *result = resp->result;
1347         if (problem_item)
1348                 *problem_item = resp->problem_item;
1349         if (reset_required)
1350                 *reset_required = resp->reset_required;
1351
1352 exit:
1353         BNXT_HWRM_UNLOCK(softc);
1354         return rc;
1355 }
1356
1357 int
1358 bnxt_hwrm_nvm_verify_update(struct bnxt_softc *softc, uint16_t type,
1359     uint16_t ordinal, uint16_t ext)
1360 {
1361         struct hwrm_nvm_verify_update_input req = {0};
1362         uint32_t old_timeo;
1363         int rc;
1364
1365         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_NVM_VERIFY_UPDATE);
1366
1367         req.dir_type = htole16(type);
1368         req.dir_ordinal = htole16(ordinal);
1369         req.dir_ext = htole16(ext);
1370
1371         BNXT_HWRM_LOCK(softc);
1372         old_timeo = softc->hwrm_cmd_timeo;
1373         softc->hwrm_cmd_timeo = BNXT_NVM_TIMEO;
1374         rc = _hwrm_send_message(softc, &req, sizeof(req));
1375         softc->hwrm_cmd_timeo = old_timeo;
1376         BNXT_HWRM_UNLOCK(softc);
1377         return rc;
1378 }
1379
1380 int
1381 bnxt_hwrm_fw_get_time(struct bnxt_softc *softc, uint16_t *year, uint8_t *month,
1382     uint8_t *day, uint8_t *hour, uint8_t *minute, uint8_t *second,
1383     uint16_t *millisecond, uint16_t *zone)
1384 {
1385         struct hwrm_fw_get_time_input req = {0};
1386         struct hwrm_fw_get_time_output *resp =
1387             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1388         int rc;
1389
1390         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_GET_TIME);
1391
1392         BNXT_HWRM_LOCK(softc);
1393         rc = _hwrm_send_message(softc, &req, sizeof(req));
1394         if (rc)
1395                 goto exit;
1396
1397         if (year)
1398                 *year = le16toh(resp->year);
1399         if (month)
1400                 *month = resp->month;
1401         if (day)
1402                 *day = resp->day;
1403         if (hour)
1404                 *hour = resp->hour;
1405         if (minute)
1406                 *minute = resp->minute;
1407         if (second)
1408                 *second = resp->second;
1409         if (millisecond)
1410                 *millisecond = le16toh(resp->millisecond);
1411         if (zone)
1412                 *zone = le16toh(resp->zone);
1413
1414 exit:
1415         BNXT_HWRM_UNLOCK(softc);
1416         return rc;
1417 }
1418
1419 int
1420 bnxt_hwrm_fw_set_time(struct bnxt_softc *softc, uint16_t year, uint8_t month,
1421     uint8_t day, uint8_t hour, uint8_t minute, uint8_t second,
1422     uint16_t millisecond, uint16_t zone)
1423 {
1424         struct hwrm_fw_set_time_input req = {0};
1425
1426         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FW_SET_TIME);
1427
1428         req.year = htole16(year);
1429         req.month = month;
1430         req.day = day;
1431         req.hour = hour;
1432         req.minute = minute;
1433         req.second = second;
1434         req.millisecond = htole16(millisecond);
1435         req.zone = htole16(zone);
1436         return hwrm_send_message(softc, &req, sizeof(req));
1437 }
1438
1439 int
1440 bnxt_hwrm_port_phy_qcfg(struct bnxt_softc *softc)
1441 {
1442         struct bnxt_link_info *link_info = &softc->link_info;
1443         struct hwrm_port_phy_qcfg_input req = {0};
1444         struct hwrm_port_phy_qcfg_output *resp =
1445             (void *)softc->hwrm_cmd_resp.idi_vaddr;
1446         int rc = 0;
1447
1448         BNXT_HWRM_LOCK(softc);
1449         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_PORT_PHY_QCFG);
1450
1451         rc = _hwrm_send_message(softc, &req, sizeof(req));
1452         if (rc)
1453                 goto exit;
1454
1455         link_info->phy_link_status = resp->link;
1456         link_info->duplex =  resp->duplex;
1457         link_info->pause = resp->pause;
1458         link_info->auto_mode = resp->auto_mode;
1459         link_info->auto_pause = resp->auto_pause;
1460         link_info->force_pause = resp->force_pause;
1461         link_info->duplex_setting = resp->duplex;
1462         if (link_info->phy_link_status == HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK)
1463                 link_info->link_speed = le16toh(resp->link_speed);
1464         else
1465                 link_info->link_speed = 0;
1466         link_info->force_link_speed = le16toh(resp->force_link_speed);
1467         link_info->auto_link_speed = le16toh(resp->auto_link_speed);
1468         link_info->support_speeds = le16toh(resp->support_speeds);
1469         link_info->auto_link_speeds = le16toh(resp->auto_link_speed_mask);
1470         link_info->preemphasis = le32toh(resp->preemphasis);
1471         link_info->phy_ver[0] = resp->phy_maj;
1472         link_info->phy_ver[1] = resp->phy_min;
1473         link_info->phy_ver[2] = resp->phy_bld;
1474         snprintf(softc->ver_info->phy_ver, sizeof(softc->ver_info->phy_ver),
1475             "%d.%d.%d", link_info->phy_ver[0], link_info->phy_ver[1],
1476             link_info->phy_ver[2]);
1477         strlcpy(softc->ver_info->phy_vendor, resp->phy_vendor_name,
1478             BNXT_NAME_SIZE);
1479         strlcpy(softc->ver_info->phy_partnumber, resp->phy_vendor_partnumber,
1480             BNXT_NAME_SIZE);
1481         link_info->media_type = resp->media_type;
1482         link_info->phy_type = resp->phy_type;
1483         link_info->transceiver = resp->xcvr_pkg_type;
1484         link_info->phy_addr = resp->eee_config_phy_addr &
1485             HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK;
1486
1487 exit:
1488         BNXT_HWRM_UNLOCK(softc);
1489         return rc;
1490 }
1491
1492 uint16_t
1493 bnxt_hwrm_get_wol_fltrs(struct bnxt_softc *softc, uint16_t handle)
1494 {
1495         struct hwrm_wol_filter_qcfg_input req = {0};
1496         struct hwrm_wol_filter_qcfg_output *resp =
1497                         (void *)softc->hwrm_cmd_resp.idi_vaddr;
1498         uint16_t next_handle = 0;
1499         int rc;
1500
1501         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_QCFG);
1502         req.port_id = htole16(softc->pf.port_id);
1503         req.handle = htole16(handle);
1504         rc = hwrm_send_message(softc, &req, sizeof(req));
1505         if (!rc) {
1506                 next_handle = le16toh(resp->next_handle);
1507                 if (next_handle != 0) {
1508                         if (resp->wol_type ==
1509                                 HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_MAGICPKT) {
1510                                 softc->wol = 1;
1511                                 softc->wol_filter_id = resp->wol_filter_id;
1512                         }
1513                 }
1514         }
1515         return next_handle;
1516 }
1517
1518 int
1519 bnxt_hwrm_alloc_wol_fltr(struct bnxt_softc *softc)
1520 {
1521         struct hwrm_wol_filter_alloc_input req = {0};
1522         struct hwrm_wol_filter_alloc_output *resp =
1523                 (void *)softc->hwrm_cmd_resp.idi_vaddr;
1524         int rc;
1525
1526         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_ALLOC);
1527         req.port_id = htole16(softc->pf.port_id);
1528         req.wol_type = HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_MAGICPKT;
1529         req.enables =
1530                 htole32(HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_MAC_ADDRESS);
1531         memcpy(req.mac_address, softc->func.mac_addr, ETHER_ADDR_LEN);
1532         rc = hwrm_send_message(softc, &req, sizeof(req));
1533         if (!rc)
1534                 softc->wol_filter_id = resp->wol_filter_id;
1535
1536         return rc;
1537 }
1538
1539 int
1540 bnxt_hwrm_free_wol_fltr(struct bnxt_softc *softc)
1541 {
1542         struct hwrm_wol_filter_free_input req = {0};
1543
1544         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_WOL_FILTER_FREE);
1545         req.port_id = htole16(softc->pf.port_id);
1546         req.enables =
1547                 htole32(HWRM_WOL_FILTER_FREE_INPUT_ENABLES_WOL_FILTER_ID);
1548         req.wol_filter_id = softc->wol_filter_id;
1549         return hwrm_send_message(softc, &req, sizeof(req));
1550 }
1551
1552 static void bnxt_hwrm_set_coal_params(struct bnxt_softc *softc, uint32_t max_frames,
1553         uint32_t buf_tmrs, uint16_t flags,
1554         struct hwrm_ring_cmpl_ring_cfg_aggint_params_input *req)
1555 {
1556         req->flags = htole16(flags);
1557         req->num_cmpl_dma_aggr = htole16((uint16_t)max_frames);
1558         req->num_cmpl_dma_aggr_during_int = htole16(max_frames >> 16);
1559         req->cmpl_aggr_dma_tmr = htole16((uint16_t)buf_tmrs);
1560         req->cmpl_aggr_dma_tmr_during_int = htole16(buf_tmrs >> 16);
1561         /* Minimum time between 2 interrupts set to buf_tmr x 2 */
1562         req->int_lat_tmr_min = htole16((uint16_t)buf_tmrs * 2);
1563         req->int_lat_tmr_max = htole16((uint16_t)buf_tmrs * 4);
1564         req->num_cmpl_aggr_int = htole16((uint16_t)max_frames * 4);
1565 }
1566
1567
1568 int bnxt_hwrm_set_coal(struct bnxt_softc *softc)
1569 {
1570         int i, rc = 0;
1571         struct hwrm_ring_cmpl_ring_cfg_aggint_params_input req_rx = {0},
1572                                                            req_tx = {0}, *req;
1573         uint16_t max_buf, max_buf_irq;
1574         uint16_t buf_tmr, buf_tmr_irq;
1575         uint32_t flags;
1576
1577         bnxt_hwrm_cmd_hdr_init(softc, &req_rx,
1578                                HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS);
1579         bnxt_hwrm_cmd_hdr_init(softc, &req_tx,
1580                                HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS);
1581
1582         /* Each rx completion (2 records) should be DMAed immediately.
1583          * DMA 1/4 of the completion buffers at a time.
1584          */
1585         max_buf = min_t(uint16_t, softc->rx_coal_frames / 4, 2);
1586         /* max_buf must not be zero */
1587         max_buf = clamp_t(uint16_t, max_buf, 1, 63);
1588         max_buf_irq = clamp_t(uint16_t, softc->rx_coal_frames_irq, 1, 63);
1589         buf_tmr = BNXT_USEC_TO_COAL_TIMER(softc->rx_coal_usecs);
1590         /* buf timer set to 1/4 of interrupt timer */
1591         buf_tmr = max_t(uint16_t, buf_tmr / 4, 1);
1592         buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(softc->rx_coal_usecs_irq);
1593         buf_tmr_irq = max_t(uint16_t, buf_tmr_irq, 1);
1594
1595         flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET;
1596
1597         /* RING_IDLE generates more IRQs for lower latency.  Enable it only
1598          * if coal_usecs is less than 25 us.
1599          */
1600         if (softc->rx_coal_usecs < 25)
1601                 flags |= HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_RING_IDLE;
1602
1603         bnxt_hwrm_set_coal_params(softc, max_buf_irq << 16 | max_buf,
1604                                   buf_tmr_irq << 16 | buf_tmr, flags, &req_rx);
1605
1606         /* max_buf must not be zero */
1607         max_buf = clamp_t(uint16_t, softc->tx_coal_frames, 1, 63);
1608         max_buf_irq = clamp_t(uint16_t, softc->tx_coal_frames_irq, 1, 63);
1609         buf_tmr = BNXT_USEC_TO_COAL_TIMER(softc->tx_coal_usecs);
1610         /* buf timer set to 1/4 of interrupt timer */
1611         buf_tmr = max_t(uint16_t, buf_tmr / 4, 1);
1612         buf_tmr_irq = BNXT_USEC_TO_COAL_TIMER(softc->tx_coal_usecs_irq);
1613         buf_tmr_irq = max_t(uint16_t, buf_tmr_irq, 1);
1614         flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET;
1615         bnxt_hwrm_set_coal_params(softc, max_buf_irq << 16 | max_buf,
1616                                   buf_tmr_irq << 16 | buf_tmr, flags, &req_tx);
1617
1618         for (i = 0; i < softc->nrxqsets; i++) {
1619
1620
1621                 req = &req_rx;
1622                 /*
1623                  * TBD:
1624                  *      Check if Tx also needs to be done
1625                  *      So far, Tx processing has been done in softirq contest
1626                  *
1627                  * req = &req_tx;
1628                  */
1629                 req->ring_id = htole16(softc->grp_info[i].cp_ring_id);
1630
1631                 rc = hwrm_send_message(softc, req, sizeof(*req));
1632                 if (rc)
1633                         break;
1634         }
1635         return rc;
1636 }
1637
1638
1639
1640 int bnxt_hwrm_func_rgtr_async_events(struct bnxt_softc *softc, unsigned long *bmap,
1641                                      int bmap_size)
1642 {
1643         struct hwrm_func_drv_rgtr_input req = {0};
1644         bitstr_t *async_events_bmap;
1645         uint32_t *events;
1646         int i;
1647
1648         async_events_bmap = bit_alloc(256, M_DEVBUF, M_WAITOK|M_ZERO);
1649         events = (uint32_t *)async_events_bmap;
1650
1651         bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_DRV_RGTR);
1652
1653         req.enables =
1654                 htole32(HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD);
1655
1656         memset(async_events_bmap, 0, sizeof(256 / 8));
1657
1658         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE);
1659         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD);
1660         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED);
1661         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE);
1662         bit_set(async_events_bmap, HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE);
1663
1664         if (bmap && bmap_size) {
1665                 for (i = 0; i < bmap_size; i++) {
1666                         if (bit_test(bmap, i))
1667                                 bit_set(async_events_bmap, i);
1668                 }
1669         }
1670
1671         for (i = 0; i < 8; i++)
1672                 req.async_event_fwd[i] |= htole32(events[i]);
1673
1674         free(async_events_bmap, M_DEVBUF);
1675
1676         return hwrm_send_message(softc, &req, sizeof(req));
1677 }
1678