4 * Copyright (c) 2016 Broadcom, All Rights Reserved.
5 * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
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13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 /****************************************************************************
35 * Description: Definition of HSI data structures
37 * Date: 07/26/16 21:30:37
39 * Note: This file is scripted generated by hsi_decode.py.
40 * DO NOT modify this file manually !!!!
42 ****************************************************************************/
43 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
44 #define _HSI_STRUCT_DEF_EXTERNAL_H_
47 * per-context HW statistics -- chip view
48 * Reference to stat_ctx_stat_xxx for
52 uint64_t rx_ucast_pkts;
53 uint64_t rx_mcast_pkts;
54 uint64_t rx_bcast_pkts;
55 uint64_t rx_discard_pkts;
56 uint64_t rx_drop_pkts;
57 uint64_t rx_ucast_bytes;
58 uint64_t rx_mcast_bytes;
59 uint64_t rx_bcast_bytes;
60 uint64_t tx_ucast_pkts;
61 uint64_t tx_mcast_pkts;
62 uint64_t tx_bcast_pkts;
63 uint64_t tx_discard_pkts;
64 uint64_t tx_drop_pkts;
65 uint64_t tx_ucast_bytes;
66 uint64_t tx_mcast_bytes;
67 uint64_t tx_bcast_bytes;
72 } __attribute__((packed));
74 /* BD Ring Structures */
76 * Description: This structure is used to inform the NIC of a location for and
77 * an aggregation buffer that will be used for packet data that is received. An
78 * aggregation buffer creates a different kind of completion operation for a
79 * packet where a variable number of BDs may be used to place the packet in the
80 * host. RX Rings that have aggregation buffers are known as aggregation rings
81 * and must contain only aggregation buffers.
84 * Note: BD Ring structures are written by the driver to TX Rings and RX Rings
85 * to indicate to the chip there is more buffer space in the host that needs to
86 * be transmitted or is available for receive data.
88 /* BD Base (8 bytes) */
92 /* This value identifies the type of buffer descriptor. */
93 #define BD_BASE_TYPE_MASK UINT32_C(0x3f)
94 #define BD_BASE_TYPE_SFT 0
96 * Indicates that this BD is 16B long and is used for normal L2
97 * packet transmission.
99 #define BD_BASE_TYPE_TX_BD_SHORT UINT32_C(0x0)
101 * Indicates that this BD is 1BB long and is an empty TX BD. Not
102 * valid for use by the driver.
104 #define BD_BASE_TYPE_TX_BD_EMPTY UINT32_C(0x1)
106 * Indicates that this BD is 16B long and is an RX Producer (ie.
107 * empty) buffer descriptor.
109 #define BD_BASE_TYPE_RX_PROD_PKT UINT32_C(0x4)
111 * Indicates that this BD is 16B long and is an RX Producer
114 #define BD_BASE_TYPE_RX_PROD_BFR UINT32_C(0x5)
116 * Indicates that this BD is 16B long and is an RX Producer
117 * Assembly Buffer Descriptor.
119 #define BD_BASE_TYPE_RX_PROD_AGG UINT32_C(0x6)
121 * Indicates that this BD is 32B long and is used for normal L2
122 * packet transmission.
124 #define BD_BASE_TYPE_TX_BD_LONG UINT32_C(0x10)
126 } __attribute__((packed));
128 /* Short TX BD (16 bytes) */
133 * All bits in this field must be valid on the first BD of a packet.
134 * Only the packet_end bit must be valid for the remaining BDs of a
137 /* This value identifies the type of buffer descriptor. */
138 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
139 #define TX_BD_SHORT_TYPE_SFT 0
141 * Indicates that this BD is 16B long and is used for normal L2
142 * packet transmission.
144 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
146 * If set to 1, the packet ends with the data in the buffer pointed to
147 * by this descriptor. This flag must be valid on every BD.
149 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
151 * If set to 1, the device will not generate a completion for this
152 * transmit packet unless there is an error in it's processing. If this
153 * bit is set to 0, then the packet will be completed normally. This bit
154 * must be valid only on the first BD of a packet.
156 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
158 * This value indicates how many 16B BD locations are consumed in the
159 * ring by this packet. A value of 1 indicates that this BD is the only
160 * BD (and that the it is a short BD). A value of 3 indicates either 3
161 * short BDs or 1 long BD and one short BD in the packet. A value of 0
162 * indicates that there are 32 BD locations in the packet (the maximum).
163 * This field is valid only on the first BD of a packet.
165 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
166 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
168 * This value is a hint for the length of the entire packet. It is used
169 * by the chip to optimize internal processing. The packet will be
170 * dropped if the hint is too short. This field is valid only on the
171 * first BD of a packet.
173 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
174 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
175 /* indicates packet length < 512B */
176 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
177 /* indicates 512 <= packet length < 1KB */
178 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
179 /* indicates 1KB <= packet length < 2KB */
180 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
181 /* indicates packet length >= 2KB */
182 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
183 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
185 * If set to 1, the device immediately updates the Send Consumer Index
186 * after the buffer associated with this descriptor has been transferred
187 * via DMA to NIC memory from host memory. An interrupt may or may not
188 * be generated according to the state of the interrupt avoidance
189 * mechanisms. If this bit is set to 0, then the Consumer Index is only
190 * updated as soon as one of the host interrupt coalescing conditions
191 * has been met. This bit must be valid on the first BD of a packet.
193 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
195 * All bits in this field must be valid on the first BD of a packet.
196 * Only the packet_end bit must be valid for the remaining BDs of a
199 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
200 #define TX_BD_SHORT_FLAGS_SFT 6
203 * This is the length of the host physical buffer this BD describes in
204 * bytes. This field must be valid on all BDs of a packet.
208 * The opaque data field is pass through to the completion and can be
209 * used for any data that the driver wants to associate with the
210 * transmit BD. This field must be valid on the first BD of a packet.
214 * This is the host physical address for the portion of the packet
215 * described by this TX BD. This value must be valid on all BDs of a
218 } __attribute__((packed));
220 /* Long TX BD (32 bytes split to 2 16-byte struct) */
225 * All bits in this field must be valid on the first BD of a packet.
226 * Only the packet_end bit must be valid for the remaining BDs of a
229 /* This value identifies the type of buffer descriptor. */
230 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
231 #define TX_BD_LONG_TYPE_SFT 0
233 * Indicates that this BD is 32B long and is used for normal L2
234 * packet transmission.
236 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
238 * If set to 1, the packet ends with the data in the buffer pointed to
239 * by this descriptor. This flag must be valid on every BD.
241 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
243 * If set to 1, the device will not generate a completion for this
244 * transmit packet unless there is an error in it's processing. If this
245 * bit is set to 0, then the packet will be completed normally. This bit
246 * must be valid only on the first BD of a packet.
248 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
250 * This value indicates how many 16B BD locations are consumed in the
251 * ring by this packet. A value of 1 indicates that this BD is the only
252 * BD (and that the it is a short BD). A value of 3 indicates either 3
253 * short BDs or 1 long BD and one short BD in the packet. A value of 0
254 * indicates that there are 32 BD locations in the packet (the maximum).
255 * This field is valid only on the first BD of a packet.
257 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
258 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
260 * This value is a hint for the length of the entire packet. It is used
261 * by the chip to optimize internal processing. The packet will be
262 * dropped if the hint is too short. This field is valid only on the
263 * first BD of a packet.
265 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
266 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
267 /* indicates packet length < 512B */
268 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
269 /* indicates 512 <= packet length < 1KB */
270 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
271 /* indicates 1KB <= packet length < 2KB */
272 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
273 /* indicates packet length >= 2KB */
274 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
275 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
277 * If set to 1, the device immediately updates the Send Consumer Index
278 * after the buffer associated with this descriptor has been transferred
279 * via DMA to NIC memory from host memory. An interrupt may or may not
280 * be generated according to the state of the interrupt avoidance
281 * mechanisms. If this bit is set to 0, then the Consumer Index is only
282 * updated as soon as one of the host interrupt coalescing conditions
283 * has been met. This bit must be valid on the first BD of a packet.
285 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
287 * All bits in this field must be valid on the first BD of a packet.
288 * Only the packet_end bit must be valid for the remaining BDs of a
291 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
292 #define TX_BD_LONG_FLAGS_SFT 6
295 * This is the length of the host physical buffer this BD describes in
296 * bytes. This field must be valid on all BDs of a packet.
300 * The opaque data field is pass through to the completion and can be
301 * used for any data that the driver wants to associate with the
302 * transmit BD. This field must be valid on the first BD of a packet.
306 * This is the host physical address for the portion of the packet
307 * described by this TX BD. This value must be valid on all BDs of a
310 } __attribute__((packed));
312 /* last 16 bytes of Long TX BD */
314 struct tx_bd_long_hi {
317 * All bits in this field must be valid on the first BD of a packet.
318 * Their value on other BDs of the packet will be ignored.
321 * If set to 1, the controller replaces the TCP/UPD checksum fields of
322 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
323 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
324 * checksum for the packet associated with this descriptor. The flag is
325 * ignored if the LSO flag is set. This bit must be valid on the first
328 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
330 * If set to 1, the controller replaces the IP checksum of the normal
331 * packets, or the inner IP checksum of the encapsulated packets with
332 * the hardware calculated IP checksum for the packet associated with
333 * this descriptor. This bit must be valid on the first BD of a packet.
335 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
337 * If set to 1, the controller will not append an Ethernet CRC to the
338 * end of the frame. This bit must be valid on the first BD of a packet.
339 * Packet must be 64B or longer when this flag is set. It is not useful
340 * to use this bit with any form of TX offload such as CSO or LSO. The
341 * intent is that the packet from the host already has a valid Ethernet
344 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
346 * If set to 1, the device will record the time at which the packet was
347 * actually transmitted at the TX MAC. This bit must be valid on the
348 * first BD of a packet.
350 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
352 * If set to 1, The controller replaces the tunnel IP checksum field
353 * with hardware calculated IP checksum for the IP header of the packet
354 * associated with this descriptor. For outer UDP checksum, global outer
355 * UDP checksum TE_NIC register needs to be enabled. If the global outer
356 * UDP checksum TE_NIC register bit is set, outer UDP checksum will be
357 * calculated for the following cases: 1. Packets with tcp_udp_chksum
358 * flag set to offload checksum for inner packet AND the inner packet is
359 * TCP/UDP. If the inner packet is ICMP for example (non-TCP/UDP), even
360 * if the tcp_udp_chksum is set, the outer UDP checksum will not be
361 * calculated. 2. Packets with lso flag set which implies inner TCP
362 * checksum calculation as part of LSO operation.
364 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
366 * If set to 1, the device will treat this packet with LSO(Large Send
367 * Offload) processing for both normal or encapsulated packets, which is
368 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
369 * fields must be valid. The driver doesn't need to set t_ip_chksum,
370 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
371 * the appropriate checksum fields for segmented packets. When this bit
372 * is 1, the hdr_size and mss fields must be valid.
374 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
376 * If set to zero when LSO is '1', then the IPID will be treated as a
377 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
378 * set to one when LSO is '1', then the IPID will be treated as a 15b
379 * number and will be wrapped if it exceeds a value 0f 0x7fff.
381 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
383 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
384 * will not be modified during LSO operations. If set to one when LSO is
385 * '1', then the IPID of the tunnel IP header will be incremented for
386 * each subsequent segment of an LSO operation. The flag is ignored if
387 * the LSO packet is a normal (non-tunneled) TCP packet.
389 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
391 * If set to '1', then the RoCE ICRC will be appended to the packet.
392 * Packet must be a valid RoCE format packet.
394 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
396 * If set to '1', then the FCoE CRC will be appended to the packet.
397 * Packet must be a valid FCoE format packet.
399 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
402 * When LSO is '1', this field must contain the offset of the TCP
403 * payload from the beginning of the packet in as 16b words. In case of
404 * encapsulated/tunneling packet, this field contains the offset of the
405 * inner TCP payload from beginning of the packet as 16-bit words. This
406 * value must be valid on the first BD of a packet.
408 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
409 #define TX_BD_LONG_HDR_SIZE_SFT 0
412 * This is the MSS value that will be used to do the LSO processing. The
413 * value is the length in bytes of the TCP payload for each segment
414 * generated by the LSO operation. This value must be valid on the first
417 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
418 #define TX_BD_LONG_MSS_SFT 0
422 * This value selects a CFA action to perform on the packet. Set this
423 * value to zero if no CFA action is desired. This value must be valid
424 * on the first BD of a packet.
428 * This value is action meta-data that defines CFA edit operations that
429 * are done in addition to any action editing.
431 /* When key=1, This is the VLAN tag VID value. */
432 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
433 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
434 /* When key=1, This is the VLAN tag DE value. */
435 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
436 /* When key=1, This is the VLAN tag PRI value. */
437 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
438 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
439 /* When key=1, This is the VLAN tag TPID select value. */
440 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
441 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
443 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
445 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
447 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
449 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
451 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
452 /* Value programmed in CFA VLANTPID register. */
453 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
454 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
455 /* When key=1, This is the VLAN tag TPID select value. */
456 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
457 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
459 * This field identifies the type of edit to be performed on the packet.
460 * This value must be valid on the first BD of a packet.
462 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
463 #define TX_BD_LONG_CFA_META_KEY_SFT 28
465 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
467 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
468 * - PRI/DE value. - meta[11:0] - VID value.
470 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
471 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
472 } __attribute__((packed));
474 /* Empty TX BD (16 bytes) */
478 /* This value identifies the type of buffer descriptor. */
479 #define TX_BD_EMPTY_TYPE_MASK UINT32_C(0x3f)
480 #define TX_BD_EMPTY_TYPE_SFT 0
482 * Indicates that this BD is 1BB long and is an empty TX BD. Not
483 * valid for use by the driver.
485 #define TX_BD_EMPTY_TYPE_TX_BD_EMPTY UINT32_C(0x1)
490 } __attribute__((packed));
492 /* RX Producer Packet BD (16 bytes) */
494 struct rx_prod_pkt_bd {
496 /* This value identifies the type of buffer descriptor. */
497 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
498 #define RX_PROD_PKT_BD_TYPE_SFT 0
500 * Indicates that this BD is 16B long and is an RX Producer (ie.
501 * empty) buffer descriptor.
503 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
505 * If set to 1, the packet will be placed at the address plus 2B. The 2
506 * Bytes of padding will be written as zero.
509 * This is intended to be used when the host buffer is cache-line
510 * aligned to produce packets that are easy to parse in host memory
511 * while still allowing writes to be cache line aligned.
513 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
515 * If set to 1, the packet write will be padded out to the nearest
516 * cache-line with zero value padding.
519 * If receive buffers start/end on cache-line boundaries, this feature
520 * will ensure that all data writes on the PCI bus start/end on cache
523 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
525 * This value is the number of additional buffers in the ring that
526 * describe the buffer space to be consumed for the this packet. If the
527 * value is zero, then the packet must fit within the space described by
528 * this BD. If this value is 1 or more, it indicates how many additional
529 * "buffer" BDs are in the ring immediately following this BD to be used
530 * for the same network packet. Even if the packet to be placed does not
531 * need all the additional buffers, they will be consumed anyway.
533 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
534 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
535 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
536 #define RX_PROD_PKT_BD_FLAGS_SFT 6
539 * This is the length in Bytes of the host physical buffer where data
540 * for the packet may be placed in host memory.
543 * While this is a Byte resolution value, it is often advantageous to
544 * ensure that the buffers provided end on a host cache line.
548 * The opaque data field is pass through to the completion and can be
549 * used for any data that the driver wants to associate with this
550 * receive buffer set.
554 * This is the host physical address where data for the packet may by
555 * placed in host memory.
558 * While this is a Byte resolution value, it is often advantageous to
559 * ensure that the buffers provide start on a host cache line.
561 } __attribute__((packed));
563 /* RX Producer Buffer BD (16 bytes) */
565 struct rx_prod_bfr_bd {
567 /* This value identifies the type of buffer descriptor. */
568 #define RX_PROD_BFR_BD_TYPE_MASK UINT32_C(0x3f)
569 #define RX_PROD_BFR_BD_TYPE_SFT 0
571 * Indicates that this BD is 16B long and is an RX Producer
574 #define RX_PROD_BFR_BD_TYPE_RX_PROD_BFR UINT32_C(0x5)
575 #define RX_PROD_BFR_BD_FLAGS_MASK UINT32_C(0xffc0)
576 #define RX_PROD_BFR_BD_FLAGS_SFT 6
579 * This is the length in Bytes of the host physical buffer where data
580 * for the packet may be placed in host memory.
583 * While this is a Byte resolution value, it is often advantageous to
584 * ensure that the buffers provided end on a host cache line.
587 /* This field is not used. */
590 * This is the host physical address where data for the packet may by
591 * placed in host memory.
594 * While this is a Byte resolution value, it is often advantageous to
595 * ensure that the buffers provide start on a host cache line.
597 } __attribute__((packed));
599 /* RX Producer Aggregation BD (16 bytes) */
601 struct rx_prod_agg_bd {
603 /* This value identifies the type of buffer descriptor. */
604 #define RX_PROD_AGG_BD_TYPE_MASK UINT32_C(0x3f)
605 #define RX_PROD_AGG_BD_TYPE_SFT 0
607 * Indicates that this BD is 16B long and is an RX Producer
608 * Assembly Buffer Descriptor.
610 #define RX_PROD_AGG_BD_TYPE_RX_PROD_AGG UINT32_C(0x6)
612 * If set to 1, the packet write will be padded out to the nearest
613 * cache-line with zero value padding.
616 * If receive buffers start/end on cache-line boundaries, this feature
617 * will ensure that all data writes on the PCI bus end on cache line
620 #define RX_PROD_AGG_BD_FLAGS_EOP_PAD UINT32_C(0x40)
621 #define RX_PROD_AGG_BD_FLAGS_MASK UINT32_C(0xffc0)
622 #define RX_PROD_AGG_BD_FLAGS_SFT 6
625 * This is the length in Bytes of the host physical buffer where data
626 * for the packet may be placed in host memory.
629 * While this is a Byte resolution value, it is often advantageous to
630 * ensure that the buffers provided end on a host cache line.
634 * The opaque data field is pass through to the completion and can be
635 * used for any data that the driver wants to associate with this
636 * receive assembly buffer.
640 * This is the host physical address where data for the packet may by
641 * placed in host memory.
644 * While this is a Byte resolution value, it is often advantageous to
645 * ensure that the buffers provide start on a host cache line.
647 } __attribute__((packed));
649 /* Completion Ring Structures */
650 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
651 /* Base Completion Record (16 bytes) */
657 * This field indicates the exact type of the completion. By convention,
658 * the LSB identifies the length of the record in 16B units. Even values
659 * indicate 16B records. Odd values indicate 32B records.
661 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
662 #define CMPL_BASE_TYPE_SFT 0
663 /* TX L2 completion: Completion of TX packet. Length = 16B */
664 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
665 /* RX L2 completion: Completion of and L2 RX packet. Length = 32B */
666 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
668 * RX Aggregation Buffer completion : Completion of an L2
669 * aggregation buffer in support of TPA, HDS, or Jumbo packet
670 * completion. Length = 16B
672 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
674 * RX L2 TPA Start Completion: Completion at the beginning of a
675 * TPA operation. Length = 32B
677 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
679 * RX L2 TPA End Completion: Completion at the end of a TPA
680 * operation. Length = 32B
682 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
684 * Statistics Ejection Completion: Completion of statistics data
685 * ejection buffer. Length = 16B
687 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
688 /* HWRM Command Completion: Completion of an HWRM command. */
689 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
690 /* Forwarded HWRM Request */
691 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
692 /* Forwarded HWRM Response */
693 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
694 /* HWRM Asynchronous Event Information */
695 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
696 /* CQ Notification */
697 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
698 /* SRQ Threshold Event */
699 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
700 /* DBQ Threshold Event */
701 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
702 /* QP Async Notification */
703 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
704 /* Function Async Notification */
705 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
714 * This value is written by the NIC such that it will be different for
715 * each pass through the completion queue. The even passes will write 1.
716 * The odd passes will write 0.
718 #define CMPL_BASE_V UINT32_C(0x1)
720 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
721 #define CMPL_BASE_INFO3_SFT 1
724 } __attribute__((packed));
726 /* TX Completion Record (16 bytes) */
731 * This field indicates the exact type of the completion. By convention,
732 * the LSB identifies the length of the record in 16B units. Even values
733 * indicate 16B records. Odd values indicate 32B records.
735 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
736 #define TX_CMPL_TYPE_SFT 0
737 /* TX L2 completion: Completion of TX packet. Length = 16B */
738 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
740 * When this bit is '1', it indicates a packet that has an error of some
741 * type. Type of error is indicated in error_flags.
743 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
745 * When this bit is '1', it indicates that the packet completed was
746 * transmitted using the push acceleration data provided by the driver.
747 * When this bit is '0', it indicates that the packet had not push
748 * acceleration data written or was executed as a normal packet even
749 * though push data was provided.
751 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
752 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
753 #define TX_CMPL_FLAGS_SFT 6
755 /* unused1 is 16 b */
758 * This is a copy of the opaque field from the first TX BD of this
759 * transmitted packet.
763 * This value is written by the NIC such that it will be different for
764 * each pass through the completion queue. The even passes will write 1.
765 * The odd passes will write 0.
767 #define TX_CMPL_V UINT32_C(0x1)
769 * This error indicates that there was some sort of problem with the BDs
772 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
773 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
775 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
776 /* Bad Format: BDs were not formatted correctly. */
777 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
778 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
780 * When this bit is '1', it indicates that the length of the packet was
781 * zero. No packet was transmitted.
783 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
785 * When this bit is '1', it indicates that the packet was longer than
786 * the programmed limit in TDI. No packet was transmitted.
788 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
790 * When this bit is '1', it indicates that one or more of the BDs
791 * associated with this packet generated a PCI error. This probably
792 * means the address was not valid.
794 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
796 * When this bit is '1', it indicates that the packet was longer than
797 * indicated by the hint. No packet was transmitted.
799 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
801 * When this bit is '1', it indicates that the packet was dropped due to
802 * Poison TLP error on one or more of the TLPs in the PXP completion.
804 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
805 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
806 #define TX_CMPL_ERRORS_SFT 1
808 /* unused2 is 16 b */
810 /* unused3 is 32 b */
811 } __attribute__((packed));
813 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
818 * This field indicates the exact type of the completion. By convention,
819 * the LSB identifies the length of the record in 16B units. Even values
820 * indicate 16B records. Odd values indicate 32B records.
822 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
823 #define RX_PKT_CMPL_TYPE_SFT 0
824 /* RX L2 completion: Completion of and L2 RX packet. Length = 32B */
825 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
827 * When this bit is '1', it indicates a packet that has an error of some
828 * type. Type of error is indicated in error_flags.
830 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
831 /* This field indicates how the packet was placed in the buffer. */
832 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
833 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
834 /* Normal: Packet was placed using normal algorithm. */
835 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
836 /* Jumbo: Packet was placed using jumbo algorithm. */
837 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
839 * Header/Data Separation: Packet was placed using Header/Data
840 * separation algorithm. The separation location is indicated by
843 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
844 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
845 /* This bit is '1' if the RSS field in this completion is valid. */
846 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
849 * This value indicates what the inner packet determined for the packet
852 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
853 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
854 /* Not Known: Indicates that the packet type was not known. */
855 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
857 * IP Packet: Indicates that the packet was an IP packet, but
858 * further classification was not possible.
860 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
862 * TCP Packet: Indicates that the packet was IP and TCP. This
863 * indicates that the payload_offset field is valid.
865 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
867 * UDP Packet: Indicates that the packet was IP and UDP. This
868 * indicates that the payload_offset field is valid.
870 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
872 * FCoE Packet: Indicates that the packet was recognized as a
873 * FCoE. This also indicates that the payload_offset field is
876 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
878 * RoCE Packet: Indicates that the packet was recognized as a
879 * RoCE. This also indicates that the payload_offset field is
882 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
884 * ICMP Packet: Indicates that the packet was recognized as
885 * ICMP. This indicates that the payload_offset field is valid.
887 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
889 * PtP packet wo/timestamp: Indicates that the packet was
890 * recognized as a PtP packet.
892 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
894 * PtP packet w/timestamp: Indicates that the packet was
895 * recognized as a PtP packet and that a timestamp was taken for
898 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
899 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
900 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
901 #define RX_PKT_CMPL_FLAGS_SFT 6
904 * This is the length of the data for the packet stored in the buffer(s)
905 * identified by the opaque value. This includes the packet BD and any
906 * associated buffer BDs. This does not include the the length of any
907 * data places in aggregation BDs.
911 * This is a copy of the opaque field from the RX BD this completion
917 * This value is written by the NIC such that it will be different for
918 * each pass through the completion queue. The even passes will write 1.
919 * The odd passes will write 0.
921 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
923 * This value is the number of aggregation buffers that follow this
924 * entry in the completion ring that are a part of this packet. If the
925 * value is zero, then the packet is completely contained in the buffer
926 * space provided for the packet in the RX ring.
928 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
929 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
931 uint8_t rss_hash_type;
933 * This is the RSS hash type for the packet. The value is packed
934 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
936 uint8_t payload_offset;
938 * This value indicates the offset in bytes from the beginning of the
939 * packet where the inner payload starts. This value is valid for TCP,
940 * UDP, FCoE, and RoCE packets. A value of zero indicates that header is
941 * 256B into the packet.
947 * This value is the RSS hash value calculated for the packet based on
948 * the mode bits and key value in the VNIC.
950 } __attribute__((packed));
952 /* last 16 bytes of RX Packet Completion Record */
954 struct rx_pkt_cmpl_hi {
957 * This indicates that the ip checksum was calculated for the inner
958 * packet and that the ip_cs_error field indicates if there was an
961 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
963 * This indicates that the TCP, UDP or ICMP checksum was calculated for
964 * the inner packet and that the l4_cs_error field indicates if there
967 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
969 * This indicates that the ip checksum was calculated for the tunnel
970 * header and that the t_ip_cs_error field indicates if there was an
973 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
975 * This indicates that the UDP checksum was calculated for the tunnel
976 * packet and that the t_l4_cs_error field indicates if there was an
979 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
980 /* This value indicates what format the metadata field is. */
981 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
982 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
983 /* No metadata informtaion. Value is zero. */
984 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
986 * The metadata field contains the VLAN tag and TPID value. -
987 * metadata[11:0] contains the vlan VID value. - metadata[12]
988 * contains the vlan DE value. - metadata[15:13] contains the
989 * vlan PRI value. - metadata[31:16] contains the vlan TPID
992 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
993 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
995 * This field indicates the IP type for the inner-most IP header. A
996 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
997 * value is only valid if itype indicates a packet with an IP header.
999 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1002 * This is data from the CFA block as indicated by the meta_format
1005 /* When meta_format=1, this value is the VLAN VID. */
1006 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1007 #define RX_PKT_CMPL_METADATA_VID_SFT 0
1008 /* When meta_format=1, this value is the VLAN DE. */
1009 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
1010 /* When meta_format=1, this value is the VLAN PRI. */
1011 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1012 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
1013 /* When meta_format=1, this value is the VLAN TPID. */
1014 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1015 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
1018 * This value is written by the NIC such that it will be different for
1019 * each pass through the completion queue. The even passes will write 1.
1020 * The odd passes will write 0.
1022 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
1024 * This error indicates that there was some sort of problem with the BDs
1025 * for the packet that was found after part of the packet was already
1026 * placed. The packet should be treated as invalid.
1028 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1029 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1030 /* No buffer error */
1031 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
1033 * Did Not Fit: Packet did not fit into packet buffer provided.
1034 * For regular placement, this means the packet did not fit in
1035 * the buffer provided. For HDS and jumbo placement, this means
1036 * that the packet could not be placed into 7 physical buffers
1039 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT (UINT32_C(0x1) << 1)
1041 * Not On Chip: All BDs needed for the packet were not on-chip
1042 * when the packet arrived.
1044 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP (UINT32_C(0x2) << 1)
1045 /* Bad Format: BDs were not formatted correctly. */
1046 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT (UINT32_C(0x3) << 1)
1047 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1048 /* This indicates that there was an error in the IP header checksum. */
1049 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1051 * This indicates that there was an error in the TCP, UDP or ICMP
1054 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1056 * This indicates that there was an error in the tunnel IP header
1059 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1060 /* This indicates that there was an error in the tunnel UDP checksum. */
1061 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1063 * This indicates that there was a CRC error on either an FCoE or RoCE
1064 * packet. The itype indicates the packet type.
1066 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1068 * This indicates that there was an error in the tunnel portion of the
1069 * packet when this field is non-zero.
1071 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1072 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1074 * No additional error occurred on the tunnel portion of the
1075 * packet of the packet does not have a tunnel.
1077 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1079 * Indicates that IP header version does not match expectation
1080 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
1082 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION (UINT32_C(0x1) << 9)
1084 * Indicates that header length is out of range in the tunnel
1085 * header. Valid for IPv4.
1087 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN (UINT32_C(0x2) << 9)
1089 * Indicates that the physical packet is shorter than that
1090 * claimed by the PPPoE header length for a tunnel PPPoE packet.
1092 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR (UINT32_C(0x3) << 9)
1094 * Indicates that physical packet is shorter than that claimed
1095 * by the tunnel l3 header length. Valid for IPv4, or IPv6
1096 * tunnel packet packets.
1098 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR (UINT32_C(0x4) << 9)
1100 * Indicates that the physical packet is shorter than that
1101 * claimed by the tunnel UDP header length for a tunnel UDP
1102 * packet that is not fragmented.
1104 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR (UINT32_C(0x5) << 9)
1106 * indicates that the IPv4 TTL or IPv6 hop limit check have
1107 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1110 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL (UINT32_C(0x6) << 9)
1111 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1113 * This indicates that there was an error in the inner portion of the
1114 * packet when this field is non-zero.
1116 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1117 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1119 * No additional error occurred on the tunnel portion of the
1120 * packet of the packet does not have a tunnel.
1122 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1124 * Indicates that IP header version does not match expectation
1125 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1126 * VFT was parsed on FCoE packet.
1128 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION (UINT32_C(0x1) << 12)
1130 * indicates that header length is out of range. Valid for IPv4
1133 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN (UINT32_C(0x2) << 12)
1135 * indicates that the IPv4 TTL or IPv6 hop limit check have
1136 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1138 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1140 * Indicates that physical packet is shorter than that claimed
1141 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1144 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR (UINT32_C(0x4) << 12)
1146 * Indicates that the physical packet is shorter than that
1147 * claimed by the UDP header length for a UDP packet that is not
1150 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR (UINT32_C(0x5) << 12)
1152 * Indicates that TCP header length > IP payload. Valid for TCP
1155 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN (UINT32_C(0x6) << 12)
1156 /* Indicates that TCP header length < 5. Valid for TCP. */
1157 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL (UINT32_C(0x7) << 12)
1159 * Indicates that TCP option headers result in a TCP header size
1160 * that does not match data offset in TCP header. Valid for TCP.
1162 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN (UINT32_C(0x8) << 12)
1163 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1164 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1165 #define RX_PKT_CMPL_ERRORS_SFT 1
1168 * This field identifies the CFA action rule that was used for this
1173 * This value holds the reordering sequence number for the packet. If
1174 * the reordering sequence is not valid, then this value is zero. The
1175 * reordering domain for the packet is in the bottom 8 to 10b of the
1176 * rss_hash value. The bottom 20b of this value contain the ordering
1177 * domain value for the packet.
1179 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1180 #define RX_PKT_CMPL_REORDER_SFT 0
1181 } __attribute__((packed));
1183 /* RX L2 TPA Start Completion Record (32 bytes split to 2 16-byte struct) */
1185 struct rx_tpa_start_cmpl {
1186 uint16_t flags_type;
1188 * This field indicates the exact type of the completion. By convention,
1189 * the LSB identifies the length of the record in 16B units. Even values
1190 * indicate 16B records. Odd values indicate 32B records.
1192 #define RX_TPA_START_CMPL_TYPE_MASK UINT32_C(0x3f)
1193 #define RX_TPA_START_CMPL_TYPE_SFT 0
1195 * RX L2 TPA Start Completion: Completion at the beginning of a
1196 * TPA operation. Length = 32B
1198 #define RX_TPA_START_CMPL_TYPE_RX_TPA_START UINT32_C(0x13)
1199 /* This bit will always be '0' for TPA start completions. */
1200 #define RX_TPA_START_CMPL_FLAGS_ERROR UINT32_C(0x40)
1201 /* This field indicates how the packet was placed in the buffer. */
1202 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1203 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_SFT 7
1205 * Jumbo: TPA Packet was placed using jumbo algorithm. This
1206 * means that the first buffer will be filled with data before
1207 * moving to aggregation buffers. Each aggregation buffer will
1208 * be filled before moving to the next aggregation buffer.
1210 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1212 * Header/Data Separation: Packet was placed using Header/Data
1213 * separation algorithm. The separation location is indicated by
1216 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1218 * GRO/Jumbo: Packet will be placed using GRO/Jumbo where the
1219 * first packet is filled with data. Subsequent packets will be
1220 * placed such that any one packet does not span two aggregation
1221 * buffers unless it starts at the beginning of an aggregation
1224 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1226 * GRO/Header-Data Separation: Packet will be placed using
1227 * GRO/HDS where the header is in the first packet. Payload of
1228 * each packet will be placed such that any one packet does not
1229 * span two aggregation buffers unless it starts at the
1230 * beginning of an aggregation buffer.
1232 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1233 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_LAST RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS
1234 /* This bit is '1' if the RSS field in this completion is valid. */
1235 #define RX_TPA_START_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
1238 * This value indicates what the inner packet determined for the packet
1241 #define RX_TPA_START_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1242 #define RX_TPA_START_CMPL_FLAGS_ITYPE_SFT 12
1243 /* TCP Packet: Indicates that the packet was IP and TCP. */
1244 #define RX_TPA_START_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
1245 #define RX_TPA_START_CMPL_FLAGS_ITYPE_LAST RX_TPA_START_CMPL_FLAGS_ITYPE_TCP
1246 #define RX_TPA_START_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1247 #define RX_TPA_START_CMPL_FLAGS_SFT 6
1250 * This value indicates the amount of packet data written to the buffer
1251 * the opaque field in this completion corresponds to.
1255 * This is a copy of the opaque field from the RX BD this completion
1259 /* unused1 is 7 b */
1261 * This value is written by the NIC such that it will be different for
1262 * each pass through the completion queue. The even passes will write 1.
1263 * The odd passes will write 0.
1265 #define RX_TPA_START_CMPL_V1 UINT32_C(0x1)
1266 /* unused1 is 7 b */
1267 uint8_t rss_hash_type;
1269 * This is the RSS hash type for the packet. The value is packed
1270 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
1274 * This is the aggregation ID that the completion is associated with.
1275 * Use this number to correlate the TPA start completion with the TPA
1278 /* unused2 is 9 b */
1280 * This is the aggregation ID that the completion is associated with.
1281 * Use this number to correlate the TPA start completion with the TPA
1284 #define RX_TPA_START_CMPL_AGG_ID_MASK UINT32_C(0xfe00)
1285 #define RX_TPA_START_CMPL_AGG_ID_SFT 9
1288 * This value is the RSS hash value calculated for the packet based on
1289 * the mode bits and key value in the VNIC.
1291 } __attribute__((packed));
1293 /* last 16 bytes of RX L2 TPA Start Completion Record */
1295 struct rx_tpa_start_cmpl_hi {
1298 * This indicates that the ip checksum was calculated for the inner
1299 * packet and that the sum passed for all segments included in the
1302 #define RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
1304 * This indicates that the TCP, UDP or ICMP checksum was calculated for
1305 * the inner packet and that the sum passed for all segments included in
1308 #define RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
1310 * This indicates that the ip checksum was calculated for the tunnel
1311 * header and that the sum passed for all segments included in the
1314 #define RX_TPA_START_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1316 * This indicates that the UDP checksum was calculated for the tunnel
1317 * packet and that the sum passed for all segments included in the
1320 #define RX_TPA_START_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1321 /* This value indicates what format the metadata field is. */
1322 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1323 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
1324 /* No metadata informtaion. Value is zero. */
1325 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1327 * The metadata field contains the VLAN tag and TPID value. -
1328 * metadata[11:0] contains the vlan VID value. - metadata[12]
1329 * contains the vlan DE value. - metadata[15:13] contains the
1330 * vlan PRI value. - metadata[31:16] contains the vlan TPID
1333 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1334 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_LAST RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN
1336 * This field indicates the IP type for the inner-most IP header. A
1337 * value of '0' indicates IPv4. A value of '1' indicates IPv6.
1339 #define RX_TPA_START_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1342 * This is data from the CFA block as indicated by the meta_format
1345 /* When meta_format=1, this value is the VLAN VID. */
1346 #define RX_TPA_START_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1347 #define RX_TPA_START_CMPL_METADATA_VID_SFT 0
1348 /* When meta_format=1, this value is the VLAN DE. */
1349 #define RX_TPA_START_CMPL_METADATA_DE UINT32_C(0x1000)
1350 /* When meta_format=1, this value is the VLAN PRI. */
1351 #define RX_TPA_START_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1352 #define RX_TPA_START_CMPL_METADATA_PRI_SFT 13
1353 /* When meta_format=1, this value is the VLAN TPID. */
1354 #define RX_TPA_START_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1355 #define RX_TPA_START_CMPL_METADATA_TPID_SFT 16
1357 /* unused4 is 15 b */
1359 * This value is written by the NIC such that it will be different for
1360 * each pass through the completion queue. The even passes will write 1.
1361 * The odd passes will write 0.
1363 #define RX_TPA_START_CMPL_V2 UINT32_C(0x1)
1364 /* unused4 is 15 b */
1367 * This field identifies the CFA action rule that was used for this
1370 uint32_t inner_l4_size_inner_l3_offset_inner_l2_offset_outer_l3_offset;
1372 * This is the size in bytes of the inner most L4 header. This can be
1373 * subtracted from the payload_offset to determine the start of the
1374 * inner most L4 header.
1377 * This is the offset from the beginning of the packet in bytes for the
1378 * outer L3 header. If there is no outer L3 header, then this value is
1381 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_MASK UINT32_C(0x1ff)
1382 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_SFT 0
1384 * This is the offset from the beginning of the packet in bytes for the
1385 * inner most L2 header.
1387 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_MASK UINT32_C(0x3fe00)
1388 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_SFT 9
1390 * This is the offset from the beginning of the packet in bytes for the
1391 * inner most L3 header.
1393 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_MASK UINT32_C(0x7fc0000)
1394 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_SFT 18
1396 * This is the size in bytes of the inner most L4 header. This can be
1397 * subtracted from the payload_offset to determine the start of the
1398 * inner most L4 header.
1400 #define RX_TPA_START_CMPL_INNER_L4_SIZE_MASK UINT32_C(0xf8000000)
1401 #define RX_TPA_START_CMPL_INNER_L4_SIZE_SFT 27
1402 } __attribute__((packed));
1404 /* RX TPA End Completion Record (32 bytes split to 2 16-byte struct) */
1406 struct rx_tpa_end_cmpl {
1407 uint16_t flags_type;
1409 * This field indicates the exact type of the completion. By convention,
1410 * the LSB identifies the length of the record in 16B units. Even values
1411 * indicate 16B records. Odd values indicate 32B records.
1413 #define RX_TPA_END_CMPL_TYPE_MASK UINT32_C(0x3f)
1414 #define RX_TPA_END_CMPL_TYPE_SFT 0
1416 * RX L2 TPA End Completion: Completion at the end of a TPA
1417 * operation. Length = 32B
1419 #define RX_TPA_END_CMPL_TYPE_RX_TPA_END UINT32_C(0x15)
1421 * When this bit is '1', it indicates a packet that has an error of some
1422 * type. Type of error is indicated in error_flags.
1424 #define RX_TPA_END_CMPL_FLAGS_ERROR UINT32_C(0x40)
1425 /* This field indicates how the packet was placed in the buffer. */
1426 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1427 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_SFT 7
1429 * Jumbo: TPA Packet was placed using jumbo algorithm. This
1430 * means that the first buffer will be filled with data before
1431 * moving to aggregation buffers. Each aggregation buffer will
1432 * be filled before moving to the next aggregation buffer.
1434 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1436 * Header/Data Separation: Packet was placed using Header/Data
1437 * separation algorithm. The separation location is indicated by
1440 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1442 * GRO/Jumbo: Packet will be placed using GRO/Jumbo where the
1443 * first packet is filled with data. Subsequent packets will be
1444 * placed such that any one packet does not span two aggregation
1445 * buffers unless it starts at the beginning of an aggregation
1448 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1450 * GRO/Header-Data Separation: Packet will be placed using
1451 * GRO/HDS where the header is in the first packet. Payload of
1452 * each packet will be placed such that any one packet does not
1453 * span two aggregation buffers unless it starts at the
1454 * beginning of an aggregation buffer.
1456 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1457 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_LAST RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS
1460 * This value indicates what the inner packet determined for the packet
1461 * was. - 2 TCP Packet Indicates that the packet was IP and TCP. This
1462 * indicates that the ip_cs field is valid and that the tcp_udp_cs field
1463 * is valid and contains the TCP checksum. This also indicates that the
1464 * payload_offset field is valid.
1466 #define RX_TPA_END_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1467 #define RX_TPA_END_CMPL_FLAGS_ITYPE_SFT 12
1468 #define RX_TPA_END_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1469 #define RX_TPA_END_CMPL_FLAGS_SFT 6
1472 * This value is zero for TPA End completions. There is no data in the
1473 * buffer that corresponds to the opaque value in this completion.
1477 * This is a copy of the opaque field from the RX BD this completion
1480 uint8_t agg_bufs_v1;
1481 /* unused1 is 1 b */
1483 * This value is written by the NIC such that it will be different for
1484 * each pass through the completion queue. The even passes will write 1.
1485 * The odd passes will write 0.
1487 #define RX_TPA_END_CMPL_V1 UINT32_C(0x1)
1489 * This value is the number of aggregation buffers that follow this
1490 * entry in the completion ring that are a part of this aggregation
1491 * packet. If the value is zero, then the packet is completely contained
1492 * in the buffer space provided in the aggregation start completion.
1494 #define RX_TPA_END_CMPL_AGG_BUFS_MASK UINT32_C(0x7e)
1495 #define RX_TPA_END_CMPL_AGG_BUFS_SFT 1
1496 /* unused1 is 1 b */
1498 /* This value is the number of segments in the TPA operation. */
1499 uint8_t payload_offset;
1501 * This value indicates the offset in bytes from the beginning of the
1502 * packet where the inner payload starts. This value is valid for TCP,
1503 * UDP, FCoE, and RoCE packets. A value of zero indicates an offset of
1508 * This is the aggregation ID that the completion is associated with.
1509 * Use this number to correlate the TPA start completion with the TPA
1512 /* unused2 is 1 b */
1514 * This is the aggregation ID that the completion is associated with.
1515 * Use this number to correlate the TPA start completion with the TPA
1518 #define RX_TPA_END_CMPL_AGG_ID_MASK UINT32_C(0xfe)
1519 #define RX_TPA_END_CMPL_AGG_ID_SFT 1
1522 * For non-GRO packets, this value is the timestamp delta between
1523 * earliest and latest timestamp values for TPA packet. If packets were
1524 * not time stamped, then delta will be zero. For GRO packets, this
1525 * field is zero except for the following sub-fields. - tsdelta[31]
1526 * Timestamp present indication. When '0', no Timestamp option is in the
1527 * packet. When '1', then a Timestamp option is present in the packet.
1529 } __attribute__((packed));
1531 /* last 16 bytes of RX TPA End Completion Record */
1533 struct rx_tpa_end_cmpl_hi {
1534 uint32_t tpa_dup_acks;
1535 /* unused3 is 28 b */
1537 * This value is the number of duplicate ACKs that have been received as
1538 * part of the TPA operation.
1540 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_MASK UINT32_C(0xf)
1541 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_SFT 0
1542 /* unused3 is 28 b */
1543 uint16_t tpa_seg_len;
1545 * This value is the valid when TPA completion is active. It indicates
1546 * the length of the longest segment of the TPA operation for LRO mode
1547 * and the length of the first segment in GRO mode. This value may be
1548 * used by GRO software to re-construct the original packet stream from
1549 * the TPA packet. This is the length of all but the last segment for
1550 * GRO. In LRO mode this value may be used to indicate MSS size to the
1554 /* unused4 is 16 b */
1557 * This value is written by the NIC such that it will be different for
1558 * each pass through the completion queue. The even passes will write 1.
1559 * The odd passes will write 0.
1561 #define RX_TPA_END_CMPL_V2 UINT32_C(0x1)
1563 * This error indicates that there was some sort of problem with the BDs
1564 * for the packet that was found after part of the packet was already
1565 * placed. The packet should be treated as invalid.
1567 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1568 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1570 * This error occurs when there is a fatal HW problem in the
1571 * chip only. It indicates that there were not BDs on chip but
1572 * that there was adequate reservation. provided by the TPA
1575 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP (UINT32_C(0x2) << 1)
1577 * This error occurs when TPA block was not configured to
1578 * reserve adequate BDs for TPA operations on this RX ring. All
1579 * data for the TPA operation was not placed. This error can
1580 * also be generated when the number of segments is not
1581 * programmed correctly in TPA and the 33 total aggregation
1582 * buffers allowed for the TPA operation has been exceeded.
1584 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR (UINT32_C(0x4) << 1)
1585 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_LAST RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR
1586 #define RX_TPA_END_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1587 #define RX_TPA_END_CMPL_ERRORS_SFT 1
1589 /* unused5 is 16 b */
1590 uint32_t start_opaque;
1592 * This is the opaque value that was completed for the TPA start
1593 * completion that corresponds to this TPA end completion.
1595 } __attribute__((packed));
1597 /* RX Aggregation Buffer Completion Record (16 bytes) */
1599 struct rx_abuf_cmpl {
1601 /* unused is 10 b */
1603 * This field indicates the exact type of the completion. By convention,
1604 * the LSB identifies the length of the record in 16B units. Even values
1605 * indicate 16B records. Odd values indicate 32B records.
1607 #define RX_ABUF_CMPL_TYPE_MASK UINT32_C(0x3f)
1608 #define RX_ABUF_CMPL_TYPE_SFT 0
1610 * RX Aggregation Buffer completion : Completion of an L2
1611 * aggregation buffer in support of TPA, HDS, or Jumbo packet
1612 * completion. Length = 16B
1614 #define RX_ABUF_CMPL_TYPE_RX_AGG UINT32_C(0x12)
1615 /* unused is 10 b */
1618 * This is the length of the data for the packet stored in this
1619 * aggregation buffer identified by the opaque value. This does not
1620 * include the length of any data placed in other aggregation BDs or in
1621 * the packet or buffer BDs. This length does not include any space
1622 * added due to hdr_offset register during HDS placement mode.
1626 * This is a copy of the opaque field from the RX BD this aggregation
1627 * buffer corresponds to.
1630 /* unused2 is 31 b */
1632 * This value is written by the NIC such that it will be different for
1633 * each pass through the completion queue. The even passes will write 1.
1634 * The odd passes will write 0.
1636 #define RX_ABUF_CMPL_V UINT32_C(0x1)
1637 /* unused2 is 31 b */
1639 /* unused3 is 32 b */
1640 } __attribute__((packed));
1642 /* Statistics Ejection Buffer Completion Record (16 bytes) */
1646 /* unused is 10 b */
1648 * This field indicates the exact type of the completion. By convention,
1649 * the LSB identifies the length of the record in 16B units. Even values
1650 * indicate 16B records. Odd values indicate 32B records.
1652 #define EJECT_CMPL_TYPE_MASK UINT32_C(0x3f)
1653 #define EJECT_CMPL_TYPE_SFT 0
1655 * Statistics Ejection Completion: Completion of statistics data
1656 * ejection buffer. Length = 16B
1658 #define EJECT_CMPL_TYPE_STAT_EJECT UINT32_C(0x1a)
1659 /* unused is 10 b */
1661 /* This is the length of the statistics data stored in this buffer. */
1664 * This is a copy of the opaque field from the RX BD this ejection
1665 * buffer corresponds to.
1668 /* unused2 is 31 b */
1670 * This value is written by the NIC such that it will be different for
1671 * each pass through the completion queue. The even passes will write 1.
1672 * The odd passes will write 0.
1674 #define EJECT_CMPL_V UINT32_C(0x1)
1675 /* unused2 is 31 b */
1677 /* unused3 is 32 b */
1678 } __attribute__((packed));
1680 /* HWRM Completion Record (16 bytes) */
1684 /* unused is 10 b */
1686 * This field indicates the exact type of the completion. By convention,
1687 * the LSB identifies the length of the record in 16B units. Even values
1688 * indicate 16B records. Odd values indicate 32B records.
1690 #define HWRM_CMPL_TYPE_MASK UINT32_C(0x3f)
1691 #define HWRM_CMPL_TYPE_SFT 0
1692 /* HWRM Command Completion: Completion of an HWRM command. */
1693 #define HWRM_CMPL_TYPE_HWRM_DONE UINT32_C(0x20)
1694 /* unused is 10 b */
1695 uint16_t sequence_id;
1696 /* This is the sequence_id of the HWRM command that has completed. */
1698 /* unused2 is 32 b */
1700 /* unused3 is 31 b */
1702 * This value is written by the NIC such that it will be different for
1703 * each pass through the completion queue. The even passes will write 1.
1704 * The odd passes will write 0.
1706 #define HWRM_CMPL_V UINT32_C(0x1)
1707 /* unused3 is 31 b */
1709 /* unused4 is 32 b */
1710 } __attribute__((packed));
1712 /* HWRM Forwarded Request (16 bytes) */
1714 struct hwrm_fwd_req_cmpl {
1715 uint16_t req_len_type;
1716 /* Length of forwarded request in bytes. */
1718 * This field indicates the exact type of the completion. By convention,
1719 * the LSB identifies the length of the record in 16B units. Even values
1720 * indicate 16B records. Odd values indicate 32B records.
1722 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1723 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1724 /* Forwarded HWRM Request */
1725 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
1726 /* Length of forwarded request in bytes. */
1727 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1728 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1731 * Source ID of this request. Typically used in forwarding requests and
1732 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1733 * Reserved for internal processors 0xFFFF - HWRM
1736 /* unused1 is 32 b */
1737 uint64_t req_buf_addr_v;
1738 /* Address of forwarded request. */
1740 * This value is written by the NIC such that it will be different for
1741 * each pass through the completion queue. The even passes will write 1.
1742 * The odd passes will write 0.
1744 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1745 /* Address of forwarded request. */
1746 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1747 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1748 } __attribute__((packed));
1750 /* HWRM Forwarded Response (16 bytes) */
1752 struct hwrm_fwd_resp_cmpl {
1754 /* unused1 is 10 b */
1756 * This field indicates the exact type of the completion. By convention,
1757 * the LSB identifies the length of the record in 16B units. Even values
1758 * indicate 16B records. Odd values indicate 32B records.
1760 #define HWRM_FWD_RESP_CMPL_TYPE_MASK UINT32_C(0x3f)
1761 #define HWRM_FWD_RESP_CMPL_TYPE_SFT 0
1762 /* Forwarded HWRM Response */
1763 #define HWRM_FWD_RESP_CMPL_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
1764 /* unused1 is 10 b */
1767 * Source ID of this response. Typically used in forwarding requests and
1768 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1769 * Reserved for internal processors 0xFFFF - HWRM
1772 /* Length of forwarded response in bytes. */
1774 /* unused2 is 16 b */
1775 uint64_t resp_buf_addr_v;
1776 /* Address of forwarded response. */
1778 * This value is written by the NIC such that it will be different for
1779 * each pass through the completion queue. The even passes will write 1.
1780 * The odd passes will write 0.
1782 #define HWRM_FWD_RESP_CMPL_V UINT32_C(0x1)
1783 /* Address of forwarded response. */
1784 #define HWRM_FWD_RESP_CMPL_RESP_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1785 #define HWRM_FWD_RESP_CMPL_RESP_BUF_ADDR_SFT 1
1786 } __attribute__((packed));
1788 #define GET_EVENT_ID(x) \
1789 ((x) == 0x30 ? "VF_FLR": \
1790 ((x) == 0x20 ? "PF_DRVR_UNLOAD": \
1791 ((x) == 0x10 ? "FUNC_DRVR_UNLOAD": \
1792 ((x) == 0xff ? "HWRM_ERROR": \
1793 ((x) == 0x32 ? "PF_VF_COMM_STATUS_CHANGE": \
1794 ((x) == 0x33 ? "VF_CFG_CHANGE": \
1795 ((x) == 0x11 ? "FUNC_DRVR_LOAD": \
1796 ((x) == 0x31 ? "VF_MAC_ADDR_CHANGE": \
1797 ((x) == 0x4 ? "PORT_CONN_NOT_ALLOWED": \
1798 ((x) == 0x5 ? "LINK_SPEED_CFG_NOT_ALLOWED": \
1799 ((x) == 0x6 ? "LINK_SPEED_CFG_CHANGE": \
1800 ((x) == 0x7 ? "PORT_PHY_CFG_CHANGE": \
1801 ((x) == 0x0 ? "LINK_STATUS_CHANGE": \
1802 ((x) == 0x1 ? "LINK_MTU_CHANGE": \
1803 ((x) == 0x2 ? "LINK_SPEED_CHANGE": \
1804 ((x) == 0x3 ? "DCB_CONFIG_CHANGE": \
1805 ((x) == 0x12 ? "FUNC_FLR_PROC_CMPLT": \
1806 ((x) == 0x21 ? "PF_DRVR_LOAD": \
1807 "Unknown event_id"))))))))))))))))))
1809 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1811 struct hwrm_async_event_cmpl {
1813 /* unused1 is 10 b */
1815 * This field indicates the exact type of the completion. By convention,
1816 * the LSB identifies the length of the record in 16B units. Even values
1817 * indicate 16B records. Odd values indicate 32B records.
1819 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1820 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1821 /* HWRM Asynchronous Event Information */
1822 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1823 /* unused1 is 10 b */
1825 /* Identifiers of events. */
1826 /* Link status changed */
1827 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1828 /* Link MTU changed */
1829 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1830 /* Link speed changed */
1831 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1832 /* DCB Configuration changed */
1833 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1834 /* Port connection not allowed */
1835 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1836 /* Link speed configuration was not allowed */
1837 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED UINT32_C(0x5)
1838 /* Link speed configuration change */
1839 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1840 /* Port PHY configuration change */
1841 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1842 /* Function driver unloaded */
1843 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1844 /* Function driver loaded */
1845 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1846 /* Function FLR related processing has completed */
1847 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1848 /* PF driver unloaded */
1849 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1850 /* PF driver loaded */
1851 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1852 /* VF Function Level Reset (FLR) */
1853 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1854 /* VF MAC Address Change */
1855 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1856 /* PF-VF communication channel status change. */
1857 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE UINT32_C(0x32)
1858 /* VF Configuration Change */
1859 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1861 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1862 uint32_t event_data2;
1863 /* Event specific data */
1867 * This value is written by the NIC such that it will be different for
1868 * each pass through the completion queue. The even passes will write 1.
1869 * The odd passes will write 0.
1871 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1873 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1874 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1875 uint8_t timestamp_lo;
1876 /* 8-lsb timestamp from POR (100-msec resolution) */
1877 uint16_t timestamp_hi;
1878 /* 16-lsb timestamp from POR (100-msec resolution) */
1879 uint32_t event_data1;
1880 /* Event specific data */
1881 } __attribute__((packed));
1883 /* HWRM Asynchronous Event Completion Record for link status change (16 bytes) */
1885 struct hwrm_async_event_cmpl_link_status_change {
1887 /* unused1 is 10 b */
1889 * This field indicates the exact type of the completion. By convention,
1890 * the LSB identifies the length of the record in 16B units. Even values
1891 * indicate 16B records. Odd values indicate 32B records.
1893 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_MASK UINT32_C(0x3f)
1894 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_SFT 0
1895 /* HWRM Asynchronous Event Information */
1896 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1897 /* unused1 is 10 b */
1899 /* Identifiers of events. */
1900 /* Link status changed */
1901 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1902 uint32_t event_data2;
1903 /* Event specific data */
1907 * This value is written by the NIC such that it will be different for
1908 * each pass through the completion queue. The even passes will write 1.
1909 * The odd passes will write 0.
1911 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_V UINT32_C(0x1)
1913 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
1914 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_OPAQUE_SFT 1
1915 uint8_t timestamp_lo;
1916 /* 8-lsb timestamp from POR (100-msec resolution) */
1917 uint16_t timestamp_hi;
1918 /* 16-lsb timestamp from POR (100-msec resolution) */
1919 uint32_t event_data1;
1920 /* Event specific data */
1921 /* Indicates link status change */
1922 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE UINT32_C(0x1)
1924 * If this bit set to 0, then it indicates that the link was up
1927 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_DOWN (UINT32_C(0x0) << 0)
1929 * If this bit is set to 1, then it indicates that the link was
1930 * down and it went up.
1932 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_UP (UINT32_C(0x1) << 0)
1933 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_LAST HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_UP
1934 /* Indicates the physical port this link status change occur */
1935 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_MASK UINT32_C(0xe)
1936 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_SFT 1
1938 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff0)
1939 #define HWRM_ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_ID_SFT 4
1940 } __attribute__((packed));
1942 /* HWRM Asynchronous Event Completion Record for link MTU change (16 bytes) */
1944 struct hwrm_async_event_cmpl_link_mtu_change {
1946 /* unused1 is 10 b */
1948 * This field indicates the exact type of the completion. By convention,
1949 * the LSB identifies the length of the record in 16B units. Even values
1950 * indicate 16B records. Odd values indicate 32B records.
1952 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_TYPE_MASK UINT32_C(0x3f)
1953 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_TYPE_SFT 0
1954 /* HWRM Asynchronous Event Information */
1955 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1956 /* unused1 is 10 b */
1958 /* Identifiers of events. */
1959 /* Link MTU changed */
1960 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1961 uint32_t event_data2;
1962 /* Event specific data */
1966 * This value is written by the NIC such that it will be different for
1967 * each pass through the completion queue. The even passes will write 1.
1968 * The odd passes will write 0.
1970 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_V UINT32_C(0x1)
1972 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
1973 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_OPAQUE_SFT 1
1974 uint8_t timestamp_lo;
1975 /* 8-lsb timestamp from POR (100-msec resolution) */
1976 uint16_t timestamp_hi;
1977 /* 16-lsb timestamp from POR (100-msec resolution) */
1978 uint32_t event_data1;
1979 /* Event specific data */
1980 /* The new MTU of the link in bytes. */
1981 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_EVENT_DATA1_NEW_MTU_MASK UINT32_C(0xffff)
1982 #define HWRM_ASYNC_EVENT_CMPL_LINK_MTU_CHANGE_EVENT_DATA1_NEW_MTU_SFT 0
1983 } __attribute__((packed));
1985 /* HWRM Asynchronous Event Completion Record for link speed change (16 bytes) */
1987 struct hwrm_async_event_cmpl_link_speed_change {
1989 /* unused1 is 10 b */
1991 * This field indicates the exact type of the completion. By convention,
1992 * the LSB identifies the length of the record in 16B units. Even values
1993 * indicate 16B records. Odd values indicate 32B records.
1995 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_TYPE_MASK UINT32_C(0x3f)
1996 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_TYPE_SFT 0
1997 /* HWRM Asynchronous Event Information */
1998 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1999 /* unused1 is 10 b */
2001 /* Identifiers of events. */
2002 /* Link speed changed */
2003 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
2004 uint32_t event_data2;
2005 /* Event specific data */
2009 * This value is written by the NIC such that it will be different for
2010 * each pass through the completion queue. The even passes will write 1.
2011 * The odd passes will write 0.
2013 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_V UINT32_C(0x1)
2015 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2016 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_OPAQUE_SFT 1
2017 uint8_t timestamp_lo;
2018 /* 8-lsb timestamp from POR (100-msec resolution) */
2019 uint16_t timestamp_hi;
2020 /* 16-lsb timestamp from POR (100-msec resolution) */
2021 uint32_t event_data1;
2022 /* Event specific data */
2024 * When this bit is '1', the link was forced to the force_link_speed
2027 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_FORCE UINT32_C(0x1)
2028 /* The new link speed in 100 Mbps units. */
2029 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_MASK UINT32_C(0xfffe)
2030 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_SFT 1
2031 /* 100Mb link speed */
2032 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_100MB (UINT32_C(0x1) << 1)
2033 /* 1Gb link speed */
2034 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_1GB (UINT32_C(0xa) << 1)
2035 /* 2Gb link speed */
2036 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_2GB (UINT32_C(0x14) << 1)
2037 /* 2.5Gb link speed */
2038 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_2_5GB (UINT32_C(0x19) << 1)
2039 /* 10Gb link speed */
2040 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_10GB (UINT32_C(0x64) << 1)
2041 /* 20Mb link speed */
2042 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_20GB (UINT32_C(0xc8) << 1)
2043 /* 25Gb link speed */
2044 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_25GB (UINT32_C(0xfa) << 1)
2045 /* 40Gb link speed */
2046 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_40GB (UINT32_C(0x190) << 1)
2047 /* 50Gb link speed */
2048 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_50GB (UINT32_C(0x1f4) << 1)
2049 /* 100Gb link speed */
2050 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_100GB (UINT32_C(0x3e8) << 1)
2051 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_LAST HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_NEW_LINK_SPEED_100MBPS_100GB
2053 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff0000)
2054 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CHANGE_EVENT_DATA1_PORT_ID_SFT 16
2055 } __attribute__((packed));
2057 /* HWRM Asynchronous Event Completion Record for DCB Config change (16 bytes) */
2059 struct hwrm_async_event_cmpl_dcb_config_change {
2061 /* unused1 is 10 b */
2063 * This field indicates the exact type of the completion. By convention,
2064 * the LSB identifies the length of the record in 16B units. Even values
2065 * indicate 16B records. Odd values indicate 32B records.
2067 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_TYPE_MASK UINT32_C(0x3f)
2068 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_TYPE_SFT 0
2069 /* HWRM Asynchronous Event Information */
2070 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2071 /* unused1 is 10 b */
2073 /* Identifiers of events. */
2074 /* DCB Configuration changed */
2075 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
2076 uint32_t event_data2;
2077 /* Event specific data */
2081 * This value is written by the NIC such that it will be different for
2082 * each pass through the completion queue. The even passes will write 1.
2083 * The odd passes will write 0.
2085 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_V UINT32_C(0x1)
2087 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2088 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_OPAQUE_SFT 1
2089 uint8_t timestamp_lo;
2090 /* 8-lsb timestamp from POR (100-msec resolution) */
2091 uint16_t timestamp_hi;
2092 /* 16-lsb timestamp from POR (100-msec resolution) */
2093 uint32_t event_data1;
2094 /* Event specific data */
2096 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff)
2097 #define HWRM_ASYNC_EVENT_CMPL_DCB_CONFIG_CHANGE_EVENT_DATA1_PORT_ID_SFT 0
2098 } __attribute__((packed));
2100 /* HWRM Asynchronous Event Completion Record for port connection not allowed (16 bytes) */
2102 struct hwrm_async_event_cmpl_port_conn_not_allowed {
2104 /* unused1 is 10 b */
2106 * This field indicates the exact type of the completion. By convention,
2107 * the LSB identifies the length of the record in 16B units. Even values
2108 * indicate 16B records. Odd values indicate 32B records.
2110 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_MASK UINT32_C(0x3f)
2111 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_SFT 0
2112 /* HWRM Asynchronous Event Information */
2113 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2114 /* unused1 is 10 b */
2116 /* Identifiers of events. */
2117 /* Port connection not allowed */
2118 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
2119 uint32_t event_data2;
2120 /* Event specific data */
2124 * This value is written by the NIC such that it will be different for
2125 * each pass through the completion queue. The even passes will write 1.
2126 * The odd passes will write 0.
2128 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_V UINT32_C(0x1)
2130 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_OPAQUE_MASK UINT32_C(0xfe)
2131 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_OPAQUE_SFT 1
2132 uint8_t timestamp_lo;
2133 /* 8-lsb timestamp from POR (100-msec resolution) */
2134 uint16_t timestamp_hi;
2135 /* 16-lsb timestamp from POR (100-msec resolution) */
2136 uint32_t event_data1;
2137 /* Event specific data */
2139 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff)
2140 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_PORT_ID_SFT 0
2142 * This value indicates the current port level enforcement policy for
2143 * the optics module when there is an optical module mismatch and port
2146 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_MASK UINT32_C(0xff0000)
2147 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_SFT 16
2148 /* No enforcement */
2149 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_NONE (UINT32_C(0x0) << 16)
2150 /* Disable Transmit side Laser. */
2151 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_DISABLETX (UINT32_C(0x1) << 16)
2152 /* Raise a warning message. */
2153 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_WARNINGMSG (UINT32_C(0x2) << 16)
2154 /* Power down the module. */
2155 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_PWRDOWN (UINT32_C(0x3) << 16)
2156 #define HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_LAST HWRM_ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_PWRDOWN
2157 } __attribute__((packed));
2159 /* HWRM Asynchronous Event Completion Record for link speed config not allowed (16 bytes) */
2161 struct hwrm_async_event_cmpl_link_speed_cfg_not_allowed {
2163 /* unused1 is 10 b */
2165 * This field indicates the exact type of the completion. By convention,
2166 * the LSB identifies the length of the record in 16B units. Even values
2167 * indicate 16B records. Odd values indicate 32B records.
2169 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_TYPE_MASK UINT32_C(0x3f)
2170 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_TYPE_SFT 0
2171 /* HWRM Asynchronous Event Information */
2172 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2173 /* unused1 is 10 b */
2175 /* Identifiers of events. */
2176 /* Link speed configuration was not allowed */
2177 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED UINT32_C(0x5)
2178 uint32_t event_data2;
2179 /* Event specific data */
2183 * This value is written by the NIC such that it will be different for
2184 * each pass through the completion queue. The even passes will write 1.
2185 * The odd passes will write 0.
2187 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_V UINT32_C(0x1)
2189 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_OPAQUE_MASK UINT32_C(0xfe)
2190 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_OPAQUE_SFT 1
2191 uint8_t timestamp_lo;
2192 /* 8-lsb timestamp from POR (100-msec resolution) */
2193 uint16_t timestamp_hi;
2194 /* 16-lsb timestamp from POR (100-msec resolution) */
2195 uint32_t event_data1;
2196 /* Event specific data */
2198 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff)
2199 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_NOT_ALLOWED_EVENT_DATA1_PORT_ID_SFT 0
2200 } __attribute__((packed));
2202 /* HWRM Asynchronous Event Completion Record for link speed configuration change (16 bytes) */
2204 struct hwrm_async_event_cmpl_link_speed_cfg_change {
2206 /* unused1 is 10 b */
2208 * This field indicates the exact type of the completion. By convention,
2209 * the LSB identifies the length of the record in 16B units. Even values
2210 * indicate 16B records. Odd values indicate 32B records.
2212 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_MASK UINT32_C(0x3f)
2213 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_SFT 0
2214 /* HWRM Asynchronous Event Information */
2215 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2216 /* unused1 is 10 b */
2218 /* Identifiers of events. */
2219 /* Link speed configuration change */
2220 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
2221 uint32_t event_data2;
2222 /* Event specific data */
2226 * This value is written by the NIC such that it will be different for
2227 * each pass through the completion queue. The even passes will write 1.
2228 * The odd passes will write 0.
2230 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_V UINT32_C(0x1)
2232 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2233 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_OPAQUE_SFT 1
2234 uint8_t timestamp_lo;
2235 /* 8-lsb timestamp from POR (100-msec resolution) */
2236 uint16_t timestamp_hi;
2237 /* 16-lsb timestamp from POR (100-msec resolution) */
2238 uint32_t event_data1;
2239 /* Event specific data */
2241 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff)
2242 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_PORT_ID_SFT 0
2244 * If set to 1, it indicates that the supported link speeds
2245 * configuration on the port has changed. If set to 0, then there is no
2246 * change in supported link speeds configuration.
2248 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_SUPPORTED_LINK_SPEEDS_CHANGE UINT32_C(0x10000)
2250 * If set to 1, it indicates that the link speed configuration on the
2251 * port has become illegal or invalid. If set to 0, then the link speed
2252 * configuration on the port is legal or valid.
2254 #define HWRM_ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_ILLEGAL_LINK_SPEED_CFG UINT32_C(0x20000)
2255 } __attribute__((packed));
2257 /* HWRM Asynchronous Event Completion Record for port PHY configuration change (16 bytes) */
2259 struct hwrm_async_event_cmpl_port_phy_cfg_change {
2261 /* unused1 is 10 b */
2263 * This field indicates the exact type of the completion. By convention,
2264 * the LSB identifies the length of the record in 16B units. Even values
2265 * indicate 16B records. Odd values indicate 32B records.
2267 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_TYPE_MASK UINT32_C(0x3f)
2268 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_TYPE_SFT 0
2269 /* HWRM Asynchronous Event Information */
2270 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2271 /* unused1 is 10 b */
2273 /* Identifiers of events. */
2274 /* Port PHY configuration change */
2275 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
2276 uint32_t event_data2;
2277 /* Event specific data */
2281 * This value is written by the NIC such that it will be different for
2282 * each pass through the completion queue. The even passes will write 1.
2283 * The odd passes will write 0.
2285 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_V UINT32_C(0x1)
2287 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2288 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_OPAQUE_SFT 1
2289 uint8_t timestamp_lo;
2290 /* 8-lsb timestamp from POR (100-msec resolution) */
2291 uint16_t timestamp_hi;
2292 /* 16-lsb timestamp from POR (100-msec resolution) */
2293 uint32_t event_data1;
2294 /* Event specific data */
2296 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_EVENT_DATA1_PORT_ID_MASK UINT32_C(0xffff)
2297 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_EVENT_DATA1_PORT_ID_SFT 0
2299 * If set to 1, it indicates that the FEC configuration on the port has
2300 * changed. If set to 0, then there is no change in FEC configuration.
2302 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_EVENT_DATA1_FEC_CFG_CHANGE UINT32_C(0x10000)
2304 * If set to 1, it indicates that the EEE configuration on the port has
2305 * changed. If set to 0, then there is no change in EEE configuration on
2308 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_EVENT_DATA1_EEE_CFG_CHANGE UINT32_C(0x20000)
2310 * If set to 1, it indicates that the pause configuration on the PHY has
2311 * changed. If set to 0, then there is no change in the pause
2312 * configuration on the PHY.
2314 #define HWRM_ASYNC_EVENT_CMPL_PORT_PHY_CFG_CHANGE_EVENT_DATA1_PAUSE_CFG_CHANGE UINT32_C(0x40000)
2315 } __attribute__((packed));
2317 /* HWRM Asynchronous Event Completion Record for Function Driver Unload (16 bytes) */
2319 struct hwrm_async_event_cmpl_func_drvr_unload {
2321 /* unused1 is 10 b */
2323 * This field indicates the exact type of the completion. By convention,
2324 * the LSB identifies the length of the record in 16B units. Even values
2325 * indicate 16B records. Odd values indicate 32B records.
2327 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_TYPE_MASK UINT32_C(0x3f)
2328 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_TYPE_SFT 0
2329 /* HWRM Asynchronous Event Information */
2330 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2331 /* unused1 is 10 b */
2333 /* Identifiers of events. */
2334 /* Function driver unloaded */
2335 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
2336 uint32_t event_data2;
2337 /* Event specific data */
2341 * This value is written by the NIC such that it will be different for
2342 * each pass through the completion queue. The even passes will write 1.
2343 * The odd passes will write 0.
2345 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_V UINT32_C(0x1)
2347 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_OPAQUE_MASK UINT32_C(0xfe)
2348 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_OPAQUE_SFT 1
2349 uint8_t timestamp_lo;
2350 /* 8-lsb timestamp from POR (100-msec resolution) */
2351 uint16_t timestamp_hi;
2352 /* 16-lsb timestamp from POR (100-msec resolution) */
2353 uint32_t event_data1;
2354 /* Event specific data */
2356 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_EVENT_DATA1_FUNC_ID_MASK UINT32_C(0xffff)
2357 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_UNLOAD_EVENT_DATA1_FUNC_ID_SFT 0
2358 } __attribute__((packed));
2360 /* HWRM Asynchronous Event Completion Record for Function Driver load (16 bytes) */
2362 struct hwrm_async_event_cmpl_func_drvr_load {
2364 /* unused1 is 10 b */
2366 * This field indicates the exact type of the completion. By convention,
2367 * the LSB identifies the length of the record in 16B units. Even values
2368 * indicate 16B records. Odd values indicate 32B records.
2370 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_TYPE_MASK UINT32_C(0x3f)
2371 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_TYPE_SFT 0
2372 /* HWRM Asynchronous Event Information */
2373 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2374 /* unused1 is 10 b */
2376 /* Identifiers of events. */
2377 /* Function driver loaded */
2378 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
2379 uint32_t event_data2;
2380 /* Event specific data */
2384 * This value is written by the NIC such that it will be different for
2385 * each pass through the completion queue. The even passes will write 1.
2386 * The odd passes will write 0.
2388 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_V UINT32_C(0x1)
2390 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_OPAQUE_MASK UINT32_C(0xfe)
2391 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_OPAQUE_SFT 1
2392 uint8_t timestamp_lo;
2393 /* 8-lsb timestamp from POR (100-msec resolution) */
2394 uint16_t timestamp_hi;
2395 /* 16-lsb timestamp from POR (100-msec resolution) */
2396 uint32_t event_data1;
2397 /* Event specific data */
2399 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_EVENT_DATA1_FUNC_ID_MASK UINT32_C(0xffff)
2400 #define HWRM_ASYNC_EVENT_CMPL_FUNC_DRVR_LOAD_EVENT_DATA1_FUNC_ID_SFT 0
2401 } __attribute__((packed));
2403 /* HWRM Asynchronous Event Completion Record to indicate completion of FLR related processing (16 bytes) */
2405 struct hwrm_async_event_cmpl_func_flr_proc_cmplt {
2407 /* unused1 is 10 b */
2409 * This field indicates the exact type of the completion. By convention,
2410 * the LSB identifies the length of the record in 16B units. Even values
2411 * indicate 16B records. Odd values indicate 32B records.
2413 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_TYPE_MASK UINT32_C(0x3f)
2414 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_TYPE_SFT 0
2415 /* HWRM Asynchronous Event Information */
2416 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2417 /* unused1 is 10 b */
2419 /* Identifiers of events. */
2420 /* Function FLR related processing has completed */
2421 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
2422 uint32_t event_data2;
2423 /* Event specific data */
2427 * This value is written by the NIC such that it will be different for
2428 * each pass through the completion queue. The even passes will write 1.
2429 * The odd passes will write 0.
2431 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_V UINT32_C(0x1)
2433 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_OPAQUE_MASK UINT32_C(0xfe)
2434 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_OPAQUE_SFT 1
2435 uint8_t timestamp_lo;
2436 /* 8-lsb timestamp from POR (100-msec resolution) */
2437 uint16_t timestamp_hi;
2438 /* 16-lsb timestamp from POR (100-msec resolution) */
2439 uint32_t event_data1;
2440 /* Event specific data */
2442 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_EVENT_DATA1_FUNC_ID_MASK UINT32_C(0xffff)
2443 #define HWRM_ASYNC_EVENT_CMPL_FUNC_FLR_PROC_CMPLT_EVENT_DATA1_FUNC_ID_SFT 0
2444 } __attribute__((packed));
2446 /* HWRM Asynchronous Event Completion Record for PF Driver Unload (16 bytes) */
2448 struct hwrm_async_event_cmpl_pf_drvr_unload {
2450 /* unused1 is 10 b */
2452 * This field indicates the exact type of the completion. By convention,
2453 * the LSB identifies the length of the record in 16B units. Even values
2454 * indicate 16B records. Odd values indicate 32B records.
2456 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_TYPE_MASK UINT32_C(0x3f)
2457 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_TYPE_SFT 0
2458 /* HWRM Asynchronous Event Information */
2459 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2460 /* unused1 is 10 b */
2462 /* Identifiers of events. */
2463 /* PF driver unloaded */
2464 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
2465 uint32_t event_data2;
2466 /* Event specific data */
2470 * This value is written by the NIC such that it will be different for
2471 * each pass through the completion queue. The even passes will write 1.
2472 * The odd passes will write 0.
2474 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_V UINT32_C(0x1)
2476 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_OPAQUE_MASK UINT32_C(0xfe)
2477 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_OPAQUE_SFT 1
2478 uint8_t timestamp_lo;
2479 /* 8-lsb timestamp from POR (100-msec resolution) */
2480 uint16_t timestamp_hi;
2481 /* 16-lsb timestamp from POR (100-msec resolution) */
2482 uint32_t event_data1;
2483 /* Event specific data */
2485 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_EVENT_DATA1_FUNC_ID_MASK UINT32_C(0xffff)
2486 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_EVENT_DATA1_FUNC_ID_SFT 0
2487 /* Indicates the physical port this pf belongs to */
2488 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_EVENT_DATA1_PORT_MASK UINT32_C(0x70000)
2489 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_UNLOAD_EVENT_DATA1_PORT_SFT 16
2490 } __attribute__((packed));
2492 /* HWRM Asynchronous Event Completion Record for PF Driver load (16 bytes) */
2494 struct hwrm_async_event_cmpl_pf_drvr_load {
2496 /* unused1 is 10 b */
2498 * This field indicates the exact type of the completion. By convention,
2499 * the LSB identifies the length of the record in 16B units. Even values
2500 * indicate 16B records. Odd values indicate 32B records.
2502 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_TYPE_MASK UINT32_C(0x3f)
2503 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_TYPE_SFT 0
2504 /* HWRM Asynchronous Event Information */
2505 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2506 /* unused1 is 10 b */
2508 /* Identifiers of events. */
2509 /* PF driver loaded */
2510 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
2511 uint32_t event_data2;
2512 /* Event specific data */
2516 * This value is written by the NIC such that it will be different for
2517 * each pass through the completion queue. The even passes will write 1.
2518 * The odd passes will write 0.
2520 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_V UINT32_C(0x1)
2522 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_OPAQUE_MASK UINT32_C(0xfe)
2523 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_OPAQUE_SFT 1
2524 uint8_t timestamp_lo;
2525 /* 8-lsb timestamp from POR (100-msec resolution) */
2526 uint16_t timestamp_hi;
2527 /* 16-lsb timestamp from POR (100-msec resolution) */
2528 uint32_t event_data1;
2529 /* Event specific data */
2531 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_EVENT_DATA1_FUNC_ID_MASK UINT32_C(0xffff)
2532 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_EVENT_DATA1_FUNC_ID_SFT 0
2533 /* Indicates the physical port this pf belongs to */
2534 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_EVENT_DATA1_PORT_MASK UINT32_C(0x70000)
2535 #define HWRM_ASYNC_EVENT_CMPL_PF_DRVR_LOAD_EVENT_DATA1_PORT_SFT 16
2536 } __attribute__((packed));
2538 /* HWRM Asynchronous Event Completion Record for VF FLR (16 bytes) */
2540 struct hwrm_async_event_cmpl_vf_flr {
2542 /* unused1 is 10 b */
2544 * This field indicates the exact type of the completion. By convention,
2545 * the LSB identifies the length of the record in 16B units. Even values
2546 * indicate 16B records. Odd values indicate 32B records.
2548 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_TYPE_MASK UINT32_C(0x3f)
2549 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_TYPE_SFT 0
2550 /* HWRM Asynchronous Event Information */
2551 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2552 /* unused1 is 10 b */
2554 /* Identifiers of events. */
2555 /* VF Function Level Reset (FLR) */
2556 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_EVENT_ID_VF_FLR UINT32_C(0x30)
2557 uint32_t event_data2;
2558 /* Event specific data */
2562 * This value is written by the NIC such that it will be different for
2563 * each pass through the completion queue. The even passes will write 1.
2564 * The odd passes will write 0.
2566 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_V UINT32_C(0x1)
2568 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_OPAQUE_MASK UINT32_C(0xfe)
2569 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_OPAQUE_SFT 1
2570 uint8_t timestamp_lo;
2571 /* 8-lsb timestamp from POR (100-msec resolution) */
2572 uint16_t timestamp_hi;
2573 /* 16-lsb timestamp from POR (100-msec resolution) */
2574 uint32_t event_data1;
2575 /* Event specific data */
2577 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_EVENT_DATA1_VF_ID_MASK UINT32_C(0xffff)
2578 #define HWRM_ASYNC_EVENT_CMPL_VF_FLR_EVENT_DATA1_VF_ID_SFT 0
2579 } __attribute__((packed));
2581 /* HWRM Asynchronous Event Completion Record for VF MAC Addr change (16 bytes) */
2583 struct hwrm_async_event_cmpl_vf_mac_addr_change {
2585 /* unused1 is 10 b */
2587 * This field indicates the exact type of the completion. By convention,
2588 * the LSB identifies the length of the record in 16B units. Even values
2589 * indicate 16B records. Odd values indicate 32B records.
2591 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_TYPE_MASK UINT32_C(0x3f)
2592 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_TYPE_SFT 0
2593 /* HWRM Asynchronous Event Information */
2594 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2595 /* unused1 is 10 b */
2597 /* Identifiers of events. */
2598 /* VF MAC Address Change */
2599 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
2600 uint32_t event_data2;
2601 /* Event specific data */
2605 * This value is written by the NIC such that it will be different for
2606 * each pass through the completion queue. The even passes will write 1.
2607 * The odd passes will write 0.
2609 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_V UINT32_C(0x1)
2611 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2612 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_OPAQUE_SFT 1
2613 uint8_t timestamp_lo;
2614 /* 8-lsb timestamp from POR (100-msec resolution) */
2615 uint16_t timestamp_hi;
2616 /* 16-lsb timestamp from POR (100-msec resolution) */
2617 uint32_t event_data1;
2618 /* Event specific data */
2620 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_EVENT_DATA1_VF_ID_MASK UINT32_C(0xffff)
2621 #define HWRM_ASYNC_EVENT_CMPL_VF_MAC_ADDR_CHANGE_EVENT_DATA1_VF_ID_SFT 0
2622 } __attribute__((packed));
2624 /* HWRM Asynchronous Event Completion Record for PF-VF communication status change (16 bytes) */
2626 struct hwrm_async_event_cmpl_pf_vf_comm_status_change {
2628 /* unused1 is 10 b */
2630 * This field indicates the exact type of the completion. By convention,
2631 * the LSB identifies the length of the record in 16B units. Even values
2632 * indicate 16B records. Odd values indicate 32B records.
2634 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_TYPE_MASK UINT32_C(0x3f)
2635 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_TYPE_SFT 0
2636 /* HWRM Asynchronous Event Information */
2637 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2638 /* unused1 is 10 b */
2640 /* Identifiers of events. */
2641 /* PF-VF communication channel status change. */
2642 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_EVENT_ID_PF_VF_COMM_STATUS_CHANGE UINT32_C(0x32)
2643 uint32_t event_data2;
2644 /* Event specific data */
2648 * This value is written by the NIC such that it will be different for
2649 * each pass through the completion queue. The even passes will write 1.
2650 * The odd passes will write 0.
2652 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_V UINT32_C(0x1)
2654 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2655 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_OPAQUE_SFT 1
2656 uint8_t timestamp_lo;
2657 /* 8-lsb timestamp from POR (100-msec resolution) */
2658 uint16_t timestamp_hi;
2659 /* 16-lsb timestamp from POR (100-msec resolution) */
2660 uint32_t event_data1;
2661 /* Event specific data */
2663 * If this bit is set to 1, then it indicates that the PF-VF
2664 * communication was lost and it is established. If this bit set to 0,
2665 * then it indicates that the PF-VF communication was established and it
2668 #define HWRM_ASYNC_EVENT_CMPL_PF_VF_COMM_STATUS_CHANGE_EVENT_DATA1_COMM_ESTABLISHED UINT32_C(0x1)
2669 } __attribute__((packed));
2671 /* HWRM Asynchronous Event Completion Record for VF configuration change (16 bytes) */
2673 struct hwrm_async_event_cmpl_vf_cfg_change {
2675 /* unused1 is 10 b */
2677 * This field indicates the exact type of the completion. By convention,
2678 * the LSB identifies the length of the record in 16B units. Even values
2679 * indicate 16B records. Odd values indicate 32B records.
2681 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_MASK UINT32_C(0x3f)
2682 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_SFT 0
2683 /* HWRM Asynchronous Event Information */
2684 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2685 /* unused1 is 10 b */
2687 /* Identifiers of events. */
2688 /* VF Configuration Change */
2689 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
2690 uint32_t event_data2;
2691 /* Event specific data */
2695 * This value is written by the NIC such that it will be different for
2696 * each pass through the completion queue. The even passes will write 1.
2697 * The odd passes will write 0.
2699 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_V UINT32_C(0x1)
2701 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_OPAQUE_MASK UINT32_C(0xfe)
2702 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_OPAQUE_SFT 1
2703 uint8_t timestamp_lo;
2704 /* 8-lsb timestamp from POR (100-msec resolution) */
2705 uint16_t timestamp_hi;
2706 /* 16-lsb timestamp from POR (100-msec resolution) */
2707 uint32_t event_data1;
2709 * Each flag provided in this field indicates a specific VF
2710 * configuration change. At least one of these flags shall be set to 1
2711 * when an asynchronous event completion of this type is provided by the
2715 * If this bit is set to 1, then the value of MTU was changed on this
2716 * VF. If set to 0, then this bit should be ignored.
2718 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_MTU_CHANGE UINT32_C(0x1)
2720 * If this bit is set to 1, then the value of MRU was changed on this
2721 * VF. If set to 0, then this bit should be ignored.
2723 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_MRU_CHANGE UINT32_C(0x2)
2725 * If this bit is set to 1, then the value of default MAC address was
2726 * changed on this VF. If set to 0, then this bit should be ignored.
2728 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_DFLT_MAC_ADDR_CHANGE UINT32_C(0x4)
2730 * If this bit is set to 1, then the value of default VLAN was changed
2731 * on this VF. If set to 0, then this bit should be ignored.
2733 #define HWRM_ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_DFLT_VLAN_CHANGE UINT32_C(0x8)
2734 } __attribute__((packed));
2736 /* HWRM Asynchronous Event Completion Record for HWRM Error (16 bytes) */
2738 struct hwrm_async_event_cmpl_hwrm_error {
2740 /* unused1 is 10 b */
2742 * This field indicates the exact type of the completion. By convention,
2743 * the LSB identifies the length of the record in 16B units. Even values
2744 * indicate 16B records. Odd values indicate 32B records.
2746 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_MASK UINT32_C(0x3f)
2747 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_SFT 0
2748 /* HWRM Asynchronous Event Information */
2749 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
2750 /* unused1 is 10 b */
2752 /* Identifiers of events. */
2754 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
2755 uint32_t event_data2;
2756 /* Event specific data */
2757 /* Severity of HWRM Error */
2758 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_MASK UINT32_C(0xff)
2759 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_SFT 0
2761 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_WARNING UINT32_C(0x0)
2762 /* Non-fatal Error */
2763 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_NONFATAL UINT32_C(0x1)
2765 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_FATAL UINT32_C(0x2)
2766 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_LAST HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_FATAL
2770 * This value is written by the NIC such that it will be different for
2771 * each pass through the completion queue. The even passes will write 1.
2772 * The odd passes will write 0.
2774 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_V UINT32_C(0x1)
2776 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_OPAQUE_MASK UINT32_C(0xfe)
2777 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_OPAQUE_SFT 1
2778 uint8_t timestamp_lo;
2779 /* 8-lsb timestamp from POR (100-msec resolution) */
2780 uint16_t timestamp_hi;
2781 /* 16-lsb timestamp from POR (100-msec resolution) */
2782 uint32_t event_data1;
2783 /* Event specific data */
2784 /* Time stamp for error event */
2785 #define HWRM_ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA1_TIMESTAMP UINT32_C(0x1)
2786 } __attribute__((packed));
2788 /* Door Bell Formats */
2790 * Description: The backup version of the packet must be valid in the TX ring
2791 * before the push doorbell is written to the chip. The first 32b and the BD
2792 * portion of the push doorbell must be written in multiples of 32b units on the
2793 * PCI interface. The data portion of the push doorbell may be written in
2794 * multiples of 8b units on the PCI interface. A push update must contain
2795 * exactly one push packet. The backup version of the packet must start with a
2796 * long (32B) BD and the BDs must be less than or equal to 16x16B units long.
2799 * Note: This door bell format is used by the driver when it wants to push a
2800 * packet into the chip for super-fast transmission. This pushes a partial BD
2801 * and the packet data into the chip. If the chip has room, it will transmit the
2802 * packet. If the chip dosn't have room, it will read the BD and packet data
2803 * from host memory as a normal packet.
2805 /* TX Door Bell Format (4 bytes) */
2807 struct tx_doorbell {
2810 * This value indicates the type of door bell operation that is begin
2811 * requested. This value is '0' for TX door bell operations.
2814 * BD Index of next BD that will be used to transmit data on the TX ring
2815 * mapped to this door bell. NIC may read and process all BDs up to, but
2816 * not including this index.
2818 #define TX_DOORBELL_IDX_MASK UINT32_C(0xffffff)
2819 #define TX_DOORBELL_IDX_SFT 0
2820 /* reserved is 4 b */
2821 #define TX_DOORBELL_RESERVED_MASK UINT32_C(0xf000000)
2822 #define TX_DOORBELL_RESERVED_SFT 24
2824 * This value indicates the type of door bell operation that is begin
2825 * requested. This value is '0' for TX door bell operations.
2827 #define TX_DOORBELL_KEY_MASK UINT32_C(0xf0000000)
2828 #define TX_DOORBELL_KEY_SFT 28
2830 #define TX_DOORBELL_KEY_TX (UINT32_C(0x0) << 28)
2831 } __attribute__((packed));
2833 /* RX Door Bell Format (4 bytes) */
2835 struct rx_doorbell {
2838 * This value indicates the type of door bell operation that is begin
2839 * requested. This value is '1' for RX door bell operations.
2842 * BD Index of next BD that will be used for an empty receive buffer on
2843 * the RX ring mapped to this door bell. NIC may read and process all
2844 * BDs up to, but not including this index.
2846 #define RX_DOORBELL_IDX_MASK UINT32_C(0xffffff)
2847 #define RX_DOORBELL_IDX_SFT 0
2848 /* reserved is 4 b */
2849 #define RX_DOORBELL_RESERVED_MASK UINT32_C(0xf000000)
2850 #define RX_DOORBELL_RESERVED_SFT 24
2852 * This value indicates the type of door bell operation that is begin
2853 * requested. This value is '1' for RX door bell operations.
2855 #define RX_DOORBELL_KEY_MASK UINT32_C(0xf0000000)
2856 #define RX_DOORBELL_KEY_SFT 28
2858 #define RX_DOORBELL_KEY_RX (UINT32_C(0x1) << 28)
2859 } __attribute__((packed));
2861 /* CMP Door Bell Format (4 bytes) */
2863 struct cmpl_doorbell {
2864 uint32_t key_mask_valid_idx;
2866 * This value indicates the type of door bell operation that is begin
2867 * requested. This value is '2' for CMP door bell operations.
2870 * BD Index of the most recently handed completion record on the
2871 * completion ring mapped to this door bell. NIC may write this location
2872 * again with a new completion.
2874 #define CMPL_DOORBELL_IDX_MASK UINT32_C(0xffffff)
2875 #define CMPL_DOORBELL_IDX_SFT 0
2876 /* reserved is 2 b */
2877 #define CMPL_DOORBELL_RESERVED_MASK UINT32_C(0x3000000)
2878 #define CMPL_DOORBELL_RESERVED_SFT 24
2880 * This indicates if the BDIDX value is valid for this update when it is
2881 * '1'. When it is '0', the BDIDX value should be ignored.
2883 #define CMPL_DOORBELL_IDX_VALID UINT32_C(0x4000000)
2885 * This bit indicates the new interrupt mask state for the interrupt
2886 * associated with the BDIDX. A '1', means the interrupt is to be
2887 * masked. A '0' indicates the interrupt is to be unmasked.
2889 #define CMPL_DOORBELL_MASK UINT32_C(0x8000000)
2891 * This value indicates the type of door bell operation that is begin
2892 * requested. This value is '2' for CMP door bell operations.
2894 #define CMPL_DOORBELL_KEY_MASK UINT32_C(0xf0000000)
2895 #define CMPL_DOORBELL_KEY_SFT 28
2896 /* Completion Operation */
2897 #define CMPL_DOORBELL_KEY_CMPL (UINT32_C(0x2) << 28)
2898 } __attribute__((packed));
2900 /* Status Door Bell Format (4 bytes) */
2902 struct status_doorbell {
2905 * This value indicates the type of door bell operation that is begin
2906 * requested. This value is '3' for Status door bell operations.
2909 * BD Index of the status record for which space is now available to the
2913 * While there is no actual BD associated with the index, the similar
2914 * scheme is being used to communicate to the NIC that space is
2915 * available for status completions.
2917 #define STATUS_DOORBELL_IDX_MASK UINT32_C(0xffffff)
2918 #define STATUS_DOORBELL_IDX_SFT 0
2919 /* reserved is 4 b */
2920 #define STATUS_DOORBELL_RESERVED_MASK UINT32_C(0xf000000)
2921 #define STATUS_DOORBELL_RESERVED_SFT 24
2923 * This value indicates the type of door bell operation that is begin
2924 * requested. This value is '3' for Status door bell operations.
2926 #define STATUS_DOORBELL_KEY_MASK UINT32_C(0xf0000000)
2927 #define STATUS_DOORBELL_KEY_SFT 28
2928 /* Status Operation */
2929 #define STATUS_DOORBELL_KEY_STAT (UINT32_C(0x3) << 28)
2930 } __attribute__((packed));
2932 /* Push w/32B BD Door Bell Format (32 bytes) */
2934 struct push32_doorbell {
2935 uint32_t key_sz_idx;
2937 * This value indicates the type of door bell operation that is begin
2938 * requested. This value is 4 for push door bell operations.
2941 * This is the BD Index of last BD of the push packet that will be used
2942 * to transmit data on the TX ring mapped to this door bell.
2944 #define PUSH32_DOORBELL_IDX_MASK UINT32_C(0xffffff)
2945 #define PUSH32_DOORBELL_IDX_SFT 0
2947 * This is the number of 16B BDs spaces consumed in the TX Ring by the
2948 * "backup" version of the packet being pushed. A value of 1 is invalid
2949 * since backup must start with a long 32B BE. A value of 2 indicates
2950 * just the first 32B BE. A value of 3 indicates 32B+16B BD. etc. A
2951 * value of 0 indicates 16x16B BD spaces are consumed.
2953 #define PUSH32_DOORBELL_SZ_MASK UINT32_C(0xf000000)
2954 #define PUSH32_DOORBELL_SZ_SFT 24
2956 * This value indicates the type of door bell operation that is begin
2957 * requested. This value is 4 for push door bell operations.
2959 #define PUSH32_DOORBELL_KEY_MASK UINT32_C(0xf0000000)
2960 #define PUSH32_DOORBELL_KEY_SFT 28
2961 /* Push Operation */
2962 #define PUSH32_DOORBELL_KEY_PUSH (UINT32_C(0x4) << 28)
2963 uint16_t flags_type;
2965 * All bits in this field must be valid on the first BD of a packet.
2966 * Only the packet_end bit must be valid for the remaining BDs of a
2969 /* This value identifies the type of buffer descriptor. */
2970 #define PUSH32_DOORBELL_TYPE_MASK UINT32_C(0x3f)
2971 #define PUSH32_DOORBELL_TYPE_SFT 0
2973 * Indicates that this BD is 32B long and is used for normal L2
2974 * packet transmission.
2976 #define PUSH32_DOORBELL_TYPE_TX_BD_LONG UINT32_C(0x10)
2978 * If set to 1, the packet ends with the data in the buffer pointed to
2979 * by this descriptor. This flag must be valid on every BD. This bit
2980 * must be set on all push doorbells.
2982 #define PUSH32_DOORBELL_FLAGS_PACKET_END UINT32_C(0x40)
2984 * If set to 1, the device will not generate a completion for this
2985 * transmit packet unless there is an error in it's processing. If this
2986 * bit is set to 0, then the packet will be completed normally. This bit
2987 * must be valid only on the first BD of a packet.
2989 #define PUSH32_DOORBELL_FLAGS_NO_CMPL UINT32_C(0x80)
2991 * This value must match the sz field in the first 32b of the push
2992 * operation except that if 16x16B BD locations are consumed in the ring
2993 * by this packet, then this value must be 16 (not zero).
2995 #define PUSH32_DOORBELL_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
2996 #define PUSH32_DOORBELL_FLAGS_BD_CNT_SFT 8
2998 * This value is a hint for the length of the entire packet. It is used
2999 * by the chip to optimize internal processing. The packet will be
3000 * dropped if the hint is too short. This field is valid only on the
3001 * first BD of a packet.
3003 #define PUSH32_DOORBELL_FLAGS_LHINT_MASK UINT32_C(0x6000)
3004 #define PUSH32_DOORBELL_FLAGS_LHINT_SFT 13
3005 /* indicates packet length < 512B */
3006 #define PUSH32_DOORBELL_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
3007 /* indicates 512 <= packet length < 1KB */
3008 #define PUSH32_DOORBELL_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
3009 /* indicates 1KB <= packet length < 2KB */
3010 #define PUSH32_DOORBELL_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
3011 /* indicates packet length >= 2KB */
3012 #define PUSH32_DOORBELL_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
3013 #define PUSH32_DOORBELL_FLAGS_LHINT_LAST PUSH32_DOORBELL_FLAGS_LHINT_GTE2K
3015 * If set to 1, the device immediately updates the Send Consumer Index
3016 * after the buffer associated with this descriptor has been transferred
3017 * via DMA to NIC memory from host memory. An interrupt may or may not
3018 * be generated according to the state of the interrupt avoidance
3019 * mechanisms. If this bit is set to 0, then the Consumer Index is only
3020 * updated as soon as one of the host interrupt coalescing conditions
3021 * has been met. This bit must be valid on the first BD of a packet.
3023 #define PUSH32_DOORBELL_FLAGS_COAL_NOW UINT32_C(0x8000)
3025 * All bits in this field must be valid on the first BD of a packet.
3026 * Only the packet_end bit must be valid for the remaining BDs of a
3029 #define PUSH32_DOORBELL_FLAGS_MASK UINT32_C(0xffc0)
3030 #define PUSH32_DOORBELL_FLAGS_SFT 6
3033 * This is the length of the host physical buffer this BD describes in
3034 * bytes. This field must be valid on all BDs of a packet.
3038 * The opaque data field is pass through to the completion and can be
3039 * used for any data that the driver wants to associate with the
3040 * transmit BD. This field must be valid on the first BD of a packet.
3044 * All bits in this field must be valid on the first BD of a packet.
3045 * Their value on other BDs of the packet will be ignored.
3048 * If set to 1, the controller replaces the TCP/UPD checksum fields of
3049 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
3050 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
3051 * checksum for the packet associated with this descriptor. The flag is
3052 * ignored if the LSO flag is set. This bit must be valid on the first
3055 #define PUSH32_DOORBELL_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
3057 * If set to 1, the controller replaces the IP checksum of the normal
3058 * packets, or the inner IP checksum of the encapsulated packets with
3059 * the hardware calculated IP checksum for the packet associated with
3060 * this descriptor. This bit must be valid on the first BD of a packet.
3062 #define PUSH32_DOORBELL_LFLAGS_IP_CHKSUM UINT32_C(0x2)
3064 * If set to 1, the controller will not append an Ethernet CRC to the
3065 * end of the frame. This bit must be valid on the first BD of a packet.
3066 * Packet must be 64B or longer when this flag is set. It is not useful
3067 * to use this bit with any form of TX offload such as CSO or LSO. The
3068 * intent is that the packet from the host already has a valid Ethernet
3069 * CRC on the packet.
3071 #define PUSH32_DOORBELL_LFLAGS_NOCRC UINT32_C(0x4)
3073 * If set to 1, the device will record the time at which the packet was
3074 * actually transmitted at the TX MAC. This bit must be valid on the
3075 * first BD of a packet.
3077 #define PUSH32_DOORBELL_LFLAGS_STAMP UINT32_C(0x8)
3079 * If set to 1, The controller replaces the tunnel IP checksum field
3080 * with hardware calculated IP checksum for the IP header of the packet
3081 * associated with this descriptor. For outer UDP checksum, global outer
3082 * UDP checksum TE_NIC register needs to be enabled. If the global outer
3083 * UDP checksum TE_NIC register bit is set, outer UDP checksum will be
3084 * calculated for the following cases: 1. Packets with tcp_udp_chksum
3085 * flag set to offload checksum for inner packet AND the inner packet is
3086 * TCP/UDP. If the inner packet is ICMP for example (non-TCP/UDP), even
3087 * if the tcp_udp_chksum is set, the outer UDP checksum will not be
3088 * calculated. 2. Packets with lso flag set which implies inner TCP
3089 * checksum calculation as part of LSO operation.
3091 #define PUSH32_DOORBELL_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
3093 * If set to 1, the device will treat this packet with LSO(Large Send
3094 * Offload) processing for both normal or encapsulated packets, which is
3095 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
3096 * fields must be valid. The driver doesn't need to set t_ip_chksum,
3097 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
3098 * the appropriate checksum fields for segmented packets. When this bit
3099 * is 1, the hdr_size and mss fields must be valid.
3101 #define PUSH32_DOORBELL_LFLAGS_LSO UINT32_C(0x20)
3103 * If set to zero when LSO is '1', then the IPID will be treated as a
3104 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
3105 * set to one when LSO is '1', then the IPID will be treated as a 15b
3106 * number and will be wrapped if it exceeds a value 0f 0x7fff.
3108 #define PUSH32_DOORBELL_LFLAGS_IPID_FMT UINT32_C(0x40)
3110 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
3111 * will not be modified during LSO operations. If set to one when LSO is
3112 * '1', then the IPID of the tunnel IP header will be incremented for
3113 * each subsequent segment of an LSO operation. The flag is ignored if
3114 * the LSO packet is a normal (non-tunneled) TCP packet.
3116 #define PUSH32_DOORBELL_LFLAGS_T_IPID UINT32_C(0x80)
3118 * If set to '1', then the RoCE ICRC will be appended to the packet.
3119 * Packet must be a valid RoCE format packet.
3121 #define PUSH32_DOORBELL_LFLAGS_ROCE_CRC UINT32_C(0x100)
3123 * If set to '1', then the FCoE CRC will be appended to the packet.
3124 * Packet must be a valid FCoE format packet.
3126 #define PUSH32_DOORBELL_LFLAGS_FCOE_CRC UINT32_C(0x200)
3129 * When LSO is '1', this field must contain the offset of the TCP
3130 * payload from the beginning of the packet in as 16b words. In case of
3131 * encapsulated/tunneling packet, this field contains the offset of the
3132 * inner TCP payload from beginning of the packet as 16-bit words. This
3133 * value must be valid on the first BD of a packet.
3135 #define PUSH32_DOORBELL_HDR_SIZE_MASK UINT32_C(0x1ff)
3136 #define PUSH32_DOORBELL_HDR_SIZE_SFT 0
3139 * This is the MSS value that will be used to do the LSO processing. The
3140 * value is the length in bytes of the TCP payload for each segment
3141 * generated by the LSO operation. This value must be valid on the first
3144 #define PUSH32_DOORBELL_MSS_MASK UINT32_C(0x7fff)
3145 #define PUSH32_DOORBELL_MSS_SFT 0
3147 uint16_t cfa_action;
3149 * This value selects a CFA action to perform on the packet. Set this
3150 * value to zero if no CFA action is desired. This value must be valid
3151 * on the first BD of a packet.
3155 * This value is action meta-data that defines CFA edit operations that
3156 * are done in addition to any action editing.
3158 /* When key=1, This is the VLAN tag VID value. */
3159 #define PUSH32_DOORBELL_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
3160 #define PUSH32_DOORBELL_CFA_META_VLAN_VID_SFT 0
3161 /* When key=1, This is the VLAN tag DE value. */
3162 #define PUSH32_DOORBELL_CFA_META_VLAN_DE UINT32_C(0x1000)
3163 /* When key=1, This is the VLAN tag PRI value. */
3164 #define PUSH32_DOORBELL_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
3165 #define PUSH32_DOORBELL_CFA_META_VLAN_PRI_SFT 13
3166 /* When key=1, This is the VLAN tag TPID select value. */
3167 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
3168 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_SFT 16
3170 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
3172 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
3174 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
3176 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
3178 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
3179 /* Value programmed in CFA VLANTPID register. */
3180 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
3181 #define PUSH32_DOORBELL_CFA_META_VLAN_TPID_LAST PUSH32_DOORBELL_CFA_META_VLAN_TPID_TPIDCFG
3182 /* When key=1, This is the VLAN tag TPID select value. */
3183 #define PUSH32_DOORBELL_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
3184 #define PUSH32_DOORBELL_CFA_META_VLAN_RESERVED_SFT 19
3186 * This field identifies the type of edit to be performed on the packet.
3187 * This value must be valid on the first BD of a packet.
3189 #define PUSH32_DOORBELL_CFA_META_KEY_MASK UINT32_C(0xf0000000)
3190 #define PUSH32_DOORBELL_CFA_META_KEY_SFT 28
3192 #define PUSH32_DOORBELL_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
3194 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
3195 * - PRI/DE value. - meta[11:0] - VID value.
3197 #define PUSH32_DOORBELL_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
3198 #define PUSH32_DOORBELL_CFA_META_KEY_LAST PUSH32_DOORBELL_CFA_META_KEY_VLAN_TAG
3201 * This is the data for the push packet. If the packet data does not fit
3202 * in the first pass, data writing can continue at offset 4 of the
3203 * doorbell for up to 4 additional passes for a total data size of 512B
3206 } __attribute__((packed));
3208 /* HW Resource Manager Specification 1.4.0 */
3209 #define HWRM_VERSION_MAJOR 1
3210 #define HWRM_VERSION_MINOR 4
3211 #define HWRM_VERSION_UPDATE 0
3213 #define HWRM_VERSION_STR "1.4.0"
3215 * Following is the signature for HWRM message field that indicates not
3216 * applicable (All F's). Need to cast it the size of the field if needed.
3218 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
3219 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
3220 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
3221 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
3222 #define HW_HASH_KEY_SIZE 40
3223 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
3225 * Description: Port Rx Statistics Formats. The HWRM shall return any
3226 * unsupported counter with a value of 0xFFFFFFFF for 32-bit counters and
3227 * 0xFFFFFFFFFFFFFFFF for 64-bit counters.
3230 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
3231 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
3232 * processors inside the chip. This firmware service is vital part of the chip.
3233 * The chip can not be used by a driver or HWRM client without the HWRM.
3235 /* Input (16 bytes) */
3240 * This value indicates what type of request this is. The format for the
3241 * rest of the command is determined by this field.
3245 * This value indicates the what completion ring the request will be
3246 * optionally completed on. If the value is -1, then no CR completion
3247 * will be generated. Any other value must be a valid CR ring_id value
3248 * for this function.
3251 /* This value indicates the command sequence number. */
3254 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3255 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3259 * This is the host address where the response will be written when the
3260 * request is complete. This area must be 16B aligned and must be
3261 * cleared to zero before the request is made.
3263 } __attribute__((packed));
3265 /* Output (8 bytes) */
3268 uint16_t error_code;
3270 * Pass/Fail or error type Note: receiver to verify the in parameters,
3271 * and fail the call with an error when appropriate
3274 /* This field returns the type of original request. */
3276 /* This field provides original sequence number of the command. */
3279 * This field is the length of the response in bytes. The last byte of
3280 * the response is a valid flag that will read as '1' when the command
3281 * has been completely written to memory.
3283 } __attribute__((packed));
3285 #define GET_HWRM_REQ_TYPE(x) \
3286 ((x) == 0x98 ? "HWRM_CFA_ENCAP_RECORD_FREE": \
3287 ((x) == 0x99 ? "HWRM_CFA_NTUPLE_FILTER_ALLOC": \
3288 ((x) == 0x90 ? "HWRM_CFA_L2_FILTER_ALLOC": \
3289 ((x) == 0x91 ? "HWRM_CFA_L2_FILTER_FREE": \
3290 ((x) == 0x92 ? "HWRM_CFA_L2_FILTER_CFG": \
3291 ((x) == 0x93 ? "HWRM_CFA_L2_SET_RX_MASK": \
3292 ((x) == 0x94 ? "RESERVED3": \
3293 ((x) == 0x95 ? "HWRM_CFA_TUNNEL_FILTER_ALLOC": \
3294 ((x) == 0x96 ? "HWRM_CFA_TUNNEL_FILTER_FREE": \
3295 ((x) == 0x97 ? "HWRM_CFA_ENCAP_RECORD_ALLOC": \
3296 ((x) == 0x10 ? "RESERVED1": \
3297 ((x) == 0x11 ? "HWRM_FUNC_RESET": \
3298 ((x) == 0x12 ? "HWRM_FUNC_GETFID": \
3299 ((x) == 0x13 ? "HWRM_FUNC_VF_ALLOC": \
3300 ((x) == 0x14 ? "HWRM_FUNC_VF_FREE": \
3301 ((x) == 0x15 ? "HWRM_FUNC_QCAPS": \
3302 ((x) == 0x16 ? "HWRM_FUNC_QCFG": \
3303 ((x) == 0x17 ? "HWRM_FUNC_CFG": \
3304 ((x) == 0x18 ? "HWRM_FUNC_QSTATS": \
3305 ((x) == 0x19 ? "HWRM_FUNC_CLR_STATS": \
3306 ((x) == 0xe0 ? "HWRM_TEMP_MONITOR_QUERY": \
3307 ((x) == 0xd3 ? "HWRM_FWD_ASYNC_EVENT_CMPL": \
3308 ((x) == 0xd2 ? "HWRM_FWD_RESP": \
3309 ((x) == 0x1a ? "HWRM_FUNC_DRV_UNRGTR": \
3310 ((x) == 0x1b ? "HWRM_FUNC_VF_RESC_FREE": \
3311 ((x) == 0x1c ? "HWRM_FUNC_VF_VNIC_IDS_QUERY": \
3312 ((x) == 0x1d ? "HWRM_FUNC_DRV_RGTR": \
3313 ((x) == 0x1e ? "HWRM_FUNC_DRV_QVER": \
3314 ((x) == 0x1f ? "HWRM_FUNC_BUF_RGTR": \
3315 ((x) == 0x9a ? "HWRM_CFA_NTUPLE_FILTER_FREE": \
3316 ((x) == 0x9b ? "HWRM_CFA_NTUPLE_FILTER_CFG": \
3317 ((x) == 0x9c ? "HWRM_CFA_EM_FLOW_ALLOC": \
3318 ((x) == 0x9d ? "HWRM_CFA_EM_FLOW_FREE": \
3319 ((x) == 0x9e ? "HWRM_CFA_EM_FLOW_CFG": \
3320 ((x) == 0xd1 ? "HWRM_REJECT_FWD_RESP": \
3321 ((x) == 0xd0 ? "HWRM_EXEC_FWD_RESP": \
3322 ((x) == 0xc8 ? "HWRM_FW_SET_TIME": \
3323 ((x) == 0xc9 ? "HWRM_FW_GET_TIME": \
3324 ((x) == 0xc0 ? "HWRM_FW_RESET": \
3325 ((x) == 0xc1 ? "HWRM_FW_QSTATUS": \
3326 ((x) == 0x70 ? "HWRM_VNIC_RSS_COS_LB_CTX_ALLOC": \
3327 ((x) == 0x71 ? "HWRM_VNIC_RSS_COS_LB_CTX_FREE": \
3328 ((x) == 0xb1 ? "HWRM_STAT_CTX_FREE": \
3329 ((x) == 0xb0 ? "HWRM_STAT_CTX_ALLOC": \
3330 ((x) == 0xb3 ? "HWRM_STAT_CTX_CLR_STATS": \
3331 ((x) == 0xb2 ? "HWRM_STAT_CTX_QUERY": \
3332 ((x) == 0xfff6 ? "HWRM_NVM_GET_DEV_INFO": \
3333 ((x) == 0x61 ? "HWRM_RING_GRP_FREE": \
3334 ((x) == 0x60 ? "HWRM_RING_GRP_ALLOC": \
3335 ((x) == 0xf1 ? "HWRM_WOL_FILTER_FREE": \
3336 ((x) == 0xf0 ? "HWRM_WOL_FILTER_ALLOC": \
3337 ((x) == 0xf3 ? "HWRM_WOL_REASON_QCFG": \
3338 ((x) == 0xf2 ? "HWRM_WOL_FILTER_QCFG": \
3339 ((x) == 0xa0 ? "HWRM_TUNNEL_DST_PORT_QUERY": \
3340 ((x) == 0xa1 ? "HWRM_TUNNEL_DST_PORT_ALLOC": \
3341 ((x) == 0xa2 ? "HWRM_TUNNEL_DST_PORT_FREE": \
3342 ((x) == 0xfffc ? "HWRM_NVM_RAW_DUMP": \
3343 ((x) == 0xfffb ? "HWRM_NVM_GET_DIR_INFO": \
3344 ((x) == 0xfffa ? "HWRM_NVM_GET_DIR_ENTRIES": \
3345 ((x) == 0xe ? "HWRM_FUNC_BUF_UNRGTR": \
3346 ((x) == 0xf ? "HWRM_FUNC_VF_CFG": \
3347 ((x) == 0xffff ? "HWRM_NVM_RAW_WRITE_BLK": \
3348 ((x) == 0xfffe ? "HWRM_NVM_WRITE": \
3349 ((x) == 0xfffd ? "HWRM_NVM_READ": \
3350 ((x) == 0x50 ? "HWRM_RING_ALLOC": \
3351 ((x) == 0x51 ? "HWRM_RING_FREE": \
3352 ((x) == 0x52 ? "HWRM_RING_CMPL_RING_QAGGINT_PARAMS": \
3353 ((x) == 0x53 ? "HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS": \
3354 ((x) == 0x4a ? "HWRM_VNIC_QCAPS": \
3355 ((x) == 0x49 ? "HWRM_VNIC_PLCMODES_QCFG": \
3356 ((x) == 0x48 ? "HWRM_VNIC_PLCMODES_CFG": \
3357 ((x) == 0x47 ? "HWRM_VNIC_RSS_QCFG": \
3358 ((x) == 0x46 ? "HWRM_VNIC_RSS_CFG": \
3359 ((x) == 0x45 ? "HWRM_VNIC_TPA_QCFG": \
3360 ((x) == 0x44 ? "HWRM_VNIC_TPA_CFG": \
3361 ((x) == 0x43 ? "HWRM_VNIC_QCFG": \
3362 ((x) == 0x42 ? "HWRM_VNIC_CFG": \
3363 ((x) == 0x41 ? "HWRM_VNIC_FREE": \
3364 ((x) == 0x40 ? "HWRM_VNIC_ALLOC": \
3365 ((x) == 0x0 ? "HWRM_VER_GET": \
3366 ((x) == 0xfff9 ? "HWRM_NVM_FIND_DIR_ENTRY": \
3367 ((x) == 0xfff8 ? "HWRM_NVM_MOD_DIR_ENTRY": \
3368 ((x) == 0xfff7 ? "HWRM_NVM_ERASE_DIR_ENTRY": \
3369 ((x) == 0x5e ? "HWRM_RING_RESET": \
3370 ((x) == 0xfff5 ? "HWRM_NVM_VERIFY_UPDATE": \
3371 ((x) == 0xfff4 ? "HWRM_NVM_MODIFY": \
3372 ((x) == 0xfff3 ? "HWRM_NVM_INSTALL_UPDATE": \
3373 ((x) == 0x2a ? "HWRM_PORT_PHY_QCAPS": \
3374 ((x) == 0x2c ? "HWRM_PORT_PHY_I2C_READ": \
3375 ((x) == 0x2b ? "HWRM_PORT_PHY_I2C_WRITE": \
3376 ((x) == 0x38 ? "HWRM_QUEUE_PRI2COS_CFG": \
3377 ((x) == 0x39 ? "HWRM_QUEUE_COS2BW_QCFG": \
3378 ((x) == 0x32 ? "HWRM_QUEUE_CFG": \
3379 ((x) == 0x33 ? "HWRM_QUEUE_BUFFERS_QCFG": \
3380 ((x) == 0x30 ? "HWRM_QUEUE_QPORTCFG": \
3381 ((x) == 0x31 ? "HWRM_QUEUE_QCFG": \
3382 ((x) == 0x36 ? "HWRM_QUEUE_PFCENABLE_CFG": \
3383 ((x) == 0x37 ? "HWRM_QUEUE_PRI2COS_QCFG": \
3384 ((x) == 0x34 ? "HWRM_QUEUE_BUFFERS_CFG": \
3385 ((x) == 0x35 ? "HWRM_QUEUE_PFCENABLE_QCFG": \
3386 ((x) == 0xff14 ? "HWRM_DBG_DUMP": \
3387 ((x) == 0xff12 ? "HWRM_DBG_WRITE_DIRECT": \
3388 ((x) == 0xff13 ? "HWRM_DBG_WRITE_INDIRECT": \
3389 ((x) == 0xff10 ? "HWRM_DBG_READ_DIRECT": \
3390 ((x) == 0xff11 ? "HWRM_DBG_READ_INDIRECT": \
3391 ((x) == 0x25 ? "HWRM_PORT_CLR_STATS": \
3392 ((x) == 0x24 ? "HWRM_PORT_LPBK_QSTATS": \
3393 ((x) == 0x27 ? "HWRM_PORT_PHY_QCFG": \
3394 ((x) == 0x26 ? "HWRM_PORT_LPBK_CLR_STATS": \
3395 ((x) == 0x21 ? "HWRM_PORT_MAC_CFG": \
3396 ((x) == 0x20 ? "HWRM_PORT_PHY_CFG": \
3397 ((x) == 0x23 ? "HWRM_PORT_QSTATS": \
3398 ((x) == 0x22 ? "HWRM_PORT_TS_QUERY": \
3399 ((x) == 0x29 ? "HWRM_PORT_BLINK_LED": \
3400 ((x) == 0x28 ? "HWRM_PORT_MAC_QCFG": \
3401 ((x) == 0x3a ? "HWRM_QUEUE_COS2BW_CFG": \
3402 "Unknown req_type"))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))
3404 /* Command numbering (8 bytes) */
3409 * This version of the specification defines the commands listed in the
3410 * table below. The following are general implementation requirements
3411 * for these commands: # All commands listed below that are marked
3412 * neither reserved nor experimental shall be implemented by the HWRM. #
3413 * A HWRM client compliant to this specification should not use commands
3414 * outside of the list below. # A HWRM client compliant to this
3415 * specification should not use command numbers marked reserved below. #
3416 * A command marked experimental below may not be implemented by the
3417 * HWRM. # A command marked experimental may change in the future
3418 * version of the HWRM specification. # A command not listed below may
3419 * be implemented by the HWRM. The behavior of commands that are not
3420 * listed below is outside the scope of this specification.
3422 #define HWRM_VER_GET (UINT32_C(0x0))
3423 #define HWRM_FUNC_BUF_UNRGTR (UINT32_C(0xe))
3425 #define HWRM_FUNC_VF_CFG (UINT32_C(0xf))
3426 /* Reserved for future use */
3427 #define RESERVED1 (UINT32_C(0x10))
3428 #define HWRM_FUNC_RESET (UINT32_C(0x11))
3429 #define HWRM_FUNC_GETFID (UINT32_C(0x12))
3430 #define HWRM_FUNC_VF_ALLOC (UINT32_C(0x13))
3431 #define HWRM_FUNC_VF_FREE (UINT32_C(0x14))
3432 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
3433 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
3434 #define HWRM_FUNC_CFG (UINT32_C(0x17))
3435 #define HWRM_FUNC_QSTATS (UINT32_C(0x18))
3436 #define HWRM_FUNC_CLR_STATS (UINT32_C(0x19))
3437 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
3438 #define HWRM_FUNC_VF_RESC_FREE (UINT32_C(0x1b))
3439 #define HWRM_FUNC_VF_VNIC_IDS_QUERY (UINT32_C(0x1c))
3440 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
3441 #define HWRM_FUNC_DRV_QVER (UINT32_C(0x1e))
3442 #define HWRM_FUNC_BUF_RGTR (UINT32_C(0x1f))
3443 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
3444 #define HWRM_PORT_MAC_CFG (UINT32_C(0x21))
3446 #define HWRM_PORT_TS_QUERY (UINT32_C(0x22))
3447 #define HWRM_PORT_QSTATS (UINT32_C(0x23))
3448 #define HWRM_PORT_LPBK_QSTATS (UINT32_C(0x24))
3450 #define HWRM_PORT_CLR_STATS (UINT32_C(0x25))
3452 #define HWRM_PORT_LPBK_CLR_STATS (UINT32_C(0x26))
3453 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
3455 #define HWRM_PORT_MAC_QCFG (UINT32_C(0x28))
3457 #define HWRM_PORT_BLINK_LED (UINT32_C(0x29))
3459 #define HWRM_PORT_PHY_QCAPS (UINT32_C(0x2a))
3461 #define HWRM_PORT_PHY_I2C_WRITE (UINT32_C(0x2b))
3463 #define HWRM_PORT_PHY_I2C_READ (UINT32_C(0x2c))
3464 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
3465 #define HWRM_QUEUE_QCFG (UINT32_C(0x31))
3466 #define HWRM_QUEUE_CFG (UINT32_C(0x32))
3467 #define HWRM_QUEUE_BUFFERS_QCFG (UINT32_C(0x33))
3468 #define HWRM_QUEUE_BUFFERS_CFG (UINT32_C(0x34))
3470 #define HWRM_QUEUE_PFCENABLE_QCFG (UINT32_C(0x35))
3472 #define HWRM_QUEUE_PFCENABLE_CFG (UINT32_C(0x36))
3474 #define HWRM_QUEUE_PRI2COS_QCFG (UINT32_C(0x37))
3476 #define HWRM_QUEUE_PRI2COS_CFG (UINT32_C(0x38))
3478 #define HWRM_QUEUE_COS2BW_QCFG (UINT32_C(0x39))
3480 #define HWRM_QUEUE_COS2BW_CFG (UINT32_C(0x3a))
3481 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
3482 #define HWRM_VNIC_FREE (UINT32_C(0x41))
3483 #define HWRM_VNIC_CFG (UINT32_C(0x42))
3485 #define HWRM_VNIC_QCFG (UINT32_C(0x43))
3486 #define HWRM_VNIC_TPA_CFG (UINT32_C(0x44))
3488 #define HWRM_VNIC_TPA_QCFG (UINT32_C(0x45))
3489 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
3490 #define HWRM_VNIC_RSS_QCFG (UINT32_C(0x47))
3491 #define HWRM_VNIC_PLCMODES_CFG (UINT32_C(0x48))
3492 #define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
3494 #define HWRM_VNIC_QCAPS (UINT32_C(0x4a))
3495 #define HWRM_RING_ALLOC (UINT32_C(0x50))
3496 #define HWRM_RING_FREE (UINT32_C(0x51))
3497 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
3498 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS (UINT32_C(0x53))
3499 #define HWRM_RING_RESET (UINT32_C(0x5e))
3500 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
3501 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
3502 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
3503 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
3504 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
3505 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
3506 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
3507 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
3508 /* Reserved for future use */
3509 #define RESERVED3 (UINT32_C(0x94))
3510 #define HWRM_CFA_TUNNEL_FILTER_ALLOC (UINT32_C(0x95))
3511 #define HWRM_CFA_TUNNEL_FILTER_FREE (UINT32_C(0x96))
3513 #define HWRM_CFA_ENCAP_RECORD_ALLOC (UINT32_C(0x97))
3515 #define HWRM_CFA_ENCAP_RECORD_FREE (UINT32_C(0x98))
3516 #define HWRM_CFA_NTUPLE_FILTER_ALLOC (UINT32_C(0x99))
3517 #define HWRM_CFA_NTUPLE_FILTER_FREE (UINT32_C(0x9a))
3518 #define HWRM_CFA_NTUPLE_FILTER_CFG (UINT32_C(0x9b))
3520 #define HWRM_CFA_EM_FLOW_ALLOC (UINT32_C(0x9c))
3522 #define HWRM_CFA_EM_FLOW_FREE (UINT32_C(0x9d))
3524 #define HWRM_CFA_EM_FLOW_CFG (UINT32_C(0x9e))
3525 #define HWRM_TUNNEL_DST_PORT_QUERY (UINT32_C(0xa0))
3526 #define HWRM_TUNNEL_DST_PORT_ALLOC (UINT32_C(0xa1))
3527 #define HWRM_TUNNEL_DST_PORT_FREE (UINT32_C(0xa2))
3528 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
3529 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
3530 #define HWRM_STAT_CTX_QUERY (UINT32_C(0xb2))
3531 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
3532 #define HWRM_FW_RESET (UINT32_C(0xc0))
3533 #define HWRM_FW_QSTATUS (UINT32_C(0xc1))
3535 #define HWRM_FW_SET_TIME (UINT32_C(0xc8))
3537 #define HWRM_FW_GET_TIME (UINT32_C(0xc9))
3538 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
3539 #define HWRM_REJECT_FWD_RESP (UINT32_C(0xd1))
3540 #define HWRM_FWD_RESP (UINT32_C(0xd2))
3541 #define HWRM_FWD_ASYNC_EVENT_CMPL (UINT32_C(0xd3))
3542 #define HWRM_TEMP_MONITOR_QUERY (UINT32_C(0xe0))
3544 #define HWRM_WOL_FILTER_ALLOC (UINT32_C(0xf0))
3546 #define HWRM_WOL_FILTER_FREE (UINT32_C(0xf1))
3548 #define HWRM_WOL_FILTER_QCFG (UINT32_C(0xf2))
3550 #define HWRM_WOL_REASON_QCFG (UINT32_C(0xf3))
3552 #define HWRM_DBG_READ_DIRECT (UINT32_C(0xff10))
3554 #define HWRM_DBG_READ_INDIRECT (UINT32_C(0xff11))
3556 #define HWRM_DBG_WRITE_DIRECT (UINT32_C(0xff12))
3558 #define HWRM_DBG_WRITE_INDIRECT (UINT32_C(0xff13))
3559 #define HWRM_DBG_DUMP (UINT32_C(0xff14))
3560 #define HWRM_NVM_INSTALL_UPDATE (UINT32_C(0xfff3))
3561 #define HWRM_NVM_MODIFY (UINT32_C(0xfff4))
3562 #define HWRM_NVM_VERIFY_UPDATE (UINT32_C(0xfff5))
3563 #define HWRM_NVM_GET_DEV_INFO (UINT32_C(0xfff6))
3564 #define HWRM_NVM_ERASE_DIR_ENTRY (UINT32_C(0xfff7))
3565 #define HWRM_NVM_MOD_DIR_ENTRY (UINT32_C(0xfff8))
3566 #define HWRM_NVM_FIND_DIR_ENTRY (UINT32_C(0xfff9))
3567 #define HWRM_NVM_GET_DIR_ENTRIES (UINT32_C(0xfffa))
3568 #define HWRM_NVM_GET_DIR_INFO (UINT32_C(0xfffb))
3569 #define HWRM_NVM_RAW_DUMP (UINT32_C(0xfffc))
3570 #define HWRM_NVM_READ (UINT32_C(0xfffd))
3571 #define HWRM_NVM_WRITE (UINT32_C(0xfffe))
3572 #define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
3573 uint16_t unused_0[3];
3574 } __attribute__((packed));
3576 #define GET_HWRM_ERROR_CODE(x) \
3577 ((x) == 0xf ? "HWRM_ERROR": \
3578 ((x) == 0xffff ? "CMD_NOT_SUPPORTED": \
3579 ((x) == 0xfffe ? "UNKNOWN_ERR": \
3580 ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR": \
3581 ((x) == 0x5 ? "INVALID_FLAGS": \
3582 ((x) == 0x6 ? "INVALID_ENABLES": \
3583 ((x) == 0x0 ? "SUCCESS": \
3584 ((x) == 0x1 ? "FAIL": \
3585 ((x) == 0x2 ? "INVALID_PARAMS": \
3586 ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED": \
3587 "Unknown error_code"))))))))))
3589 /* Return Codes (8 bytes) */
3592 uint16_t error_code;
3593 /* These are numbers assigned to return/error codes. */
3594 /* Request was successfully executed by the HWRM. */
3595 #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
3596 /* THe HWRM failed to execute the request. */
3597 #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
3598 /* The request contains invalid argument(s) or input parameters. */
3599 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
3601 * The requester is not allowed to access the requested
3602 * resource. This error code shall be provided in a response to
3603 * a request to query or modify an existing resource that is not
3604 * accessible by the requester.
3606 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
3608 * The HWRM is unable to allocate the requested resource. This
3609 * code only applies to requests for HWRM resource allocations.
3611 #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
3612 /* Invalid combination of flags is specified in the request. */
3613 #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
3615 * Invalid combination of enables fields is specified in the
3618 #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
3619 /* Generic HWRM execution error that represents an internal error. */
3620 #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
3622 #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
3623 /* Unsupported or invalid command */
3624 #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
3625 uint16_t unused_0[3];
3626 } __attribute__((packed));
3628 /* Output (16 bytes) */
3630 struct hwrm_err_output {
3631 uint16_t error_code;
3633 * Pass/Fail or error type Note: receiver to verify the in parameters,
3634 * and fail the call with an error when appropriate
3637 /* This field returns the type of original request. */
3639 /* This field provides original sequence number of the command. */
3642 * This field is the length of the response in bytes. The last byte of
3643 * the response is a valid flag that will read as '1' when the command
3644 * has been completely written to memory.
3647 /* debug info for this error response. */
3649 /* debug info for this error response. */
3652 * In the case of an error response, command specific error code is
3653 * returned in this field.
3657 * This field is used in Output records to indicate that the output is
3658 * completely written to RAM. This field should be read as '1' to
3659 * indicate that the output has been completely written. When writing a
3660 * command completion or response to an internal processor, the order of
3661 * writes has to be such that this field is written last.
3663 } __attribute__((packed));
3665 /* Port Tx Statistics Formats (408 bytes) */
3667 struct tx_port_stats {
3668 uint64_t tx_64b_frames;
3669 /* Total Number of 64 Bytes frames transmitted */
3670 uint64_t tx_65b_127b_frames;
3671 /* Total Number of 65-127 Bytes frames transmitted */
3672 uint64_t tx_128b_255b_frames;
3673 /* Total Number of 128-255 Bytes frames transmitted */
3674 uint64_t tx_256b_511b_frames;
3675 /* Total Number of 256-511 Bytes frames transmitted */
3676 uint64_t tx_512b_1023b_frames;
3677 /* Total Number of 512-1023 Bytes frames transmitted */
3678 uint64_t tx_1024b_1518_frames;
3679 /* Total Number of 1024-1518 Bytes frames transmitted */
3680 uint64_t tx_good_vlan_frames;
3682 * Total Number of each good VLAN (exludes FCS errors) frame transmitted
3683 * which is 1519 to 1522 bytes in length inclusive (excluding framing
3684 * bits but including FCS bytes).
3686 uint64_t tx_1519b_2047_frames;
3687 /* Total Number of 1519-2047 Bytes frames transmitted */
3688 uint64_t tx_2048b_4095b_frames;
3689 /* Total Number of 2048-4095 Bytes frames transmitted */
3690 uint64_t tx_4096b_9216b_frames;
3691 /* Total Number of 4096-9216 Bytes frames transmitted */
3692 uint64_t tx_9217b_16383b_frames;
3693 /* Total Number of 9217-16383 Bytes frames transmitted */
3694 uint64_t tx_good_frames;
3695 /* Total Number of good frames transmitted */
3696 uint64_t tx_total_frames;
3697 /* Total Number of frames transmitted */
3698 uint64_t tx_ucast_frames;
3699 /* Total number of unicast frames transmitted */
3700 uint64_t tx_mcast_frames;
3701 /* Total number of multicast frames transmitted */
3702 uint64_t tx_bcast_frames;
3703 /* Total number of broadcast frames transmitted */
3704 uint64_t tx_pause_frames;
3705 /* Total number of PAUSE control frames transmitted */
3706 uint64_t tx_pfc_frames;
3707 /* Total number of PFC/per-priority PAUSE control frames transmitted */
3708 uint64_t tx_jabber_frames;
3709 /* Total number of jabber frames transmitted */
3710 uint64_t tx_fcs_err_frames;
3711 /* Total number of frames transmitted with FCS error */
3712 uint64_t tx_control_frames;
3713 /* Total number of control frames transmitted */
3714 uint64_t tx_oversz_frames;
3715 /* Total number of over-sized frames transmitted */
3716 uint64_t tx_single_dfrl_frames;
3717 /* Total number of frames with single deferral */
3718 uint64_t tx_multi_dfrl_frames;
3719 /* Total number of frames with multiple deferrals */
3720 uint64_t tx_single_coll_frames;
3721 /* Total number of frames with single collision */
3722 uint64_t tx_multi_coll_frames;
3723 /* Total number of frames with multiple collisions */
3724 uint64_t tx_late_coll_frames;
3725 /* Total number of frames with late collisions */
3726 uint64_t tx_excessive_coll_frames;
3727 /* Total number of frames with excessive collisions */
3728 uint64_t tx_frag_frames;
3729 /* Total number of fragmented frames transmitted */
3731 /* Total number of transmit errors */
3732 uint64_t tx_tagged_frames;
3733 /* Total number of single VLAN tagged frames transmitted */
3734 uint64_t tx_dbl_tagged_frames;
3735 /* Total number of double VLAN tagged frames transmitted */
3736 uint64_t tx_runt_frames;
3737 /* Total number of runt frames transmitted */
3738 uint64_t tx_fifo_underruns;
3739 /* Total number of TX FIFO under runs */
3740 uint64_t tx_pfc_ena_frames_pri0;
3741 /* Total number of PFC frames with PFC enabled bit for Pri 0 transmitted */
3742 uint64_t tx_pfc_ena_frames_pri1;
3743 /* Total number of PFC frames with PFC enabled bit for Pri 1 transmitted */
3744 uint64_t tx_pfc_ena_frames_pri2;
3745 /* Total number of PFC frames with PFC enabled bit for Pri 2 transmitted */
3746 uint64_t tx_pfc_ena_frames_pri3;
3747 /* Total number of PFC frames with PFC enabled bit for Pri 3 transmitted */
3748 uint64_t tx_pfc_ena_frames_pri4;
3749 /* Total number of PFC frames with PFC enabled bit for Pri 4 transmitted */
3750 uint64_t tx_pfc_ena_frames_pri5;
3751 /* Total number of PFC frames with PFC enabled bit for Pri 5 transmitted */
3752 uint64_t tx_pfc_ena_frames_pri6;
3753 /* Total number of PFC frames with PFC enabled bit for Pri 6 transmitted */
3754 uint64_t tx_pfc_ena_frames_pri7;
3755 /* Total number of PFC frames with PFC enabled bit for Pri 7 transmitted */
3756 uint64_t tx_eee_lpi_events;
3757 /* Total number of EEE LPI Events on TX */
3758 uint64_t tx_eee_lpi_duration;
3759 /* EEE LPI Duration Counter on TX */
3760 uint64_t tx_llfc_logical_msgs;
3761 /* Total number of Link Level Flow Control (LLFC) messages transmitted */
3762 uint64_t tx_hcfc_msgs;
3763 /* Total number of HCFC messages transmitted */
3764 uint64_t tx_total_collisions;
3765 /* Total number of TX collisions */
3767 /* Total number of transmitted bytes */
3768 uint64_t tx_xthol_frames;
3769 /* Total number of end-to-end HOL frames */
3770 uint64_t tx_stat_discard;
3771 /* Total Tx Drops per Port reported by STATS block */
3772 uint64_t tx_stat_error;
3773 /* Total Tx Error Drops per Port reported by STATS block */
3774 } __attribute__((packed));
3776 /* Port Rx Statistics Formats (528 bytes) */
3778 struct rx_port_stats {
3779 uint64_t rx_64b_frames;
3780 /* Total Number of 64 Bytes frames received */
3781 uint64_t rx_65b_127b_frames;
3782 /* Total Number of 65-127 Bytes frames received */
3783 uint64_t rx_128b_255b_frames;
3784 /* Total Number of 128-255 Bytes frames received */
3785 uint64_t rx_256b_511b_frames;
3786 /* Total Number of 256-511 Bytes frames received */
3787 uint64_t rx_512b_1023b_frames;
3788 /* Total Number of 512-1023 Bytes frames received */
3789 uint64_t rx_1024b_1518_frames;
3790 /* Total Number of 1024-1518 Bytes frames received */
3791 uint64_t rx_good_vlan_frames;
3793 * Total Number of each good VLAN (exludes FCS errors) frame received
3794 * which is 1519 to 1522 bytes in length inclusive (excluding framing
3795 * bits but including FCS bytes).
3797 uint64_t rx_1519b_2047b_frames;
3798 /* Total Number of 1519-2047 Bytes frames received */
3799 uint64_t rx_2048b_4095b_frames;
3800 /* Total Number of 2048-4095 Bytes frames received */
3801 uint64_t rx_4096b_9216b_frames;
3802 /* Total Number of 4096-9216 Bytes frames received */
3803 uint64_t rx_9217b_16383b_frames;
3804 /* Total Number of 9217-16383 Bytes frames received */
3805 uint64_t rx_total_frames;
3806 /* Total number of frames received */
3807 uint64_t rx_ucast_frames;
3808 /* Total number of unicast frames received */
3809 uint64_t rx_mcast_frames;
3810 /* Total number of multicast frames received */
3811 uint64_t rx_bcast_frames;
3812 /* Total number of broadcast frames received */
3813 uint64_t rx_fcs_err_frames;
3814 /* Total number of received frames with FCS error */
3815 uint64_t rx_ctrl_frames;
3816 /* Total number of control frames received */
3817 uint64_t rx_pause_frames;
3818 /* Total number of PAUSE frames received */
3819 uint64_t rx_pfc_frames;
3820 /* Total number of PFC frames received */
3821 uint64_t rx_unsupported_opcode_frames;
3822 /* Total number of frames received with an unsupported opcode */
3823 uint64_t rx_unsupported_da_pausepfc_frames;
3825 * Total number of frames received with an unsupported DA for pause and
3828 uint64_t rx_wrong_sa_frames;
3829 /* Total number of frames received with an unsupported SA */
3830 uint64_t rx_align_err_frames;
3831 /* Total number of received packets with alignment error */
3832 uint64_t rx_oor_len_frames;
3833 /* Total number of received frames with out-of-range length */
3834 uint64_t rx_code_err_frames;
3835 /* Total number of received frames with error termination */
3836 uint64_t rx_false_carrier_frames;
3838 * Total number of received frames with a false carrier is detected
3839 * during idle, as defined by RX_ER samples active and RXD is 0xE. The
3840 * event is reported along with the statistics generated on the next
3841 * received frame. Only one false carrier condition can be detected and
3842 * logged between frames. Carrier event, valid for 10M/100M speed modes
3845 uint64_t rx_ovrsz_frames;
3846 /* Total number of over-sized frames received */
3847 uint64_t rx_jbr_frames;
3848 /* Total number of jabber packets received */
3849 uint64_t rx_mtu_err_frames;
3850 /* Total number of received frames with MTU error */
3851 uint64_t rx_match_crc_frames;
3852 /* Total number of received frames with CRC match */
3853 uint64_t rx_promiscuous_frames;
3854 /* Total number of frames received promiscuously */
3855 uint64_t rx_tagged_frames;
3856 /* Total number of received frames with one or two VLAN tags */
3857 uint64_t rx_double_tagged_frames;
3858 /* Total number of received frames with two VLAN tags */
3859 uint64_t rx_trunc_frames;
3860 /* Total number of truncated frames received */
3861 uint64_t rx_good_frames;
3862 /* Total number of good frames (without errors) received */
3863 uint64_t rx_pfc_xon2xoff_frames_pri0;
3865 * Total number of received PFC frames with transition from XON to XOFF
3868 uint64_t rx_pfc_xon2xoff_frames_pri1;
3870 * Total number of received PFC frames with transition from XON to XOFF
3873 uint64_t rx_pfc_xon2xoff_frames_pri2;
3875 * Total number of received PFC frames with transition from XON to XOFF
3878 uint64_t rx_pfc_xon2xoff_frames_pri3;
3880 * Total number of received PFC frames with transition from XON to XOFF
3883 uint64_t rx_pfc_xon2xoff_frames_pri4;
3885 * Total number of received PFC frames with transition from XON to XOFF
3888 uint64_t rx_pfc_xon2xoff_frames_pri5;
3890 * Total number of received PFC frames with transition from XON to XOFF
3893 uint64_t rx_pfc_xon2xoff_frames_pri6;
3895 * Total number of received PFC frames with transition from XON to XOFF
3898 uint64_t rx_pfc_xon2xoff_frames_pri7;
3900 * Total number of received PFC frames with transition from XON to XOFF
3903 uint64_t rx_pfc_ena_frames_pri0;
3904 /* Total number of received PFC frames with PFC enabled bit for Pri 0 */
3905 uint64_t rx_pfc_ena_frames_pri1;
3906 /* Total number of received PFC frames with PFC enabled bit for Pri 1 */
3907 uint64_t rx_pfc_ena_frames_pri2;
3908 /* Total number of received PFC frames with PFC enabled bit for Pri 2 */
3909 uint64_t rx_pfc_ena_frames_pri3;
3910 /* Total number of received PFC frames with PFC enabled bit for Pri 3 */
3911 uint64_t rx_pfc_ena_frames_pri4;
3912 /* Total number of received PFC frames with PFC enabled bit for Pri 4 */
3913 uint64_t rx_pfc_ena_frames_pri5;
3914 /* Total number of received PFC frames with PFC enabled bit for Pri 5 */
3915 uint64_t rx_pfc_ena_frames_pri6;
3916 /* Total number of received PFC frames with PFC enabled bit for Pri 6 */
3917 uint64_t rx_pfc_ena_frames_pri7;
3918 /* Total number of received PFC frames with PFC enabled bit for Pri 7 */
3919 uint64_t rx_sch_crc_err_frames;
3920 /* Total Number of frames received with SCH CRC error */
3921 uint64_t rx_undrsz_frames;
3922 /* Total Number of under-sized frames received */
3923 uint64_t rx_frag_frames;
3924 /* Total Number of fragmented frames received */
3925 uint64_t rx_eee_lpi_events;
3926 /* Total number of RX EEE LPI Events */
3927 uint64_t rx_eee_lpi_duration;
3928 /* EEE LPI Duration Counter on RX */
3929 uint64_t rx_llfc_physical_msgs;
3931 * Total number of physical type Link Level Flow Control (LLFC) messages
3934 uint64_t rx_llfc_logical_msgs;
3936 * Total number of logical type Link Level Flow Control (LLFC) messages
3939 uint64_t rx_llfc_msgs_with_crc_err;
3941 * Total number of logical type Link Level Flow Control (LLFC) messages
3942 * received with CRC error
3944 uint64_t rx_hcfc_msgs;
3945 /* Total number of HCFC messages received */
3946 uint64_t rx_hcfc_msgs_with_crc_err;
3947 /* Total number of HCFC messages received with CRC error */
3949 /* Total number of received bytes */
3950 uint64_t rx_runt_bytes;
3951 /* Total number of bytes received in runt frames */
3952 uint64_t rx_runt_frames;
3953 /* Total number of runt frames received */
3954 uint64_t rx_stat_discard;
3955 /* Total Rx Discards per Port reported by STATS block */
3956 uint64_t rx_stat_err;
3957 /* Total Rx Error Drops per Port reported by STATS block */
3958 } __attribute__((packed));
3962 * Description: This function is called by a driver to determine the HWRM
3963 * interface version supported by the HWRM firmware, the version of HWRM
3964 * firmware implementation, the name of HWRM firmware, the versions of other
3965 * embedded firmwares, and the names of other embedded firmwares, etc. Any
3966 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
3967 * be considered an invalid version.
3969 /* Input (24 bytes) */
3971 struct hwrm_ver_get_input {
3974 * This value indicates what type of request this is. The format for the
3975 * rest of the command is determined by this field.
3979 * This value indicates the what completion ring the request will be
3980 * optionally completed on. If the value is -1, then no CR completion
3981 * will be generated. Any other value must be a valid CR ring_id value
3982 * for this function.
3985 /* This value indicates the command sequence number. */
3988 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3989 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3993 * This is the host address where the response will be written when the
3994 * request is complete. This area must be 16B aligned and must be
3995 * cleared to zero before the request is made.
3997 uint8_t hwrm_intf_maj;
3999 * This field represents the major version of HWRM interface
4000 * specification supported by the driver HWRM implementation. The
4001 * interface major version is intended to change only when non backward
4002 * compatible changes are made to the HWRM interface specification.
4004 uint8_t hwrm_intf_min;
4006 * This field represents the minor version of HWRM interface
4007 * specification supported by the driver HWRM implementation. A change
4008 * in interface minor version is used to reflect significant backward
4009 * compatible modification to HWRM interface specification. This can be
4010 * due to addition or removal of functionality. HWRM interface
4011 * specifications with the same major version but different minor
4012 * versions are compatible.
4014 uint8_t hwrm_intf_upd;
4016 * This field represents the update version of HWRM interface
4017 * specification supported by the driver HWRM implementation. The
4018 * interface update version is used to reflect minor changes or bug
4019 * fixes to a released HWRM interface specification.
4021 uint8_t unused_0[5];
4022 } __attribute__((packed));
4024 /* Output (128 bytes) */
4026 struct hwrm_ver_get_output {
4027 uint16_t error_code;
4029 * Pass/Fail or error type Note: receiver to verify the in parameters,
4030 * and fail the call with an error when appropriate
4033 /* This field returns the type of original request. */
4035 /* This field provides original sequence number of the command. */
4038 * This field is the length of the response in bytes. The last byte of
4039 * the response is a valid flag that will read as '1' when the command
4040 * has been completely written to memory.
4042 uint8_t hwrm_intf_maj;
4044 * This field represents the major version of HWRM interface
4045 * specification supported by the HWRM implementation. The interface
4046 * major version is intended to change only when non backward compatible
4047 * changes are made to the HWRM interface specification. A HWRM
4048 * implementation that is compliant with this specification shall
4049 * provide value of 1 in this field.
4051 uint8_t hwrm_intf_min;
4053 * This field represents the minor version of HWRM interface
4054 * specification supported by the HWRM implementation. A change in
4055 * interface minor version is used to reflect significant backward
4056 * compatible modification to HWRM interface specification. This can be
4057 * due to addition or removal of functionality. HWRM interface
4058 * specifications with the same major version but different minor
4059 * versions are compatible. A HWRM implementation that is compliant with
4060 * this specification shall provide value of 2 in this field.
4062 uint8_t hwrm_intf_upd;
4064 * This field represents the update version of HWRM interface
4065 * specification supported by the HWRM implementation. The interface
4066 * update version is used to reflect minor changes or bug fixes to a
4067 * released HWRM interface specification. A HWRM implementation that is
4068 * compliant with this specification shall provide value of 2 in this
4071 uint8_t hwrm_intf_rsvd;
4072 uint8_t hwrm_fw_maj;
4074 * This field represents the major version of HWRM firmware. A change in
4075 * firmware major version represents a major firmware release.
4077 uint8_t hwrm_fw_min;
4079 * This field represents the minor version of HWRM firmware. A change in
4080 * firmware minor version represents significant firmware functionality
4083 uint8_t hwrm_fw_bld;
4085 * This field represents the build version of HWRM firmware. A change in
4086 * firmware build version represents bug fixes to a released firmware.
4088 uint8_t hwrm_fw_rsvd;
4090 * This field is a reserved field. This field can be used to represent
4091 * firmware branches or customer specific releases tied to a specific
4092 * (major,minor,update) version of the HWRM firmware.
4094 uint8_t mgmt_fw_maj;
4096 * This field represents the major version of mgmt firmware. A change in
4097 * major version represents a major release.
4099 uint8_t mgmt_fw_min;
4101 * This field represents the minor version of mgmt firmware. A change in
4102 * minor version represents significant functionality changes.
4104 uint8_t mgmt_fw_bld;
4106 * This field represents the build version of mgmt firmware. A change in
4107 * update version represents bug fixes.
4109 uint8_t mgmt_fw_rsvd;
4111 * This field is a reserved field. This field can be used to represent
4112 * firmware branches or customer specific releases tied to a specific
4113 * (major,minor,update) version
4115 uint8_t netctrl_fw_maj;
4117 * This field represents the major version of network control firmware.
4118 * A change in major version represents a major release.
4120 uint8_t netctrl_fw_min;
4122 * This field represents the minor version of network control firmware.
4123 * A change in minor version represents significant functionality
4126 uint8_t netctrl_fw_bld;
4128 * This field represents the build version of network control firmware.
4129 * A change in update version represents bug fixes.
4131 uint8_t netctrl_fw_rsvd;
4133 * This field is a reserved field. This field can be used to represent
4134 * firmware branches or customer specific releases tied to a specific
4135 * (major,minor,update) version
4139 * This field is reserved for future use. The responder should set it to
4140 * 0. The requester should ignore this field.
4142 uint8_t roce_fw_maj;
4144 * This field represents the major version of RoCE firmware. A change in
4145 * major version represents a major release.
4147 uint8_t roce_fw_min;
4149 * This field represents the minor version of RoCE firmware. A change in
4150 * minor version represents significant functionality changes.
4152 uint8_t roce_fw_bld;
4154 * This field represents the build version of RoCE firmware. A change in
4155 * update version represents bug fixes.
4157 uint8_t roce_fw_rsvd;
4159 * This field is a reserved field. This field can be used to represent
4160 * firmware branches or customer specific releases tied to a specific
4161 * (major,minor,update) version
4163 char hwrm_fw_name[16];
4165 * This field represents the name of HWRM FW (ASCII chars with NULL at
4168 char mgmt_fw_name[16];
4170 * This field represents the name of mgmt FW (ASCII chars with NULL at
4173 char netctrl_fw_name[16];
4175 * This field represents the name of network control firmware (ASCII
4176 * chars with NULL at the end).
4178 uint32_t reserved2[4];
4180 * This field is reserved for future use. The responder should set it to
4181 * 0. The requester should ignore this field.
4183 char roce_fw_name[16];
4185 * This field represents the name of RoCE FW (ASCII chars with NULL at
4189 /* This field returns the chip number. */
4191 /* This field returns the revision of chip. */
4193 /* This field returns the chip metal number. */
4194 uint8_t chip_bond_id;
4195 /* This field returns the bond id of the chip. */
4196 uint8_t chip_platform_type;
4198 * This value indicates the type of platform used for chip
4202 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
4203 /* FPGA platform of the chip. */
4204 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
4205 /* Palladium platform of the chip. */
4206 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
4207 uint16_t max_req_win_len;
4209 * This field returns the maximum value of request window that is
4210 * supported by the HWRM. The request window is mapped into device
4211 * address space using MMIO.
4213 uint16_t max_resp_len;
4214 /* This field returns the maximum value of response buffer in bytes. */
4215 uint16_t def_req_timeout;
4216 /* This field returns the default request timeout value in milliseconds. */
4222 * This field is used in Output records to indicate that the output is
4223 * completely written to RAM. This field should be read as '1' to
4224 * indicate that the output has been completely written. When writing a
4225 * command completion or response to an internal processor, the order of
4226 * writes has to be such that this field is written last.
4228 } __attribute__((packed));
4230 /* hwrm_func_reset */
4232 * Description: This command resets a hardware function (PCIe function) and
4233 * frees any resources used by the function. This command shall be initiated by
4234 * the driver after an FLR has occurred to prepare the function for re-use. This
4235 * command may also be initiated by a driver prior to doing it's own
4236 * configuration. This command puts the function into the reset state. In the
4237 * reset state, global and port related features of the chip are not available.
4240 * Note: This command will reset a function that has already been disabled or
4241 * idled. The command returns all the resources owned by the function so a new
4242 * driver may allocate and configure resources normally.
4244 /* Input (24 bytes) */
4246 struct hwrm_func_reset_input {
4249 * This value indicates what type of request this is. The format for the
4250 * rest of the command is determined by this field.
4254 * This value indicates the what completion ring the request will be
4255 * optionally completed on. If the value is -1, then no CR completion
4256 * will be generated. Any other value must be a valid CR ring_id value
4257 * for this function.
4260 /* This value indicates the command sequence number. */
4263 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4264 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4268 * This is the host address where the response will be written when the
4269 * request is complete. This area must be 16B aligned and must be
4270 * cleared to zero before the request is made.
4273 /* This bit must be '1' for the vf_id_valid field to be configured. */
4274 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
4277 * The ID of the VF that this PF is trying to reset. Only the parent PF
4278 * shall be allowed to reset a child VF. A parent PF driver shall use
4279 * this field only when a specific child VF is requested to be reset.
4281 uint8_t func_reset_level;
4282 /* This value indicates the level of a function reset. */
4284 * Reset the caller function and its children VFs (if any). If
4285 * no children functions exist, then reset the caller function
4288 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
4289 /* Reset the caller function only */
4290 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
4292 * Reset all children VFs of the caller function driver if the
4293 * caller is a PF driver. It is an error to specify this level
4294 * by a VF driver. It is an error to specify this level by a PF
4295 * driver with no children VFs.
4297 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN UINT32_C(0x2)
4299 * Reset a specific VF of the caller function driver if the
4300 * caller is the parent PF driver. It is an error to specify
4301 * this level by a VF driver. It is an error to specify this
4302 * level by a PF driver that is not the parent of the VF that is
4303 * being requested to reset.
4305 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
4307 } __attribute__((packed));
4309 /* Output (16 bytes) */
4311 struct hwrm_func_reset_output {
4312 uint16_t error_code;
4314 * Pass/Fail or error type Note: receiver to verify the in parameters,
4315 * and fail the call with an error when appropriate
4318 /* This field returns the type of original request. */
4320 /* This field provides original sequence number of the command. */
4323 * This field is the length of the response in bytes. The last byte of
4324 * the response is a valid flag that will read as '1' when the command
4325 * has been completely written to memory.
4333 * This field is used in Output records to indicate that the output is
4334 * completely written to RAM. This field should be read as '1' to
4335 * indicate that the output has been completely written. When writing a
4336 * command completion or response to an internal processor, the order of
4337 * writes has to be such that this field is written last.
4339 } __attribute__((packed));
4341 /* hwrm_func_getfid */
4343 * Description: This command returns the FID value for the function. If a valid
4344 * pci_id is provided, then this function returns fid for that PCI function.
4345 * Otherwise, it returns FID of the requesting function. This value is needed to
4346 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
4347 * the PCI bus. For PF-HWRM commands, there is no need for FID. Similarly there
4348 * is no need for FID for VF-HWRM commands. In the PF-VF communication, only PF
4349 * needs to know FIDs.
4351 /* Input (24 bytes) */
4353 struct hwrm_func_getfid_input {
4356 * This value indicates what type of request this is. The format for the
4357 * rest of the command is determined by this field.
4361 * This value indicates the what completion ring the request will be
4362 * optionally completed on. If the value is -1, then no CR completion
4363 * will be generated. Any other value must be a valid CR ring_id value
4364 * for this function.
4367 /* This value indicates the command sequence number. */
4370 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4371 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4375 * This is the host address where the response will be written when the
4376 * request is complete. This area must be 16B aligned and must be
4377 * cleared to zero before the request is made.
4380 /* This bit must be '1' for the pci_id field to be configured. */
4381 #define HWRM_FUNC_GETFID_INPUT_ENABLES_PCI_ID UINT32_C(0x1)
4384 * This value is the PCI ID of the queried function. If ARI is enabled,
4385 * then it is Bus Number (8b):Function Number(8b). Otherwise, it is Bus
4386 * Number (8b):Device Number (4b):Function Number(4b).
4389 } __attribute__((packed));
4391 /* Output (16 bytes) */
4393 struct hwrm_func_getfid_output {
4394 uint16_t error_code;
4396 * Pass/Fail or error type Note: receiver to verify the in parameters,
4397 * and fail the call with an error when appropriate
4400 /* This field returns the type of original request. */
4402 /* This field provides original sequence number of the command. */
4405 * This field is the length of the response in bytes. The last byte of
4406 * the response is a valid flag that will read as '1' when the command
4407 * has been completely written to memory.
4411 * FID value. This value is used to identify operations on the PCI bus
4412 * as belonging to a particular PCI function.
4421 * This field is used in Output records to indicate that the output is
4422 * completely written to RAM. This field should be read as '1' to
4423 * indicate that the output has been completely written. When writing a
4424 * command completion or response to an internal processor, the order of
4425 * writes has to be such that this field is written last.
4427 } __attribute__((packed));
4429 /* hwrm_func_vf_alloc */
4431 * Description: This command is used to allocate requested number of virtual
4432 * functions on a physical function. It will return the FID value of the first
4433 * virtual function. The FIDs of the remaining virtual functions can be derived
4434 * by sequentially incrementing the FID value of the first VF. This command
4435 * supports the following models for VF allocation: # Allocation of one or more
4436 * VFs from a PF without specifying the first VF ID # Allocation of multiple VFs
4437 * from a PF starting with a specific VF # Allocation of a specific VF from a PF
4438 * If this command is called on a virtual function or a physical function that
4439 * is not enabled for SR-IOV, the HWRM shall return an error. The VF IDs
4440 * returned by this function remain valid after the VF is disabled or reset.
4442 /* Input (24 bytes) */
4444 struct hwrm_func_vf_alloc_input {
4447 * This value indicates what type of request this is. The format for the
4448 * rest of the command is determined by this field.
4452 * This value indicates the what completion ring the request will be
4453 * optionally completed on. If the value is -1, then no CR completion
4454 * will be generated. Any other value must be a valid CR ring_id value
4455 * for this function.
4458 /* This value indicates the command sequence number. */
4461 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4462 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4466 * This is the host address where the response will be written when the
4467 * request is complete. This area must be 16B aligned and must be
4468 * cleared to zero before the request is made.
4471 /* This bit must be '1' for the first_vf_id field to be configured. */
4472 #define HWRM_FUNC_VF_ALLOC_INPUT_ENABLES_FIRST_VF_ID UINT32_C(0x1)
4473 uint16_t first_vf_id;
4475 * This value is used to identify a Virtual Function (VF). The scope of
4476 * VF ID is local within a PF.
4479 /* The number of virtual functions requested. */
4480 } __attribute__((packed));
4482 /* Output (16 bytes) */
4484 struct hwrm_func_vf_alloc_output {
4485 uint16_t error_code;
4487 * Pass/Fail or error type Note: receiver to verify the in parameters,
4488 * and fail the call with an error when appropriate
4491 /* This field returns the type of original request. */
4493 /* This field provides original sequence number of the command. */
4496 * This field is the length of the response in bytes. The last byte of
4497 * the response is a valid flag that will read as '1' when the command
4498 * has been completely written to memory.
4500 uint16_t first_vf_id;
4501 /* The ID of the first VF allocated. */
4509 * This field is used in Output records to indicate that the output is
4510 * completely written to RAM. This field should be read as '1' to
4511 * indicate that the output has been completely written. When writing a
4512 * command completion or response to an internal processor, the order of
4513 * writes has to be such that this field is written last.
4515 } __attribute__((packed));
4517 /* hwrm_func_vf_free */
4519 * Description: This command will free allocated virtual functions on a physical
4520 * function. If this command is called on a virtual function or a physical
4521 * function that is not enabled for SR-IOV, the HWRM shall return an error.
4522 * After the successful completion of this command, the VF IDs of the VFs that
4523 * are freed on the PF are invalid.
4525 /* Input (24 bytes) */
4527 struct hwrm_func_vf_free_input {
4530 * This value indicates what type of request this is. The format for the
4531 * rest of the command is determined by this field.
4535 * This value indicates the what completion ring the request will be
4536 * optionally completed on. If the value is -1, then no CR completion
4537 * will be generated. Any other value must be a valid CR ring_id value
4538 * for this function.
4541 /* This value indicates the command sequence number. */
4544 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4545 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4549 * This is the host address where the response will be written when the
4550 * request is complete. This area must be 16B aligned and must be
4551 * cleared to zero before the request is made.
4554 /* This bit must be '1' for the first_vf_id field to be configured. */
4555 #define HWRM_FUNC_VF_FREE_INPUT_ENABLES_FIRST_VF_ID UINT32_C(0x1)
4556 uint16_t first_vf_id;
4558 * This value is used to identify a Virtual Function (VF). The scope of
4559 * VF ID is local within a PF.
4563 * The number of virtual functions requested. 0xFFFF - Cleanup all
4564 * children of this PF.
4566 } __attribute__((packed));
4568 /* Output (16 bytes) */
4570 struct hwrm_func_vf_free_output {
4571 uint16_t error_code;
4573 * Pass/Fail or error type Note: receiver to verify the in parameters,
4574 * and fail the call with an error when appropriate
4577 /* This field returns the type of original request. */
4579 /* This field provides original sequence number of the command. */
4582 * This field is the length of the response in bytes. The last byte of
4583 * the response is a valid flag that will read as '1' when the command
4584 * has been completely written to memory.
4592 * This field is used in Output records to indicate that the output is
4593 * completely written to RAM. This field should be read as '1' to
4594 * indicate that the output has been completely written. When writing a
4595 * command completion or response to an internal processor, the order of
4596 * writes has to be such that this field is written last.
4598 } __attribute__((packed));
4600 /* hwrm_func_vf_cfg */
4602 * Description: This command allows configuration of a VF by its driver. If this
4603 * function is called by a PF driver, then the HWRM shall fail this command. If
4604 * guest VLAN and/or MAC address are provided in this command, then the HWRM
4605 * shall set up appropriate MAC/VLAN filters for the VF that is being
4606 * configured. A VF driver should set VF MTU/MRU using this command prior to
4607 * allocating RX VNICs or TX rings for the corresponding VF.
4609 /* Input (32 bytes) */
4611 struct hwrm_func_vf_cfg_input {
4614 * This value indicates what type of request this is. The format for the
4615 * rest of the command is determined by this field.
4619 * This value indicates the what completion ring the request will be
4620 * optionally completed on. If the value is -1, then no CR completion
4621 * will be generated. Any other value must be a valid CR ring_id value
4622 * for this function.
4625 /* This value indicates the command sequence number. */
4628 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4629 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4633 * This is the host address where the response will be written when the
4634 * request is complete. This area must be 16B aligned and must be
4635 * cleared to zero before the request is made.
4638 /* This bit must be '1' for the mtu field to be configured. */
4639 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
4640 /* This bit must be '1' for the guest_vlan field to be configured. */
4641 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN UINT32_C(0x2)
4642 /* This bit must be '1' for the async_event_cr field to be configured. */
4643 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4)
4644 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
4645 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x8)
4648 * The maximum transmission unit requested on the function. The HWRM
4649 * should make sure that the mtu of the function does not exceed the mtu
4650 * of the physical port that this function is associated with. In
4651 * addition to requesting mtu per function, it is possible to configure
4652 * mtu per transmit ring. By default, the mtu of each transmit ring
4653 * associated with a function is equal to the mtu of the function. The
4654 * HWRM should make sure that the mtu of each transmit ring that is
4655 * assigned to a function has a valid mtu.
4657 uint16_t guest_vlan;
4659 * The guest VLAN for the function being configured. This field's format
4660 * is same as 802.1Q Tag's Tag Control Information (TCI) format that
4661 * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
4663 uint16_t async_event_cr;
4665 * ID of the target completion ring for receiving asynchronous event
4666 * completions. If this field is not valid, then the HWRM shall use the
4667 * default completion ring of the function that is being configured as
4668 * the target completion ring for providing any asynchronous event
4669 * completions for that function. If this field is valid, then the HWRM
4670 * shall use the completion ring identified by this ID as the target
4671 * completion ring for providing any asynchronous event completions for
4672 * the function that is being configured.
4674 uint8_t dflt_mac_addr[6];
4676 * This value is the current MAC address requested by the VF driver to
4677 * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
4678 * MAC address configuration is requested by the VF driver. The parent
4679 * PF driver may reject or overwrite this MAC address.
4681 } __attribute__((packed));
4683 /* Output (16 bytes) */
4685 struct hwrm_func_vf_cfg_output {
4686 uint16_t error_code;
4688 * Pass/Fail or error type Note: receiver to verify the in parameters,
4689 * and fail the call with an error when appropriate
4692 /* This field returns the type of original request. */
4694 /* This field provides original sequence number of the command. */
4697 * This field is the length of the response in bytes. The last byte of
4698 * the response is a valid flag that will read as '1' when the command
4699 * has been completely written to memory.
4707 * This field is used in Output records to indicate that the output is
4708 * completely written to RAM. This field should be read as '1' to
4709 * indicate that the output has been completely written. When writing a
4710 * command completion or response to an internal processor, the order of
4711 * writes has to be such that this field is written last.
4713 } __attribute__((packed));
4715 /* hwrm_func_qcaps */
4717 * Description: This command returns capabilities of a function. The input FID
4718 * value is used to indicate what function is being queried. This allows a
4719 * physical function driver to query virtual functions that are children of the
4720 * physical function. The output FID value is needed to configure Rings and
4721 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
4723 /* Input (24 bytes) */
4725 struct hwrm_func_qcaps_input {
4728 * This value indicates what type of request this is. The format for the
4729 * rest of the command is determined by this field.
4733 * This value indicates the what completion ring the request will be
4734 * optionally completed on. If the value is -1, then no CR completion
4735 * will be generated. Any other value must be a valid CR ring_id value
4736 * for this function.
4739 /* This value indicates the command sequence number. */
4742 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4743 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4747 * This is the host address where the response will be written when the
4748 * request is complete. This area must be 16B aligned and must be
4749 * cleared to zero before the request is made.
4753 * Function ID of the function that is being queried. 0xFF... (All Fs)
4754 * if the query is for the requesting function.
4756 uint16_t unused_0[3];
4757 } __attribute__((packed));
4759 /* Output (80 bytes) */
4761 struct hwrm_func_qcaps_output {
4762 uint16_t error_code;
4764 * Pass/Fail or error type Note: receiver to verify the in parameters,
4765 * and fail the call with an error when appropriate
4768 /* This field returns the type of original request. */
4770 /* This field provides original sequence number of the command. */
4773 * This field is the length of the response in bytes. The last byte of
4774 * the response is a valid flag that will read as '1' when the command
4775 * has been completely written to memory.
4779 * FID value. This value is used to identify operations on the PCI bus
4780 * as belonging to a particular PCI function.
4784 * Port ID of port that this function is associated with. Valid only for
4785 * the PF. 0xFF... (All Fs) if this function is not associated with any
4786 * port. 0xFF... (All Fs) if this function is called from a VF.
4789 /* If 1, then Push mode is supported on this function. */
4790 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
4791 /* If 1, then the global MSI-X auto-masking is enabled for the device. */
4792 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING UINT32_C(0x2)
4794 * If 1, then the Precision Time Protocol (PTP) processing is supported
4795 * on this function. The HWRM should enable PTP on only a single
4796 * Physical Function (PF) per port.
4798 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
4800 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is supported on
4803 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
4805 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is supported on
4808 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
4810 * If 1, then control and configuration of WoL magic packet is supported
4813 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED UINT32_C(0x20)
4815 * If 1, then control and configuration of bitmap pattern packet is
4816 * supported on this function.
4818 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
4819 uint8_t mac_address[6];
4821 * This value is current MAC address configured for this function. A
4822 * value of 00-00-00-00-00-00 indicates no MAC address is currently
4825 uint16_t max_rsscos_ctx;
4827 * The maximum number of RSS/COS contexts that can be allocated to the
4830 uint16_t max_cmpl_rings;
4832 * The maximum number of completion rings that can be allocated to the
4835 uint16_t max_tx_rings;
4837 * The maximum number of transmit rings that can be allocated to the
4840 uint16_t max_rx_rings;
4842 * The maximum number of receive rings that can be allocated to the
4845 uint16_t max_l2_ctxs;
4847 * The maximum number of L2 contexts that can be allocated to the
4851 /* The maximum number of VNICs that can be allocated to the function. */
4852 uint16_t first_vf_id;
4854 * The identifier for the first VF enabled on a PF. This is valid only
4855 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
4856 * called on a PF with SR-IOV disabled or on a VF.
4860 * The maximum number of VFs that can be allocated to the function. This
4861 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
4862 * command is called on a PF with SR-IOV disabled or on a VF.
4864 uint16_t max_stat_ctx;
4866 * The maximum number of statistic contexts that can be allocated to the
4869 uint32_t max_encap_records;
4871 * The maximum number of Encapsulation records that can be offloaded by
4874 uint32_t max_decap_records;
4876 * The maximum number of decapsulation records that can be offloaded by
4879 uint32_t max_tx_em_flows;
4881 * The maximum number of Exact Match (EM) flows that can be offloaded by
4882 * this function on the TX side.
4884 uint32_t max_tx_wm_flows;
4886 * The maximum number of Wildcard Match (WM) flows that can be offloaded
4887 * by this function on the TX side.
4889 uint32_t max_rx_em_flows;
4891 * The maximum number of Exact Match (EM) flows that can be offloaded by
4892 * this function on the RX side.
4894 uint32_t max_rx_wm_flows;
4896 * The maximum number of Wildcard Match (WM) flows that can be offloaded
4897 * by this function on the RX side.
4899 uint32_t max_mcast_filters;
4901 * The maximum number of multicast filters that can be supported by this
4902 * function on the RX side.
4904 uint32_t max_flow_id;
4906 * The maximum value of flow_id that can be supported in completion
4909 uint32_t max_hw_ring_grps;
4911 * The maximum number of HW ring groups that can be supported on this
4919 * This field is used in Output records to indicate that the output is
4920 * completely written to RAM. This field should be read as '1' to
4921 * indicate that the output has been completely written. When writing a
4922 * command completion or response to an internal processor, the order of
4923 * writes has to be such that this field is written last.
4925 } __attribute__((packed));
4927 /* hwrm_func_qcfg */
4929 * Description: This command returns the current configuration of a function.
4930 * The input FID value is used to indicate what function is being queried. This
4931 * allows a physical function driver to query virtual functions that are
4932 * children of the physical function. The output FID value is needed to
4933 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
4936 /* Input (24 bytes) */
4938 struct hwrm_func_qcfg_input {
4941 * This value indicates what type of request this is. The format for the
4942 * rest of the command is determined by this field.
4946 * This value indicates the what completion ring the request will be
4947 * optionally completed on. If the value is -1, then no CR completion
4948 * will be generated. Any other value must be a valid CR ring_id value
4949 * for this function.
4952 /* This value indicates the command sequence number. */
4955 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4956 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4960 * This is the host address where the response will be written when the
4961 * request is complete. This area must be 16B aligned and must be
4962 * cleared to zero before the request is made.
4966 * Function ID of the function that is being queried. 0xFF... (All Fs)
4967 * if the query is for the requesting function.
4969 uint16_t unused_0[3];
4970 } __attribute__((packed));
4972 /* Output (72 bytes) */
4974 struct hwrm_func_qcfg_output {
4975 uint16_t error_code;
4977 * Pass/Fail or error type Note: receiver to verify the in parameters,
4978 * and fail the call with an error when appropriate
4981 /* This field returns the type of original request. */
4983 /* This field provides original sequence number of the command. */
4986 * This field is the length of the response in bytes. The last byte of
4987 * the response is a valid flag that will read as '1' when the command
4988 * has been completely written to memory.
4992 * FID value. This value is used to identify operations on the PCI bus
4993 * as belonging to a particular PCI function.
4997 * Port ID of port that this function is associated with. 0xFF... (All
4998 * Fs) if this function is not associated with any port.
5002 * This value is the current VLAN setting for this function. The value
5003 * of 0 for this field indicates no priority tagging or VLAN is used.
5004 * This field's format is same as 802.1Q Tag's Tag Control Information
5005 * (TCI) format that includes both Priority Code Point (PCP) and VLAN
5010 * If 1, then magic packet based Out-Of-Box WoL is enabled on the port
5011 * associated with this function.
5013 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED UINT32_C(0x1)
5015 * If 1, then bitmap pattern based Out-Of-Box WoL packet is enabled on
5016 * the port associated with this function.
5018 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
5019 uint8_t mac_address[6];
5021 * This value is current MAC address configured for this function. A
5022 * value of 00-00-00-00-00-00 indicates no MAC address is currently
5027 * This value is current PCI ID of this function. If ARI is enabled,
5028 * then it is Bus Number (8b):Function Number(8b). Otherwise, it is Bus
5029 * Number (8b):Device Number (4b):Function Number(4b).
5031 uint16_t alloc_rsscos_ctx;
5032 /* The number of RSS/COS contexts currently allocated to the function. */
5033 uint16_t alloc_cmpl_rings;
5035 * The number of completion rings currently allocated to the function.
5036 * This does not include the rings allocated to any children functions
5039 uint16_t alloc_tx_rings;
5041 * The number of transmit rings currently allocated to the function.
5042 * This does not include the rings allocated to any children functions
5045 uint16_t alloc_rx_rings;
5047 * The number of receive rings currently allocated to the function. This
5048 * does not include the rings allocated to any children functions if
5051 uint16_t alloc_l2_ctx;
5052 /* The allocated number of L2 contexts to the function. */
5053 uint16_t alloc_vnics;
5054 /* The allocated number of vnics to the function. */
5057 * The maximum transmission unit of the function. For rings allocated on
5058 * this function, this default value is used if ring MTU is not
5063 * The maximum receive unit of the function. For vnics allocated on this
5064 * function, this default value is used if vnic MRU is not specified.
5066 uint16_t stat_ctx_id;
5067 /* The statistics context assigned to a function. */
5068 uint8_t port_partition_type;
5070 * The HWRM shall return Unknown value for this field when this command
5071 * is used to query VF's configuration.
5073 /* Single physical function */
5074 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
5075 /* Multiple physical functions */
5076 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
5077 /* Network Partitioning 1.0 */
5078 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
5079 /* Network Partitioning 1.5 */
5080 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
5081 /* Network Partitioning 2.0 */
5082 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
5084 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
5086 uint16_t dflt_vnic_id;
5087 /* The default VNIC ID assigned to a function that is being queried. */
5092 * Minimum BW allocated for this function in Mbps. The HWRM will
5093 * translate this value into byte counter and time interval used for the
5094 * scheduler inside the device. A value of 0 indicates the minimum
5095 * bandwidth is not configured.
5099 * Maximum BW allocated for this function in Mbps. The HWRM will
5100 * translate this value into byte counter and time interval used for the
5101 * scheduler inside the device. A value of 0 indicates that the maximum
5102 * bandwidth is not configured.
5106 * This value indicates the Edge virtual bridge mode for the domain that
5107 * this function belongs to.
5109 /* No Edge Virtual Bridging (EVB) */
5110 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
5111 /* Virtual Ethernet Bridge (VEB) */
5112 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
5113 /* Virtual Ethernet Port Aggregator (VEPA) */
5114 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
5117 uint32_t alloc_mcast_filters;
5119 * The number of allocated multicast filters for this function on the RX
5122 uint32_t alloc_hw_ring_grps;
5123 /* The number of allocated HW ring groups for this function. */
5129 * This field is used in Output records to indicate that the output is
5130 * completely written to RAM. This field should be read as '1' to
5131 * indicate that the output has been completely written. When writing a
5132 * command completion or response to an internal processor, the order of
5133 * writes has to be such that this field is written last.
5135 } __attribute__((packed));
5139 * Description: This command allows configuration of a PF by the corresponding
5140 * PF driver. This command also allows configuration of a child VF by its parent
5141 * PF driver. The input FID value is used to indicate what function is being
5142 * configured. This allows a PF driver to configure the PF owned by itself or a
5143 * virtual function that is a child of the PF. This command allows to reserve
5144 * resources for a VF by its parent PF. To reverse the process, the command
5145 * should be called with all enables flags cleared for resources. This will free
5146 * allocated resources for the VF and return them to the resource pool. If this
5147 * command is requested by a VF driver to configure or reserve resources, then
5148 * the HWRM shall fail this command. If default MAC address and/or VLAN are
5149 * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
5150 * filters for the function that is being configured. If source properties
5151 * checks are enabled and default MAC address and/or IP address are provided in
5152 * this command, then the HWRM shall set appropriate source property checks
5153 * based on provided MAC and/or IP addresses. The parent PF driver should not
5154 * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
5155 * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
5156 * HWRM should ignore it. A function's MTU/MRU should be set prior to allocating
5157 * RX VNICs or TX rings.
5159 /* Input (88 bytes) */
5161 struct hwrm_func_cfg_input {
5164 * This value indicates what type of request this is. The format for the
5165 * rest of the command is determined by this field.
5169 * This value indicates the what completion ring the request will be
5170 * optionally completed on. If the value is -1, then no CR completion
5171 * will be generated. Any other value must be a valid CR ring_id value
5172 * for this function.
5175 /* This value indicates the command sequence number. */
5178 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5179 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5183 * This is the host address where the response will be written when the
5184 * request is complete. This area must be 16B aligned and must be
5185 * cleared to zero before the request is made.
5189 * Function ID of the function that is being configured. If set to
5190 * 0xFF... (All Fs), then the the configuration is for the requesting
5197 * When this bit is '1', the function is requested to be put in the
5200 #define HWRM_FUNC_CFG_INPUT_FLAGS_PROM_MODE UINT32_C(0x1)
5202 * When this bit is '1', the function is enabled with source MAC address
5203 * check. This is an anti-spoofing check. If this flag is set, then the
5204 * function shall be configured to allow transmission of frames with the
5205 * source MAC address that is configured for this function.
5207 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK UINT32_C(0x2)
5209 * When this bit is '1', the function is enabled with source IP address
5210 * check. This is an anti-spoofing check. If this flag is set, then the
5211 * function shall be configured to allow transmission of frames with the
5212 * source IP address that is configured for this function.
5214 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_IP_ADDR_CHECK UINT32_C(0x4)
5216 * When this bit is set to '1', the function shall be configured with
5217 * VLAN priority match. If the VLAN PRI of a packet originated from this
5218 * function does not match, then the packet shall be discarded.
5220 #define HWRM_FUNC_CFG_INPUT_FLAGS_VLAN_PRI_MATCH UINT32_C(0x8)
5222 * When this bit is set to '1', the function shall be configured to
5223 * check for VLAN priority match. If the VLAN PRI of a packet originated
5224 * from this function does not match, then the default VLAN PRI shall be
5227 #define HWRM_FUNC_CFG_INPUT_FLAGS_DFLT_PRI_NOMATCH UINT32_C(0x10)
5229 * When this bit is set to '1', the function shall be configured to not
5230 * allow the transmission of pause frames. PAUSE frames use 48-bit
5231 * destination multicast MAC address 01-80-C2-00-00-01.
5233 #define HWRM_FUNC_CFG_INPUT_FLAGS_DISABLE_PAUSE UINT32_C(0x20)
5235 * When this bit is set to '1', the function shall be configured to not
5236 * allow the transmission of Spanning Tree Protocol (STP) frames. STP
5237 * frames use Ethertype 0x0802 and 48-bit destination multicast MAC
5238 * address 01-80-C2-00-00-00 and 01-80-C2-00-00-08 for 802.1D and
5239 * 802.1ad respectively.
5241 #define HWRM_FUNC_CFG_INPUT_FLAGS_DISABLE_STP UINT32_C(0x40)
5243 * When this bit is set to '1', the function shall be configured to not
5244 * allow the transmission of Link Layer Discovery Protocol (LLDP)
5245 * frames. LLDP frames use Ethertype 0x88CC and 48-bit destination
5246 * multicast MAC address 01-80-C2-00-00-00 or 01-80-C2-00-00-03 or
5247 * 01-80-C2-00-00-0E.
5249 #define HWRM_FUNC_CFG_INPUT_FLAGS_DISABLE_LLDP UINT32_C(0x80)
5251 * When this bit is set to '1', the function shall be configured to not
5252 * allow the transmission of Precision Time Protocol (PTP) v2 frames.
5253 * PTP frames use Ethertype 0x88F7 and 48-bit destination multicast MAC
5254 * address 01-80-C2-00-00-0E or 01-1B-19-00-00-00.
5256 #define HWRM_FUNC_CFG_INPUT_FLAGS_DISABLE_PTPV2 UINT32_C(0x100)
5258 /* This bit must be '1' for the mtu field to be configured. */
5259 #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
5260 /* This bit must be '1' for the mru field to be configured. */
5261 #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
5262 /* This bit must be '1' for the num_rsscos_ctxs field to be configured. */
5263 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS UINT32_C(0x4)
5264 /* This bit must be '1' for the num_cmpl_rings field to be configured. */
5265 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS UINT32_C(0x8)
5266 /* This bit must be '1' for the num_tx_rings field to be configured. */
5267 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS UINT32_C(0x10)
5268 /* This bit must be '1' for the num_rx_rings field to be configured. */
5269 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS UINT32_C(0x20)
5270 /* This bit must be '1' for the num_l2_ctxs field to be configured. */
5271 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
5272 /* This bit must be '1' for the num_vnics field to be configured. */
5273 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS UINT32_C(0x80)
5274 /* This bit must be '1' for the num_stat_ctxs field to be configured. */
5275 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS UINT32_C(0x100)
5276 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
5277 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x200)
5278 /* This bit must be '1' for the dflt_vlan field to be configured. */
5279 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN UINT32_C(0x400)
5280 /* This bit must be '1' for the dflt_ip_addr field to be configured. */
5281 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR UINT32_C(0x800)
5282 /* This bit must be '1' for the min_bw field to be configured. */
5283 #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW UINT32_C(0x1000)
5284 /* This bit must be '1' for the max_bw field to be configured. */
5285 #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW UINT32_C(0x2000)
5286 /* This bit must be '1' for the async_event_cr field to be configured. */
5287 #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4000)
5289 * This bit must be '1' for the vlan_antispoof_mode field to be
5292 #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
5294 * This bit must be '1' for the allowed_vlan_pris field to be
5297 #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
5298 /* This bit must be '1' for the evb_mode field to be configured. */
5299 #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE UINT32_C(0x20000)
5301 * This bit must be '1' for the num_mcast_filters field to be
5304 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
5305 /* This bit must be '1' for the num_hw_ring_grps field to be configured. */
5306 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
5309 * The maximum transmission unit of the function. The HWRM should make
5310 * sure that the mtu of the function does not exceed the mtu of the
5311 * physical port that this function is associated with. In addition to
5312 * configuring mtu per function, it is possible to configure mtu per
5313 * transmit ring. By default, the mtu of each transmit ring associated
5314 * with a function is equal to the mtu of the function. The HWRM should
5315 * make sure that the mtu of each transmit ring that is assigned to a
5316 * function has a valid mtu.
5320 * The maximum receive unit of the function. The HWRM should make sure
5321 * that the mru of the function does not exceed the mru of the physical
5322 * port that this function is associated with. In addition to
5323 * configuring mru per function, it is possible to configure mru per
5324 * vnic. By default, the mru of each vnic associated with a function is
5325 * equal to the mru of the function. The HWRM should make sure that the
5326 * mru of each vnic that is assigned to a function has a valid mru.
5328 uint16_t num_rsscos_ctxs;
5329 /* The number of RSS/COS contexts requested for the function. */
5330 uint16_t num_cmpl_rings;
5332 * The number of completion rings requested for the function. This does
5333 * not include the rings allocated to any children functions if any.
5335 uint16_t num_tx_rings;
5337 * The number of transmit rings requested for the function. This does
5338 * not include the rings allocated to any children functions if any.
5340 uint16_t num_rx_rings;
5342 * The number of receive rings requested for the function. This does not
5343 * include the rings allocated to any children functions if any.
5345 uint16_t num_l2_ctxs;
5346 /* The requested number of L2 contexts for the function. */
5348 /* The requested number of vnics for the function. */
5349 uint16_t num_stat_ctxs;
5350 /* The requested number of statistic contexts for the function. */
5351 uint16_t num_hw_ring_grps;
5353 * The number of HW ring groups that should be reserved for this
5356 uint8_t dflt_mac_addr[6];
5357 /* The default MAC address for the function being configured. */
5360 * The default VLAN for the function being configured. This field's
5361 * format is same as 802.1Q Tag's Tag Control Information (TCI) format
5362 * that includes both Priority Code Point (PCP) and VLAN Identifier
5365 uint32_t dflt_ip_addr[4]; /* big endian */
5367 * The default IP address for the function being configured. This
5368 * address is only used in enabling source property check.
5372 * Minimum BW allocated for this function in Mbps. The HWRM will
5373 * translate this value into byte counter and time interval used for the
5374 * scheduler inside the device.
5378 * Maximum BW allocated for this function in Mbps. The HWRM will
5379 * translate this value into byte counter and time interval used for the
5380 * scheduler inside the device.
5382 uint16_t async_event_cr;
5384 * ID of the target completion ring for receiving asynchronous event
5385 * completions. If this field is not valid, then the HWRM shall use the
5386 * default completion ring of the function that is being configured as
5387 * the target completion ring for providing any asynchronous event
5388 * completions for that function. If this field is valid, then the HWRM
5389 * shall use the completion ring identified by this ID as the target
5390 * completion ring for providing any asynchronous event completions for
5391 * the function that is being configured.
5393 uint8_t vlan_antispoof_mode;
5394 /* VLAN Anti-spoofing mode. */
5395 /* No VLAN anti-spoofing checks are enabled */
5396 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
5397 /* Validate VLAN against the configured VLAN(s) */
5398 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN UINT32_C(0x1)
5399 /* Insert VLAN if it does not exist, otherwise discard */
5400 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE UINT32_C(0x2)
5401 /* Insert VLAN if it does not exist, override VLAN if it exists */
5402 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN UINT32_C(0x3)
5403 uint8_t allowed_vlan_pris;
5405 * This bit field defines VLAN PRIs that are allowed on this function.
5406 * If nth bit is set, then VLAN PRI n is allowed on this function.
5410 * The HWRM shall allow a PF driver to change EVB mode for the partition
5411 * it belongs to. The HWRM shall not allow a VF driver to change the EVB
5412 * mode. The HWRM shall take into account the switching of EVB mode from
5413 * one to another and reconfigure hardware resources as appropriately.
5414 * The switching from VEB to VEPA mode requires the disabling of the
5415 * loopback traffic. Additionally, source knock outs are handled
5416 * differently in VEB and VEPA modes.
5418 /* No Edge Virtual Bridging (EVB) */
5419 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
5420 /* Virtual Ethernet Bridge (VEB) */
5421 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB UINT32_C(0x1)
5422 /* Virtual Ethernet Port Aggregator (VEPA) */
5423 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA UINT32_C(0x2)
5425 uint16_t num_mcast_filters;
5427 * The number of multicast filters that should be reserved for this
5428 * function on the RX side.
5430 } __attribute__((packed));
5432 /* Output (16 bytes) */
5434 struct hwrm_func_cfg_output {
5435 uint16_t error_code;
5437 * Pass/Fail or error type Note: receiver to verify the in parameters,
5438 * and fail the call with an error when appropriate
5441 /* This field returns the type of original request. */
5443 /* This field provides original sequence number of the command. */
5446 * This field is the length of the response in bytes. The last byte of
5447 * the response is a valid flag that will read as '1' when the command
5448 * has been completely written to memory.
5456 * This field is used in Output records to indicate that the output is
5457 * completely written to RAM. This field should be read as '1' to
5458 * indicate that the output has been completely written. When writing a
5459 * command completion or response to an internal processor, the order of
5460 * writes has to be such that this field is written last.
5462 } __attribute__((packed));
5464 /* hwrm_func_qstats */
5466 * Description: This command returns statistics of a function. The input FID
5467 * value is used to indicate what function is being queried. This allows a
5468 * physical function driver to query virtual functions that are children of the
5469 * physical function. The HWRM shall return any unsupported counter with a value
5470 * of 0xFFFFFFFF for 32-bit counters and 0xFFFFFFFFFFFFFFFF for 64-bit counters.
5472 /* Input (24 bytes) */
5474 struct hwrm_func_qstats_input {
5477 * This value indicates what type of request this is. The format for the
5478 * rest of the command is determined by this field.
5482 * This value indicates the what completion ring the request will be
5483 * optionally completed on. If the value is -1, then no CR completion
5484 * will be generated. Any other value must be a valid CR ring_id value
5485 * for this function.
5488 /* This value indicates the command sequence number. */
5491 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5492 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5496 * This is the host address where the response will be written when the
5497 * request is complete. This area must be 16B aligned and must be
5498 * cleared to zero before the request is made.
5502 * Function ID of the function that is being queried. 0xFF... (All Fs)
5503 * if the query is for the requesting function.
5505 uint16_t unused_0[3];
5506 } __attribute__((packed));
5508 /* Output (176 bytes) */
5510 struct hwrm_func_qstats_output {
5511 uint16_t error_code;
5513 * Pass/Fail or error type Note: receiver to verify the in parameters,
5514 * and fail the call with an error when appropriate
5517 /* This field returns the type of original request. */
5519 /* This field provides original sequence number of the command. */
5522 * This field is the length of the response in bytes. The last byte of
5523 * the response is a valid flag that will read as '1' when the command
5524 * has been completely written to memory.
5526 uint64_t tx_ucast_pkts;
5527 /* Number of transmitted unicast packets on the function. */
5528 uint64_t tx_mcast_pkts;
5529 /* Number of transmitted multicast packets on the function. */
5530 uint64_t tx_bcast_pkts;
5531 /* Number of transmitted broadcast packets on the function. */
5532 uint64_t tx_err_pkts;
5534 * Number of transmitted packets that were dropped due to internal NIC
5535 * resource problems. For transmit, this can only happen if TMP is
5536 * configured to allow dropping in HOL blocking conditions, which is not
5537 * a normal configuration.
5539 uint64_t tx_drop_pkts;
5541 * Number of dropped packets on transmit path on the function. These are
5542 * packets that have been marked for drop by the TE CFA block or are
5543 * packets that exceeded the transmit MTU limit for the function.
5545 uint64_t tx_ucast_bytes;
5546 /* Number of transmitted bytes for unicast traffic on the function. */
5547 uint64_t tx_mcast_bytes;
5548 /* Number of transmitted bytes for multicast traffic on the function. */
5549 uint64_t tx_bcast_bytes;
5550 /* Number of transmitted bytes for broadcast traffic on the function. */
5551 uint64_t rx_ucast_pkts;
5552 /* Number of received unicast packets on the function. */
5553 uint64_t rx_mcast_pkts;
5554 /* Number of received multicast packets on the function. */
5555 uint64_t rx_bcast_pkts;
5556 /* Number of received broadcast packets on the function. */
5557 uint64_t rx_err_pkts;
5559 * Number of received packets that were dropped on the function due to
5560 * resource limitations. This can happen for 3 reasons. # The BD used
5561 * for the packet has a bad format. # There were no BDs available in the
5562 * ring for the packet. # There were no BDs available on-chip for the
5565 uint64_t rx_drop_pkts;
5567 * Number of dropped packets on received path on the function. These are
5568 * packets that have been marked for drop by the RE CFA.
5570 uint64_t rx_ucast_bytes;
5571 /* Number of received bytes for unicast traffic on the function. */
5572 uint64_t rx_mcast_bytes;
5573 /* Number of received bytes for multicast traffic on the function. */
5574 uint64_t rx_bcast_bytes;
5575 /* Number of received bytes for broadcast traffic on the function. */
5576 uint64_t rx_agg_pkts;
5577 /* Number of aggregated unicast packets on the function. */
5578 uint64_t rx_agg_bytes;
5579 /* Number of aggregated unicast bytes on the function. */
5580 uint64_t rx_agg_events;
5581 /* Number of aggregation events on the function. */
5582 uint64_t rx_agg_aborts;
5583 /* Number of aborted aggregations on the function. */
5590 * This field is used in Output records to indicate that the output is
5591 * completely written to RAM. This field should be read as '1' to
5592 * indicate that the output has been completely written. When writing a
5593 * command completion or response to an internal processor, the order of
5594 * writes has to be such that this field is written last.
5596 } __attribute__((packed));
5598 /* hwrm_func_clr_stats */
5600 * Description: This command clears statistics of a function. The input FID
5601 * value is used to indicate what function's statistics is being cleared. This
5602 * allows a physical function driver to clear statistics of virtual functions
5603 * that are children of the physical function.
5605 /* Input (24 bytes) */
5607 struct hwrm_func_clr_stats_input {
5610 * This value indicates what type of request this is. The format for the
5611 * rest of the command is determined by this field.
5615 * This value indicates the what completion ring the request will be
5616 * optionally completed on. If the value is -1, then no CR completion
5617 * will be generated. Any other value must be a valid CR ring_id value
5618 * for this function.
5621 /* This value indicates the command sequence number. */
5624 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5625 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5629 * This is the host address where the response will be written when the
5630 * request is complete. This area must be 16B aligned and must be
5631 * cleared to zero before the request is made.
5635 * Function ID of the function. 0xFF... (All Fs) if the query is for the
5636 * requesting function.
5638 uint16_t unused_0[3];
5639 } __attribute__((packed));
5641 /* Output (16 bytes) */
5643 struct hwrm_func_clr_stats_output {
5644 uint16_t error_code;
5646 * Pass/Fail or error type Note: receiver to verify the in parameters,
5647 * and fail the call with an error when appropriate
5650 /* This field returns the type of original request. */
5652 /* This field provides original sequence number of the command. */
5655 * This field is the length of the response in bytes. The last byte of
5656 * the response is a valid flag that will read as '1' when the command
5657 * has been completely written to memory.
5665 * This field is used in Output records to indicate that the output is
5666 * completely written to RAM. This field should be read as '1' to
5667 * indicate that the output has been completely written. When writing a
5668 * command completion or response to an internal processor, the order of
5669 * writes has to be such that this field is written last.
5671 } __attribute__((packed));
5673 /* hwrm_func_vf_resc_free */
5674 /* Description: This command frees resources of a vf. */
5675 /* Input (24 bytes) */
5677 struct hwrm_func_vf_resc_free_input {
5680 * This value indicates what type of request this is. The format for the
5681 * rest of the command is determined by this field.
5685 * This value indicates the what completion ring the request will be
5686 * optionally completed on. If the value is -1, then no CR completion
5687 * will be generated. Any other value must be a valid CR ring_id value
5688 * for this function.
5691 /* This value indicates the command sequence number. */
5694 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5695 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5699 * This is the host address where the response will be written when the
5700 * request is complete. This area must be 16B aligned and must be
5701 * cleared to zero before the request is made.
5705 * This value is used to identify a Virtual Function (VF). The scope of
5706 * VF ID is local within a PF.
5708 uint16_t unused_0[3];
5709 } __attribute__((packed));
5711 /* Output (16 bytes) */
5713 struct hwrm_func_vf_resc_free_output {
5714 uint16_t error_code;
5716 * Pass/Fail or error type Note: receiver to verify the in parameters,
5717 * and fail the call with an error when appropriate
5720 /* This field returns the type of original request. */
5722 /* This field provides original sequence number of the command. */
5725 * This field is the length of the response in bytes. The last byte of
5726 * the response is a valid flag that will read as '1' when the command
5727 * has been completely written to memory.
5735 * This field is used in Output records to indicate that the output is
5736 * completely written to RAM. This field should be read as '1' to
5737 * indicate that the output has been completely written. When writing a
5738 * command completion or response to an internal processor, the order of
5739 * writes has to be such that this field is written last.
5741 } __attribute__((packed));
5743 /* hwrm_func_vf_vnic_ids_query */
5744 /* Description: This command is used to query vf vnic ids. */
5745 /* Input (32 bytes) */
5747 struct hwrm_func_vf_vnic_ids_query_input {
5750 * This value indicates what type of request this is. The format for the
5751 * rest of the command is determined by this field.
5755 * This value indicates the what completion ring the request will be
5756 * optionally completed on. If the value is -1, then no CR completion
5757 * will be generated. Any other value must be a valid CR ring_id value
5758 * for this function.
5761 /* This value indicates the command sequence number. */
5764 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5765 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5769 * This is the host address where the response will be written when the
5770 * request is complete. This area must be 16B aligned and must be
5771 * cleared to zero before the request is made.
5775 * This value is used to identify a Virtual Function (VF). The scope of
5776 * VF ID is local within a PF.
5780 uint32_t max_vnic_id_cnt;
5781 /* Max number of vnic ids in vnic id table */
5782 uint64_t vnic_id_tbl_addr;
5783 /* This is the address for VF VNIC ID table */
5784 } __attribute__((packed));
5786 /* Output (16 bytes) */
5788 struct hwrm_func_vf_vnic_ids_query_output {
5789 uint16_t error_code;
5791 * Pass/Fail or error type Note: receiver to verify the in parameters,
5792 * and fail the call with an error when appropriate
5795 /* This field returns the type of original request. */
5797 /* This field provides original sequence number of the command. */
5800 * This field is the length of the response in bytes. The last byte of
5801 * the response is a valid flag that will read as '1' when the command
5802 * has been completely written to memory.
5804 uint32_t vnic_id_cnt;
5805 /* Actual number of vnic ids Each VNIC ID is written as a 32-bit number. */
5811 * This field is used in Output records to indicate that the output is
5812 * completely written to RAM. This field should be read as '1' to
5813 * indicate that the output has been completely written. When writing a
5814 * command completion or response to an internal processor, the order of
5815 * writes has to be such that this field is written last.
5817 } __attribute__((packed));
5819 /* hwrm_func_drv_rgtr */
5821 * Description: This command is used by the function driver to register its
5822 * information with the HWRM. A function driver shall implement this command. A
5823 * function driver shall use this command during the driver initialization right
5824 * after the HWRM version discovery and default ring resources allocation.
5826 /* Input (80 bytes) */
5828 struct hwrm_func_drv_rgtr_input {
5831 * This value indicates what type of request this is. The format for the
5832 * rest of the command is determined by this field.
5836 * This value indicates the what completion ring the request will be
5837 * optionally completed on. If the value is -1, then no CR completion
5838 * will be generated. Any other value must be a valid CR ring_id value
5839 * for this function.
5842 /* This value indicates the command sequence number. */
5845 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5846 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5850 * This is the host address where the response will be written when the
5851 * request is complete. This area must be 16B aligned and must be
5852 * cleared to zero before the request is made.
5856 * When this bit is '1', the function driver is requesting all requests
5857 * from its children VF drivers to be forwarded to itself. This flag can
5858 * only be set by the PF driver. If a VF driver sets this flag, it
5859 * should be ignored by the HWRM.
5861 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
5863 * When this bit is '1', the function is requesting none of the requests
5864 * from its children VF drivers to be forwarded to itself. This flag can
5865 * only be set by the PF driver. If a VF driver sets this flag, it
5866 * should be ignored by the HWRM.
5868 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
5870 /* This bit must be '1' for the os_type field to be configured. */
5871 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
5872 /* This bit must be '1' for the ver field to be configured. */
5873 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
5874 /* This bit must be '1' for the timestamp field to be configured. */
5875 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
5876 /* This bit must be '1' for the vf_req_fwd field to be configured. */
5877 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
5878 /* This bit must be '1' for the async_event_fwd field to be configured. */
5879 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
5881 /* This value indicates the type of OS. */
5883 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
5884 /* Other OS not listed below. */
5885 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
5887 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
5889 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
5891 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
5893 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
5895 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
5896 /* VMware ESXi OS. */
5897 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
5898 /* Microsoft Windows 8 64-bit OS. */
5899 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
5900 /* Microsoft Windows Server 2012 R2 OS. */
5901 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
5903 /* This is the major version of the driver. */
5905 /* This is the minor version of the driver. */
5907 /* This is the update version of the driver. */
5912 * This is a 32-bit timestamp provided by the driver for keep alive. The
5913 * timestamp is in multiples of 1ms.
5916 uint32_t vf_req_fwd[8];
5918 * This is a 256-bit bit mask provided by the PF driver for letting the
5919 * HWRM know what commands issued by the VF driver to the HWRM should be
5920 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
5921 * Setting Nth bit to 1 indicates that requests from the VF driver with
5922 * req_type equal to N shall be forwarded to the parent PF driver. This
5923 * field is not valid for the VF driver.
5925 uint32_t async_event_fwd[8];
5927 * This is a 256-bit bit mask provided by the function driver (PF or VF
5928 * driver) to indicate the list of asynchronous event completions to be
5929 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
5930 * by the function driver shall result in the HWRM forwarding
5931 * asynchronous event completion with event_id equal to N. If all bits
5932 * are set to 0 (value of 0), then the HWRM shall not forward any
5933 * asynchronous event completion to this function driver.
5935 } __attribute__((packed));
5937 /* Output (16 bytes) */
5939 struct hwrm_func_drv_rgtr_output {
5940 uint16_t error_code;
5942 * Pass/Fail or error type Note: receiver to verify the in parameters,
5943 * and fail the call with an error when appropriate
5946 /* This field returns the type of original request. */
5948 /* This field provides original sequence number of the command. */
5951 * This field is the length of the response in bytes. The last byte of
5952 * the response is a valid flag that will read as '1' when the command
5953 * has been completely written to memory.
5961 * This field is used in Output records to indicate that the output is
5962 * completely written to RAM. This field should be read as '1' to
5963 * indicate that the output has been completely written. When writing a
5964 * command completion or response to an internal processor, the order of
5965 * writes has to be such that this field is written last.
5967 } __attribute__((packed));
5969 /* hwrm_func_drv_unrgtr */
5971 * Description: This command is used by the function driver to un register with
5972 * the HWRM. A function driver shall implement this command. A function driver
5973 * shall use this command during the driver unloading.
5975 /* Input (24 bytes) */
5977 struct hwrm_func_drv_unrgtr_input {
5980 * This value indicates what type of request this is. The format for the
5981 * rest of the command is determined by this field.
5985 * This value indicates the what completion ring the request will be
5986 * optionally completed on. If the value is -1, then no CR completion
5987 * will be generated. Any other value must be a valid CR ring_id value
5988 * for this function.
5991 /* This value indicates the command sequence number. */
5994 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5995 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5999 * This is the host address where the response will be written when the
6000 * request is complete. This area must be 16B aligned and must be
6001 * cleared to zero before the request is made.
6005 * When this bit is '1', the function driver is notifying the HWRM to
6006 * prepare for the shutdown.
6008 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN UINT32_C(0x1)
6010 } __attribute__((packed));
6012 /* Output (16 bytes) */
6014 struct hwrm_func_drv_unrgtr_output {
6015 uint16_t error_code;
6017 * Pass/Fail or error type Note: receiver to verify the in parameters,
6018 * and fail the call with an error when appropriate
6021 /* This field returns the type of original request. */
6023 /* This field provides original sequence number of the command. */
6026 * This field is the length of the response in bytes. The last byte of
6027 * the response is a valid flag that will read as '1' when the command
6028 * has been completely written to memory.
6036 * This field is used in Output records to indicate that the output is
6037 * completely written to RAM. This field should be read as '1' to
6038 * indicate that the output has been completely written. When writing a
6039 * command completion or response to an internal processor, the order of
6040 * writes has to be such that this field is written last.
6042 } __attribute__((packed));
6044 /* hwrm_func_buf_rgtr */
6046 * Description: This command is used by the PF driver to register buffers used
6047 * in the PF-VF communication with the HWRM. The PF driver uses this command to
6048 * register buffers for each PF-VF channel. A parent PF may issue this command
6049 * per child VF. If VF ID is not valid, then this command is used to register
6050 * buffers for all children VFs of the PF.
6052 /* Input (128 bytes) */
6054 struct hwrm_func_buf_rgtr_input {
6057 * This value indicates what type of request this is. The format for the
6058 * rest of the command is determined by this field.
6062 * This value indicates the what completion ring the request will be
6063 * optionally completed on. If the value is -1, then no CR completion
6064 * will be generated. Any other value must be a valid CR ring_id value
6065 * for this function.
6068 /* This value indicates the command sequence number. */
6071 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
6072 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
6076 * This is the host address where the response will be written when the
6077 * request is complete. This area must be 16B aligned and must be
6078 * cleared to zero before the request is made.
6081 /* This bit must be '1' for the vf_id field to be configured. */
6082 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
6083 /* This bit must be '1' for the err_buf_addr field to be configured. */
6084 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR UINT32_C(0x2)
6087 * This value is used to identify a Virtual Function (VF). The scope of
6088 * VF ID is local within a PF.
6090 uint16_t req_buf_num_pages;
6091 /* This field represents the number of pages used for request buffer(s). */
6092 uint16_t req_buf_page_size;
6093 /* This field represents the page size used for request buffer(s). */
6095 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_16B UINT32_C(0x4)
6097 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_4K UINT32_C(0xc)
6099 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_8K UINT32_C(0xd)
6101 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_64K UINT32_C(0x10)
6103 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_2M UINT32_C(0x15)
6105 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_4M UINT32_C(0x16)
6107 #define HWRM_FUNC_BUF_RGTR_INPUT_REQ_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
6108 uint16_t req_buf_len;
6109 /* The length of the request buffer per VF in bytes. */
6110 uint16_t resp_buf_len;
6111 /* The length of the response buffer in bytes. */
6114 uint64_t req_buf_page_addr0;
6115 /* This field represents the page address of page #0. */
6116 uint64_t req_buf_page_addr1;
6117 /* This field represents the page address of page #1. */
6118 uint64_t req_buf_page_addr2;
6119 /* This field represents the page address of page #2. */
6120 uint64_t req_buf_page_addr3;
6121 /* This field represents the page address of page #3. */
6122 uint64_t req_buf_page_addr4;
6123 /* This field represents the page address of page #4. */
6124 uint64_t req_buf_page_addr5;
6125 /* This field represents the page address of page #5. */
6126 uint64_t req_buf_page_addr6;
6127 /* This field represents the page address of page #6. */
6128 uint64_t req_buf_page_addr7;
6129 /* This field represents the page address of page #7. */
6130 uint64_t req_buf_page_addr8;
6131 /* This field represents the page address of page #8. */
6132 uint64_t req_buf_page_addr9;
6133 /* This field represents the page address of page #9. */
6134 uint64_t error_buf_addr;
6136 * This field is used to receive the error reporting from the chipset.
6137 * Only applicable for PFs.
6139 uint64_t resp_buf_addr;
6140 /* This field is used to receive the response forwarded by the HWRM. */
6141 } __attribute__((packed));
6143 /* Output (16 bytes) */
6145 struct hwrm_func_buf_rgtr_output {
6146 uint16_t error_code;
6148 * Pass/Fail or error type Note: receiver to verify the in parameters,
6149 * and fail the call with an error when appropriate
6152 /* This field returns the type of original request. */
6154 /* This field provides original sequence number of the command. */
6157 * This field is the length of the response in bytes. The last byte of
6158 * the response is a valid flag that will read as '1' when the command
6159 * has been completely written to memory.
6167 * This field is used in Output records to indicate that the output is
6168 * completely written to RAM. This field should be read as '1' to
6169 * indicate that the output has been completely written. When writing a
6170 * command completion or response to an internal processor, the order of
6171 * writes has to be such that this field is written last.
6173 } __attribute__((packed));
6175 /* hwrm_func_buf_unrgtr */
6177 * Description: This command is used by the PF driver to unregister buffers used
6178 * in the PF-VF communication with the HWRM. The PF driver uses this command to
6179 * unregister buffers for PF-VF communication. A parent PF may issue this
6180 * command to unregister buffers for communication between the PF and a specific
6181 * VF. If the VF ID is not valid, then this command is used to unregister
6182 * buffers used for communications with all children VFs of the PF.
6184 /* Input (24 bytes) */
6186 struct hwrm_func_buf_unrgtr_input {
6189 * This value indicates what type of request this is. The format for the
6190 * rest of the command is determined by this field.
6194 * This value indicates the what completion ring the request will be
6195 * optionally completed on. If the value is -1, then no CR completion
6196 * will be generated. Any other value must be a valid CR ring_id value
6197 * for this function.
6200 /* This value indicates the command sequence number. */
6203 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
6204 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
6208 * This is the host address where the response will be written when the
6209 * request is complete. This area must be 16B aligned and must be
6210 * cleared to zero before the request is made.
6213 /* This bit must be '1' for the vf_id field to be configured. */
6214 #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
6217 * This value is used to identify a Virtual Function (VF). The scope of
6218 * VF ID is local within a PF.
6221 } __attribute__((packed));
6223 /* Output (16 bytes) */
6225 struct hwrm_func_buf_unrgtr_output {
6226 uint16_t error_code;
6228 * Pass/Fail or error type Note: receiver to verify the in parameters,
6229 * and fail the call with an error when appropriate
6232 /* This field returns the type of original request. */
6234 /* This field provides original sequence number of the command. */
6237 * This field is the length of the response in bytes. The last byte of
6238 * the response is a valid flag that will read as '1' when the command
6239 * has been completely written to memory.
6247 * This field is used in Output records to indicate that the output is
6248 * completely written to RAM. This field should be read as '1' to
6249 * indicate that the output has been completely written. When writing a
6250 * command completion or response to an internal processor, the order of
6251 * writes has to be such that this field is written last.
6253 } __attribute__((packed));
6255 /* hwrm_func_drv_qver */
6257 * Description: This command is used to query the version of the driver. Any
6258 * driver version with major = 0, minor = 0, and update = 0 shall be considered
6259 * an invalid or unknown version.
6261 /* Input (24 bytes) */
6263 struct hwrm_func_drv_qver_input {
6266 * This value indicates what type of request this is. The format for the
6267 * rest of the command is determined by this field.
6271 * This value indicates the what completion ring the request will be
6272 * optionally completed on. If the value is -1, then no CR completion
6273 * will be generated. Any other value must be a valid CR ring_id value
6274 * for this function.
6277 /* This value indicates the command sequence number. */
6280 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
6281 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
6285 * This is the host address where the response will be written when the
6286 * request is complete. This area must be 16B aligned and must be
6287 * cleared to zero before the request is made.
6290 /* Reserved for future use */
6293 * Function ID of the function that is being queried. 0xFF... (All Fs)
6294 * if the query is for the requesting function.
6297 } __attribute__((packed));
6299 /* Output (16 bytes) */
6301 struct hwrm_func_drv_qver_output {
6302 uint16_t error_code;
6304 * Pass/Fail or error type Note: receiver to verify the in parameters,
6305 * and fail the call with an error when appropriate
6308 /* This field returns the type of original request. */
6310 /* This field provides original sequence number of the command. */
6313 * This field is the length of the response in bytes. The last byte of
6314 * the response is a valid flag that will read as '1' when the command
6315 * has been completely written to memory.
6318 /* This value indicates the type of OS. */
6320 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
6321 /* Other OS not listed below. */
6322 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_OTHER UINT32_C(0x1)
6324 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_MSDOS UINT32_C(0xe)
6326 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
6328 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
6330 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_LINUX UINT32_C(0x24)
6332 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
6333 /* VMware ESXi OS. */
6334 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_ESXI UINT32_C(0x68)
6335 /* Microsoft Windows 8 64-bit OS. */
6336 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_WIN864 UINT32_C(0x73)
6337 /* Microsoft Windows Server 2012 R2 OS. */
6338 #define HWRM_FUNC_DRV_QVER_OUTPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
6340 /* This is the major version of the driver. */
6342 /* This is the minor version of the driver. */
6344 /* This is the update version of the driver. */
6349 * This field is used in Output records to indicate that the output is
6350 * completely written to RAM. This field should be read as '1' to
6351 * indicate that the output has been completely written. When writing a
6352 * command completion or response to an internal processor, the order of
6353 * writes has to be such that this field is written last.
6355 } __attribute__((packed));
6357 /* hwrm_port_phy_cfg */
6359 * Description: This command configures the PHY device for the port. It allows
6360 * setting of the most generic settings for the PHY. The HWRM shall complete
6361 * this command as soon as PHY settings are configured. They may not be applied
6362 * when the command response is provided. A VF driver shall not be allowed to
6363 * configure PHY using this command. In a network partition mode, a PF driver
6364 * shall not be allowed to configure PHY using this command.
6366 /* Input (56 bytes) */
6368 struct hwrm_port_phy_cfg_input {
6371 * This value indicates what type of request this is. The format for the
6372 * rest of the command is determined by this field.
6376 * This value indicates the what completion ring the request will be
6377 * optionally completed on. If the value is -1, then no CR completion
6378 * will be generated. Any other value must be a valid CR ring_id value
6379 * for this function.
6382 /* This value indicates the command sequence number. */
6385 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
6386 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
6390 * This is the host address where the response will be written when the
6391 * request is complete. This area must be 16B aligned and must be
6392 * cleared to zero before the request is made.
6396 * When this bit is set to '1', the PHY for the port shall be reset. #
6397 * If this bit is set to 1, then the HWRM shall reset the PHY after
6398 * applying PHY configuration changes specified in this command. # In
6399 * order to guarantee that PHY configuration changes specified in this
6400 * command take effect, the HWRM client should set this flag to 1. # If
6401 * this bit is not set to 1, then the HWRM may reset the PHY depending
6402 * on the current PHY configuration and settings specified in this
6405 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
6407 * When this bit is set to '1', the link shall be forced to be taken
6408 * down. # When this bit is set to '1", all other command input settings
6409 * related to the link speed shall be ignored. Once the link state is
6410 * forced down, it can be explicitly cleared from that state by setting
6411 * this flag to '0'. # If this flag is set to '0', then the link shall
6412 * be cleared from forced down state if the link is in forced down
6413 * state. There may be conditions (e.g. out-of-band or sideband
6414 * configuration changes for the link) outside the scope of the HWRM
6415 * implementation that may clear forced down link state.
6417 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
6419 * When this bit is set to '1', the link shall be forced to the
6420 * force_link_speed value. When this bit is set to '1', the HWRM client
6421 * should not enable any of the auto negotiation related fields
6422 * represented by auto_XXX fields in this command. When this bit is set
6423 * to '1' and the HWRM client has enabled a auto_XXX field in this
6424 * command, then the HWRM shall ignore the enabled auto_XXX field. When
6425 * this bit is set to zero, the link shall be allowed to autoneg.
6427 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
6429 * When this bit is set to '1', the auto-negotiation process shall be
6430 * restarted on the link.
6432 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
6434 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
6435 * requested to be enabled on this link. If EEE is not supported on this
6436 * port, then this flag shall be ignored by the HWRM.
6438 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
6440 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
6441 * requested to be disabled on this link. If EEE is not supported on
6442 * this port, then this flag shall be ignored by the HWRM.
6444 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
6446 * When this bit is set to '1' and EEE is enabled on this link, then TX
6447 * LPI is requested to be enabled on the link. If EEE is not supported
6448 * on this port, then this flag shall be ignored by the HWRM. If EEE is
6449 * disabled on this port, then this flag shall be ignored by the HWRM.
6451 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
6453 * When this bit is set to '1' and EEE is enabled on this link, then TX
6454 * LPI is requested to be disabled on the link. If EEE is not supported
6455 * on this port, then this flag shall be ignored by the HWRM. If EEE is
6456 * disabled on this port, then this flag shall be ignored by the HWRM.
6458 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
6460 * When set to 1, then the HWRM shall enable FEC autonegotitation on
6461 * this port if supported. When set to 0, then this flag shall be
6462 * ignored. If FEC autonegotiation is not supported, then the HWRM shall
6465 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
6467 * When set to 1, then the HWRM shall disable FEC autonegotiation on
6468 * this port if supported. When set to 0, then this flag shall be
6469 * ignored. If FEC autonegotiation is not supported, then the HWRM shall
6472 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE UINT32_C(0x200)
6474 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire Code)
6475 * on this port if supported. When set to 0, then this flag shall be
6476 * ignored. If FEC CLAUSE 74 is not supported, then the HWRM shall
6479 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE UINT32_C(0x400)
6481 * When set to 1, then the HWRM shall disable FEC CLAUSE 74 (Fire Code)
6482 * on this port if supported. When set to 0, then this flag shall be
6483 * ignored. If FEC CLAUSE 74 is not supported, then the HWRM shall
6486 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE UINT32_C(0x800)
6488 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
6489 * Solomon) on this port if supported. When set to 0, then this flag
6490 * shall be ignored. If FEC CLAUSE 91 is not supported, then the HWRM
6491 * shall ignore this flag.
6493 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE UINT32_C(0x1000)
6495 * When set to 1, then the HWRM shall disable FEC CLAUSE 91 (Reed
6496 * Solomon) on this port if supported. When set to 0, then this flag
6497 * shall be ignored. If FEC CLAUSE 91 is not supported, then the HWRM
6498 * shall ignore this flag.
6500 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE UINT32_C(0x2000)
6502 /* This bit must be '1' for the auto_mode field to be configured. */
6503 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
6504 /* This bit must be '1' for the auto_duplex field to be configured. */
6505 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
6506 /* This bit must be '1' for the auto_pause field to be configured. */
6507 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
6508 /* This bit must be '1' for the auto_link_speed field to be configured. */
6509 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
6511 * This bit must be '1' for the auto_link_speed_mask field to be
6514 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK UINT32_C(0x10)
6515 /* This bit must be '1' for the wirespeed field to be configured. */
6516 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
6517 /* This bit must be '1' for the lpbk field to be configured. */
6518 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
6519 /* This bit must be '1' for the preemphasis field to be configured. */
6520 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
6521 /* This bit must be '1' for the force_pause field to be configured. */
6522 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
6524 * This bit must be '1' for the eee_link_speed_mask field to be
6527 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK UINT32_C(0x200)
6528 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
6529 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
6531 /* Port ID of port that is to be configured. */
6532 uint16_t force_link_speed;
6534 * This is the speed that will be used if the force bit is '1'. If
6535 * unsupported speed is selected, an error will be generated.
6537 /* 100Mb link speed */
6538 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
6539 /* 1Gb link speed */
6540 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
6541 /* 2Gb link speed */
6542 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
6543 /* 2.5Gb link speed */
6544 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
6545 /* 10Gb link speed */
6546 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
6547 /* 20Mb link speed */
6548 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
6549 /* 25Gb link speed */
6550 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
6551 /* 40Gb link speed */
6552 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
6553 /* 50Gb link speed */
6554 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
6555 /* 100Gb link speed */
6556 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
6557 /* 10Mb link speed */
6558 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
6561 * This value is used to identify what autoneg mode is used when the
6562 * link speed is not being forced.
6564 /* Disable autoneg or autoneg disabled. No speeds are selected. */
6565 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
6566 /* Select all possible speeds for autoneg mode. */
6567 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
6569 * Select only the auto_link_speed speed for autoneg mode. This
6570 * mode has been DEPRECATED. An HWRM client should not use this
6573 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
6575 * Select the auto_link_speed or any speed below that speed for
6576 * autoneg. This mode has been DEPRECATED. An HWRM client should
6577 * not use this mode.
6579 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
6581 * Select the speeds based on the corresponding link speed mask
6582 * value that is provided.
6584 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
6585 uint8_t auto_duplex;
6587 * This is the duplex setting that will be used if the autoneg_mode is
6588 * "one_speed" or "one_or_below".
6590 /* Half Duplex will be requested. */
6591 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
6592 /* Full duplex will be requested. */
6593 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
6594 /* Both Half and Full dupex will be requested. */
6595 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
6598 * This value is used to configure the pause that will be used for
6599 * autonegotiation. Add text on the usage of auto_pause and force_pause.
6602 * When this bit is '1', Generation of tx pause messages has been
6603 * requested. Disabled otherwise.
6605 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
6607 * When this bit is '1', Reception of rx pause messages has been
6608 * requested. Disabled otherwise.
6610 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
6612 * When set to 1, the advertisement of pause is enabled. # When the
6613 * auto_mode is not set to none and this flag is set to 1, then the
6614 * auto_pause bits on this port are being advertised and autoneg pause
6615 * results are being interpreted. # When the auto_mode is not set to
6616 * none and this flag is set to 0, the pause is forced as indicated in
6617 * force_pause, and also advertised as auto_pause bits, but the autoneg
6618 * results are not interpreted since the pause configuration is being
6619 * forced. # When the auto_mode is set to none and this flag is set to
6620 * 1, auto_pause bits should be ignored and should be set to 0.
6622 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
6624 uint16_t auto_link_speed;
6626 * This is the speed that will be used if the autoneg_mode is
6627 * "one_speed" or "one_or_below". If an unsupported speed is selected,
6628 * an error will be generated.
6630 /* 100Mb link speed */
6631 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
6632 /* 1Gb link speed */
6633 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
6634 /* 2Gb link speed */
6635 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
6636 /* 2.5Gb link speed */
6637 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
6638 /* 10Gb link speed */
6639 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
6640 /* 20Mb link speed */
6641 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
6642 /* 25Gb link speed */
6643 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
6644 /* 40Gb link speed */
6645 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
6646 /* 50Gb link speed */
6647 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
6648 /* 100Gb link speed */
6649 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
6650 /* 10Mb link speed */
6651 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
6652 uint16_t auto_link_speed_mask;
6654 * This is a mask of link speeds that will be used if autoneg_mode is
6655 * "mask". If unsupported speed is enabled an error will be generated.
6657 /* 100Mb link speed (Half-duplex) */
6658 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD UINT32_C(0x1)
6659 /* 100Mb link speed (Full-duplex) */
6660 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB UINT32_C(0x2)
6661 /* 1Gb link speed (Half-duplex) */
6662 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD UINT32_C(0x4)
6663 /* 1Gb link speed (Full-duplex) */
6664 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
6665 /* 2Gb link speed */
6666 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB UINT32_C(0x10)
6667 /* 2.5Gb link speed */
6668 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB UINT32_C(0x20)
6669 /* 10Gb link speed */
6670 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
6671 /* 20Gb link speed */
6672 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
6673 /* 25Gb link speed */
6674 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB UINT32_C(0x100)
6675 /* 40Gb link speed */
6676 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB UINT32_C(0x200)
6677 /* 50Gb link speed */
6678 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB UINT32_C(0x400)
6679 /* 100Gb link speed */
6680 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB UINT32_C(0x800)
6681 /* 10Mb link speed (Half-duplex) */
6682 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD UINT32_C(0x1000)
6683 /* 10Mb link speed (Full-duplex) */
6684 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB UINT32_C(0x2000)
6686 /* This value controls the wirespeed feature. */
6687 /* Wirespeed feature is disabled. */
6688 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF UINT32_C(0x0)
6689 /* Wirespeed feature is enabled. */
6690 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON UINT32_C(0x1)
6692 /* This value controls the loopback setting for the PHY. */
6693 /* No loopback is selected. Normal operation. */
6694 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
6696 * The HW will be configured with local loopback such that host
6697 * data is sent back to the host without modification.
6699 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
6701 * The HW will be configured with remote loopback such that port
6702 * logic will send packets back out the transmitter that are
6705 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
6706 uint8_t force_pause;
6708 * This value is used to configure the pause that will be used for force
6712 * When this bit is '1', Generation of tx pause messages is supported.
6713 * Disabled otherwise.
6715 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
6717 * When this bit is '1', Reception of rx pause messages is supported.
6718 * Disabled otherwise.
6720 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
6722 uint32_t preemphasis;
6724 * This value controls the pre-emphasis to be used for the link. Driver
6725 * should not set this value (use enable.preemphasis = 0) unless driver
6726 * is sure of setting. Normally HWRM FW will determine proper pre-
6729 uint16_t eee_link_speed_mask;
6731 * Setting for link speed mask that is used to advertise speeds during
6732 * autonegotiation when EEE is enabled. This field is valid only when
6733 * EEE is enabled. The speeds specified in this field shall be a subset
6734 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
6735 * at least one speed shall be provided in this mask.
6738 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
6739 /* 100Mb link speed (Full-duplex) */
6740 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
6742 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
6743 /* 1Gb link speed (Full-duplex) */
6744 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
6746 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
6748 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
6749 /* 10Gb link speed */
6750 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
6753 uint32_t tx_lpi_timer;
6756 * Reuested setting of TX LPI timer in microseconds. This field is valid
6757 * only when EEE is enabled and TX LPI is enabled.
6759 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
6760 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
6761 } __attribute__((packed));
6763 /* Output (16 bytes) */
6765 struct hwrm_port_phy_cfg_output {
6766 uint16_t error_code;
6768 * Pass/Fail or error type Note: receiver to verify the in parameters,
6769 * and fail the call with an error when appropriate
6772 /* This field returns the type of original request. */
6774 /* This field provides original sequence number of the command. */
6777 * This field is the length of the response in bytes. The last byte of
6778 * the response is a valid flag that will read as '1' when the command
6779 * has been completely written to memory.
6787 * This field is used in Output records to indicate that the output is
6788 * completely written to RAM. This field should be read as '1' to
6789 * indicate that the output has been completely written. When writing a
6790 * command completion or response to an internal processor, the order of
6791 * writes has to be such that this field is written last.
6793 } __attribute__((packed));
6795 /* hwrm_port_phy_qcfg */
6796 /* Description: This command queries the PHY configuration for the port. */
6797 /* Input (24 bytes) */
6799 struct hwrm_port_phy_qcfg_input {
6802 * This value indicates what type of request this is. The format for the
6803 * rest of the command is determined by this field.
6807 * This value indicates the what completion ring the request will be
6808 * optionally completed on. If the value is -1, then no CR completion
6809 * will be generated. Any other value must be a valid CR ring_id value
6810 * for this function.
6813 /* This value indicates the command sequence number. */
6816 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
6817 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
6821 * This is the host address where the response will be written when the
6822 * request is complete. This area must be 16B aligned and must be
6823 * cleared to zero before the request is made.
6826 /* Port ID of port that is to be queried. */
6827 uint16_t unused_0[3];
6828 } __attribute__((packed));
6830 /* Output (96 bytes) */
6832 struct hwrm_port_phy_qcfg_output {
6833 uint16_t error_code;
6835 * Pass/Fail or error type Note: receiver to verify the in parameters,
6836 * and fail the call with an error when appropriate
6839 /* This field returns the type of original request. */
6841 /* This field provides original sequence number of the command. */
6844 * This field is the length of the response in bytes. The last byte of
6845 * the response is a valid flag that will read as '1' when the command
6846 * has been completely written to memory.
6849 /* This value indicates the current link status. */
6850 /* There is no link or cable detected. */
6851 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
6852 /* There is no link, but a cable has been detected. */
6853 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
6854 /* There is a link. */
6855 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
6857 uint16_t link_speed;
6858 /* This value indicates the current link speed of the connection. */
6859 /* 100Mb link speed */
6860 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
6861 /* 1Gb link speed */
6862 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
6863 /* 2Gb link speed */
6864 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
6865 /* 2.5Gb link speed */
6866 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
6867 /* 10Gb link speed */
6868 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
6869 /* 20Mb link speed */
6870 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
6871 /* 25Gb link speed */
6872 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
6873 /* 40Gb link speed */
6874 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
6875 /* 50Gb link speed */
6876 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
6877 /* 100Gb link speed */
6878 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
6879 /* 10Mb link speed */
6880 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
6882 /* This value is indicates the duplex of the current connection. */
6883 /* Half Duplex connection. */
6884 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF UINT32_C(0x0)
6885 /* Full duplex connection. */
6886 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL UINT32_C(0x1)
6889 * This value is used to indicate the current pause configuration. When
6890 * autoneg is enabled, this value represents the autoneg results of
6891 * pause configuration.
6894 * When this bit is '1', Generation of tx pause messages is supported.
6895 * Disabled otherwise.
6897 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
6899 * When this bit is '1', Reception of rx pause messages is supported.
6900 * Disabled otherwise.
6902 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
6903 uint16_t support_speeds;
6905 * The supported speeds for the port. This is a bit mask. For each speed
6906 * that is supported, the corrresponding bit will be set to '1'.
6908 /* 100Mb link speed (Half-duplex) */
6909 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
6910 /* 100Mb link speed (Full-duplex) */
6911 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
6912 /* 1Gb link speed (Half-duplex) */
6913 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
6914 /* 1Gb link speed (Full-duplex) */
6915 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
6916 /* 2Gb link speed */
6917 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
6918 /* 2.5Gb link speed */
6919 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
6920 /* 10Gb link speed */
6921 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
6922 /* 20Gb link speed */
6923 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
6924 /* 25Gb link speed */
6925 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
6926 /* 40Gb link speed */
6927 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
6928 /* 50Gb link speed */
6929 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
6930 /* 100Gb link speed */
6931 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
6932 /* 10Mb link speed (Half-duplex) */
6933 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
6934 /* 10Mb link speed (Full-duplex) */
6935 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
6936 uint16_t force_link_speed;
6938 * Current setting of forced link speed. When the link speed is not
6939 * being forced, this value shall be set to 0.
6941 /* 100Mb link speed */
6942 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
6943 /* 1Gb link speed */
6944 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
6945 /* 2Gb link speed */
6946 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
6947 /* 2.5Gb link speed */
6948 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
6949 /* 10Gb link speed */
6950 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
6951 /* 20Mb link speed */
6952 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
6953 /* 25Gb link speed */
6954 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
6955 /* 40Gb link speed */
6956 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
6957 /* 50Gb link speed */
6958 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
6959 /* 100Gb link speed */
6960 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
6961 /* 10Mb link speed */
6962 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
6964 /* Current setting of auto negotiation mode. */
6965 /* Disable autoneg or autoneg disabled. No speeds are selected. */
6966 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
6967 /* Select all possible speeds for autoneg mode. */
6968 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
6970 * Select only the auto_link_speed speed for autoneg mode. This
6971 * mode has been DEPRECATED. An HWRM client should not use this
6974 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
6976 * Select the auto_link_speed or any speed below that speed for
6977 * autoneg. This mode has been DEPRECATED. An HWRM client should
6978 * not use this mode.
6980 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
6982 * Select the speeds based on the corresponding link speed mask
6983 * value that is provided.
6985 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
6988 * Current setting of pause autonegotiation. Move autoneg_pause flag
6992 * When this bit is '1', Generation of tx pause messages has been
6993 * requested. Disabled otherwise.
6995 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
6997 * When this bit is '1', Reception of rx pause messages has been
6998 * requested. Disabled otherwise.
7000 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
7002 * When set to 1, the advertisement of pause is enabled. # When the
7003 * auto_mode is not set to none and this flag is set to 1, then the
7004 * auto_pause bits on this port are being advertised and autoneg pause
7005 * results are being interpreted. # When the auto_mode is not set to
7006 * none and this flag is set to 0, the pause is forced as indicated in
7007 * force_pause, and also advertised as auto_pause bits, but the autoneg
7008 * results are not interpreted since the pause configuration is being
7009 * forced. # When the auto_mode is set to none and this flag is set to
7010 * 1, auto_pause bits should be ignored and should be set to 0.
7012 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
7013 uint16_t auto_link_speed;
7015 * Current setting for auto_link_speed. This field is only valid when
7016 * auto_mode is set to "one_speed" or "one_or_below".
7018 /* 100Mb link speed */
7019 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
7020 /* 1Gb link speed */
7021 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
7022 /* 2Gb link speed */
7023 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
7024 /* 2.5Gb link speed */
7025 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
7026 /* 10Gb link speed */
7027 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
7028 /* 20Mb link speed */
7029 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
7030 /* 25Gb link speed */
7031 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
7032 /* 40Gb link speed */
7033 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
7034 /* 50Gb link speed */
7035 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
7036 /* 100Gb link speed */
7037 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
7038 /* 10Mb link speed */
7039 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
7040 uint16_t auto_link_speed_mask;
7042 * Current setting for auto_link_speed_mask that is used to advertise
7043 * speeds during autonegotiation. This field is only valid when
7044 * auto_mode is set to "mask". The speeds specified in this field shall
7045 * be a subset of supported speeds on this port.
7047 /* 100Mb link speed (Half-duplex) */
7048 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD UINT32_C(0x1)
7049 /* 100Mb link speed (Full-duplex) */
7050 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB UINT32_C(0x2)
7051 /* 1Gb link speed (Half-duplex) */
7052 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD UINT32_C(0x4)
7053 /* 1Gb link speed (Full-duplex) */
7054 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
7055 /* 2Gb link speed */
7056 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB UINT32_C(0x10)
7057 /* 2.5Gb link speed */
7058 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB UINT32_C(0x20)
7059 /* 10Gb link speed */
7060 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
7061 /* 20Gb link speed */
7062 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
7063 /* 25Gb link speed */
7064 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB UINT32_C(0x100)
7065 /* 40Gb link speed */
7066 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB UINT32_C(0x200)
7067 /* 50Gb link speed */
7068 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB UINT32_C(0x400)
7069 /* 100Gb link speed */
7070 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB UINT32_C(0x800)
7071 /* 10Mb link speed (Half-duplex) */
7072 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD UINT32_C(0x1000)
7073 /* 10Mb link speed (Full-duplex) */
7074 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB UINT32_C(0x2000)
7076 /* Current setting for wirespeed. */
7077 /* Wirespeed feature is disabled. */
7078 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_OFF UINT32_C(0x0)
7079 /* Wirespeed feature is enabled. */
7080 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_ON UINT32_C(0x1)
7082 /* Current setting for loopback. */
7083 /* No loopback is selected. Normal operation. */
7084 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
7086 * The HW will be configured with local loopback such that host
7087 * data is sent back to the host without modification.
7089 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
7091 * The HW will be configured with remote loopback such that port
7092 * logic will send packets back out the transmitter that are
7095 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
7096 uint8_t force_pause;
7098 * Current setting of forced pause. When the pause configuration is not
7099 * being forced, then this value shall be set to 0.
7102 * When this bit is '1', Generation of tx pause messages is supported.
7103 * Disabled otherwise.
7105 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
7107 * When this bit is '1', Reception of rx pause messages is supported.
7108 * Disabled otherwise.
7110 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
7111 uint8_t module_status;
7113 * This value indicates the current status of the optics module on this
7116 /* Module is inserted and accepted */
7117 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
7118 /* Module is rejected and transmit side Laser is disabled. */
7119 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
7120 /* Module mismatch warning. */
7121 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
7122 /* Module is rejected and powered down. */
7123 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
7124 /* Module is not inserted. */
7125 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED UINT32_C(0x4)
7126 /* Module status is not applicable. */
7127 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE UINT32_C(0xff)
7128 uint32_t preemphasis;
7129 /* Current setting for preemphasis. */
7131 /* This field represents the major version of the PHY. */
7133 /* This field represents the minor version of the PHY. */
7135 /* This field represents the build version of the PHY. */
7137 /* This value represents a PHY type. */
7139 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
7141 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
7142 /* BASE-KR4 (Deprecated) */
7143 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
7145 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
7147 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
7148 /* BASE-KR2 (Deprecated) */
7149 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
7151 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
7153 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
7155 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
7156 /* EEE capable BASE-T */
7157 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
7158 /* SGMII connected external PHY */
7159 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
7161 /* This value represents a media type. */
7163 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
7165 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
7166 /* Direct Attached Copper */
7167 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
7169 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
7170 uint8_t xcvr_pkg_type;
7171 /* This value represents a transceiver type. */
7172 /* PHY and MAC are in the same package */
7173 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL UINT32_C(0x1)
7174 /* PHY and MAC are in different packages */
7175 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL UINT32_C(0x2)
7176 uint8_t eee_config_phy_addr;
7178 * This field represents flags related to EEE configuration. These EEE
7179 * configuration flags are valid only when the auto_mode is not set to
7180 * none (in other words autonegotiation is enabled).
7182 /* This field represents PHY address. */
7183 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
7184 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
7186 * When set to 1, Energy Efficient Ethernet (EEE) mode is enabled.
7187 * Speeds for autoneg with EEE mode enabled are based on
7188 * eee_link_speed_mask.
7190 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
7192 * This flag is valid only when eee_enabled is set to 1. # If
7193 * eee_enabled is set to 0, then EEE mode is disabled and this flag
7194 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
7195 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and in
7196 * use. # If eee_enabled is set to 1 and this flag is set to 0, then
7197 * Energy Efficient Ethernet (EEE) mode is enabled but is currently not
7200 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
7202 * This flag is valid only when eee_enabled is set to 1. # If
7203 * eee_enabled is set to 0, then EEE mode is disabled and this flag
7204 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
7205 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and TX LPI
7206 * is enabled. # If eee_enabled is set to 1 and this flag is set to 0,
7207 * then Energy Efficient Ethernet (EEE) mode is enabled but TX LPI is
7210 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
7212 * This field represents flags related to EEE configuration. These EEE
7213 * configuration flags are valid only when the auto_mode is not set to
7214 * none (in other words autonegotiation is enabled).
7216 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
7217 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
7218 uint8_t parallel_detect;
7219 /* Reserved field, set to 0 */
7221 * When set to 1, the parallel detection is used to determine the speed
7222 * of the link partner. Parallel detection is used when a
7223 * autonegotiation capable device is connected to a link parter that is
7224 * not capable of autonegotiation.
7226 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
7227 /* Reserved field, set to 0 */
7228 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
7229 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
7230 uint16_t link_partner_adv_speeds;
7232 * The advertised speeds for the port by the link partner. Each
7233 * advertised speed will be set to '1'.
7235 /* 100Mb link speed (Half-duplex) */
7236 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD UINT32_C(0x1)
7237 /* 100Mb link speed (Full-duplex) */
7238 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB UINT32_C(0x2)
7239 /* 1Gb link speed (Half-duplex) */
7240 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD UINT32_C(0x4)
7241 /* 1Gb link speed (Full-duplex) */
7242 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB UINT32_C(0x8)
7243 /* 2Gb link speed */
7244 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB UINT32_C(0x10)
7245 /* 2.5Gb link speed */
7246 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB UINT32_C(0x20)
7247 /* 10Gb link speed */
7248 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB UINT32_C(0x40)
7249 /* 20Gb link speed */
7250 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB UINT32_C(0x80)
7251 /* 25Gb link speed */
7252 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB UINT32_C(0x100)
7253 /* 40Gb link speed */
7254 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB UINT32_C(0x200)
7255 /* 50Gb link speed */
7256 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB UINT32_C(0x400)
7257 /* 100Gb link speed */
7258 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB UINT32_C(0x800)
7259 /* 10Mb link speed (Half-duplex) */
7260 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD UINT32_C(0x1000)
7261 /* 10Mb link speed (Full-duplex) */
7262 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB UINT32_C(0x2000)
7263 uint8_t link_partner_adv_auto_mode;
7265 * The advertised autoneg for the port by the link partner. This field
7266 * is deprecated and should be set to 0.
7268 /* Disable autoneg or autoneg disabled. No speeds are selected. */
7269 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE UINT32_C(0x0)
7270 /* Select all possible speeds for autoneg mode. */
7271 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
7273 * Select only the auto_link_speed speed for autoneg mode. This
7274 * mode has been DEPRECATED. An HWRM client should not use this
7277 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
7279 * Select the auto_link_speed or any speed below that speed for
7280 * autoneg. This mode has been DEPRECATED. An HWRM client should
7281 * not use this mode.
7283 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
7285 * Select the speeds based on the corresponding link speed mask
7286 * value that is provided.
7288 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
7289 uint8_t link_partner_adv_pause;
7290 /* The advertised pause settings on the port by the link partner. */
7292 * When this bit is '1', Generation of tx pause messages is supported.
7293 * Disabled otherwise.
7295 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX UINT32_C(0x1)
7297 * When this bit is '1', Reception of rx pause messages is supported.
7298 * Disabled otherwise.
7300 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX UINT32_C(0x2)
7301 uint16_t adv_eee_link_speed_mask;
7303 * Current setting for link speed mask that is used to advertise speeds
7304 * during autonegotiation when EEE is enabled. This field is valid only
7305 * when eee_enabled flags is set to 1. The speeds specified in this
7306 * field shall be a subset of speeds specified in auto_link_speed_mask.
7309 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
7310 /* 100Mb link speed (Full-duplex) */
7311 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
7313 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
7314 /* 1Gb link speed (Full-duplex) */
7315 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
7317 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
7319 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
7320 /* 10Gb link speed */
7321 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
7322 uint16_t link_partner_adv_eee_link_speed_mask;
7324 * Current setting for link speed mask that is advertised by the link
7325 * partner when EEE is enabled. This field is valid only when
7326 * eee_enabled flags is set to 1.
7329 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
7330 /* 100Mb link speed (Full-duplex) */
7331 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
7333 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
7334 /* 1Gb link speed (Full-duplex) */
7335 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
7337 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
7339 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
7340 /* 10Gb link speed */
7341 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
7342 uint32_t xcvr_identifier_type_tx_lpi_timer;
7343 /* This value represents transceiver identifier type. */
7345 * Current setting of TX LPI timer in microseconds. This field is valid
7346 * only when_eee_enabled flag is set to 1 and tx_lpi_enabled is set to
7349 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
7350 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
7351 /* This value represents transceiver identifier type. */
7352 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK UINT32_C(0xff000000)
7353 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
7355 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN (UINT32_C(0x0) << 24)
7356 /* SFP/SFP+/SFP28 */
7357 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP (UINT32_C(0x3) << 24)
7359 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP (UINT32_C(0xc) << 24)
7361 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS (UINT32_C(0xd) << 24)
7363 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 (UINT32_C(0x11) << 24)
7366 * This value represents the current configuration of Forward Error
7367 * Correction (FEC) on the port.
7370 * When set to 1, then FEC is not supported on this port. If this flag
7371 * is set to 1, then all other FEC configuration flags shall be ignored.
7372 * When set to 0, then FEC is supported as indicated by other
7373 * configuration flags. If no cable is attached and the HWRM does not
7374 * yet know the FEC capability, then the HWRM shall set this flag to 1
7375 * when reporting FEC capability.
7377 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED UINT32_C(0x1)
7379 * When set to 1, then FEC autonegotiation is supported on this port.
7380 * When set to 0, then FEC autonegotiation is not supported on this
7383 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED UINT32_C(0x2)
7385 * When set to 1, then FEC autonegotiation is enabled on this port. When
7386 * set to 0, then FEC autonegotiation is disabled if supported. This
7387 * flag should be ignored if FEC autonegotiation is not supported on
7390 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED UINT32_C(0x4)
7392 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on this
7393 * port. When set to 0, then FEC CLAUSE 74 (Fire Code) is not supported
7396 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED UINT32_C(0x8)
7398 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on this
7399 * port. When set to 0, then FEC CLAUSE 74 (Fire Code) is disabled if
7400 * supported. This flag should be ignored if FEC CLAUSE 74 is not
7401 * supported on this port.
7403 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED UINT32_C(0x10)
7405 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported on this
7406 * port. When set to 0, then FEC CLAUSE 91 (Reed Solomon) is not
7407 * supported on this port.
7409 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED UINT32_C(0x20)
7411 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled on this
7412 * port. When set to 0, then FEC CLAUSE 91 (Reed Solomon) is disabled if
7413 * supported. This flag should be ignored if FEC CLAUSE 91 is not
7414 * supported on this port.
7416 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED UINT32_C(0x40)
7419 char phy_vendor_name[16];
7421 * Up to 16 bytes of null padded ASCII string representing PHY vendor.
7422 * If the string is set to null, then the vendor name is not available.
7424 char phy_vendor_partnumber[16];
7426 * Up to 16 bytes of null padded ASCII string that identifies vendor
7427 * specific part number of the PHY. If the string is set to null, then
7428 * the vendor specific part number is not available.
7436 * This field is used in Output records to indicate that the output is
7437 * completely written to RAM. This field should be read as '1' to
7438 * indicate that the output has been completely written. When writing a
7439 * command completion or response to an internal processor, the order of
7440 * writes has to be such that this field is written last.
7442 } __attribute__((packed));
7444 /* hwrm_port_mac_cfg */
7445 /* Description: This command configures the MAC block for the port. */
7446 /* Input (40 bytes) */
7448 struct hwrm_port_mac_cfg_input {
7451 * This value indicates what type of request this is. The format for the
7452 * rest of the command is determined by this field.
7456 * This value indicates the what completion ring the request will be
7457 * optionally completed on. If the value is -1, then no CR completion
7458 * will be generated. Any other value must be a valid CR ring_id value
7459 * for this function.
7462 /* This value indicates the command sequence number. */
7465 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7466 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7470 * This is the host address where the response will be written when the
7471 * request is complete. This area must be 16B aligned and must be
7472 * cleared to zero before the request is made.
7476 * When this bit is '1', this command will configure the MAC to match
7477 * the current link state of the PHY. If the link is not established on
7478 * the PHY, then this bit has no effect.
7480 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_MATCH_LINK UINT32_C(0x1)
7482 * When this bit is '1', the CoS assignment logic is enabled. When this
7483 * logic is enabled, then inner VLAN PRI to CoS mapping is enabled. If
7484 * this bit is '0', then the default CoS is used.
7486 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_COS_ASSIGNMENT_ENABLE UINT32_C(0x2)
7488 * When this bit is '1', tunnel or outer VLAN PRI field to CoS mapping
7489 * is enabled. If this bit is '0', then outer VLAN PRI bits are not used
7490 * in determining CoS.
7492 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_TUNNEL_PRI2COS_ENABLE UINT32_C(0x4)
7494 * When this bit is '1', the IP DSCP to CoS mapping is enabled. If this
7495 * bit is '0', then IP DSCP bits are not used in determining CoS.
7497 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_IP_DSCP2COS_ENABLE UINT32_C(0x8)
7499 * When this bit is '1', the HWRM is requested to enable timestamp
7500 * capture capability on the receive side of this port.
7502 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_RX_TS_CAPTURE_ENABLE UINT32_C(0x10)
7504 * When this bit is '1', the HWRM is requested to disable timestamp
7505 * capture capability on the receive side of this port.
7507 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_RX_TS_CAPTURE_DISABLE UINT32_C(0x20)
7509 * When this bit is '1', the HWRM is requested to enable timestamp
7510 * capture capability on the transmit side of this port.
7512 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_TX_TS_CAPTURE_ENABLE UINT32_C(0x40)
7514 * When this bit is '1', the HWRM is requested to disable timestamp
7515 * capture capability on the transmit side of this port.
7517 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_TX_TS_CAPTURE_DISABLE UINT32_C(0x80)
7519 * When this bit is '1', the Out-Of-Box WoL is requested to be enabled
7522 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_OOB_WOL_ENABLE UINT32_C(0x100)
7524 * When this bit is '1', the the Out-Of-Box WoL is requested to be
7525 * disabled on this port.
7527 #define HWRM_PORT_MAC_CFG_INPUT_FLAGS_OOB_WOL_DISABLE UINT32_C(0x200)
7529 /* This bit must be '1' for the ipg field to be configured. */
7530 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_IPG UINT32_C(0x1)
7531 /* This bit must be '1' for the lpbk field to be configured. */
7532 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_LPBK UINT32_C(0x2)
7534 * This bit must be '1' for the ivlan_pri2cos_map_pri field to be
7537 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_IVLAN_PRI2COS_MAP_PRI UINT32_C(0x4)
7538 /* This bit must be '1' for the lcos_map_pri field to be configured. */
7539 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_LCOS_MAP_PRI UINT32_C(0x8)
7541 * This bit must be '1' for the tunnel_pri2cos_map_pri field to be
7544 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_TUNNEL_PRI2COS_MAP_PRI UINT32_C(0x10)
7545 /* This bit must be '1' for the dscp2cos_map_pri field to be configured. */
7546 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_DSCP2COS_MAP_PRI UINT32_C(0x20)
7548 * This bit must be '1' for the rx_ts_capture_ptp_msg_type field to be
7551 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE UINT32_C(0x40)
7553 * This bit must be '1' for the tx_ts_capture_ptp_msg_type field to be
7556 #define HWRM_PORT_MAC_CFG_INPUT_ENABLES_TX_TS_CAPTURE_PTP_MSG_TYPE UINT32_C(0x80)
7558 /* Port ID of port that is to be configured. */
7561 * This value is used to configure the minimum IPG that will be sent
7562 * between packets by this port.
7565 /* This value controls the loopback setting for the MAC. */
7566 /* No loopback is selected. Normal operation. */
7567 #define HWRM_PORT_MAC_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
7569 * The HW will be configured with local loopback such that host
7570 * data is sent back to the host without modification.
7572 #define HWRM_PORT_MAC_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
7574 * The HW will be configured with remote loopback such that port
7575 * logic will send packets back out the transmitter that are
7578 #define HWRM_PORT_MAC_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
7579 uint8_t ivlan_pri2cos_map_pri;
7581 * This value controls the priority of mapping. Valid values: 1-4 Higher
7582 * the number, higher the priority
7584 uint8_t lcos_map_pri;
7586 * This value controls the priority of mapping. Valid values: 1-4 Higher
7587 * the number, higher the priority
7589 uint8_t tunnel_pri2cos_map_pri;
7591 * This value controls the priority of mapping. Valid values: 1-4 Higher
7592 * the number, higher the priority
7594 uint8_t dscp2pri_map_pri;
7596 * This value controls the priority of mapping. Valid values: 1-4 Higher
7597 * the number, higher the priority
7599 uint16_t rx_ts_capture_ptp_msg_type;
7601 * This is a 16-bit bit mask that is used to request a specific
7602 * configuration of time stamp capture of PTP messages on the receive
7603 * side of this port. This field shall be ignored if the
7604 * ptp_rx_ts_capture_enable flag is not set in this command. Otherwise,
7605 * if bit 'i' is set, then the HWRM is being requested to configure the
7606 * receive side of the port to capture the time stamp of every received
7607 * PTP message with messageType field value set to i.
7609 uint16_t tx_ts_capture_ptp_msg_type;
7611 * This is a 16-bit bit mask that is used to request a specific
7612 * configuration of time stamp capture of PTP messages on the transmit
7613 * side of this port. This field shall be ignored if the
7614 * ptp_tx_ts_capture_enable flag is not set in this command. Otherwise,
7615 * if bit 'i' is set, then the HWRM is being requested to configure the
7616 * transmit sied of the port to capture the time stamp of every
7617 * transmitted PTP message with messageType field value set to i.
7620 } __attribute__((packed));
7622 /* Output (16 bytes) */
7624 struct hwrm_port_mac_cfg_output {
7625 uint16_t error_code;
7627 * Pass/Fail or error type Note: receiver to verify the in parameters,
7628 * and fail the call with an error when appropriate
7631 /* This field returns the type of original request. */
7633 /* This field provides original sequence number of the command. */
7636 * This field is the length of the response in bytes. The last byte of
7637 * the response is a valid flag that will read as '1' when the command
7638 * has been completely written to memory.
7642 * This is the configured maximum length of Ethernet packet payload that
7643 * is allowed to be received on the port. This value does not include
7644 * the number of bytes used by Ethernet header and trailer (CRC).
7648 * This is the configured maximum length of Ethernet packet payload that
7649 * is allowed to be transmitted on the port. This value does not include
7650 * the number of bytes used by Ethernet header and trailer (CRC).
7653 /* Current configuration of the IPG value. */
7655 /* Current value of the loopback value. */
7656 /* No loopback is selected. Normal operation. */
7657 #define HWRM_PORT_MAC_CFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
7659 * The HW will be configured with local loopback such that host
7660 * data is sent back to the host without modification.
7662 #define HWRM_PORT_MAC_CFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
7664 * The HW will be configured with remote loopback such that port
7665 * logic will send packets back out the transmitter that are
7668 #define HWRM_PORT_MAC_CFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
7672 * This field is used in Output records to indicate that the output is
7673 * completely written to RAM. This field should be read as '1' to
7674 * indicate that the output has been completely written. When writing a
7675 * command completion or response to an internal processor, the order of
7676 * writes has to be such that this field is written last.
7678 } __attribute__((packed));
7680 /* hwrm_port_mac_qcfg */
7681 /* Description: This command queries the MAC block for the port. */
7682 /* Input (24 bytes) */
7684 struct hwrm_port_mac_qcfg_input {
7687 * This value indicates what type of request this is. The format for the
7688 * rest of the command is determined by this field.
7692 * This value indicates the what completion ring the request will be
7693 * optionally completed on. If the value is -1, then no CR completion
7694 * will be generated. Any other value must be a valid CR ring_id value
7695 * for this function.
7698 /* This value indicates the command sequence number. */
7701 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7702 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7706 * This is the host address where the response will be written when the
7707 * request is complete. This area must be 16B aligned and must be
7708 * cleared to zero before the request is made.
7711 /* Port ID of port that is to be configured. */
7712 uint16_t unused_0[3];
7713 } __attribute__((packed));
7715 /* Output (24 bytes) */
7717 struct hwrm_port_mac_qcfg_output {
7718 uint16_t error_code;
7720 * Pass/Fail or error type Note: receiver to verify the in parameters,
7721 * and fail the call with an error when appropriate
7724 /* This field returns the type of original request. */
7726 /* This field provides original sequence number of the command. */
7729 * This field is the length of the response in bytes. The last byte of
7730 * the response is a valid flag that will read as '1' when the command
7731 * has been completely written to memory.
7735 * This is the configured maximum length of Ethernet packet payload that
7736 * is allowed to be received on the port. This value does not include
7737 * the number of bytes used by the Ethernet header and trailer (CRC).
7741 * This is the configured maximum length of Ethernet packet payload that
7742 * is allowed to be transmitted on the port. This value does not include
7743 * the number of bytes used by the Ethernet header and trailer (CRC).
7746 /* The minimum IPG that will be sent between packets by this port. */
7748 /* The loopback setting for the MAC. */
7749 /* No loopback is selected. Normal operation. */
7750 #define HWRM_PORT_MAC_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
7752 * The HW will be configured with local loopback such that host
7753 * data is sent back to the host without modification.
7755 #define HWRM_PORT_MAC_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
7757 * The HW will be configured with remote loopback such that port
7758 * logic will send packets back out the transmitter that are
7761 #define HWRM_PORT_MAC_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
7762 uint8_t ivlan_pri2cos_map_pri;
7764 * Priority of pri to CoS mapping. Valid values: 1-4 Higher the number,
7765 * higher the priority Value 0 indicates that this mapping is not used.
7767 uint8_t lcos_map_pri;
7769 * Priority of local CoS to PRI mapping. Valid values: 1-4 Higher the
7770 * number, higher the priority Value 0 indicates that this mapping is
7773 uint8_t tunnel_pri2cos_map_pri;
7775 * Priority of tunnel PRI to CoS mapping. Valid values: 1-4 Higher the
7776 * number, higher the priority Value 0 indicates that this mapping is
7779 uint8_t dscp2pri_map_pri;
7781 * Priority of DSCP to PRI mapping. Valid values: 1-4 Higher the number,
7782 * higher the priority Value 0 indicates that this mapping is not used.
7784 uint16_t rx_ts_capture_ptp_msg_type;
7786 * This is a 16-bit bit mask that represents the current configuration
7787 * of time stamp capture of PTP messages on the receive side of this
7788 * port. If bit 'i' is set, then the receive side of the port is
7789 * configured to capture the time stamp of every received PTP message
7790 * with messageType field value set to i. If all bits are set to 0 (i.e.
7791 * field value set 0), then the receive side of the port is not
7792 * configured to capture timestamp for PTP messages. If all bits are set
7793 * to 1, then the receive side of the port is configured to capture
7794 * timestamp for all PTP messages.
7796 uint16_t tx_ts_capture_ptp_msg_type;
7798 * This is a 16-bit bit mask that represents the current configuration
7799 * of time stamp capture of PTP messages on the transmit side of this
7800 * port. If bit 'i' is set, then the transmit side of the port is
7801 * configured to capture the time stamp of every received PTP message
7802 * with messageType field value set to i. If all bits are set to 0 (i.e.
7803 * field value set 0), then the transmit side of the port is not
7804 * configured to capture timestamp for PTP messages. If all bits are set
7805 * to 1, then the transmit side of the port is configured to capture
7806 * timestamp for all PTP messages.
7811 * This field is used in Output records to indicate that the output is
7812 * completely written to RAM. This field should be read as '1' to
7813 * indicate that the output has been completely written. When writing a
7814 * command completion or response to an internal processor, the order of
7815 * writes has to be such that this field is written last.
7817 } __attribute__((packed));
7819 /* hwrm_port_qstats */
7820 /* Description: This function returns per port Ethernet statistics. */
7821 /* Input (40 bytes) */
7823 struct hwrm_port_qstats_input {
7826 * This value indicates what type of request this is. The format for the
7827 * rest of the command is determined by this field.
7831 * This value indicates the what completion ring the request will be
7832 * optionally completed on. If the value is -1, then no CR completion
7833 * will be generated. Any other value must be a valid CR ring_id value
7834 * for this function.
7837 /* This value indicates the command sequence number. */
7840 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7841 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7845 * This is the host address where the response will be written when the
7846 * request is complete. This area must be 16B aligned and must be
7847 * cleared to zero before the request is made.
7850 /* Port ID of port that is being queried. */
7853 uint8_t unused_2[3];
7855 uint64_t tx_stat_host_addr;
7856 /* This is the host address where Tx port statistics will be stored */
7857 uint64_t rx_stat_host_addr;
7858 /* This is the host address where Rx port statistics will be stored */
7859 } __attribute__((packed));
7861 /* Output (16 bytes) */
7863 struct hwrm_port_qstats_output {
7864 uint16_t error_code;
7866 * Pass/Fail or error type Note: receiver to verify the in parameters,
7867 * and fail the call with an error when appropriate
7870 /* This field returns the type of original request. */
7872 /* This field provides original sequence number of the command. */
7875 * This field is the length of the response in bytes. The last byte of
7876 * the response is a valid flag that will read as '1' when the command
7877 * has been completely written to memory.
7879 uint16_t tx_stat_size;
7880 /* The size of TX port statistics block in bytes. */
7881 uint16_t rx_stat_size;
7882 /* The size of RX port statistics block in bytes. */
7888 * This field is used in Output records to indicate that the output is
7889 * completely written to RAM. This field should be read as '1' to
7890 * indicate that the output has been completely written. When writing a
7891 * command completion or response to an internal processor, the order of
7892 * writes has to be such that this field is written last.
7894 } __attribute__((packed));
7896 /* hwrm_port_lpbk_qstats */
7897 /* Description: This function returns loopback statistics. */
7898 /* Input (16 bytes) */
7900 struct hwrm_port_lpbk_qstats_input {
7903 * This value indicates what type of request this is. The format for the
7904 * rest of the command is determined by this field.
7908 * This value indicates the what completion ring the request will be
7909 * optionally completed on. If the value is -1, then no CR completion
7910 * will be generated. Any other value must be a valid CR ring_id value
7911 * for this function.
7914 /* This value indicates the command sequence number. */
7917 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7918 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7922 * This is the host address where the response will be written when the
7923 * request is complete. This area must be 16B aligned and must be
7924 * cleared to zero before the request is made.
7926 } __attribute__((packed));
7928 /* Output (96 bytes) */
7930 struct hwrm_port_lpbk_qstats_output {
7931 uint16_t error_code;
7933 * Pass/Fail or error type Note: receiver to verify the in parameters,
7934 * and fail the call with an error when appropriate
7937 /* This field returns the type of original request. */
7939 /* This field provides original sequence number of the command. */
7942 * This field is the length of the response in bytes. The last byte of
7943 * the response is a valid flag that will read as '1' when the command
7944 * has been completely written to memory.
7946 uint64_t lpbk_ucast_frames;
7947 /* Number of transmitted unicast frames */
7948 uint64_t lpbk_mcast_frames;
7949 /* Number of transmitted multicast frames */
7950 uint64_t lpbk_bcast_frames;
7951 /* Number of transmitted broadcast frames */
7952 uint64_t lpbk_ucast_bytes;
7953 /* Number of transmitted bytes for unicast traffic */
7954 uint64_t lpbk_mcast_bytes;
7955 /* Number of transmitted bytes for multicast traffic */
7956 uint64_t lpbk_bcast_bytes;
7957 /* Number of transmitted bytes for broadcast traffic */
7958 uint64_t tx_stat_discard;
7959 /* Total Tx Drops for loopback traffic reported by STATS block */
7960 uint64_t tx_stat_error;
7961 /* Total Tx Error Drops for loopback traffic reported by STATS block */
7962 uint64_t rx_stat_discard;
7963 /* Total Rx Drops for loopback traffic reported by STATS block */
7964 uint64_t rx_stat_error;
7965 /* Total Rx Error Drops for loopback traffic reported by STATS block */
7972 * This field is used in Output records to indicate that the output is
7973 * completely written to RAM. This field should be read as '1' to
7974 * indicate that the output has been completely written. When writing a
7975 * command completion or response to an internal processor, the order of
7976 * writes has to be such that this field is written last.
7978 } __attribute__((packed));
7980 /* hwrm_port_clr_stats */
7982 * Description: This function clears per port statistics. The HWRM shall not
7983 * allow a VF driver to clear port statistics. The HWRM shall not allow a PF
7984 * driver to clear port statistics in a partitioning mode. The HWRM may allow a
7985 * PF driver to clear port statistics in the non-partitioning mode.
7987 /* Input (24 bytes) */
7989 struct hwrm_port_clr_stats_input {
7992 * This value indicates what type of request this is. The format for the
7993 * rest of the command is determined by this field.
7997 * This value indicates the what completion ring the request will be
7998 * optionally completed on. If the value is -1, then no CR completion
7999 * will be generated. Any other value must be a valid CR ring_id value
8000 * for this function.
8003 /* This value indicates the command sequence number. */
8006 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8007 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8011 * This is the host address where the response will be written when the
8012 * request is complete. This area must be 16B aligned and must be
8013 * cleared to zero before the request is made.
8016 /* Port ID of port that is being queried. */
8017 uint16_t unused_0[3];
8018 } __attribute__((packed));
8020 /* Output (16 bytes) */
8022 struct hwrm_port_clr_stats_output {
8023 uint16_t error_code;
8025 * Pass/Fail or error type Note: receiver to verify the in parameters,
8026 * and fail the call with an error when appropriate
8029 /* This field returns the type of original request. */
8031 /* This field provides original sequence number of the command. */
8034 * This field is the length of the response in bytes. The last byte of
8035 * the response is a valid flag that will read as '1' when the command
8036 * has been completely written to memory.
8044 * This field is used in Output records to indicate that the output is
8045 * completely written to RAM. This field should be read as '1' to
8046 * indicate that the output has been completely written. When writing a
8047 * command completion or response to an internal processor, the order of
8048 * writes has to be such that this field is written last.
8050 } __attribute__((packed));
8052 /* hwrm_port_lpbk_clr_stats */
8054 * Description: This function clears loopback statistics. The HWRM shall not
8055 * allow a VF driver to clear loopback statistics. The HWRM shall not allow a PF
8056 * driver to clear loopback statistics in a partitioning mode. The HWRM may
8057 * allow a PF driver to clear loopback statistics in the non-partitioning mode.
8059 /* Input (16 bytes) */
8061 struct hwrm_port_lpbk_clr_stats_input {
8064 * This value indicates what type of request this is. The format for the
8065 * rest of the command is determined by this field.
8069 * This value indicates the what completion ring the request will be
8070 * optionally completed on. If the value is -1, then no CR completion
8071 * will be generated. Any other value must be a valid CR ring_id value
8072 * for this function.
8075 /* This value indicates the command sequence number. */
8078 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8079 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8083 * This is the host address where the response will be written when the
8084 * request is complete. This area must be 16B aligned and must be
8085 * cleared to zero before the request is made.
8087 } __attribute__((packed));
8089 /* Output (16 bytes) */
8091 struct hwrm_port_lpbk_clr_stats_output {
8092 uint16_t error_code;
8094 * Pass/Fail or error type Note: receiver to verify the in parameters,
8095 * and fail the call with an error when appropriate
8098 /* This field returns the type of original request. */
8100 /* This field provides original sequence number of the command. */
8103 * This field is the length of the response in bytes. The last byte of
8104 * the response is a valid flag that will read as '1' when the command
8105 * has been completely written to memory.
8113 * This field is used in Output records to indicate that the output is
8114 * completely written to RAM. This field should be read as '1' to
8115 * indicate that the output has been completely written. When writing a
8116 * command completion or response to an internal processor, the order of
8117 * writes has to be such that this field is written last.
8119 } __attribute__((packed));
8121 /* hwrm_port_blink_led */
8123 * Description: This function blinks the port LED for the specified number of
8126 /* Input (24 bytes) */
8128 struct hwrm_port_blink_led_input {
8131 * This value indicates what type of request this is. The format for the
8132 * rest of the command is determined by this field.
8136 * This value indicates the what completion ring the request will be
8137 * optionally completed on. If the value is -1, then no CR completion
8138 * will be generated. Any other value must be a valid CR ring_id value
8139 * for this function.
8142 /* This value indicates the command sequence number. */
8145 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8146 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8150 * This is the host address where the response will be written when the
8151 * request is complete. This area must be 16B aligned and must be
8152 * cleared to zero before the request is made.
8154 uint32_t num_blinks;
8155 /* Number of blinks. */
8157 } __attribute__((packed));
8159 /* Output (16 bytes) */
8161 struct hwrm_port_blink_led_output {
8162 uint16_t error_code;
8164 * Pass/Fail or error type Note: receiver to verify the in parameters,
8165 * and fail the call with an error when appropriate
8168 /* This field returns the type of original request. */
8170 /* This field provides original sequence number of the command. */
8173 * This field is the length of the response in bytes. The last byte of
8174 * the response is a valid flag that will read as '1' when the command
8175 * has been completely written to memory.
8183 * This field is used in Output records to indicate that the output is
8184 * completely written to RAM. This field should be read as '1' to
8185 * indicate that the output has been completely written. When writing a
8186 * command completion or response to an internal processor, the order of
8187 * writes has to be such that this field is written last.
8189 } __attribute__((packed));
8191 /* hwrm_port_ts_query */
8193 * Description: This function is used to read timestamp information captured for
8194 * PTP messages on this port.
8196 /* Input (24 bytes) */
8198 struct hwrm_port_ts_query_input {
8201 * This value indicates what type of request this is. The format for the
8202 * rest of the command is determined by this field.
8206 * This value indicates the what completion ring the request will be
8207 * optionally completed on. If the value is -1, then no CR completion
8208 * will be generated. Any other value must be a valid CR ring_id value
8209 * for this function.
8212 /* This value indicates the command sequence number. */
8215 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8216 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8220 * This is the host address where the response will be written when the
8221 * request is complete. This area must be 16B aligned and must be
8222 * cleared to zero before the request is made.
8226 * Enumeration denoting the RX, TX type of the resource. This
8227 * enumeration is used for resources that are similar for both TX and RX
8228 * paths of the chip.
8230 #define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH UINT32_C(0x1)
8232 #define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
8234 #define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
8235 #define HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_LAST HWRM_PORT_TS_QUERY_INPUT_FLAGS_PATH_RX
8237 /* Port ID of port that is being queried. */
8239 } __attribute__((packed));
8241 /* Output (24 bytes) */
8243 struct hwrm_port_ts_query_output {
8244 uint16_t error_code;
8246 * Pass/Fail or error type Note: receiver to verify the in parameters,
8247 * and fail the call with an error when appropriate
8250 /* This field returns the type of original request. */
8252 /* This field provides original sequence number of the command. */
8255 * This field is the length of the response in bytes. The last byte of
8256 * the response is a valid flag that will read as '1' when the command
8257 * has been completely written to memory.
8259 uint64_t ptp_msg_ts;
8260 /* Timestamp value of PTP message captured. */
8261 uint16_t ptp_msg_seqid;
8262 /* Sequence ID of the PTP message captured. */
8270 * This field is used in Output records to indicate that the output is
8271 * completely written to RAM. This field should be read as '1' to
8272 * indicate that the output has been completely written. When writing a
8273 * command completion or response to an internal processor, the order of
8274 * writes has to be such that this field is written last.
8276 } __attribute__((packed));
8278 /* hwrm_port_phy_qcaps */
8280 * Description: This function is used to query the current capabilities of PHY
8283 /* Input (24 bytes) */
8285 struct hwrm_port_phy_qcaps_input {
8288 * This value indicates what type of request this is. The format for the
8289 * rest of the command is determined by this field.
8293 * This value indicates the what completion ring the request will be
8294 * optionally completed on. If the value is -1, then no CR completion
8295 * will be generated. Any other value must be a valid CR ring_id value
8296 * for this function.
8299 /* This value indicates the command sequence number. */
8302 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8303 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8307 * This is the host address where the response will be written when the
8308 * request is complete. This area must be 16B aligned and must be
8309 * cleared to zero before the request is made.
8312 /* Port ID of port that is being queried. */
8313 uint16_t unused_0[3];
8314 } __attribute__((packed));
8316 /* Output (24 bytes) */
8318 struct hwrm_port_phy_qcaps_output {
8319 uint16_t error_code;
8321 * Pass/Fail or error type Note: receiver to verify the in parameters,
8322 * and fail the call with an error when appropriate
8325 /* This field returns the type of original request. */
8327 /* This field provides original sequence number of the command. */
8330 * This field is the length of the response in bytes. The last byte of
8331 * the response is a valid flag that will read as '1' when the command
8332 * has been completely written to memory.
8334 uint8_t eee_supported;
8336 * Reserved field. The HWRM shall set this field to 0. An HWRM client
8337 * shall ignore this field.
8340 * If set to 1, then this field indicates that the link is capable of
8343 #define HWRM_PORT_PHY_QCAPS_OUTPUT_EEE_SUPPORTED UINT32_C(0x1)
8345 * Reserved field. The HWRM shall set this field to 0. An HWRM client
8346 * shall ignore this field.
8348 #define HWRM_PORT_PHY_QCAPS_OUTPUT_RSVD1_MASK UINT32_C(0xfe)
8349 #define HWRM_PORT_PHY_QCAPS_OUTPUT_RSVD1_SFT 1
8351 uint16_t supported_speeds_force_mode;
8353 * This is a bit mask to indicate what speeds are supported as forced
8354 * speeds on this link. For each speed that can be forced on this link,
8355 * the corresponding mask bit shall be set to '1'.
8357 /* 100Mb link speed (Half-duplex) */
8358 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_100MBHD UINT32_C(0x1)
8359 /* 100Mb link speed (Full-duplex) */
8360 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_100MB UINT32_C(0x2)
8361 /* 1Gb link speed (Half-duplex) */
8362 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_1GBHD UINT32_C(0x4)
8363 /* 1Gb link speed (Full-duplex) */
8364 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_1GB UINT32_C(0x8)
8365 /* 2Gb link speed */
8366 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_2GB UINT32_C(0x10)
8367 /* 2.5Gb link speed */
8368 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_2_5GB UINT32_C(0x20)
8369 /* 10Gb link speed */
8370 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_10GB UINT32_C(0x40)
8371 /* 20Gb link speed */
8372 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_20GB UINT32_C(0x80)
8373 /* 25Gb link speed */
8374 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_25GB UINT32_C(0x100)
8375 /* 40Gb link speed */
8376 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_40GB UINT32_C(0x200)
8377 /* 50Gb link speed */
8378 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_50GB UINT32_C(0x400)
8379 /* 100Gb link speed */
8380 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_100GB UINT32_C(0x800)
8381 /* 10Mb link speed (Half-duplex) */
8382 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_10MBHD UINT32_C(0x1000)
8383 /* 10Mb link speed (Full-duplex) */
8384 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_FORCE_MODE_10MB UINT32_C(0x2000)
8385 uint16_t supported_speeds_auto_mode;
8387 * This is a bit mask to indicate what speeds are supported for
8388 * autonegotiation on this link. For each speed that can be
8389 * autonegotiated on this link, the corresponding mask bit shall be set
8392 /* 100Mb link speed (Half-duplex) */
8393 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_100MBHD UINT32_C(0x1)
8394 /* 100Mb link speed (Full-duplex) */
8395 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_100MB UINT32_C(0x2)
8396 /* 1Gb link speed (Half-duplex) */
8397 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_1GBHD UINT32_C(0x4)
8398 /* 1Gb link speed (Full-duplex) */
8399 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_1GB UINT32_C(0x8)
8400 /* 2Gb link speed */
8401 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_2GB UINT32_C(0x10)
8402 /* 2.5Gb link speed */
8403 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_2_5GB UINT32_C(0x20)
8404 /* 10Gb link speed */
8405 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_10GB UINT32_C(0x40)
8406 /* 20Gb link speed */
8407 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_20GB UINT32_C(0x80)
8408 /* 25Gb link speed */
8409 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_25GB UINT32_C(0x100)
8410 /* 40Gb link speed */
8411 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_40GB UINT32_C(0x200)
8412 /* 50Gb link speed */
8413 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_50GB UINT32_C(0x400)
8414 /* 100Gb link speed */
8415 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_100GB UINT32_C(0x800)
8416 /* 10Mb link speed (Half-duplex) */
8417 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_10MBHD UINT32_C(0x1000)
8418 /* 10Mb link speed (Full-duplex) */
8419 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_AUTO_MODE_10MB UINT32_C(0x2000)
8420 uint16_t supported_speeds_eee_mode;
8422 * This is a bit mask to indicate what speeds are supported for EEE on
8423 * this link. For each speed that can be autonegotiated when EEE is
8424 * enabled on this link, the corresponding mask bit shall be set to '1'.
8425 * This field is only valid when the eee_suppotred is set to '1'.
8428 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_RSVD1 UINT32_C(0x1)
8429 /* 100Mb link speed (Full-duplex) */
8430 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_100MB UINT32_C(0x2)
8432 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_RSVD2 UINT32_C(0x4)
8433 /* 1Gb link speed (Full-duplex) */
8434 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_1GB UINT32_C(0x8)
8436 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_RSVD3 UINT32_C(0x10)
8438 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_RSVD4 UINT32_C(0x20)
8439 /* 10Gb link speed */
8440 #define HWRM_PORT_PHY_QCAPS_OUTPUT_SUPPORTED_SPEEDS_EEE_MODE_10GB UINT32_C(0x40)
8441 uint32_t tx_lpi_timer_low;
8443 * Reserved field. The HWRM shall set this field to 0. An HWRM client
8444 * shall ignore this field.
8447 * The lowest value of TX LPI timer that can be set on this link when
8448 * EEE is enabled. This value is in microseconds. This field is valid
8449 * only when_eee_supported is set to '1'.
8451 #define HWRM_PORT_PHY_QCAPS_OUTPUT_TX_LPI_TIMER_LOW_MASK UINT32_C(0xffffff)
8452 #define HWRM_PORT_PHY_QCAPS_OUTPUT_TX_LPI_TIMER_LOW_SFT 0
8454 * Reserved field. The HWRM shall set this field to 0. An HWRM client
8455 * shall ignore this field.
8457 #define HWRM_PORT_PHY_QCAPS_OUTPUT_RSVD2_MASK UINT32_C(0xff000000)
8458 #define HWRM_PORT_PHY_QCAPS_OUTPUT_RSVD2_SFT 24
8459 uint32_t valid_tx_lpi_timer_high;
8461 * This field is used in Output records to indicate that the output is
8462 * completely written to RAM. This field should be read as '1' to
8463 * indicate that the output has been completely written. When writing a
8464 * command completion or response to an internal processor, the order of
8465 * writes has to be such that this field is written last.
8468 * The highest value of TX LPI timer that can be set on this link when
8469 * EEE is enabled. This value is in microseconds. This field is valid
8470 * only when_eee_supported is set to '1'.
8472 #define HWRM_PORT_PHY_QCAPS_OUTPUT_TX_LPI_TIMER_HIGH_MASK UINT32_C(0xffffff)
8473 #define HWRM_PORT_PHY_QCAPS_OUTPUT_TX_LPI_TIMER_HIGH_SFT 0
8475 * This field is used in Output records to indicate that the output is
8476 * completely written to RAM. This field should be read as '1' to
8477 * indicate that the output has been completely written. When writing a
8478 * command completion or response to an internal processor, the order of
8479 * writes has to be such that this field is written last.
8481 #define HWRM_PORT_PHY_QCAPS_OUTPUT_VALID_MASK UINT32_C(0xff000000)
8482 #define HWRM_PORT_PHY_QCAPS_OUTPUT_VALID_SFT 24
8483 } __attribute__((packed));
8485 /* hwrm_queue_qportcfg */
8487 * Description: This function is called by a driver to query queue configuration
8488 * of a port. # The HWRM shall at least advertise one queue with lossy service
8489 * profile. # The driver shall use this command to query queue ids before
8490 * configuring or using any queues. # If a service profile is not set for a
8491 * queue, then the driver shall not use that queue without configuring a service
8492 * profile for it. # If the driver is not allowed to configure service profiles,
8493 * then the driver shall only use queues for which service profiles are pre-
8496 /* Input (24 bytes) */
8498 struct hwrm_queue_qportcfg_input {
8501 * This value indicates what type of request this is. The format for the
8502 * rest of the command is determined by this field.
8506 * This value indicates the what completion ring the request will be
8507 * optionally completed on. If the value is -1, then no CR completion
8508 * will be generated. Any other value must be a valid CR ring_id value
8509 * for this function.
8512 /* This value indicates the command sequence number. */
8515 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8516 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8520 * This is the host address where the response will be written when the
8521 * request is complete. This area must be 16B aligned and must be
8522 * cleared to zero before the request is made.
8526 * Enumeration denoting the RX, TX type of the resource. This
8527 * enumeration is used for resources that are similar for both TX and RX
8528 * paths of the chip.
8530 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
8532 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
8534 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
8535 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
8538 * Port ID of port for which the queue configuration is being queried.
8539 * This field is only required when sent by IPC.
8542 } __attribute__((packed));
8544 /* Output (32 bytes) */
8546 struct hwrm_queue_qportcfg_output {
8547 uint16_t error_code;
8549 * Pass/Fail or error type Note: receiver to verify the in parameters,
8550 * and fail the call with an error when appropriate
8553 /* This field returns the type of original request. */
8555 /* This field provides original sequence number of the command. */
8558 * This field is the length of the response in bytes. The last byte of
8559 * the response is a valid flag that will read as '1' when the command
8560 * has been completely written to memory.
8562 uint8_t max_configurable_queues;
8563 /* The maximum number of queues that can be configured. */
8564 uint8_t max_configurable_lossless_queues;
8565 /* The maximum number of lossless queues that can be configured. */
8566 uint8_t queue_cfg_allowed;
8568 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
8569 * the HWRM shall allow the host SW driver to configure queues using
8572 uint8_t queue_buffers_cfg_allowed;
8574 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
8575 * the HWRM shall allow the host SW driver to configure queue buffers
8576 * using hwrm_queue_buffers_cfg.
8578 uint8_t queue_pfcenable_cfg_allowed;
8580 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
8581 * the HWRM shall allow the host SW driver to configure PFC using
8582 * hwrm_queue_pfcenable_cfg.
8584 uint8_t queue_pri2cos_cfg_allowed;
8586 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
8587 * the HWRM shall allow the host SW driver to configure Priority to CoS
8588 * mapping using hwrm_queue_pri2cos_cfg.
8590 uint8_t queue_cos2bw_cfg_allowed;
8592 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
8593 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
8594 * configuration using hwrm_queue_cos2bw_cfg.
8597 /* ID of CoS Queue 0. FF - Invalid id */
8598 uint8_t queue_id0_service_profile;
8599 /* This value is applicable to CoS queues only. */
8600 /* Lossy (best-effort) */
8601 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8603 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8604 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8605 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8607 /* ID of CoS Queue 1. FF - Invalid id */
8608 uint8_t queue_id1_service_profile;
8609 /* This value is applicable to CoS queues only. */
8610 /* Lossy (best-effort) */
8611 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8613 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8614 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8615 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8617 /* ID of CoS Queue 2. FF - Invalid id */
8618 uint8_t queue_id2_service_profile;
8619 /* This value is applicable to CoS queues only. */
8620 /* Lossy (best-effort) */
8621 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8623 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8624 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8625 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8627 /* ID of CoS Queue 3. FF - Invalid id */
8628 uint8_t queue_id3_service_profile;
8629 /* This value is applicable to CoS queues only. */
8630 /* Lossy (best-effort) */
8631 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8633 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8634 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8635 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8637 /* ID of CoS Queue 4. FF - Invalid id */
8638 uint8_t queue_id4_service_profile;
8639 /* This value is applicable to CoS queues only. */
8640 /* Lossy (best-effort) */
8641 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8643 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8644 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8645 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8647 /* ID of CoS Queue 5. FF - Invalid id */
8648 uint8_t queue_id5_service_profile;
8649 /* This value is applicable to CoS queues only. */
8650 /* Lossy (best-effort) */
8651 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8653 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8654 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8655 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8657 /* ID of CoS Queue 6. FF - Invalid id */
8658 uint8_t queue_id6_service_profile;
8659 /* This value is applicable to CoS queues only. */
8660 /* Lossy (best-effort) */
8661 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8663 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8664 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8665 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8667 /* ID of CoS Queue 7. FF - Invalid id */
8668 uint8_t queue_id7_service_profile;
8669 /* This value is applicable to CoS queues only. */
8670 /* Lossy (best-effort) */
8671 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8673 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8674 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8675 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8678 * This field is used in Output records to indicate that the output is
8679 * completely written to RAM. This field should be read as '1' to
8680 * indicate that the output has been completely written. When writing a
8681 * command completion or response to an internal processor, the order of
8682 * writes has to be such that this field is written last.
8684 } __attribute__((packed));
8686 /* hwrm_queue_qcfg */
8688 * Description: This function is called by a driver to query a queue
8691 /* Input (24 bytes) */
8693 struct hwrm_queue_qcfg_input {
8696 * This value indicates what type of request this is. The format for the
8697 * rest of the command is determined by this field.
8701 * This value indicates the what completion ring the request will be
8702 * optionally completed on. If the value is -1, then no CR completion
8703 * will be generated. Any other value must be a valid CR ring_id value
8704 * for this function.
8707 /* This value indicates the command sequence number. */
8710 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8711 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8715 * This is the host address where the response will be written when the
8716 * request is complete. This area must be 16B aligned and must be
8717 * cleared to zero before the request is made.
8721 * Enumeration denoting the RX, TX type of the resource. This
8722 * enumeration is used for resources that are similar for both TX and RX
8723 * paths of the chip.
8725 #define HWRM_QUEUE_QCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
8727 #define HWRM_QUEUE_QCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
8729 #define HWRM_QUEUE_QCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
8730 #define HWRM_QUEUE_QCFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_QCFG_INPUT_FLAGS_PATH_RX
8732 /* Queue ID of the queue. */
8733 } __attribute__((packed));
8735 /* Output (16 bytes) */
8737 struct hwrm_queue_qcfg_output {
8738 uint16_t error_code;
8740 * Pass/Fail or error type Note: receiver to verify the in parameters,
8741 * and fail the call with an error when appropriate
8744 /* This field returns the type of original request. */
8746 /* This field provides original sequence number of the command. */
8749 * This field is the length of the response in bytes. The last byte of
8750 * the response is a valid flag that will read as '1' when the command
8751 * has been completely written to memory.
8754 /* This value is a the estimate packet length used in the TX arbiter. */
8755 uint8_t service_profile;
8756 /* This value is applicable to CoS queues only. */
8757 /* Lossy (best-effort) */
8758 #define HWRM_QUEUE_QCFG_OUTPUT_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8760 #define HWRM_QUEUE_QCFG_OUTPUT_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8761 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8762 #define HWRM_QUEUE_QCFG_OUTPUT_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8767 * This field is used in Output records to indicate that the output is
8768 * completely written to RAM. This field should be read as '1' to
8769 * indicate that the output has been completely written. When writing a
8770 * command completion or response to an internal processor, the order of
8771 * writes has to be such that this field is written last.
8773 } __attribute__((packed));
8775 /* hwrm_queue_cfg */
8776 /* Description: This function is called by a driver to configure a queue. */
8777 /* Input (40 bytes) */
8779 struct hwrm_queue_cfg_input {
8782 * This value indicates what type of request this is. The format for the
8783 * rest of the command is determined by this field.
8787 * This value indicates the what completion ring the request will be
8788 * optionally completed on. If the value is -1, then no CR completion
8789 * will be generated. Any other value must be a valid CR ring_id value
8790 * for this function.
8793 /* This value indicates the command sequence number. */
8796 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8797 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8801 * This is the host address where the response will be written when the
8802 * request is complete. This area must be 16B aligned and must be
8803 * cleared to zero before the request is made.
8807 * Enumeration denoting the RX, TX type of the resource. This
8808 * enumeration is used for resources that are similar for both TX and RX
8809 * paths of the chip.
8811 #define HWRM_QUEUE_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
8813 #define HWRM_QUEUE_CFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
8815 #define HWRM_QUEUE_CFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
8816 #define HWRM_QUEUE_CFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_CFG_INPUT_FLAGS_PATH_RX
8818 /* This bit must be '1' for the dflt_len field to be configured. */
8819 #define HWRM_QUEUE_CFG_INPUT_ENABLES_DFLT_LEN UINT32_C(0x1)
8820 /* This bit must be '1' for the service_profile field to be configured. */
8821 #define HWRM_QUEUE_CFG_INPUT_ENABLES_SERVICE_PROFILE UINT32_C(0x2)
8823 /* Queue ID of queue that is to be configured by this function. */
8826 * This value is a the estimate packet length used in the TX arbiter.
8827 * Set to 0xFF... (All Fs) to not adjust this value.
8829 uint8_t service_profile;
8830 /* This value is applicable to CoS queues only. */
8831 /* Lossy (best-effort) */
8832 #define HWRM_QUEUE_CFG_INPUT_SERVICE_PROFILE_LOSSY UINT32_C(0x0)
8834 #define HWRM_QUEUE_CFG_INPUT_SERVICE_PROFILE_LOSSLESS UINT32_C(0x1)
8835 /* Set to 0xFF... (All Fs) if there is no service profile specified */
8836 #define HWRM_QUEUE_CFG_INPUT_SERVICE_PROFILE_UNKNOWN UINT32_C(0xff)
8837 uint8_t unused_0[7];
8838 } __attribute__((packed));
8840 /* Output (16 bytes) */
8842 struct hwrm_queue_cfg_output {
8843 uint16_t error_code;
8845 * Pass/Fail or error type Note: receiver to verify the in parameters,
8846 * and fail the call with an error when appropriate
8849 /* This field returns the type of original request. */
8851 /* This field provides original sequence number of the command. */
8854 * This field is the length of the response in bytes. The last byte of
8855 * the response is a valid flag that will read as '1' when the command
8856 * has been completely written to memory.
8864 * This field is used in Output records to indicate that the output is
8865 * completely written to RAM. This field should be read as '1' to
8866 * indicate that the output has been completely written. When writing a
8867 * command completion or response to an internal processor, the order of
8868 * writes has to be such that this field is written last.
8870 } __attribute__((packed));
8872 /* hwrm_queue_buffers_qcfg */
8874 * Description: This function is called by a driver to query configuration of
8875 * the buffers assigned to a queue.
8877 /* Input (24 bytes) */
8879 struct hwrm_queue_buffers_qcfg_input {
8882 * This value indicates what type of request this is. The format for the
8883 * rest of the command is determined by this field.
8887 * This value indicates the what completion ring the request will be
8888 * optionally completed on. If the value is -1, then no CR completion
8889 * will be generated. Any other value must be a valid CR ring_id value
8890 * for this function.
8893 /* This value indicates the command sequence number. */
8896 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8897 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8901 * This is the host address where the response will be written when the
8902 * request is complete. This area must be 16B aligned and must be
8903 * cleared to zero before the request is made.
8907 * Enumeration denoting the RX, TX type of the resource. This
8908 * enumeration is used for resources that are similar for both TX and RX
8909 * paths of the chip.
8911 #define HWRM_QUEUE_BUFFERS_QCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
8913 #define HWRM_QUEUE_BUFFERS_QCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
8915 #define HWRM_QUEUE_BUFFERS_QCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
8916 #define HWRM_QUEUE_BUFFERS_QCFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_BUFFERS_QCFG_INPUT_FLAGS_PATH_RX
8918 /* Queue ID of queue that is to be configured by this function. */
8919 } __attribute__((packed));
8921 /* Output (40 bytes) */
8923 struct hwrm_queue_buffers_qcfg_output {
8924 uint16_t error_code;
8926 * Pass/Fail or error type Note: receiver to verify the in parameters,
8927 * and fail the call with an error when appropriate
8930 /* This field returns the type of original request. */
8932 /* This field provides original sequence number of the command. */
8935 * This field is the length of the response in bytes. The last byte of
8936 * the response is a valid flag that will read as '1' when the command
8937 * has been completely written to memory.
8940 /* Number of bytes allocated as reserved space for this queue. */
8943 * Number of bytes of shared buffer space for this queue. The changing
8944 * of shared buffer size for one CoS may create an adverse effect on
8945 * other CoSs sharing the same buffer. It is recommended that the driver
8946 * does not modify the shared mbuf size without understanding the
8947 * consequence of it.
8951 * XOFF threshold of the queue. This is a high threshold value used to
8956 * XON threshold of the queue. This is the low threshold value used to
8961 * FULL threshold of the queue. At this threshold, buffers allocated for
8962 * this queue are full. Once this condition is asserted, packets on that
8963 * queue are dropped.
8967 * NOTFULL threshold of the queue. This threshold is used for the de-
8968 * assertion of buffers full condition.
8972 * The maximum number of bytes that will be allowed to be consumed by
8973 * the queue. This value is the sum of both the number of bytes reserved
8974 * for this queue and the maximum number of bytes of shared buffers
8975 * allowed to be consumed by this queue.
8982 * This field is used in Output records to indicate that the output is
8983 * completely written to RAM. This field should be read as '1' to
8984 * indicate that the output has been completely written. When writing a
8985 * command completion or response to an internal processor, the order of
8986 * writes has to be such that this field is written last.
8988 } __attribute__((packed));
8990 /* hwrm_queue_buffers_cfg */
8992 * Description: This function is called by a driver to configure the buffering
8995 /* Input (56 bytes) */
8997 struct hwrm_queue_buffers_cfg_input {
9000 * This value indicates what type of request this is. The format for the
9001 * rest of the command is determined by this field.
9005 * This value indicates the what completion ring the request will be
9006 * optionally completed on. If the value is -1, then no CR completion
9007 * will be generated. Any other value must be a valid CR ring_id value
9008 * for this function.
9011 /* This value indicates the command sequence number. */
9014 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9015 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9019 * This is the host address where the response will be written when the
9020 * request is complete. This area must be 16B aligned and must be
9021 * cleared to zero before the request is made.
9025 * Enumeration denoting the RX, TX type of the resource. This
9026 * enumeration is used for resources that are similar for both TX and RX
9027 * paths of the chip.
9029 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9031 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
9033 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
9034 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_BUFFERS_CFG_INPUT_FLAGS_PATH_RX
9036 /* This bit must be '1' for the reserved field to be configured. */
9037 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_RESERVED UINT32_C(0x1)
9038 /* This bit must be '1' for the shared field to be configured. */
9039 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_SHARED UINT32_C(0x2)
9040 /* This bit must be '1' for the xoff field to be configured. */
9041 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_XOFF UINT32_C(0x4)
9042 /* This bit must be '1' for the xon field to be configured. */
9043 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_XON UINT32_C(0x8)
9044 /* This bit must be '1' for the full field to be configured. */
9045 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_FULL UINT32_C(0x10)
9046 /* This bit must be '1' for the notfull field to be configured. */
9047 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_NOTFULL UINT32_C(0x20)
9048 /* This bit must be '1' for the max field to be configured. */
9049 #define HWRM_QUEUE_BUFFERS_CFG_INPUT_ENABLES_MAX UINT32_C(0x40)
9051 /* Queue ID of queue that is to be configured by this function. */
9053 /* Number of bytes to be allocated as reserved space for this queue. */
9056 * Number of bytes of shared buffer space for this queue. The changing
9057 * of shared buffer size for one CoS may create an adverse effect on
9058 * other CoSs sharing the same buffer. It is recommended that the driver
9059 * does not modify the shared mbuf size without understanding the
9060 * consequence of it.
9064 * XOFF threshold of the queue. This is a high threshold value used to
9069 * XON threshold of the queue. This is the low threshold value used to
9074 * FULL threshold of the queue. At this threshold, buffers allocated for
9075 * this queue are full. Once this condition is asserted, packets on that
9076 * queue are dropped.
9080 * NOTFULL threshold of the queue. This threshold is used for the de-
9081 * assertion of buffers full condition.
9085 * The maximum number of bytes that will be allowed to be consumed by
9086 * the queue. This value is the sum of both the number of bytes reserved
9087 * for this queue and the maximum number of bytes of shared buffers
9088 * allowed to be consumed by this queue.
9090 } __attribute__((packed));
9092 /* Output (16 bytes) */
9094 struct hwrm_queue_buffers_cfg_output {
9095 uint16_t error_code;
9097 * Pass/Fail or error type Note: receiver to verify the in parameters,
9098 * and fail the call with an error when appropriate
9101 /* This field returns the type of original request. */
9103 /* This field provides original sequence number of the command. */
9106 * This field is the length of the response in bytes. The last byte of
9107 * the response is a valid flag that will read as '1' when the command
9108 * has been completely written to memory.
9116 * This field is used in Output records to indicate that the output is
9117 * completely written to RAM. This field should be read as '1' to
9118 * indicate that the output has been completely written. When writing a
9119 * command completion or response to an internal processor, the order of
9120 * writes has to be such that this field is written last.
9122 } __attribute__((packed));
9124 /* hwrm_queue_pfcenable_qcfg */
9126 * Description: This function is called by a driver to query PFC configuration
9127 * for different priorities on that port. This mapping can be different on
9130 /* Input (24 bytes) */
9132 struct hwrm_queue_pfcenable_qcfg_input {
9135 * This value indicates what type of request this is. The format for the
9136 * rest of the command is determined by this field.
9140 * This value indicates the what completion ring the request will be
9141 * optionally completed on. If the value is -1, then no CR completion
9142 * will be generated. Any other value must be a valid CR ring_id value
9143 * for this function.
9146 /* This value indicates the command sequence number. */
9149 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9150 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9154 * This is the host address where the response will be written when the
9155 * request is complete. This area must be 16B aligned and must be
9156 * cleared to zero before the request is made.
9160 * Port ID of port for which the table is being configured. The HWRM
9161 * needs to check whether this function is allowed to configure pri2cos
9162 * mapping on this port.
9164 uint16_t unused_0[3];
9165 } __attribute__((packed));
9167 /* Output (16 bytes) */
9169 struct hwrm_queue_pfcenable_qcfg_output {
9170 uint16_t error_code;
9172 * Pass/Fail or error type Note: receiver to verify the in parameters,
9173 * and fail the call with an error when appropriate
9176 /* This field returns the type of original request. */
9178 /* This field provides original sequence number of the command. */
9181 * This field is the length of the response in bytes. The last byte of
9182 * the response is a valid flag that will read as '1' when the command
9183 * has been completely written to memory.
9186 /* If set to 1, then PFC is enabled on PRI 0. */
9187 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI0_PFC_ENABLED UINT32_C(0x1)
9188 /* If set to 1, then PFC is enabled on PRI 1. */
9189 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI1_PFC_ENABLED UINT32_C(0x2)
9190 /* If set to 1, then PFC is enabled on PRI 2. */
9191 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI2_PFC_ENABLED UINT32_C(0x4)
9192 /* If set to 1, then PFC is enabled on PRI 3. */
9193 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI3_PFC_ENABLED UINT32_C(0x8)
9194 /* If set to 1, then PFC is enabled on PRI 4. */
9195 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI4_PFC_ENABLED UINT32_C(0x10)
9196 /* If set to 1, then PFC is enabled on PRI 5. */
9197 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI5_PFC_ENABLED UINT32_C(0x20)
9198 /* If set to 1, then PFC is enabled on PRI 6. */
9199 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI6_PFC_ENABLED UINT32_C(0x40)
9200 /* If set to 1, then PFC is enabled on PRI 7. */
9201 #define HWRM_QUEUE_PFCENABLE_QCFG_OUTPUT_FLAGS_PRI7_PFC_ENABLED UINT32_C(0x80)
9207 * This field is used in Output records to indicate that the output is
9208 * completely written to RAM. This field should be read as '1' to
9209 * indicate that the output has been completely written. When writing a
9210 * command completion or response to an internal processor, the order of
9211 * writes has to be such that this field is written last.
9213 } __attribute__((packed));
9215 /* hwrm_queue_pfcenable_cfg */
9217 * Description: This function is called by a driver to configure the PFC enabled
9218 * for different priorities on that port. This mapping can be different on
9221 /* Input (24 bytes) */
9223 struct hwrm_queue_pfcenable_cfg_input {
9226 * This value indicates what type of request this is. The format for the
9227 * rest of the command is determined by this field.
9231 * This value indicates the what completion ring the request will be
9232 * optionally completed on. If the value is -1, then no CR completion
9233 * will be generated. Any other value must be a valid CR ring_id value
9234 * for this function.
9237 /* This value indicates the command sequence number. */
9240 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9241 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9245 * This is the host address where the response will be written when the
9246 * request is complete. This area must be 16B aligned and must be
9247 * cleared to zero before the request is made.
9250 /* If set to 1, then PFC is requested to be enabled on PRI 0. */
9251 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI0_PFC_ENABLED UINT32_C(0x1)
9252 /* If set to 1, then PFC is requested to be enabled on PRI 1. */
9253 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI1_PFC_ENABLED UINT32_C(0x2)
9254 /* If set to 1, then PFC is requested to be enabled on PRI 2. */
9255 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI2_PFC_ENABLED UINT32_C(0x4)
9256 /* If set to 1, then PFC is requested to be enabled on PRI 3. */
9257 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI3_PFC_ENABLED UINT32_C(0x8)
9258 /* If set to 1, then PFC is requested to be enabled on PRI 4. */
9259 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI4_PFC_ENABLED UINT32_C(0x10)
9260 /* If set to 1, then PFC is requested to be enabled on PRI 5. */
9261 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI5_PFC_ENABLED UINT32_C(0x20)
9262 /* If set to 1, then PFC is requested to be enabled on PRI 6. */
9263 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI6_PFC_ENABLED UINT32_C(0x40)
9264 /* If set to 1, then PFC is requested to be enabled on PRI 7. */
9265 #define HWRM_QUEUE_PFCENABLE_CFG_INPUT_FLAGS_PRI7_PFC_ENABLED UINT32_C(0x80)
9268 * Port ID of port for which the table is being configured. The HWRM
9269 * needs to check whether this function is allowed to configure pri2cos
9270 * mapping on this port.
9273 } __attribute__((packed));
9275 /* Output (16 bytes) */
9277 struct hwrm_queue_pfcenable_cfg_output {
9278 uint16_t error_code;
9280 * Pass/Fail or error type Note: receiver to verify the in parameters,
9281 * and fail the call with an error when appropriate
9284 /* This field returns the type of original request. */
9286 /* This field provides original sequence number of the command. */
9289 * This field is the length of the response in bytes. The last byte of
9290 * the response is a valid flag that will read as '1' when the command
9291 * has been completely written to memory.
9299 * This field is used in Output records to indicate that the output is
9300 * completely written to RAM. This field should be read as '1' to
9301 * indicate that the output has been completely written. When writing a
9302 * command completion or response to an internal processor, the order of
9303 * writes has to be such that this field is written last.
9305 } __attribute__((packed));
9307 /* hwrm_queue_pri2cos_qcfg */
9309 * Description: This function is called by a driver to query configuration of
9310 * the priority to CoS queue mapping on the transmit side and receive side. This
9311 * mapping can be different in each direction (TX or RX). This mapping can be
9312 * different on different ports. Each CoS queue represents a Traffic Class (TC)
9315 /* Input (24 bytes) */
9317 struct hwrm_queue_pri2cos_qcfg_input {
9320 * This value indicates what type of request this is. The format for the
9321 * rest of the command is determined by this field.
9325 * This value indicates the what completion ring the request will be
9326 * optionally completed on. If the value is -1, then no CR completion
9327 * will be generated. Any other value must be a valid CR ring_id value
9328 * for this function.
9331 /* This value indicates the command sequence number. */
9334 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9335 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9339 * This is the host address where the response will be written when the
9340 * request is complete. This area must be 16B aligned and must be
9341 * cleared to zero before the request is made.
9345 * Enumeration denoting the RX, TX type of the resource. This
9346 * enumeration is used for resources that are similar for both TX and RX
9347 * paths of the chip.
9349 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9351 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
9353 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
9354 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_PATH_RX
9356 * When this bit is set to '1', the mapping is requested for inner VLAN
9359 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN UINT32_C(0x2)
9362 * Port ID of port for which the table is being configured. The HWRM
9363 * needs to check whether this function is allowed to configure pri2cos
9364 * mapping on this port.
9366 uint8_t unused_0[3];
9367 } __attribute__((packed));
9369 /* Output (24 bytes) */
9371 struct hwrm_queue_pri2cos_qcfg_output {
9372 uint16_t error_code;
9374 * Pass/Fail or error type Note: receiver to verify the in parameters,
9375 * and fail the call with an error when appropriate
9378 /* This field returns the type of original request. */
9380 /* This field provides original sequence number of the command. */
9383 * This field is the length of the response in bytes. The last byte of
9384 * the response is a valid flag that will read as '1' when the command
9385 * has been completely written to memory.
9387 uint8_t pri0_cos_queue_id;
9389 * CoS Queue assigned to priority 0. This value can only be changed
9390 * before traffic has started.
9392 uint8_t pri1_cos_queue_id;
9394 * CoS Queue assigned to priority 1. This value can only be changed
9395 * before traffic has started.
9397 uint8_t pri2_cos_queue_id;
9399 * CoS Queue assigned to priority 2 This value can only be changed
9400 * before traffic has started.
9402 uint8_t pri3_cos_queue_id;
9404 * CoS Queue assigned to priority 3. This value can only be changed
9405 * before traffic has started.
9407 uint8_t pri4_cos_queue_id;
9409 * CoS Queue assigned to priority 4. This value can only be changed
9410 * before traffic has started.
9412 uint8_t pri5_cos_queue_id;
9414 * CoS Queue assigned to priority 5. This value can only be changed
9415 * before traffic has started.
9417 uint8_t pri6_cos_queue_id;
9419 * CoS Queue assigned to priority 6. This value can only be changed
9420 * before traffic has started.
9422 uint8_t pri7_cos_queue_id;
9424 * CoS Queue assigned to priority 7. This value can only be changed
9425 * before traffic has started.
9433 * This field is used in Output records to indicate that the output is
9434 * completely written to RAM. This field should be read as '1' to
9435 * indicate that the output has been completely written. When writing a
9436 * command completion or response to an internal processor, the order of
9437 * writes has to be such that this field is written last.
9439 } __attribute__((packed));
9441 /* hwrm_queue_pri2cos_cfg */
9443 * Description: This function is called by a driver to configure the priority to
9444 * CoS queue mapping on the transmit side and receive side. This mapping can be
9445 * different in each direction (TX or RX). This mapping can be different on
9446 * different ports. Each CoS queue represents a Traffic Class (TC) on that port.
9447 * This command configures the VLAN PRI-to-TC mapping for a specific port in
9448 * specific direction.
9450 /* Input (40 bytes) */
9452 struct hwrm_queue_pri2cos_cfg_input {
9455 * This value indicates what type of request this is. The format for the
9456 * rest of the command is determined by this field.
9460 * This value indicates the what completion ring the request will be
9461 * optionally completed on. If the value is -1, then no CR completion
9462 * will be generated. Any other value must be a valid CR ring_id value
9463 * for this function.
9466 /* This value indicates the command sequence number. */
9469 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9470 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9474 * This is the host address where the response will be written when the
9475 * request is complete. This area must be 16B aligned and must be
9476 * cleared to zero before the request is made.
9480 * Enumeration denoting the RX, TX type of the resource. This
9481 * enumeration is used for resources that are similar for both TX and RX
9482 * paths of the chip.
9484 #define HWRM_QUEUE_PRI2COS_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9486 #define HWRM_QUEUE_PRI2COS_CFG_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
9488 #define HWRM_QUEUE_PRI2COS_CFG_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
9489 #define HWRM_QUEUE_PRI2COS_CFG_INPUT_FLAGS_PATH_LAST HWRM_QUEUE_PRI2COS_CFG_INPUT_FLAGS_PATH_RX
9490 /* When this bit is '1', the mapping is for inner VLAN PRI. */
9491 #define HWRM_QUEUE_PRI2COS_CFG_INPUT_FLAGS_IVLAN UINT32_C(0x2)
9495 * Port ID of port for which the table is being configured. The HWRM
9496 * needs to check whether this function is allowed to configure pri2cos
9497 * mapping on this port.
9499 uint8_t pri0_cos_queue_id;
9501 * CoS Queue assigned to priority 0. This value can only be changed
9502 * before traffic has started.
9504 uint8_t pri1_cos_queue_id;
9506 * CoS Queue assigned to priority 1. This value can only be changed
9507 * before traffic has started.
9509 uint8_t pri2_cos_queue_id;
9511 * CoS Queue assigned to priority 2 This value can only be changed
9512 * before traffic has started.
9514 uint8_t pri3_cos_queue_id;
9516 * CoS Queue assigned to priority 3. This value can only be changed
9517 * before traffic has started.
9519 uint8_t pri4_cos_queue_id;
9521 * CoS Queue assigned to priority 4. This value can only be changed
9522 * before traffic has started.
9524 uint8_t pri5_cos_queue_id;
9526 * CoS Queue assigned to priority 5. This value can only be changed
9527 * before traffic has started.
9529 uint8_t pri6_cos_queue_id;
9531 * CoS Queue assigned to priority 6. This value can only be changed
9532 * before traffic has started.
9534 uint8_t pri7_cos_queue_id;
9536 * CoS Queue assigned to priority 7. This value can only be changed
9537 * before traffic has started.
9539 uint8_t unused_0[7];
9540 } __attribute__((packed));
9542 /* Output (16 bytes) */
9544 struct hwrm_queue_pri2cos_cfg_output {
9545 uint16_t error_code;
9547 * Pass/Fail or error type Note: receiver to verify the in parameters,
9548 * and fail the call with an error when appropriate
9551 /* This field returns the type of original request. */
9553 /* This field provides original sequence number of the command. */
9556 * This field is the length of the response in bytes. The last byte of
9557 * the response is a valid flag that will read as '1' when the command
9558 * has been completely written to memory.
9566 * This field is used in Output records to indicate that the output is
9567 * completely written to RAM. This field should be read as '1' to
9568 * indicate that the output has been completely written. When writing a
9569 * command completion or response to an internal processor, the order of
9570 * writes has to be such that this field is written last.
9572 } __attribute__((packed));
9574 /* hwrm_queue_cos2bw_qcfg */
9576 * Description: This function is called by a driver to query the BW to CoS queue
9577 * mapping on the transmit side of a specific port. This mapping can be
9578 * different on different ports. Each CoS queue represents a Traffic Class (TC)
9579 * on that port. Each traffic class can be assigned a valid combination of the
9580 * following: - Minimum bandwidth - Maximum bandwidth - Transmission selection
9581 * algorithm (TSA) - Priority Level (only applies to strict priority COS) -
9582 * Bandwidth weight # A CoS can be SP or non-SP: A SP CoS always gets the strict
9583 * priority. Is an COS min BW is set to 0x0 then it is considered to be non-SP;
9584 * this is a valid configuration. Note: SP provides lower latency in addition to
9585 * reserved bandwidth # For both SP CoS and non-SP CoS, min BW can be specified
9586 * to reserve specific amount of the port BW. # The min BW specified for a CoS
9587 * shall not exceed max port bandwidth. # The total of min BWs specified for all
9588 * CoS shall not exceed max port bandwidth. # For any non-SP CoS, the minimum
9589 * bandwidth guarantees are subject to round-robin scheduling. This allows BW
9590 * reservation with anti-starvation; one CoS will not block another CoS using
9591 * RR. Note: The bandwidth guarantees for any non-SP CoS are met after servicing
9592 * all SP CoS. # An SP CoS can potentially starve other lower priority SP CoS
9593 * and non-SP CoS queues. This can occur to the extent the SP min exceeds the
9594 * available port BW. # For any CoS, max BW can be specified to limit the BW
9595 * consumed by the CoS. # The max BW specified for a CoS shall not exceed the
9596 * max port bandwidth. # The WFQ provides a mechanism for sharing available
9597 * bandwidth beyond the reserved minimums configured for each CoS. The WFQ
9598 * scheduler is used to provide the percentages of remaining bandwidth after: *
9599 * first servicing the reserved bandwidth for all SP CoS, * followed by the
9600 * reserved bandwidth for all non-SP CoS * All CoS may participate in the WFQ #
9601 * If a CoS does not have a configured max BW it may use all available bandwidth
9602 * up to the max port bandwidth Minimum Bandwidth (min BW): # This is the
9603 * guaranteed bandwidth for the COS. # A value of 0x0 is valid and it means that
9604 * this COS is not guaranteed any bandwidth. A value of 0xFF.. (all Fs) means
9605 * min BW is not specified. When the min BW is not specified, the HWRM can set
9606 * it to any value it considers appropriate. Note: For a non-SP COS, the HWRM
9607 * should set min BW to 0 when the min BW is not specified. For an SP COS, the
9608 * HWRM should set min BW to some small value when the min BW is not specified.
9609 * Maximum Bandwidth: # This is the bandwidth limit of the COS. # Values 0x0 and
9610 * 0xFF.. (all Fs) are considered unspecified and the HWRM will set the maximum
9611 * bandwidth to maximum port bandwidth. Priority Level: # It applies only to SP.
9612 * # This parameter is ignored for non-SP. # 0-7 are valid values (higher value
9613 * means higher priority) # A priority level can be assigned to at most one SP.
9614 * # Invalid priority levels assignment for SPs shall result in failure.
9615 * Additional notes: # The HWRM may have to use min and (max - min) to set
9616 * appropriate counters of hardware rate limiters. # The bandwidth percentage as
9617 * specified in the DCB TC BW assignment should be used by the driver to specify
9618 * maximum bandwidth and bandwidth weight for a COS. For example, the driver
9619 * should set max BW to 20 Gbps and weight to 50 for two COSs when these two
9620 * COSs are assigned 50% share of 40 Gbps max port bandwidth.
9622 /* Input (24 bytes) */
9624 struct hwrm_queue_cos2bw_qcfg_input {
9627 * This value indicates what type of request this is. The format for the
9628 * rest of the command is determined by this field.
9632 * This value indicates the what completion ring the request will be
9633 * optionally completed on. If the value is -1, then no CR completion
9634 * will be generated. Any other value must be a valid CR ring_id value
9635 * for this function.
9638 /* This value indicates the command sequence number. */
9641 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9642 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9646 * This is the host address where the response will be written when the
9647 * request is complete. This area must be 16B aligned and must be
9648 * cleared to zero before the request is made.
9652 * Port ID of port for which the table is being configured. The HWRM
9653 * needs to check whether this function is allowed to configure TC BW
9654 * assignment on this port.
9656 uint16_t unused_0[3];
9657 } __attribute__((packed));
9659 /* Output (112 bytes) */
9661 struct hwrm_queue_cos2bw_qcfg_output {
9662 uint16_t error_code;
9664 * Pass/Fail or error type Note: receiver to verify the in parameters,
9665 * and fail the call with an error when appropriate
9668 /* This field returns the type of original request. */
9670 /* This field provides original sequence number of the command. */
9673 * This field is the length of the response in bytes. The last byte of
9674 * the response is a valid flag that will read as '1' when the command
9675 * has been completely written to memory.
9678 /* ID of CoS Queue 0. */
9681 uint32_t queue_id0_min_bw;
9683 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9684 * this value into byte counter and time interval used for this COS
9685 * inside the device.
9687 uint32_t queue_id0_max_bw;
9689 * Maximum BW allocated to CoS Queue in Mbps. The HWRM will translate
9690 * this value into byte counter and time interval used for this COS
9691 * inside the device.
9693 uint8_t queue_id0_tsa_assign;
9694 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9695 /* Strict Priority */
9696 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID0_TSA_ASSIGN_SP UINT32_C(0x0)
9697 /* Enhanced Transmission Selection */
9698 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID0_TSA_ASSIGN_ETS UINT32_C(0x1)
9700 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID0_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9702 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID0_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9703 uint8_t queue_id0_pri_lvl;
9705 * Priority level for strict priority. Valid only when the tsa_assign is
9706 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9708 uint8_t queue_id0_bw_weight;
9710 * Weight used to allocate remaining BW for this COS after servicing
9711 * guaranteed bandwidths for all COS.
9714 /* ID of CoS Queue 1. */
9715 uint32_t queue_id1_min_bw;
9717 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9718 * this value into byte counter and time interval used for this COS
9719 * inside the device.
9721 uint32_t queue_id1_max_bw;
9723 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9724 * this value into byte counter and time interval used for this COS
9725 * inside the device.
9727 uint8_t queue_id1_tsa_assign;
9728 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9729 /* Strict Priority */
9730 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID1_TSA_ASSIGN_SP UINT32_C(0x0)
9731 /* Enhanced Transmission Selection */
9732 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID1_TSA_ASSIGN_ETS UINT32_C(0x1)
9734 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID1_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9736 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID1_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9737 uint8_t queue_id1_pri_lvl;
9739 * Priority level for strict priority. Valid only when the tsa_assign is
9740 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9742 uint8_t queue_id1_bw_weight;
9744 * Weight used to allocate remaining BW for this COS after servicing
9745 * guaranteed bandwidths for all COS.
9748 /* ID of CoS Queue 2. */
9749 uint32_t queue_id2_min_bw;
9751 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9752 * this value into byte counter and time interval used for this COS
9753 * inside the device.
9755 uint32_t queue_id2_max_bw;
9757 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9758 * this value into byte counter and time interval used for this COS
9759 * inside the device.
9761 uint8_t queue_id2_tsa_assign;
9762 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9763 /* Strict Priority */
9764 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID2_TSA_ASSIGN_SP UINT32_C(0x0)
9765 /* Enhanced Transmission Selection */
9766 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID2_TSA_ASSIGN_ETS UINT32_C(0x1)
9768 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID2_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9770 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID2_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9771 uint8_t queue_id2_pri_lvl;
9773 * Priority level for strict priority. Valid only when the tsa_assign is
9774 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9776 uint8_t queue_id2_bw_weight;
9778 * Weight used to allocate remaining BW for this COS after servicing
9779 * guaranteed bandwidths for all COS.
9782 /* ID of CoS Queue 3. */
9783 uint32_t queue_id3_min_bw;
9785 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9786 * this value into byte counter and time interval used for this COS
9787 * inside the device.
9789 uint32_t queue_id3_max_bw;
9791 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9792 * this value into byte counter and time interval used for this COS
9793 * inside the device.
9795 uint8_t queue_id3_tsa_assign;
9796 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9797 /* Strict Priority */
9798 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID3_TSA_ASSIGN_SP UINT32_C(0x0)
9799 /* Enhanced Transmission Selection */
9800 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID3_TSA_ASSIGN_ETS UINT32_C(0x1)
9802 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID3_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9804 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID3_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9805 uint8_t queue_id3_pri_lvl;
9807 * Priority level for strict priority. Valid only when the tsa_assign is
9808 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9810 uint8_t queue_id3_bw_weight;
9812 * Weight used to allocate remaining BW for this COS after servicing
9813 * guaranteed bandwidths for all COS.
9816 /* ID of CoS Queue 4. */
9817 uint32_t queue_id4_min_bw;
9819 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9820 * this value into byte counter and time interval used for this COS
9821 * inside the device.
9823 uint32_t queue_id4_max_bw;
9825 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9826 * this value into byte counter and time interval used for this COS
9827 * inside the device.
9829 uint8_t queue_id4_tsa_assign;
9830 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9831 /* Strict Priority */
9832 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID4_TSA_ASSIGN_SP UINT32_C(0x0)
9833 /* Enhanced Transmission Selection */
9834 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID4_TSA_ASSIGN_ETS UINT32_C(0x1)
9836 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID4_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9838 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID4_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9839 uint8_t queue_id4_pri_lvl;
9841 * Priority level for strict priority. Valid only when the tsa_assign is
9842 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9844 uint8_t queue_id4_bw_weight;
9846 * Weight used to allocate remaining BW for this COS after servicing
9847 * guaranteed bandwidths for all COS.
9850 /* ID of CoS Queue 5. */
9851 uint32_t queue_id5_min_bw;
9853 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9854 * this value into byte counter and time interval used for this COS
9855 * inside the device.
9857 uint32_t queue_id5_max_bw;
9859 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9860 * this value into byte counter and time interval used for this COS
9861 * inside the device.
9863 uint8_t queue_id5_tsa_assign;
9864 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9865 /* Strict Priority */
9866 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID5_TSA_ASSIGN_SP UINT32_C(0x0)
9867 /* Enhanced Transmission Selection */
9868 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID5_TSA_ASSIGN_ETS UINT32_C(0x1)
9870 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID5_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9872 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID5_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9873 uint8_t queue_id5_pri_lvl;
9875 * Priority level for strict priority. Valid only when the tsa_assign is
9876 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9878 uint8_t queue_id5_bw_weight;
9880 * Weight used to allocate remaining BW for this COS after servicing
9881 * guaranteed bandwidths for all COS.
9884 /* ID of CoS Queue 6. */
9885 uint32_t queue_id6_min_bw;
9887 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9888 * this value into byte counter and time interval used for this COS
9889 * inside the device.
9891 uint32_t queue_id6_max_bw;
9893 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9894 * this value into byte counter and time interval used for this COS
9895 * inside the device.
9897 uint8_t queue_id6_tsa_assign;
9898 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9899 /* Strict Priority */
9900 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID6_TSA_ASSIGN_SP UINT32_C(0x0)
9901 /* Enhanced Transmission Selection */
9902 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID6_TSA_ASSIGN_ETS UINT32_C(0x1)
9904 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID6_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9906 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID6_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9907 uint8_t queue_id6_pri_lvl;
9909 * Priority level for strict priority. Valid only when the tsa_assign is
9910 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9912 uint8_t queue_id6_bw_weight;
9914 * Weight used to allocate remaining BW for this COS after servicing
9915 * guaranteed bandwidths for all COS.
9918 /* ID of CoS Queue 7. */
9919 uint32_t queue_id7_min_bw;
9921 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
9922 * this value into byte counter and time interval used for this COS
9923 * inside the device.
9925 uint32_t queue_id7_max_bw;
9927 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
9928 * this value into byte counter and time interval used for this COS
9929 * inside the device.
9931 uint8_t queue_id7_tsa_assign;
9932 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
9933 /* Strict Priority */
9934 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID7_TSA_ASSIGN_SP UINT32_C(0x0)
9935 /* Enhanced Transmission Selection */
9936 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID7_TSA_ASSIGN_ETS UINT32_C(0x1)
9938 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID7_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
9940 #define HWRM_QUEUE_COS2BW_QCFG_OUTPUT_QUEUE_ID7_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
9941 uint8_t queue_id7_pri_lvl;
9943 * Priority level for strict priority. Valid only when the tsa_assign is
9944 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
9946 uint8_t queue_id7_bw_weight;
9948 * Weight used to allocate remaining BW for this COS after servicing
9949 * guaranteed bandwidths for all COS.
9957 * This field is used in Output records to indicate that the output is
9958 * completely written to RAM. This field should be read as '1' to
9959 * indicate that the output has been completely written. When writing a
9960 * command completion or response to an internal processor, the order of
9961 * writes has to be such that this field is written last.
9963 } __attribute__((packed));
9965 /* hwrm_queue_cos2bw_cfg */
9967 * Description: This function is called by a driver to configure the BW to CoS
9968 * queue mapping on the transmit side of a specific port. This mapping can be
9969 * different on different ports. Each CoS queue represents a Traffic Class (TC)
9970 * on that port. Each traffic class can be assigned a valid combination of the
9971 * following: - Minimum bandwidth - Maximum bandwidth - Transmission selection
9972 * algorithm (TSA) - Priority Level (only applies to strict priority COS) -
9973 * Bandwidth weight # A CoS can be SP or non-SP: A SP CoS always gets the strict
9974 * priority. Is an COS min BW is set to 0x0 then it is considered to be non-SP;
9975 * this is a valid configuration. Note: SP provides lower latency in addition to
9976 * reserved bandwidth # For both SP CoS and non-SP CoS, min BW can be specified
9977 * to reserve specific amount of the port BW. # The min BW specified for a CoS
9978 * shall not exceed max port bandwidth. # The total of min BWs specified for all
9979 * CoS shall not exceed max port bandwidth. # For any non-SP CoS, the minimum
9980 * bandwidth guarantees are subject to round-robin scheduling. This allows BW
9981 * reservation with anti-starvation; one CoS will not block another CoS using
9982 * RR. Note: The bandwidth guarantees for any non-SP CoS are met after servicing
9983 * all SP CoS. # An SP CoS can potentially starve other lower priority SP CoS
9984 * and non-SP CoS queues. This can occur to the extent the SP min exceeds the
9985 * available port BW. # For any CoS, max BW can be specified to limit the BW
9986 * consumed by the CoS. # The max BW specified for a CoS shall not exceed the
9987 * max port bandwidth. # The WFQ provides a mechanism for sharing available
9988 * bandwidth beyond the reserved minimums configured for each CoS. The WFQ
9989 * scheduler is used to provide the percentages of remaining bandwidth after: -
9990 * first servicing the reserved bandwidth for all SP CoS, - followed by the
9991 * reserved bandwidth for all non-SP CoS - All CoS may participate in the WFQ #
9992 * If a CoS does not have a configured max BW it may use all available bandwidth
9993 * up to the max port bandwidth Minimum Bandwidth (min BW): # This is the
9994 * guaranteed bandwidth for the COS. # A value of 0x0 is valid and it means that
9995 * this COS is not guaranteed any bandwidth. A value of 0xFF.. (all Fs) means
9996 * min BW is not specified. When the min BW is not specified, the HWRM can set
9997 * it to any value it considers appropriate. Note: For a non-SP COS, the HWRM
9998 * should set min BW to 0 when the min BW is not specified. For an SP COS, the
9999 * HWRM should set min BW to some small value when the min BW is not specified.
10000 * Maximum Bandwidth: # This is the bandwidth limit of the COS. # Values 0x0 and
10001 * 0xFF.. (all Fs) are considered unspecified and the HWRM will set the maximum
10002 * bandwidth to maximum port bandwidth. Priority Level: # It applies only to SP.
10003 * # This parameter is ignored for non-SP. # 0-7 are valid values (higher value
10004 * means higher priority) # A priority level can be assigned to at most one SP.
10005 * # Invalid priority levels assignment for SPs shall result in failure.
10006 * Additional notes: # The HWRM may have to use min and (max - min) to set
10007 * appropriate counters of hardware rate limiters. # The bandwidth percentage as
10008 * specified in the DCB TC BW assignment should be used by the driver to specify
10009 * maximum bandwidth and bandwidth weight for a COS. For example, the driver
10010 * should set max BW to 20 Gbps and weight to 50 for two COSs when these two
10011 * COSs are assigned 50% share of 40 Gbps max port bandwidth.
10013 /* Input (128 bytes) */
10015 struct hwrm_queue_cos2bw_cfg_input {
10018 * This value indicates what type of request this is. The format for the
10019 * rest of the command is determined by this field.
10021 uint16_t cmpl_ring;
10023 * This value indicates the what completion ring the request will be
10024 * optionally completed on. If the value is -1, then no CR completion
10025 * will be generated. Any other value must be a valid CR ring_id value
10026 * for this function.
10029 /* This value indicates the command sequence number. */
10030 uint16_t target_id;
10032 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10033 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10035 uint64_t resp_addr;
10037 * This is the host address where the response will be written when the
10038 * request is complete. This area must be 16B aligned and must be
10039 * cleared to zero before the request is made.
10044 * This bit must be '1' for the cos_queue_id0_valid field to be
10047 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID0_VALID UINT32_C(0x1)
10049 * This bit must be '1' for the cos_queue_id1_valid field to be
10052 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID1_VALID UINT32_C(0x2)
10054 * This bit must be '1' for the cos_queue_id2_valid field to be
10057 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID2_VALID UINT32_C(0x4)
10059 * This bit must be '1' for the cos_queue_id3_valid field to be
10062 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID3_VALID UINT32_C(0x8)
10064 * This bit must be '1' for the cos_queue_id4_valid field to be
10067 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID4_VALID UINT32_C(0x10)
10069 * This bit must be '1' for the cos_queue_id5_valid field to be
10072 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID5_VALID UINT32_C(0x20)
10074 * This bit must be '1' for the cos_queue_id6_valid field to be
10077 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID6_VALID UINT32_C(0x40)
10079 * This bit must be '1' for the cos_queue_id7_valid field to be
10082 #define HWRM_QUEUE_COS2BW_CFG_INPUT_ENABLES_COS_QUEUE_ID7_VALID UINT32_C(0x80)
10085 * Port ID of port for which the table is being configured. The HWRM
10086 * needs to check whether this function is allowed to configure TC BW
10087 * assignment on this port.
10090 /* ID of CoS Queue 0. */
10092 uint32_t queue_id0_min_bw;
10094 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10095 * this value into byte counter and time interval used for this COS
10096 * inside the device.
10098 uint32_t queue_id0_max_bw;
10100 * Maximum BW allocated to CoS Queue in Mbps. The HWRM will translate
10101 * this value into byte counter and time interval used for this COS
10102 * inside the device.
10104 uint8_t queue_id0_tsa_assign;
10105 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10106 /* Strict Priority */
10107 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID0_TSA_ASSIGN_SP UINT32_C(0x0)
10108 /* Enhanced Transmission Selection */
10109 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID0_TSA_ASSIGN_ETS UINT32_C(0x1)
10111 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID0_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10113 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID0_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10114 uint8_t queue_id0_pri_lvl;
10116 * Priority level for strict priority. Valid only when the tsa_assign is
10117 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10119 uint8_t queue_id0_bw_weight;
10121 * Weight used to allocate remaining BW for this COS after servicing
10122 * guaranteed bandwidths for all COS.
10125 /* ID of CoS Queue 1. */
10126 uint32_t queue_id1_min_bw;
10128 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10129 * this value into byte counter and time interval used for this COS
10130 * inside the device.
10132 uint32_t queue_id1_max_bw;
10134 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10135 * this value into byte counter and time interval used for this COS
10136 * inside the device.
10138 uint8_t queue_id1_tsa_assign;
10139 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10140 /* Strict Priority */
10141 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID1_TSA_ASSIGN_SP UINT32_C(0x0)
10142 /* Enhanced Transmission Selection */
10143 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID1_TSA_ASSIGN_ETS UINT32_C(0x1)
10145 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID1_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10147 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID1_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10148 uint8_t queue_id1_pri_lvl;
10150 * Priority level for strict priority. Valid only when the tsa_assign is
10151 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10153 uint8_t queue_id1_bw_weight;
10155 * Weight used to allocate remaining BW for this COS after servicing
10156 * guaranteed bandwidths for all COS.
10159 /* ID of CoS Queue 2. */
10160 uint32_t queue_id2_min_bw;
10162 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10163 * this value into byte counter and time interval used for this COS
10164 * inside the device.
10166 uint32_t queue_id2_max_bw;
10168 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10169 * this value into byte counter and time interval used for this COS
10170 * inside the device.
10172 uint8_t queue_id2_tsa_assign;
10173 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10174 /* Strict Priority */
10175 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID2_TSA_ASSIGN_SP UINT32_C(0x0)
10176 /* Enhanced Transmission Selection */
10177 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID2_TSA_ASSIGN_ETS UINT32_C(0x1)
10179 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID2_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10181 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID2_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10182 uint8_t queue_id2_pri_lvl;
10184 * Priority level for strict priority. Valid only when the tsa_assign is
10185 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10187 uint8_t queue_id2_bw_weight;
10189 * Weight used to allocate remaining BW for this COS after servicing
10190 * guaranteed bandwidths for all COS.
10193 /* ID of CoS Queue 3. */
10194 uint32_t queue_id3_min_bw;
10196 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10197 * this value into byte counter and time interval used for this COS
10198 * inside the device.
10200 uint32_t queue_id3_max_bw;
10202 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10203 * this value into byte counter and time interval used for this COS
10204 * inside the device.
10206 uint8_t queue_id3_tsa_assign;
10207 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10208 /* Strict Priority */
10209 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID3_TSA_ASSIGN_SP UINT32_C(0x0)
10210 /* Enhanced Transmission Selection */
10211 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID3_TSA_ASSIGN_ETS UINT32_C(0x1)
10213 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID3_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10215 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID3_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10216 uint8_t queue_id3_pri_lvl;
10218 * Priority level for strict priority. Valid only when the tsa_assign is
10219 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10221 uint8_t queue_id3_bw_weight;
10223 * Weight used to allocate remaining BW for this COS after servicing
10224 * guaranteed bandwidths for all COS.
10227 /* ID of CoS Queue 4. */
10228 uint32_t queue_id4_min_bw;
10230 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10231 * this value into byte counter and time interval used for this COS
10232 * inside the device.
10234 uint32_t queue_id4_max_bw;
10236 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10237 * this value into byte counter and time interval used for this COS
10238 * inside the device.
10240 uint8_t queue_id4_tsa_assign;
10241 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10242 /* Strict Priority */
10243 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID4_TSA_ASSIGN_SP UINT32_C(0x0)
10244 /* Enhanced Transmission Selection */
10245 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID4_TSA_ASSIGN_ETS UINT32_C(0x1)
10247 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID4_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10249 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID4_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10250 uint8_t queue_id4_pri_lvl;
10252 * Priority level for strict priority. Valid only when the tsa_assign is
10253 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10255 uint8_t queue_id4_bw_weight;
10257 * Weight used to allocate remaining BW for this COS after servicing
10258 * guaranteed bandwidths for all COS.
10261 /* ID of CoS Queue 5. */
10262 uint32_t queue_id5_min_bw;
10264 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10265 * this value into byte counter and time interval used for this COS
10266 * inside the device.
10268 uint32_t queue_id5_max_bw;
10270 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10271 * this value into byte counter and time interval used for this COS
10272 * inside the device.
10274 uint8_t queue_id5_tsa_assign;
10275 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10276 /* Strict Priority */
10277 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID5_TSA_ASSIGN_SP UINT32_C(0x0)
10278 /* Enhanced Transmission Selection */
10279 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID5_TSA_ASSIGN_ETS UINT32_C(0x1)
10281 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID5_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10283 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID5_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10284 uint8_t queue_id5_pri_lvl;
10286 * Priority level for strict priority. Valid only when the tsa_assign is
10287 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10289 uint8_t queue_id5_bw_weight;
10291 * Weight used to allocate remaining BW for this COS after servicing
10292 * guaranteed bandwidths for all COS.
10295 /* ID of CoS Queue 6. */
10296 uint32_t queue_id6_min_bw;
10298 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10299 * this value into byte counter and time interval used for this COS
10300 * inside the device.
10302 uint32_t queue_id6_max_bw;
10304 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10305 * this value into byte counter and time interval used for this COS
10306 * inside the device.
10308 uint8_t queue_id6_tsa_assign;
10309 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10310 /* Strict Priority */
10311 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID6_TSA_ASSIGN_SP UINT32_C(0x0)
10312 /* Enhanced Transmission Selection */
10313 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID6_TSA_ASSIGN_ETS UINT32_C(0x1)
10315 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID6_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10317 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID6_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10318 uint8_t queue_id6_pri_lvl;
10320 * Priority level for strict priority. Valid only when the tsa_assign is
10321 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10323 uint8_t queue_id6_bw_weight;
10325 * Weight used to allocate remaining BW for this COS after servicing
10326 * guaranteed bandwidths for all COS.
10329 /* ID of CoS Queue 7. */
10330 uint32_t queue_id7_min_bw;
10332 * Minimum BW allocated to CoS Queue in Mbps. The HWRM will translate
10333 * this value into byte counter and time interval used for this COS
10334 * inside the device.
10336 uint32_t queue_id7_max_bw;
10338 * Maximum BW allocated to CoS queue in Mbps. The HWRM will translate
10339 * this value into byte counter and time interval used for this COS
10340 * inside the device.
10342 uint8_t queue_id7_tsa_assign;
10343 /* Transmission Selection Algorithm (TSA) for CoS Queue. */
10344 /* Strict Priority */
10345 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID7_TSA_ASSIGN_SP UINT32_C(0x0)
10346 /* Enhanced Transmission Selection */
10347 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID7_TSA_ASSIGN_ETS UINT32_C(0x1)
10349 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID7_TSA_ASSIGN_RESERVED_FIRST UINT32_C(0x2)
10351 #define HWRM_QUEUE_COS2BW_CFG_INPUT_QUEUE_ID7_TSA_ASSIGN_RESERVED_LAST UINT32_C(0xff)
10352 uint8_t queue_id7_pri_lvl;
10354 * Priority level for strict priority. Valid only when the tsa_assign is
10355 * 0 - Strict Priority (SP) 0..7 - Valid values. 8..255 - Reserved.
10357 uint8_t queue_id7_bw_weight;
10359 * Weight used to allocate remaining BW for this COS after servicing
10360 * guaranteed bandwidths for all COS.
10362 uint8_t unused_1[5];
10363 } __attribute__((packed));
10365 /* Output (16 bytes) */
10367 struct hwrm_queue_cos2bw_cfg_output {
10368 uint16_t error_code;
10370 * Pass/Fail or error type Note: receiver to verify the in parameters,
10371 * and fail the call with an error when appropriate
10374 /* This field returns the type of original request. */
10376 /* This field provides original sequence number of the command. */
10379 * This field is the length of the response in bytes. The last byte of
10380 * the response is a valid flag that will read as '1' when the command
10381 * has been completely written to memory.
10389 * This field is used in Output records to indicate that the output is
10390 * completely written to RAM. This field should be read as '1' to
10391 * indicate that the output has been completely written. When writing a
10392 * command completion or response to an internal processor, the order of
10393 * writes has to be such that this field is written last.
10395 } __attribute__((packed));
10397 /* hwrm_vnic_alloc */
10399 * Description: This VNIC is a resource in the RX side of the chip that is used
10400 * to represent a virtual host "interface". # At the time of VNIC allocation or
10401 * configuration, the function can specify whether it wants the requested VNIC
10402 * to be the default VNIC for the function or not. # If a function requests
10403 * allocation of a VNIC for the first time and a VNIC is successfully allocated
10404 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
10405 * for that function. # The default VNIC shall be used for the default action
10406 * for a partition or function. # For each VNIC allocated on a function, a
10407 * mapping on the RX side to map the allocated VNIC to source virtual interface
10408 * shall be performed by the HWRM. This should be hidden to the function driver
10409 * requesting the VNIC allocation. This enables broadcast/multicast replication
10410 * with source knockout. # If multicast replication with source knockout is
10411 * enabled, then the internal VNIC to SVIF mapping data structures shall be
10412 * programmed at the time of VNIC allocation.
10414 /* Input (24 bytes) */
10416 struct hwrm_vnic_alloc_input {
10419 * This value indicates what type of request this is. The format for the
10420 * rest of the command is determined by this field.
10422 uint16_t cmpl_ring;
10424 * This value indicates the what completion ring the request will be
10425 * optionally completed on. If the value is -1, then no CR completion
10426 * will be generated. Any other value must be a valid CR ring_id value
10427 * for this function.
10430 /* This value indicates the command sequence number. */
10431 uint16_t target_id;
10433 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10434 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10436 uint64_t resp_addr;
10438 * This is the host address where the response will be written when the
10439 * request is complete. This area must be 16B aligned and must be
10440 * cleared to zero before the request is made.
10444 * When this bit is '1', this VNIC is requested to be the default VNIC
10445 * for this function.
10447 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
10449 } __attribute__((packed));
10451 /* Output (16 bytes) */
10453 struct hwrm_vnic_alloc_output {
10454 uint16_t error_code;
10456 * Pass/Fail or error type Note: receiver to verify the in parameters,
10457 * and fail the call with an error when appropriate
10460 /* This field returns the type of original request. */
10462 /* This field provides original sequence number of the command. */
10465 * This field is the length of the response in bytes. The last byte of
10466 * the response is a valid flag that will read as '1' when the command
10467 * has been completely written to memory.
10470 /* Logical vnic ID */
10476 * This field is used in Output records to indicate that the output is
10477 * completely written to RAM. This field should be read as '1' to
10478 * indicate that the output has been completely written. When writing a
10479 * command completion or response to an internal processor, the order of
10480 * writes has to be such that this field is written last.
10482 } __attribute__((packed));
10484 /* hwrm_vnic_free */
10486 * Description: Free a VNIC resource. Idle any resources associated with the
10487 * VNIC as well as the VNIC. Reset and release all resources associated with the
10490 /* Input (24 bytes) */
10492 struct hwrm_vnic_free_input {
10495 * This value indicates what type of request this is. The format for the
10496 * rest of the command is determined by this field.
10498 uint16_t cmpl_ring;
10500 * This value indicates the what completion ring the request will be
10501 * optionally completed on. If the value is -1, then no CR completion
10502 * will be generated. Any other value must be a valid CR ring_id value
10503 * for this function.
10506 /* This value indicates the command sequence number. */
10507 uint16_t target_id;
10509 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10510 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10512 uint64_t resp_addr;
10514 * This is the host address where the response will be written when the
10515 * request is complete. This area must be 16B aligned and must be
10516 * cleared to zero before the request is made.
10519 /* Logical vnic ID */
10521 } __attribute__((packed));
10523 /* Output (16 bytes) */
10525 struct hwrm_vnic_free_output {
10526 uint16_t error_code;
10528 * Pass/Fail or error type Note: receiver to verify the in parameters,
10529 * and fail the call with an error when appropriate
10532 /* This field returns the type of original request. */
10534 /* This field provides original sequence number of the command. */
10537 * This field is the length of the response in bytes. The last byte of
10538 * the response is a valid flag that will read as '1' when the command
10539 * has been completely written to memory.
10547 * This field is used in Output records to indicate that the output is
10548 * completely written to RAM. This field should be read as '1' to
10549 * indicate that the output has been completely written. When writing a
10550 * command completion or response to an internal processor, the order of
10551 * writes has to be such that this field is written last.
10553 } __attribute__((packed));
10555 /* hwrm_vnic_cfg */
10556 /* Description: Configure the RX VNIC structure. */
10557 /* Input (40 bytes) */
10559 struct hwrm_vnic_cfg_input {
10562 * This value indicates what type of request this is. The format for the
10563 * rest of the command is determined by this field.
10565 uint16_t cmpl_ring;
10567 * This value indicates the what completion ring the request will be
10568 * optionally completed on. If the value is -1, then no CR completion
10569 * will be generated. Any other value must be a valid CR ring_id value
10570 * for this function.
10573 /* This value indicates the command sequence number. */
10574 uint16_t target_id;
10576 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10577 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10579 uint64_t resp_addr;
10581 * This is the host address where the response will be written when the
10582 * request is complete. This area must be 16B aligned and must be
10583 * cleared to zero before the request is made.
10587 * When this bit is '1', the VNIC is requested to be the default VNIC
10588 * for the function.
10590 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
10592 * When this bit is '1', the VNIC is being configured to strip VLAN in
10593 * the RX path. If set to '0', then VLAN stripping is disabled on this
10596 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
10598 * When this bit is '1', the VNIC is being configured to buffer receive
10599 * packets in the hardware until the host posts new receive buffers. If
10600 * set to '0', then bd_stall is being configured to be disabled on this
10603 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
10605 * When this bit is '1', the VNIC is being configured to receive both
10606 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
10607 * configured to be operating in dual VNIC mode.
10609 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
10611 * When this flag is set to '1', the VNIC is requested to be configured
10612 * to receive only RoCE traffic. If this flag is set to '0', then this
10613 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
10614 * to '1', then the HWRM client shall not set this flag to '1'.
10616 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
10618 * When a VNIC uses one destination ring group for certain application
10619 * (e.g. Receive Flow Steering) where exact match is used to direct
10620 * packets to a VNIC with one destination ring group only, there is no
10621 * need to configure RSS indirection table for that VNIC as only one
10622 * destination ring group is used. This flag is used to enable a mode
10623 * where RSS is enabled in the VNIC using a RSS context for computing
10624 * RSS hash but the RSS indirection table is not configured using
10625 * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver should
10626 * not program RSS indirection table for the RSS context that is used
10627 * for computing RSS hash only.
10629 #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
10631 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
10632 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
10633 /* This bit must be '1' for the rss_rule field to be configured. */
10634 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
10635 /* This bit must be '1' for the cos_rule field to be configured. */
10636 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
10637 /* This bit must be '1' for the lb_rule field to be configured. */
10638 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
10639 /* This bit must be '1' for the mru field to be configured. */
10640 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
10642 /* Logical vnic ID */
10643 uint16_t dflt_ring_grp;
10645 * Default Completion ring for the VNIC. This ring will be chosen if
10646 * packet does not match any RSS rules and if there is no COS rule.
10650 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
10655 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
10660 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
10661 * there is no LB rule.
10665 * The maximum receive unit of the vnic. Each vnic is associated with a
10666 * function. The vnic mru value overwrites the mru setting of the
10667 * associated function. The HWRM shall make sure that vnic mru does not
10668 * exceed the mru of the port the function is associated with.
10671 } __attribute__((packed));
10673 /* Output (16 bytes) */
10675 struct hwrm_vnic_cfg_output {
10676 uint16_t error_code;
10678 * Pass/Fail or error type Note: receiver to verify the in parameters,
10679 * and fail the call with an error when appropriate
10682 /* This field returns the type of original request. */
10684 /* This field provides original sequence number of the command. */
10687 * This field is the length of the response in bytes. The last byte of
10688 * the response is a valid flag that will read as '1' when the command
10689 * has been completely written to memory.
10697 * This field is used in Output records to indicate that the output is
10698 * completely written to RAM. This field should be read as '1' to
10699 * indicate that the output has been completely written. When writing a
10700 * command completion or response to an internal processor, the order of
10701 * writes has to be such that this field is written last.
10703 } __attribute__((packed));
10705 /* hwrm_vnic_qcfg */
10707 * Description: Query the RX VNIC structure. This function can be used by a PF
10708 * driver to query its own VNIC resource or VNIC resource of its child VF. This
10709 * function can also be used by a VF driver to query its own VNIC resource.
10711 /* Input (32 bytes) */
10713 struct hwrm_vnic_qcfg_input {
10716 * This value indicates what type of request this is. The format for the
10717 * rest of the command is determined by this field.
10719 uint16_t cmpl_ring;
10721 * This value indicates the what completion ring the request will be
10722 * optionally completed on. If the value is -1, then no CR completion
10723 * will be generated. Any other value must be a valid CR ring_id value
10724 * for this function.
10727 /* This value indicates the command sequence number. */
10728 uint16_t target_id;
10730 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10731 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10733 uint64_t resp_addr;
10735 * This is the host address where the response will be written when the
10736 * request is complete. This area must be 16B aligned and must be
10737 * cleared to zero before the request is made.
10740 /* This bit must be '1' for the vf_id_valid field to be configured. */
10741 #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
10743 /* Logical vnic ID */
10745 /* ID of Virtual Function whose VNIC resource is being queried. */
10746 uint16_t unused_0[3];
10747 } __attribute__((packed));
10749 /* Output (32 bytes) */
10751 struct hwrm_vnic_qcfg_output {
10752 uint16_t error_code;
10754 * Pass/Fail or error type Note: receiver to verify the in parameters,
10755 * and fail the call with an error when appropriate
10758 /* This field returns the type of original request. */
10760 /* This field provides original sequence number of the command. */
10763 * This field is the length of the response in bytes. The last byte of
10764 * the response is a valid flag that will read as '1' when the command
10765 * has been completely written to memory.
10767 uint16_t dflt_ring_grp;
10768 /* Default Completion ring for the VNIC. */
10771 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
10776 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
10781 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
10782 * there is no LB rule.
10785 /* The maximum receive unit of the vnic. */
10789 /* When this bit is '1', the VNIC is the default VNIC for the function. */
10790 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT UINT32_C(0x1)
10792 * When this bit is '1', the VNIC is configured to strip VLAN in the RX
10793 * path. If set to '0', then VLAN stripping is disabled on this VNIC.
10795 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
10797 * When this bit is '1', the VNIC is configured to buffer receive
10798 * packets in the hardware until the host posts new receive buffers. If
10799 * set to '0', then bd_stall is disabled on this VNIC.
10801 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
10803 * When this bit is '1', the VNIC is configured to receive both RoCE and
10804 * non-RoCE traffic. If set to '0', then this VNIC is not configured to
10805 * operate in dual VNIC mode.
10807 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
10809 * When this flag is set to '1', the VNIC is configured to receive only
10810 * RoCE traffic. When this flag is set to '0', the VNIC is not
10811 * configured to receive only RoCE traffic. If roce_dual_vnic_mode flag
10812 * and this flag both are set to '1', then it is an invalid
10813 * configuration of the VNIC. The HWRM should not allow that type of
10814 * mis-configuration by HWRM clients.
10816 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
10818 * When a VNIC uses one destination ring group for certain application
10819 * (e.g. Receive Flow Steering) where exact match is used to direct
10820 * packets to a VNIC with one destination ring group only, there is no
10821 * need to configure RSS indirection table for that VNIC as only one
10822 * destination ring group is used. When this bit is set to '1', then the
10823 * VNIC is enabled in a mode where RSS is enabled in the VNIC using a
10824 * RSS context for computing RSS hash but the RSS indirection table is
10827 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
10834 * This field is used in Output records to indicate that the output is
10835 * completely written to RAM. This field should be read as '1' to
10836 * indicate that the output has been completely written. When writing a
10837 * command completion or response to an internal processor, the order of
10838 * writes has to be such that this field is written last.
10840 } __attribute__((packed));
10842 /* hwrm_vnic_qcaps */
10844 * Description: This function is used to query the capabilities of VNIC
10847 /* Input (24 bytes) */
10849 struct hwrm_vnic_qcaps_input {
10852 * This value indicates what type of request this is. The format for the
10853 * rest of the command is determined by this field.
10855 uint16_t cmpl_ring;
10857 * This value indicates the what completion ring the request will be
10858 * optionally completed on. If the value is -1, then no CR completion
10859 * will be generated. Any other value must be a valid CR ring_id value
10860 * for this function.
10863 /* This value indicates the command sequence number. */
10864 uint16_t target_id;
10866 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10867 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10869 uint64_t resp_addr;
10871 * This is the host address where the response will be written when the
10872 * request is complete. This area must be 16B aligned and must be
10873 * cleared to zero before the request is made.
10877 } __attribute__((packed));
10879 /* Output (24 bytes) */
10881 struct hwrm_vnic_qcaps_output {
10882 uint16_t error_code;
10884 * Pass/Fail or error type Note: receiver to verify the in parameters,
10885 * and fail the call with an error when appropriate
10888 /* This field returns the type of original request. */
10890 /* This field provides original sequence number of the command. */
10893 * This field is the length of the response in bytes. The last byte of
10894 * the response is a valid flag that will read as '1' when the command
10895 * has been completely written to memory.
10898 /* The maximum receive unit that is settable on a vnic. */
10904 * When this bit is '1', the capability of stripping VLAN in the RX path
10905 * is supported on VNIC(s). If set to '0', then VLAN stripping
10906 * capability is not supported on VNIC(s).
10908 #define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_VLAN_STRIP_CAP UINT32_C(0x2)
10910 * When this bit is '1', the capability to buffer receive packets in the
10911 * hardware until the host posts new receive buffers is supported on
10912 * VNIC(s). If set to '0', then bd_stall capability is not supported on
10915 #define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_BD_STALL_CAP UINT32_C(0x4)
10917 * When this bit is '1', the capability to receive both RoCE and non-
10918 * RoCE traffic on VNIC(s) is supported. If set to '0', then the
10919 * capability to receive both RoCE and non-RoCE traffic on VNIC(s) is
10922 #define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_ROCE_DUAL_VNIC_CAP UINT32_C(0x8)
10924 * When this bit is set to '1', the capability to configure a VNIC to
10925 * receive only RoCE traffic is supported. When this flag is set to '0',
10926 * the VNIC capability to configure to receive only RoCE traffic is not
10929 #define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_ROCE_ONLY_VNIC_CAP UINT32_C(0x10)
10931 * When this bit is set to '1', then the capability to enable a VNIC in
10932 * a mode where RSS context without configuring RSS indirection table is
10933 * supported (for RSS hash computation). When this bit is set to '0',
10934 * then a VNIC can not be configured with a mode to enable RSS context
10935 * without configuring RSS indirection table.
10937 #define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_RSS_DFLT_CR_CAP UINT32_C(0x20)
10944 * This field is used in Output records to indicate that the output is
10945 * completely written to RAM. This field should be read as '1' to
10946 * indicate that the output has been completely written. When writing a
10947 * command completion or response to an internal processor, the order of
10948 * writes has to be such that this field is written last.
10950 } __attribute__((packed));
10952 /* hwrm_vnic_tpa_cfg */
10953 /* Description: This function is used to enable/configure TPA on the VNIC. */
10954 /* Input (40 bytes) */
10956 struct hwrm_vnic_tpa_cfg_input {
10959 * This value indicates what type of request this is. The format for the
10960 * rest of the command is determined by this field.
10962 uint16_t cmpl_ring;
10964 * This value indicates the what completion ring the request will be
10965 * optionally completed on. If the value is -1, then no CR completion
10966 * will be generated. Any other value must be a valid CR ring_id value
10967 * for this function.
10970 /* This value indicates the command sequence number. */
10971 uint16_t target_id;
10973 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10974 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10976 uint64_t resp_addr;
10978 * This is the host address where the response will be written when the
10979 * request is complete. This area must be 16B aligned and must be
10980 * cleared to zero before the request is made.
10984 * When this bit is '1', the VNIC shall be configured to perform
10985 * transparent packet aggregation (TPA) of non-tunneled TCP packets.
10987 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA UINT32_C(0x1)
10989 * When this bit is '1', the VNIC shall be configured to perform
10990 * transparent packet aggregation (TPA) of tunneled TCP packets.
10992 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
10994 * When this bit is '1', the VNIC shall be configured to perform
10995 * transparent packet aggregation (TPA) according to Windows Receive
10996 * Segment Coalescing (RSC) rules.
10998 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
11000 * When this bit is '1', the VNIC shall be configured to perform
11001 * transparent packet aggregation (TPA) according to Linux Generic
11002 * Receive Offload (GRO) rules.
11004 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO UINT32_C(0x8)
11006 * When this bit is '1', the VNIC shall be configured to perform
11007 * transparent packet aggregation (TPA) for TCP packets with IP ECN set
11010 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
11012 * When this bit is '1', the VNIC shall be configured to perform
11013 * transparent packet aggregation (TPA) for GRE tunneled TCP packets
11014 * only if all packets have the same GRE sequence.
11016 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ UINT32_C(0x20)
11018 * When this bit is '1' and the GRO mode is enabled, the VNIC shall be
11019 * configured to perform transparent packet aggregation (TPA) for
11020 * TCP/IPv4 packets with consecutively increasing IPIDs. In other words,
11021 * the last packet that is being aggregated to an already existing
11022 * aggregation context shall have IPID 1 more than the IPID of the last
11023 * packet that was aggregated in that aggregation context.
11025 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
11027 * When this bit is '1' and the GRO mode is enabled, the VNIC shall be
11028 * configured to perform transparent packet aggregation (TPA) for TCP
11029 * packets with the same TTL (IPv4) or Hop limit (IPv6) value.
11031 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
11033 /* This bit must be '1' for the max_agg_segs field to be configured. */
11034 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS UINT32_C(0x1)
11035 /* This bit must be '1' for the max_aggs field to be configured. */
11036 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS UINT32_C(0x2)
11037 /* This bit must be '1' for the max_agg_timer field to be configured. */
11038 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER UINT32_C(0x4)
11039 /* This bit must be '1' for the min_agg_len field to be configured. */
11040 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN UINT32_C(0x8)
11042 /* Logical vnic ID */
11043 uint16_t max_agg_segs;
11045 * This is the maximum number of TCP segments that can be aggregated
11046 * (unit is Log2). Max value is 31.
11049 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
11051 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
11053 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
11055 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
11056 /* Any segment size larger than this is not valid */
11057 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
11060 * This is the maximum number of aggregations this VNIC is allowed (unit
11061 * is Log2). Max value is 7
11063 /* 1 aggregation */
11064 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_1 UINT32_C(0x0)
11065 /* 2 aggregations */
11066 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_2 UINT32_C(0x1)
11067 /* 4 aggregations */
11068 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_4 UINT32_C(0x2)
11069 /* 8 aggregations */
11070 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_8 UINT32_C(0x3)
11071 /* 16 aggregations */
11072 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_16 UINT32_C(0x4)
11073 /* Any aggregation size larger than this is not valid */
11074 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX UINT32_C(0x7)
11077 uint32_t max_agg_timer;
11079 * This is the maximum amount of time allowed for an aggregation context
11080 * to complete after it was initiated.
11082 uint32_t min_agg_len;
11084 * This is the minimum amount of payload length required to start an
11085 * aggregation context.
11087 } __attribute__((packed));
11089 /* Output (16 bytes) */
11091 struct hwrm_vnic_tpa_cfg_output {
11092 uint16_t error_code;
11094 * Pass/Fail or error type Note: receiver to verify the in parameters,
11095 * and fail the call with an error when appropriate
11098 /* This field returns the type of original request. */
11100 /* This field provides original sequence number of the command. */
11103 * This field is the length of the response in bytes. The last byte of
11104 * the response is a valid flag that will read as '1' when the command
11105 * has been completely written to memory.
11113 * This field is used in Output records to indicate that the output is
11114 * completely written to RAM. This field should be read as '1' to
11115 * indicate that the output has been completely written. When writing a
11116 * command completion or response to an internal processor, the order of
11117 * writes has to be such that this field is written last.
11119 } __attribute__((packed));
11121 /* hwrm_vnic_tpa_qcfg */
11123 * Description: This function can be used to query TPA configuration on the
11126 /* Input (24 bytes) */
11128 struct hwrm_vnic_tpa_qcfg_input {
11131 * This value indicates what type of request this is. The format for the
11132 * rest of the command is determined by this field.
11134 uint16_t cmpl_ring;
11136 * This value indicates the what completion ring the request will be
11137 * optionally completed on. If the value is -1, then no CR completion
11138 * will be generated. Any other value must be a valid CR ring_id value
11139 * for this function.
11142 /* This value indicates the command sequence number. */
11143 uint16_t target_id;
11145 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11146 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11148 uint64_t resp_addr;
11150 * This is the host address where the response will be written when the
11151 * request is complete. This area must be 16B aligned and must be
11152 * cleared to zero before the request is made.
11155 /* Logical vnic ID */
11156 uint16_t unused_0[3];
11157 } __attribute__((packed));
11159 /* Output (32 bytes) */
11161 struct hwrm_vnic_tpa_qcfg_output {
11162 uint16_t error_code;
11164 * Pass/Fail or error type Note: receiver to verify the in parameters,
11165 * and fail the call with an error when appropriate
11168 /* This field returns the type of original request. */
11170 /* This field provides original sequence number of the command. */
11173 * This field is the length of the response in bytes. The last byte of
11174 * the response is a valid flag that will read as '1' when the command
11175 * has been completely written to memory.
11179 * When this bit is '1', the VNIC is configured to perform transparent
11180 * packet aggregation (TPA) of non-tunneled TCP packets.
11182 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_TPA UINT32_C(0x1)
11184 * When this bit is '1', the VNIC is configured to perform transparent
11185 * packet aggregation (TPA) of tunneled TCP packets.
11187 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
11189 * When this bit is '1', the VNIC is configured to perform transparent
11190 * packet aggregation (TPA) according to Windows Receive Segment
11191 * Coalescing (RSC) rules.
11193 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
11195 * When this bit is '1', the VNIC is configured to perform transparent
11196 * packet aggregation (TPA) according to Linux Generic Receive Offload
11199 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_GRO UINT32_C(0x8)
11201 * When this bit is '1', the VNIC is configured to perform transparent
11202 * packet aggregation (TPA) for TCP packets with IP ECN set to non-zero.
11204 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
11206 * When this bit is '1', the VNIC is configured to perform transparent
11207 * packet aggregation (TPA) for GRE tunneled TCP packets only if all
11208 * packets have the same GRE sequence.
11210 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ UINT32_C(0x20)
11212 * When this bit is '1' and the GRO mode is enabled, the VNIC is
11213 * configured to perform transparent packet aggregation (TPA) for
11214 * TCP/IPv4 packets with consecutively increasing IPIDs. In other words,
11215 * the last packet that is being aggregated to an already existing
11216 * aggregation context shall have IPID 1 more than the IPID of the last
11217 * packet that was aggregated in that aggregation context.
11219 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
11221 * When this bit is '1' and the GRO mode is enabled, the VNIC is
11222 * configured to perform transparent packet aggregation (TPA) for TCP
11223 * packets with the same TTL (IPv4) or Hop limit (IPv6) value.
11225 #define HWRM_VNIC_TPA_QCFG_OUTPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
11226 uint16_t max_agg_segs;
11228 * This is the maximum number of TCP segments that can be aggregated
11229 * (unit is Log2). Max value is 31.
11232 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
11234 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
11236 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
11238 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
11239 /* Any segment size larger than this is not valid */
11240 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
11243 * This is the maximum number of aggregations this VNIC is allowed (unit
11244 * is Log2). Max value is 7
11246 /* 1 aggregation */
11247 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGGS_1 UINT32_C(0x0)
11248 /* 2 aggregations */
11249 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGGS_2 UINT32_C(0x1)
11250 /* 4 aggregations */
11251 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGGS_4 UINT32_C(0x2)
11252 /* 8 aggregations */
11253 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGGS_8 UINT32_C(0x3)
11254 /* 16 aggregations */
11255 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGGS_16 UINT32_C(0x4)
11256 /* Any aggregation size larger than this is not valid */
11257 #define HWRM_VNIC_TPA_QCFG_OUTPUT_MAX_AGGS_MAX UINT32_C(0x7)
11258 uint32_t max_agg_timer;
11260 * This is the maximum amount of time allowed for an aggregation context
11261 * to complete after it was initiated.
11263 uint32_t min_agg_len;
11265 * This is the minimum amount of payload length required to start an
11266 * aggregation context.
11274 * This field is used in Output records to indicate that the output is
11275 * completely written to RAM. This field should be read as '1' to
11276 * indicate that the output has been completely written. When writing a
11277 * command completion or response to an internal processor, the order of
11278 * writes has to be such that this field is written last.
11280 } __attribute__((packed));
11282 /* hwrm_vnic_rss_cfg */
11283 /* Description: This function is used to enable RSS configuration. */
11284 /* Input (48 bytes) */
11286 struct hwrm_vnic_rss_cfg_input {
11289 * This value indicates what type of request this is. The format for the
11290 * rest of the command is determined by this field.
11292 uint16_t cmpl_ring;
11294 * This value indicates the what completion ring the request will be
11295 * optionally completed on. If the value is -1, then no CR completion
11296 * will be generated. Any other value must be a valid CR ring_id value
11297 * for this function.
11300 /* This value indicates the command sequence number. */
11301 uint16_t target_id;
11303 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11304 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11306 uint64_t resp_addr;
11308 * This is the host address where the response will be written when the
11309 * request is complete. This area must be 16B aligned and must be
11310 * cleared to zero before the request is made.
11312 uint32_t hash_type;
11314 * When this bit is '1', the RSS hash shall be computed over source and
11315 * destination IPv4 addresses of IPv4 packets.
11317 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
11319 * When this bit is '1', the RSS hash shall be computed over
11320 * source/destination IPv4 addresses and source/destination ports of
11321 * TCP/IPv4 packets.
11323 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
11325 * When this bit is '1', the RSS hash shall be computed over
11326 * source/destination IPv4 addresses and source/destination ports of
11327 * UDP/IPv4 packets.
11329 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
11331 * When this bit is '1', the RSS hash shall be computed over source and
11332 * destination IPv4 addresses of IPv6 packets.
11334 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
11336 * When this bit is '1', the RSS hash shall be computed over
11337 * source/destination IPv6 addresses and source/destination ports of
11338 * TCP/IPv6 packets.
11340 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
11342 * When this bit is '1', the RSS hash shall be computed over
11343 * source/destination IPv6 addresses and source/destination ports of
11344 * UDP/IPv6 packets.
11346 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
11348 uint64_t ring_grp_tbl_addr;
11349 /* This is the address for rss ring group table */
11350 uint64_t hash_key_tbl_addr;
11351 /* This is the address for rss hash key table */
11352 uint16_t rss_ctx_idx;
11353 /* Index to the rss indirection table. */
11354 uint16_t unused_1[3];
11355 } __attribute__((packed));
11357 /* Output (16 bytes) */
11359 struct hwrm_vnic_rss_cfg_output {
11360 uint16_t error_code;
11362 * Pass/Fail or error type Note: receiver to verify the in parameters,
11363 * and fail the call with an error when appropriate
11366 /* This field returns the type of original request. */
11368 /* This field provides original sequence number of the command. */
11371 * This field is the length of the response in bytes. The last byte of
11372 * the response is a valid flag that will read as '1' when the command
11373 * has been completely written to memory.
11381 * This field is used in Output records to indicate that the output is
11382 * completely written to RAM. This field should be read as '1' to
11383 * indicate that the output has been completely written. When writing a
11384 * command completion or response to an internal processor, the order of
11385 * writes has to be such that this field is written last.
11387 } __attribute__((packed));
11389 /* hwrm_vnic_rss_qcfg */
11390 /* Description: This function is used to query RSS context configuration. */
11391 /* Input (24 bytes) */
11393 struct hwrm_vnic_rss_qcfg_input {
11396 * This value indicates what type of request this is. The format for the
11397 * rest of the command is determined by this field.
11399 uint16_t cmpl_ring;
11401 * This value indicates the what completion ring the request will be
11402 * optionally completed on. If the value is -1, then no CR completion
11403 * will be generated. Any other value must be a valid CR ring_id value
11404 * for this function.
11407 /* This value indicates the command sequence number. */
11408 uint16_t target_id;
11410 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11411 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11413 uint64_t resp_addr;
11415 * This is the host address where the response will be written when the
11416 * request is complete. This area must be 16B aligned and must be
11417 * cleared to zero before the request is made.
11419 uint16_t rss_ctx_idx;
11420 /* Index to the rss indirection table. */
11421 uint16_t unused_0[3];
11422 } __attribute__((packed));
11424 /* Output (64 bytes) */
11426 struct hwrm_vnic_rss_qcfg_output {
11427 uint16_t error_code;
11429 * Pass/Fail or error type Note: receiver to verify the in parameters,
11430 * and fail the call with an error when appropriate
11433 /* This field returns the type of original request. */
11435 /* This field provides original sequence number of the command. */
11438 * This field is the length of the response in bytes. The last byte of
11439 * the response is a valid flag that will read as '1' when the command
11440 * has been completely written to memory.
11442 uint32_t hash_type;
11444 * When this bit is '1', the RSS hash shall be computed over source and
11445 * destination IPv4 addresses of IPv4 packets.
11447 #define HWRM_VNIC_RSS_QCFG_OUTPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
11449 * When this bit is '1', the RSS hash shall be computed over
11450 * source/destination IPv4 addresses and source/destination ports of
11451 * TCP/IPv4 packets.
11453 #define HWRM_VNIC_RSS_QCFG_OUTPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
11455 * When this bit is '1', the RSS hash shall be computed over
11456 * source/destination IPv4 addresses and source/destination ports of
11457 * UDP/IPv4 packets.
11459 #define HWRM_VNIC_RSS_QCFG_OUTPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
11461 * When this bit is '1', the RSS hash shall be computed over source and
11462 * destination IPv4 addresses of IPv6 packets.
11464 #define HWRM_VNIC_RSS_QCFG_OUTPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
11466 * When this bit is '1', the RSS hash shall be computed over
11467 * source/destination IPv6 addresses and source/destination ports of
11468 * TCP/IPv6 packets.
11470 #define HWRM_VNIC_RSS_QCFG_OUTPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
11472 * When this bit is '1', the RSS hash shall be computed over
11473 * source/destination IPv6 addresses and source/destination ports of
11474 * UDP/IPv6 packets.
11476 #define HWRM_VNIC_RSS_QCFG_OUTPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
11478 uint32_t hash_key[10];
11479 /* This is the value of rss hash key */
11486 * This field is used in Output records to indicate that the output is
11487 * completely written to RAM. This field should be read as '1' to
11488 * indicate that the output has been completely written. When writing a
11489 * command completion or response to an internal processor, the order of
11490 * writes has to be such that this field is written last.
11492 } __attribute__((packed));
11494 /* hwrm_vnic_plcmodes_cfg */
11496 * Description: This function can be used to set placement mode configuration of
11499 /* Input (40 bytes) */
11501 struct hwrm_vnic_plcmodes_cfg_input {
11504 * This value indicates what type of request this is. The format for the
11505 * rest of the command is determined by this field.
11507 uint16_t cmpl_ring;
11509 * This value indicates the what completion ring the request will be
11510 * optionally completed on. If the value is -1, then no CR completion
11511 * will be generated. Any other value must be a valid CR ring_id value
11512 * for this function.
11515 /* This value indicates the command sequence number. */
11516 uint16_t target_id;
11518 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11519 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11521 uint64_t resp_addr;
11523 * This is the host address where the response will be written when the
11524 * request is complete. This area must be 16B aligned and must be
11525 * cleared to zero before the request is made.
11529 * When this bit is '1', the VNIC shall be configured to use regular
11530 * placement algorithm. By default, the regular placement algorithm
11531 * shall be enabled on the VNIC.
11533 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT UINT32_C(0x1)
11535 * When this bit is '1', the VNIC shall be configured use the jumbo
11536 * placement algorithm.
11538 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT UINT32_C(0x2)
11540 * When this bit is '1', the VNIC shall be configured to enable Header-
11541 * Data split for IPv4 packets according to the following rules: # If
11542 * the packet is identified as TCP/IPv4, then the packet is split at the
11543 * beginning of the TCP payload. # If the packet is identified as
11544 * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
11545 * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
11546 * the packet is split at the beginning of the upper layer protocol
11547 * header carried in the IPv4 packet.
11549 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
11551 * When this bit is '1', the VNIC shall be configured to enable Header-
11552 * Data split for IPv6 packets according to the following rules: # If
11553 * the packet is identified as TCP/IPv6, then the packet is split at the
11554 * beginning of the TCP payload. # If the packet is identified as
11555 * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
11556 * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
11557 * the packet is split at the beginning of the upper layer protocol
11558 * header carried in the IPv6 packet.
11560 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
11562 * When this bit is '1', the VNIC shall be configured to enable Header-
11563 * Data split for FCoE packets at the beginning of FC payload.
11565 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
11567 * When this bit is '1', the VNIC shall be configured to enable Header-
11568 * Data split for RoCE packets at the beginning of RoCE payload (after
11569 * BTH/GRH headers).
11571 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
11574 * This bit must be '1' for the jumbo_thresh_valid field to be
11577 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID UINT32_C(0x1)
11578 /* This bit must be '1' for the hds_offset_valid field to be configured. */
11579 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID UINT32_C(0x2)
11581 * This bit must be '1' for the hds_threshold_valid field to be
11584 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID UINT32_C(0x4)
11586 /* Logical vnic ID */
11587 uint16_t jumbo_thresh;
11589 * When jumbo placement algorithm is enabled, this value is used to
11590 * determine the threshold for jumbo placement. Packets with length
11591 * larger than this value will be placed according to the jumbo
11592 * placement algorithm.
11594 uint16_t hds_offset;
11596 * This value is used to determine the offset into packet buffer where
11597 * the split data (payload) will be placed according to one of of HDS
11598 * placement algorithm. The lengths of packet buffers provided for split
11599 * data shall be larger than this value.
11601 uint16_t hds_threshold;
11603 * When one of the HDS placement algorithm is enabled, this value is
11604 * used to determine the threshold for HDS placement. Packets with
11605 * length larger than this value will be placed according to the HDS
11606 * placement algorithm. This value shall be in multiple of 4 bytes.
11608 uint16_t unused_0[3];
11609 } __attribute__((packed));
11611 /* Output (16 bytes) */
11613 struct hwrm_vnic_plcmodes_cfg_output {
11614 uint16_t error_code;
11616 * Pass/Fail or error type Note: receiver to verify the in parameters,
11617 * and fail the call with an error when appropriate
11620 /* This field returns the type of original request. */
11622 /* This field provides original sequence number of the command. */
11625 * This field is the length of the response in bytes. The last byte of
11626 * the response is a valid flag that will read as '1' when the command
11627 * has been completely written to memory.
11635 * This field is used in Output records to indicate that the output is
11636 * completely written to RAM. This field should be read as '1' to
11637 * indicate that the output has been completely written. When writing a
11638 * command completion or response to an internal processor, the order of
11639 * writes has to be such that this field is written last.
11641 } __attribute__((packed));
11643 /* hwrm_vnic_plcmodes_qcfg */
11645 * Description: This function can be used to query placement mode configuration
11648 /* Input (24 bytes) */
11650 struct hwrm_vnic_plcmodes_qcfg_input {
11653 * This value indicates what type of request this is. The format for the
11654 * rest of the command is determined by this field.
11656 uint16_t cmpl_ring;
11658 * This value indicates the what completion ring the request will be
11659 * optionally completed on. If the value is -1, then no CR completion
11660 * will be generated. Any other value must be a valid CR ring_id value
11661 * for this function.
11664 /* This value indicates the command sequence number. */
11665 uint16_t target_id;
11667 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11668 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11670 uint64_t resp_addr;
11672 * This is the host address where the response will be written when the
11673 * request is complete. This area must be 16B aligned and must be
11674 * cleared to zero before the request is made.
11677 /* Logical vnic ID */
11679 } __attribute__((packed));
11681 /* Output (24 bytes) */
11683 struct hwrm_vnic_plcmodes_qcfg_output {
11684 uint16_t error_code;
11686 * Pass/Fail or error type Note: receiver to verify the in parameters,
11687 * and fail the call with an error when appropriate
11690 /* This field returns the type of original request. */
11692 /* This field provides original sequence number of the command. */
11695 * This field is the length of the response in bytes. The last byte of
11696 * the response is a valid flag that will read as '1' when the command
11697 * has been completely written to memory.
11701 * When this bit is '1', the VNIC is configured to use regular placement
11704 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT UINT32_C(0x1)
11706 * When this bit is '1', the VNIC is configured to use the jumbo
11707 * placement algorithm.
11709 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT UINT32_C(0x2)
11711 * When this bit is '1', the VNIC is configured to enable Header-Data
11712 * split for IPv4 packets.
11714 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
11716 * When this bit is '1', the VNIC is configured to enable Header-Data
11717 * split for IPv6 packets.
11719 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
11721 * When this bit is '1', the VNIC is configured to enable Header-Data
11722 * split for FCoE packets.
11724 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
11726 * When this bit is '1', the VNIC is configured to enable Header-Data
11727 * split for RoCE packets.
11729 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
11731 * When this bit is '1', the VNIC is configured to be the default VNIC
11732 * of the requesting function.
11734 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC UINT32_C(0x40)
11735 uint16_t jumbo_thresh;
11737 * When jumbo placement algorithm is enabled, this value is used to
11738 * determine the threshold for jumbo placement. Packets with length
11739 * larger than this value will be placed according to the jumbo
11740 * placement algorithm.
11742 uint16_t hds_offset;
11744 * This value is used to determine the offset into packet buffer where
11745 * the split data (payload) will be placed according to one of of HDS
11746 * placement algorithm. The lengths of packet buffers provided for split
11747 * data shall be larger than this value.
11749 uint16_t hds_threshold;
11751 * When one of the HDS placement algorithm is enabled, this value is
11752 * used to determine the threshold for HDS placement. Packets with
11753 * length larger than this value will be placed according to the HDS
11754 * placement algorithm. This value shall be in multiple of 4 bytes.
11763 * This field is used in Output records to indicate that the output is
11764 * completely written to RAM. This field should be read as '1' to
11765 * indicate that the output has been completely written. When writing a
11766 * command completion or response to an internal processor, the order of
11767 * writes has to be such that this field is written last.
11769 } __attribute__((packed));
11771 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
11772 /* Description: This function is used to allocate COS/Load Balance context. */
11773 /* Input (16 bytes) */
11775 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
11778 * This value indicates what type of request this is. The format for the
11779 * rest of the command is determined by this field.
11781 uint16_t cmpl_ring;
11783 * This value indicates the what completion ring the request will be
11784 * optionally completed on. If the value is -1, then no CR completion
11785 * will be generated. Any other value must be a valid CR ring_id value
11786 * for this function.
11789 /* This value indicates the command sequence number. */
11790 uint16_t target_id;
11792 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11793 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11795 uint64_t resp_addr;
11797 * This is the host address where the response will be written when the
11798 * request is complete. This area must be 16B aligned and must be
11799 * cleared to zero before the request is made.
11801 } __attribute__((packed));
11803 /* Output (16 bytes) */
11805 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
11806 uint16_t error_code;
11808 * Pass/Fail or error type Note: receiver to verify the in parameters,
11809 * and fail the call with an error when appropriate
11812 /* This field returns the type of original request. */
11814 /* This field provides original sequence number of the command. */
11817 * This field is the length of the response in bytes. The last byte of
11818 * the response is a valid flag that will read as '1' when the command
11819 * has been completely written to memory.
11821 uint16_t rss_cos_lb_ctx_id;
11822 /* rss_cos_lb_ctx_id is 16 b */
11830 * This field is used in Output records to indicate that the output is
11831 * completely written to RAM. This field should be read as '1' to
11832 * indicate that the output has been completely written. When writing a
11833 * command completion or response to an internal processor, the order of
11834 * writes has to be such that this field is written last.
11836 } __attribute__((packed));
11838 /* hwrm_vnic_rss_cos_lb_ctx_free */
11839 /* Description: This function can be used to free COS/Load Balance context. */
11840 /* Input (24 bytes) */
11842 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
11845 * This value indicates what type of request this is. The format for the
11846 * rest of the command is determined by this field.
11848 uint16_t cmpl_ring;
11850 * This value indicates the what completion ring the request will be
11851 * optionally completed on. If the value is -1, then no CR completion
11852 * will be generated. Any other value must be a valid CR ring_id value
11853 * for this function.
11856 /* This value indicates the command sequence number. */
11857 uint16_t target_id;
11859 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11860 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11862 uint64_t resp_addr;
11864 * This is the host address where the response will be written when the
11865 * request is complete. This area must be 16B aligned and must be
11866 * cleared to zero before the request is made.
11868 uint16_t rss_cos_lb_ctx_id;
11869 /* rss_cos_lb_ctx_id is 16 b */
11870 uint16_t unused_0[3];
11871 } __attribute__((packed));
11873 /* Output (16 bytes) */
11875 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
11876 uint16_t error_code;
11878 * Pass/Fail or error type Note: receiver to verify the in parameters,
11879 * and fail the call with an error when appropriate
11882 /* This field returns the type of original request. */
11884 /* This field provides original sequence number of the command. */
11887 * This field is the length of the response in bytes. The last byte of
11888 * the response is a valid flag that will read as '1' when the command
11889 * has been completely written to memory.
11897 * This field is used in Output records to indicate that the output is
11898 * completely written to RAM. This field should be read as '1' to
11899 * indicate that the output has been completely written. When writing a
11900 * command completion or response to an internal processor, the order of
11901 * writes has to be such that this field is written last.
11903 } __attribute__((packed));
11905 /* hwrm_ring_alloc */
11907 * Description: This command allocates and does basic preparation for a ring.
11909 /* Input (80 bytes) */
11911 struct hwrm_ring_alloc_input {
11914 * This value indicates what type of request this is. The format for the
11915 * rest of the command is determined by this field.
11917 uint16_t cmpl_ring;
11919 * This value indicates the what completion ring the request will be
11920 * optionally completed on. If the value is -1, then no CR completion
11921 * will be generated. Any other value must be a valid CR ring_id value
11922 * for this function.
11925 /* This value indicates the command sequence number. */
11926 uint16_t target_id;
11928 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11929 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11931 uint64_t resp_addr;
11933 * This is the host address where the response will be written when the
11934 * request is complete. This area must be 16B aligned and must be
11935 * cleared to zero before the request is made.
11938 /* This bit must be '1' for the Reserved1 field to be configured. */
11939 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
11940 /* This bit must be '1' for the Reserved2 field to be configured. */
11941 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
11942 /* This bit must be '1' for the Reserved3 field to be configured. */
11943 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
11945 * This bit must be '1' for the stat_ctx_id_valid field to be
11948 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
11949 /* This bit must be '1' for the Reserved4 field to be configured. */
11950 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
11951 /* This bit must be '1' for the max_bw_valid field to be configured. */
11952 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
11955 /* Completion Ring (CR) */
11956 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL UINT32_C(0x0)
11958 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
11960 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
11963 uint64_t page_tbl_addr;
11964 /* This value is a pointer to the page table for the Ring. */
11966 /* First Byte Offset of the first entry in the first page. */
11969 * Actual page size in 2^page_size. The supported range is increments in
11970 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
11971 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
11972 * Page size is 64 KB. - 21 = 2 MB Page size is 2 MB. - 22 = 4 MB Page
11973 * size is 4 MB. - 30 = 1 GB Page size is 1 GB.
11975 uint8_t page_tbl_depth;
11977 * This value indicates the depth of page table. For this version of the
11978 * specification, value other than 0 or 1 shall be considered as an
11979 * invalid value. When the page_tbl_depth = 0, then it is treated as a
11980 * special case with the following. 1. FBO and page size fields are not
11981 * valid. 2. page_tbl_addr is the physical address of the first element
11988 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
11991 uint16_t logical_id;
11993 * Logical ring number for the ring to be allocated. This value
11994 * determines the position in the doorbell area where the update to the
11995 * ring will be made. For completion rings, this value is also the MSI-X
11996 * vector number for the function the completion ring is associated
11999 uint16_t cmpl_ring_id;
12001 * This field is used only when ring_type is a TX ring. This value
12002 * indicates what completion ring the TX ring is associated with.
12006 * This field is used only when ring_type is a TX ring. This value
12007 * indicates what CoS queue the TX ring is associated with.
12011 uint32_t reserved1;
12012 /* This field is reserved for the future use. It shall be set to 0. */
12013 uint16_t reserved2;
12014 /* This field is reserved for the future use. It shall be set to 0. */
12017 uint32_t reserved3;
12018 /* This field is reserved for the future use. It shall be set to 0. */
12019 uint32_t stat_ctx_id;
12021 * This field is used only when ring_type is a TX ring. This input
12022 * indicates what statistics context this ring should be associated
12025 uint32_t reserved4;
12026 /* This field is reserved for the future use. It shall be set to 0. */
12029 * This field is used only when ring_type is a TX ring. Maximum BW
12030 * allocated to this TX ring in Mbps. The HWRM will translate this value
12031 * into byte counter and time interval used for this ring inside the
12036 * This field is used only when ring_type is a Completion ring. This
12037 * value indicates what interrupt mode should be used on this completion
12038 * ring. Note: In the legacy interrupt mode, no more than 16 completion
12039 * rings are allowed.
12042 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0)
12044 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1)
12046 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2)
12047 /* No Interrupt - Polled mode */
12048 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3)
12049 uint8_t unused_8[3];
12050 } __attribute__((packed));
12052 /* Output (16 bytes) */
12054 struct hwrm_ring_alloc_output {
12055 uint16_t error_code;
12057 * Pass/Fail or error type Note: receiver to verify the in parameters,
12058 * and fail the call with an error when appropriate
12061 /* This field returns the type of original request. */
12063 /* This field provides original sequence number of the command. */
12066 * This field is the length of the response in bytes. The last byte of
12067 * the response is a valid flag that will read as '1' when the command
12068 * has been completely written to memory.
12071 /* Physical number of ring allocated. */
12072 uint16_t logical_ring_id;
12073 /* Logical number of ring allocated. */
12079 * This field is used in Output records to indicate that the output is
12080 * completely written to RAM. This field should be read as '1' to
12081 * indicate that the output has been completely written. When writing a
12082 * command completion or response to an internal processor, the order of
12083 * writes has to be such that this field is written last.
12085 } __attribute__((packed));
12087 /* hwrm_ring_free */
12089 * Description: This command is used to free a ring and associated resources.
12091 /* Input (24 bytes) */
12093 struct hwrm_ring_free_input {
12096 * This value indicates what type of request this is. The format for the
12097 * rest of the command is determined by this field.
12099 uint16_t cmpl_ring;
12101 * This value indicates the what completion ring the request will be
12102 * optionally completed on. If the value is -1, then no CR completion
12103 * will be generated. Any other value must be a valid CR ring_id value
12104 * for this function.
12107 /* This value indicates the command sequence number. */
12108 uint16_t target_id;
12110 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12111 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12113 uint64_t resp_addr;
12115 * This is the host address where the response will be written when the
12116 * request is complete. This area must be 16B aligned and must be
12117 * cleared to zero before the request is made.
12121 /* Completion Ring (CR) */
12122 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL UINT32_C(0x0)
12124 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
12126 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
12129 /* Physical number of ring allocated. */
12131 } __attribute__((packed));
12133 /* Output (16 bytes) */
12135 struct hwrm_ring_free_output {
12136 uint16_t error_code;
12138 * Pass/Fail or error type Note: receiver to verify the in parameters,
12139 * and fail the call with an error when appropriate
12142 /* This field returns the type of original request. */
12144 /* This field provides original sequence number of the command. */
12147 * This field is the length of the response in bytes. The last byte of
12148 * the response is a valid flag that will read as '1' when the command
12149 * has been completely written to memory.
12157 * This field is used in Output records to indicate that the output is
12158 * completely written to RAM. This field should be read as '1' to
12159 * indicate that the output has been completely written. When writing a
12160 * command completion or response to an internal processor, the order of
12161 * writes has to be such that this field is written last.
12163 } __attribute__((packed));
12165 /* hwrm_ring_cmpl_ring_qaggint_params */
12167 * Description: This command is used to query aggregation and interrupt related
12168 * parameters specified on a given completion ring.
12170 /* Input (24 bytes) */
12172 struct hwrm_ring_cmpl_ring_qaggint_params_input {
12175 * This value indicates what type of request this is. The format for the
12176 * rest of the command is determined by this field.
12178 uint16_t cmpl_ring;
12180 * This value indicates the what completion ring the request will be
12181 * optionally completed on. If the value is -1, then no CR completion
12182 * will be generated. Any other value must be a valid CR ring_id value
12183 * for this function.
12186 /* This value indicates the command sequence number. */
12187 uint16_t target_id;
12189 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12190 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12192 uint64_t resp_addr;
12194 * This is the host address where the response will be written when the
12195 * request is complete. This area must be 16B aligned and must be
12196 * cleared to zero before the request is made.
12199 /* Physical number of completion ring. */
12200 uint16_t unused_0[3];
12201 } __attribute__((packed));
12203 /* Output (32 bytes) */
12205 struct hwrm_ring_cmpl_ring_qaggint_params_output {
12206 uint16_t error_code;
12208 * Pass/Fail or error type Note: receiver to verify the in parameters,
12209 * and fail the call with an error when appropriate
12212 /* This field returns the type of original request. */
12214 /* This field provides original sequence number of the command. */
12217 * This field is the length of the response in bytes. The last byte of
12218 * the response is a valid flag that will read as '1' when the command
12219 * has been completely written to memory.
12223 * When this bit is set to '1', interrupt max timer is reset whenever a
12224 * completion is received.
12226 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS_OUTPUT_FLAGS_TIMER_RESET UINT32_C(0x1)
12228 * When this bit is set to '1', ring idle mode aggregation will be
12231 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS_OUTPUT_FLAGS_RING_IDLE UINT32_C(0x2)
12232 uint16_t num_cmpl_dma_aggr;
12233 /* Number of completions to aggregate before DMA during the normal mode. */
12234 uint16_t num_cmpl_dma_aggr_during_int;
12236 * Number of completions to aggregate before DMA during the interrupt
12239 uint16_t cmpl_aggr_dma_tmr;
12241 * Timer in unit of 80-nsec used to aggregate completions before DMA
12242 * during the normal mode (not in interrupt mode).
12244 uint16_t cmpl_aggr_dma_tmr_during_int;
12246 * Timer in unit of 80-nsec used to aggregate completions before DMA
12247 * during the interrupt mode.
12249 uint16_t int_lat_tmr_min;
12250 /* Minimum time (in unit of 80-nsec) between two interrupts. */
12251 uint16_t int_lat_tmr_max;
12253 * Maximum wait time (in unit of 80-nsec) spent aggregating completions
12254 * before signaling the interrupt after the interrupt is enabled.
12256 uint16_t num_cmpl_aggr_int;
12258 * Minimum number of completions aggregated before signaling an
12267 * This field is used in Output records to indicate that the output is
12268 * completely written to RAM. This field should be read as '1' to
12269 * indicate that the output has been completely written. When writing a
12270 * command completion or response to an internal processor, the order of
12271 * writes has to be such that this field is written last.
12273 } __attribute__((packed));
12275 /* hwrm_ring_cmpl_ring_cfg_aggint_params */
12277 * Description: This command is used to configure aggregation and interrupt
12278 * related parameters specified on a given completion ring.
12280 /* Input (40 bytes) */
12282 struct hwrm_ring_cmpl_ring_cfg_aggint_params_input {
12285 * This value indicates what type of request this is. The format for the
12286 * rest of the command is determined by this field.
12288 uint16_t cmpl_ring;
12290 * This value indicates the what completion ring the request will be
12291 * optionally completed on. If the value is -1, then no CR completion
12292 * will be generated. Any other value must be a valid CR ring_id value
12293 * for this function.
12296 /* This value indicates the command sequence number. */
12297 uint16_t target_id;
12299 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12300 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12302 uint64_t resp_addr;
12304 * This is the host address where the response will be written when the
12305 * request is complete. This area must be 16B aligned and must be
12306 * cleared to zero before the request is made.
12309 /* Physical number of completion ring. */
12312 * When this bit is set to '1', interrupt latency max timer is reset
12313 * whenever a completion is received.
12315 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET UINT32_C(0x1)
12317 * When this bit is set to '1', ring idle mode aggregation will be
12320 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_RING_IDLE UINT32_C(0x2)
12321 uint16_t num_cmpl_dma_aggr;
12322 /* Number of completions to aggregate before DMA during the normal mode. */
12323 uint16_t num_cmpl_dma_aggr_during_int;
12325 * Number of completions to aggregate before DMA during the interrupt
12328 uint16_t cmpl_aggr_dma_tmr;
12330 * Timer in unit of 80-nsec used to aggregate completions before DMA
12331 * during the normal mode (not in interrupt mode).
12333 uint16_t cmpl_aggr_dma_tmr_during_int;
12335 * Timer in unit of 80-nsec used to aggregate completions before DMA
12336 * during the interrupt mode.
12338 uint16_t int_lat_tmr_min;
12339 /* Minimum time (in unit of 80-nsec) between two interrupts. */
12340 uint16_t int_lat_tmr_max;
12342 * Maximum wait time (in unit of 80-nsec) spent aggregating cmpls before
12343 * signaling the interrupt after the interrupt is enabled.
12345 uint16_t num_cmpl_aggr_int;
12347 * Minimum number of completions aggregated before signaling an
12350 uint16_t unused_0[3];
12351 } __attribute__((packed));
12353 /* Output (16 bytes) */
12355 struct hwrm_ring_cmpl_ring_cfg_aggint_params_output {
12356 uint16_t error_code;
12358 * Pass/Fail or error type Note: receiver to verify the in parameters,
12359 * and fail the call with an error when appropriate
12362 /* This field returns the type of original request. */
12364 /* This field provides original sequence number of the command. */
12367 * This field is the length of the response in bytes. The last byte of
12368 * the response is a valid flag that will read as '1' when the command
12369 * has been completely written to memory.
12377 * This field is used in Output records to indicate that the output is
12378 * completely written to RAM. This field should be read as '1' to
12379 * indicate that the output has been completely written. When writing a
12380 * command completion or response to an internal processor, the order of
12381 * writes has to be such that this field is written last.
12383 } __attribute__((packed));
12385 /* hwrm_ring_reset */
12387 * Description: This command is used to reset a given ring. When an RX ring is
12388 * being reset, the HWRM shall perform TPA flush on all VNICs associated with
12389 * the RX ring that is being reset.
12391 /* Input (24 bytes) */
12393 struct hwrm_ring_reset_input {
12396 * This value indicates what type of request this is. The format for the
12397 * rest of the command is determined by this field.
12399 uint16_t cmpl_ring;
12401 * This value indicates the what completion ring the request will be
12402 * optionally completed on. If the value is -1, then no CR completion
12403 * will be generated. Any other value must be a valid CR ring_id value
12404 * for this function.
12407 /* This value indicates the command sequence number. */
12408 uint16_t target_id;
12410 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12411 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12413 uint64_t resp_addr;
12415 * This is the host address where the response will be written when the
12416 * request is complete. This area must be 16B aligned and must be
12417 * cleared to zero before the request is made.
12421 /* Completion Ring (CR) */
12422 #define HWRM_RING_RESET_INPUT_RING_TYPE_CMPL UINT32_C(0x0)
12424 #define HWRM_RING_RESET_INPUT_RING_TYPE_TX UINT32_C(0x1)
12426 #define HWRM_RING_RESET_INPUT_RING_TYPE_RX UINT32_C(0x2)
12429 /* Physical number of the ring. */
12431 } __attribute__((packed));
12433 /* Output (16 bytes) */
12435 struct hwrm_ring_reset_output {
12436 uint16_t error_code;
12438 * Pass/Fail or error type Note: receiver to verify the in parameters,
12439 * and fail the call with an error when appropriate
12442 /* This field returns the type of original request. */
12444 /* This field provides original sequence number of the command. */
12447 * This field is the length of the response in bytes. The last byte of
12448 * the response is a valid flag that will read as '1' when the command
12449 * has been completely written to memory.
12457 * This field is used in Output records to indicate that the output is
12458 * completely written to RAM. This field should be read as '1' to
12459 * indicate that the output has been completely written. When writing a
12460 * command completion or response to an internal processor, the order of
12461 * writes has to be such that this field is written last.
12463 } __attribute__((packed));
12465 /* hwrm_ring_grp_alloc */
12467 * Description: This API allocates and does basic preparation for a ring group.
12469 /* Input (24 bytes) */
12471 struct hwrm_ring_grp_alloc_input {
12474 * This value indicates what type of request this is. The format for the
12475 * rest of the command is determined by this field.
12477 uint16_t cmpl_ring;
12479 * This value indicates the what completion ring the request will be
12480 * optionally completed on. If the value is -1, then no CR completion
12481 * will be generated. Any other value must be a valid CR ring_id value
12482 * for this function.
12485 /* This value indicates the command sequence number. */
12486 uint16_t target_id;
12488 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12489 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12491 uint64_t resp_addr;
12493 * This is the host address where the response will be written when the
12494 * request is complete. This area must be 16B aligned and must be
12495 * cleared to zero before the request is made.
12498 /* This value identifies the CR associated with the ring group. */
12500 /* This value identifies the main RR associated with the ring group. */
12503 * This value identifies the aggregation RR associated with the ring
12504 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
12509 * This value identifies the statistics context associated with the ring
12512 } __attribute__((packed));
12514 /* Output (16 bytes) */
12516 struct hwrm_ring_grp_alloc_output {
12517 uint16_t error_code;
12519 * Pass/Fail or error type Note: receiver to verify the in parameters,
12520 * and fail the call with an error when appropriate
12523 /* This field returns the type of original request. */
12525 /* This field provides original sequence number of the command. */
12528 * This field is the length of the response in bytes. The last byte of
12529 * the response is a valid flag that will read as '1' when the command
12530 * has been completely written to memory.
12532 uint32_t ring_group_id;
12534 * This is the ring group ID value. Use this value to program the
12535 * default ring group for the VNIC or as table entries in an RSS/COS
12543 * This field is used in Output records to indicate that the output is
12544 * completely written to RAM. This field should be read as '1' to
12545 * indicate that the output has been completely written. When writing a
12546 * command completion or response to an internal processor, the order of
12547 * writes has to be such that this field is written last.
12549 } __attribute__((packed));
12551 /* hwrm_ring_grp_free */
12553 * Description: This API frees a ring group and associated resources. # If a
12554 * ring in the ring group is reset or free, then the associated rings in the
12555 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
12556 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
12557 * a part of executing this command, the HWRM shall reset all associated ring
12560 /* Input (24 bytes) */
12562 struct hwrm_ring_grp_free_input {
12565 * This value indicates what type of request this is. The format for the
12566 * rest of the command is determined by this field.
12568 uint16_t cmpl_ring;
12570 * This value indicates the what completion ring the request will be
12571 * optionally completed on. If the value is -1, then no CR completion
12572 * will be generated. Any other value must be a valid CR ring_id value
12573 * for this function.
12576 /* This value indicates the command sequence number. */
12577 uint16_t target_id;
12579 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12580 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12582 uint64_t resp_addr;
12584 * This is the host address where the response will be written when the
12585 * request is complete. This area must be 16B aligned and must be
12586 * cleared to zero before the request is made.
12588 uint32_t ring_group_id;
12589 /* This is the ring group ID value. */
12591 } __attribute__((packed));
12593 /* Output (16 bytes) */
12595 struct hwrm_ring_grp_free_output {
12596 uint16_t error_code;
12598 * Pass/Fail or error type Note: receiver to verify the in parameters,
12599 * and fail the call with an error when appropriate
12602 /* This field returns the type of original request. */
12604 /* This field provides original sequence number of the command. */
12607 * This field is the length of the response in bytes. The last byte of
12608 * the response is a valid flag that will read as '1' when the command
12609 * has been completely written to memory.
12617 * This field is used in Output records to indicate that the output is
12618 * completely written to RAM. This field should be read as '1' to
12619 * indicate that the output has been completely written. When writing a
12620 * command completion or response to an internal processor, the order of
12621 * writes has to be such that this field is written last.
12623 } __attribute__((packed));
12625 /* hwrm_cfa_l2_filter_alloc */
12627 * Description: An L2 filter is a filter resource that is used to identify a
12628 * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
12629 * encapsulated packets include both outer L2 header and/or inner l2 header of
12630 * encapsulated packet. The L2 filter resource covers the following OS specific
12631 * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
12632 * of individual multicast filters # All multicast enable/disable filter #
12633 * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
12634 * physical function) # All multicast enable/disable (per function) # Unicast
12635 * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
12636 * enable/disable (per physical function) # List of individual multicast filters
12637 * (Driver needs to advertise the maximum number of filters supported) # All
12638 * multicast enable/disable per physical function # Unicast filters per vnic #
12639 * Promiscuous mode per PF Implementation notes on the use of VNIC in this
12640 * command: # By default, these filters belong to default vnic for the function.
12641 * # Once these filters are set up, only destination VNIC can be modified. # If
12642 * the destination VNIC is not specified in this command, then the HWRM shall
12643 * only create an l2 context id. HWRM Implementation notes for multicast
12644 * filters: # The hwrm_filter_alloc command can be used to set up multicast
12645 * filters (perfect match or partial match). Each individual function driver can
12646 * set up multicast filters independently. # The HWRM needs to keep track of
12647 * multicast filters set up by function drivers and maintain multicast group
12648 * replication records to enable a subset of functions to receive traffic for a
12649 * specific multicast address. # When a specific multicast filter cannot be set,
12650 * the HWRM shall return an error. In this error case, the driver should fall
12651 * back to using one general filter (rather than specific) for all multicast
12652 * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
12653 * source knockout per multicast group record. Examples of setting unicast
12654 * filters: For a unicast MAC based filter, one can use a combination of the
12655 * fields and masks provided in this command to set up the filter. Below are
12656 * some examples: # MAC + no VLAN filter: This filter is used to identify
12657 * traffic that does not contain any VLAN tags and matches destination (or
12658 * source) MAC address. This filter can be set up by setting only l2_addr field
12659 * to be a valid field. All other fields are not valid. The following value is
12660 * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
12661 * to identify traffic that carries single VLAN tag and matches (destination or
12662 * source) MAC address. This filter can be set up by setting only l2_addr and
12663 * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
12664 * following values are set for those two valid fields. l2_addr = MAC,
12665 * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
12666 * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
12667 * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
12668 * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
12669 * All other fields are not valid. The following value are set for l2_addr and
12670 * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
12671 * filter is used to identify traffic that contains zero or 1 VLAN tag and
12672 * matches destination (or source) MAC address. This filter can be set up by
12673 * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
12674 * other fields are not valid. The following value are set for l2_addr,
12675 * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
12676 * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
12677 * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
12678 * fields are not valid. The following values are set for those three valid
12679 * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
12681 /* Input (96 bytes) */
12683 struct hwrm_cfa_l2_filter_alloc_input {
12686 * This value indicates what type of request this is. The format for the
12687 * rest of the command is determined by this field.
12689 uint16_t cmpl_ring;
12691 * This value indicates the what completion ring the request will be
12692 * optionally completed on. If the value is -1, then no CR completion
12693 * will be generated. Any other value must be a valid CR ring_id value
12694 * for this function.
12697 /* This value indicates the command sequence number. */
12698 uint16_t target_id;
12700 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12701 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12703 uint64_t resp_addr;
12705 * This is the host address where the response will be written when the
12706 * request is complete. This area must be 16B aligned and must be
12707 * cleared to zero before the request is made.
12711 * Enumeration denoting the RX, TX type of the resource. This
12712 * enumeration is used for resources that are similar for both TX and RX
12713 * paths of the chip.
12715 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
12717 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
12719 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
12720 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
12722 * Setting of this flag indicates the applicability to the loopback
12725 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2)
12727 * Setting of this flag indicates drop action. If this flag is not set,
12728 * then it should be considered accept action.
12730 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4)
12732 * If this flag is set, all t_l2_* fields are invalid and they should
12733 * not be specified. If this flag is set, then l2_* fields refer to
12734 * fields of outermost L2 header.
12736 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
12738 /* This bit must be '1' for the l2_addr field to be configured. */
12739 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
12740 /* This bit must be '1' for the l2_addr_mask field to be configured. */
12741 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK UINT32_C(0x2)
12742 /* This bit must be '1' for the l2_ovlan field to be configured. */
12743 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
12744 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
12745 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK UINT32_C(0x8)
12746 /* This bit must be '1' for the l2_ivlan field to be configured. */
12747 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
12748 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
12749 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK UINT32_C(0x20)
12750 /* This bit must be '1' for the t_l2_addr field to be configured. */
12751 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
12752 /* This bit must be '1' for the t_l2_addr_mask field to be configured. */
12753 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK UINT32_C(0x80)
12754 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
12755 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN UINT32_C(0x100)
12756 /* This bit must be '1' for the t_l2_ovlan_mask field to be configured. */
12757 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK UINT32_C(0x200)
12758 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
12759 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN UINT32_C(0x400)
12760 /* This bit must be '1' for the t_l2_ivlan_mask field to be configured. */
12761 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK UINT32_C(0x800)
12762 /* This bit must be '1' for the src_type field to be configured. */
12763 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
12764 /* This bit must be '1' for the src_id field to be configured. */
12765 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
12766 /* This bit must be '1' for the tunnel_type field to be configured. */
12767 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x4000)
12768 /* This bit must be '1' for the dst_id field to be configured. */
12769 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
12770 /* This bit must be '1' for the mirror_vnic_id field to be configured. */
12771 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID UINT32_C(0x10000)
12772 uint8_t l2_addr[6];
12774 * This value sets the match value for the L2 MAC address. Destination
12775 * MAC address for RX path. Source MAC address for TX path.
12779 uint8_t l2_addr_mask[6];
12781 * This value sets the mask value for the L2 address. A value of 0 will
12782 * mask the corresponding bit from compare.
12785 /* This value sets VLAN ID value for outer VLAN. */
12786 uint16_t l2_ovlan_mask;
12788 * This value sets the mask value for the ovlan id. A value of 0 will
12789 * mask the corresponding bit from compare.
12792 /* This value sets VLAN ID value for inner VLAN. */
12793 uint16_t l2_ivlan_mask;
12795 * This value sets the mask value for the ivlan id. A value of 0 will
12796 * mask the corresponding bit from compare.
12800 uint8_t t_l2_addr[6];
12802 * This value sets the match value for the tunnel L2 MAC address.
12803 * Destination MAC address for RX path. Source MAC address for TX path.
12807 uint8_t t_l2_addr_mask[6];
12809 * This value sets the mask value for the tunnel L2 address. A value of
12810 * 0 will mask the corresponding bit from compare.
12812 uint16_t t_l2_ovlan;
12813 /* This value sets VLAN ID value for tunnel outer VLAN. */
12814 uint16_t t_l2_ovlan_mask;
12816 * This value sets the mask value for the tunnel ovlan id. A value of 0
12817 * will mask the corresponding bit from compare.
12819 uint16_t t_l2_ivlan;
12820 /* This value sets VLAN ID value for tunnel inner VLAN. */
12821 uint16_t t_l2_ivlan_mask;
12823 * This value sets the mask value for the tunnel ivlan id. A value of 0
12824 * will mask the corresponding bit from compare.
12827 /* This value identifies the type of source of the packet. */
12829 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0)
12830 /* Physical function */
12831 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1)
12832 /* Virtual function */
12833 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2)
12834 /* Virtual NIC of a function */
12835 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3)
12836 /* Embedded processor for CFA management */
12837 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4)
12838 /* Embedded processor for OOB management */
12839 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5)
12840 /* Embedded processor for RoCE */
12841 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6)
12842 /* Embedded processor for network proxy functions */
12843 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7)
12847 * This value is the id of the source. For a network port, it represents
12848 * port_id. For a physical function, it represents fid. For a virtual
12849 * function, it represents vf_id. For a vnic, it represents vnic_id. For
12850 * embedded processors, this id is not valid. Notes: 1. The function ID
12851 * is implied if it src_id is not provided for a src_type that is either
12853 uint8_t tunnel_type;
12856 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL UINT32_C(0x0)
12857 /* Virtual eXtensible Local Area Network (VXLAN) */
12858 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
12859 /* Network Virtualization Generic Routing Encapsulation (NVGRE) */
12860 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
12861 /* Generic Routing Encapsulation (GRE) inside Ethernet payload */
12862 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
12864 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
12865 /* Generic Network Virtualization Encapsulation (Geneve) */
12866 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
12867 /* Multi-Protocol Lable Switching (MPLS) */
12868 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
12869 /* Stateless Transport Tunnel (STT) */
12870 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
12871 /* Generic Routing Encapsulation (GRE) inside IP datagram payload */
12872 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
12873 /* Any tunneled traffic */
12874 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL UINT32_C(0xff)
12878 * If set, this value shall represent the Logical VNIC ID of the
12879 * destination VNIC for the RX path and network port id of the
12880 * destination port for the TX path.
12882 uint16_t mirror_vnic_id;
12883 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
12886 * This hint is provided to help in placing the filter in the filter
12889 /* No preference */
12890 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER UINT32_C(0x0)
12891 /* Above the given filter */
12892 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER UINT32_C(0x1)
12893 /* Below the given filter */
12894 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER UINT32_C(0x2)
12895 /* As high as possible */
12896 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
12897 /* As low as possible */
12898 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4)
12901 uint64_t l2_filter_id_hint;
12903 * This is the ID of the filter that goes along with the pri_hint. This
12904 * field is valid only for the following values. 1 - Above the given
12905 * filter 2 - Below the given filter
12907 } __attribute__((packed));
12909 /* Output (24 bytes) */
12911 struct hwrm_cfa_l2_filter_alloc_output {
12912 uint16_t error_code;
12914 * Pass/Fail or error type Note: receiver to verify the in parameters,
12915 * and fail the call with an error when appropriate
12918 /* This field returns the type of original request. */
12920 /* This field provides original sequence number of the command. */
12923 * This field is the length of the response in bytes. The last byte of
12924 * the response is a valid flag that will read as '1' when the command
12925 * has been completely written to memory.
12927 uint64_t l2_filter_id;
12929 * This value identifies a set of CFA data structures used for an L2
12934 * This is the ID of the flow associated with this filter. This value
12935 * shall be used to match and associate the flow identifier returned in
12936 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
12943 * This field is used in Output records to indicate that the output is
12944 * completely written to RAM. This field should be read as '1' to
12945 * indicate that the output has been completely written. When writing a
12946 * command completion or response to an internal processor, the order of
12947 * writes has to be such that this field is written last.
12949 } __attribute__((packed));
12951 /* hwrm_cfa_l2_filter_free */
12953 * Description: Free a L2 filter. The HWRM shall free all associated filter
12954 * resources with the L2 filter.
12956 /* Input (24 bytes) */
12958 struct hwrm_cfa_l2_filter_free_input {
12961 * This value indicates what type of request this is. The format for the
12962 * rest of the command is determined by this field.
12964 uint16_t cmpl_ring;
12966 * This value indicates the what completion ring the request will be
12967 * optionally completed on. If the value is -1, then no CR completion
12968 * will be generated. Any other value must be a valid CR ring_id value
12969 * for this function.
12972 /* This value indicates the command sequence number. */
12973 uint16_t target_id;
12975 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
12976 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
12978 uint64_t resp_addr;
12980 * This is the host address where the response will be written when the
12981 * request is complete. This area must be 16B aligned and must be
12982 * cleared to zero before the request is made.
12984 uint64_t l2_filter_id;
12986 * This value identifies a set of CFA data structures used for an L2
12989 } __attribute__((packed));
12991 /* Output (16 bytes) */
12993 struct hwrm_cfa_l2_filter_free_output {
12994 uint16_t error_code;
12996 * Pass/Fail or error type Note: receiver to verify the in parameters,
12997 * and fail the call with an error when appropriate
13000 /* This field returns the type of original request. */
13002 /* This field provides original sequence number of the command. */
13005 * This field is the length of the response in bytes. The last byte of
13006 * the response is a valid flag that will read as '1' when the command
13007 * has been completely written to memory.
13015 * This field is used in Output records to indicate that the output is
13016 * completely written to RAM. This field should be read as '1' to
13017 * indicate that the output has been completely written. When writing a
13018 * command completion or response to an internal processor, the order of
13019 * writes has to be such that this field is written last.
13021 } __attribute__((packed));
13023 /* hwrm_cfa_l2_filter_cfg */
13024 /* Description: Change the configuration of an existing L2 filter */
13025 /* Input (40 bytes) */
13027 struct hwrm_cfa_l2_filter_cfg_input {
13030 * This value indicates what type of request this is. The format for the
13031 * rest of the command is determined by this field.
13033 uint16_t cmpl_ring;
13035 * This value indicates the what completion ring the request will be
13036 * optionally completed on. If the value is -1, then no CR completion
13037 * will be generated. Any other value must be a valid CR ring_id value
13038 * for this function.
13041 /* This value indicates the command sequence number. */
13042 uint16_t target_id;
13044 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13045 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13047 uint64_t resp_addr;
13049 * This is the host address where the response will be written when the
13050 * request is complete. This area must be 16B aligned and must be
13051 * cleared to zero before the request is made.
13055 * Enumeration denoting the RX, TX type of the resource. This
13056 * enumeration is used for resources that are similar for both TX and RX
13057 * paths of the chip.
13059 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
13061 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
13063 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
13064 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
13066 * Setting of this flag indicates drop action. If this flag is not set,
13067 * then it should be considered accept action.
13069 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2)
13071 /* This bit must be '1' for the dst_id field to be configured. */
13072 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1)
13074 * This bit must be '1' for the new_mirror_vnic_id field to be
13077 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID UINT32_C(0x2)
13078 uint64_t l2_filter_id;
13080 * This value identifies a set of CFA data structures used for an L2
13085 * If set, this value shall represent the Logical VNIC ID of the
13086 * destination VNIC for the RX path and network port id of the
13087 * destination port for the TX path.
13089 uint32_t new_mirror_vnic_id;
13090 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
13091 } __attribute__((packed));
13093 /* Output (16 bytes) */
13095 struct hwrm_cfa_l2_filter_cfg_output {
13096 uint16_t error_code;
13098 * Pass/Fail or error type Note: receiver to verify the in parameters,
13099 * and fail the call with an error when appropriate
13102 /* This field returns the type of original request. */
13104 /* This field provides original sequence number of the command. */
13107 * This field is the length of the response in bytes. The last byte of
13108 * the response is a valid flag that will read as '1' when the command
13109 * has been completely written to memory.
13117 * This field is used in Output records to indicate that the output is
13118 * completely written to RAM. This field should be read as '1' to
13119 * indicate that the output has been completely written. When writing a
13120 * command completion or response to an internal processor, the order of
13121 * writes has to be such that this field is written last.
13123 } __attribute__((packed));
13125 /* hwrm_cfa_l2_set_rx_mask */
13126 /* Description: This command will set rx mask of the function. */
13127 /* Input (56 bytes) */
13129 struct hwrm_cfa_l2_set_rx_mask_input {
13132 * This value indicates what type of request this is. The format for the
13133 * rest of the command is determined by this field.
13135 uint16_t cmpl_ring;
13137 * This value indicates the what completion ring the request will be
13138 * optionally completed on. If the value is -1, then no CR completion
13139 * will be generated. Any other value must be a valid CR ring_id value
13140 * for this function.
13143 /* This value indicates the command sequence number. */
13144 uint16_t target_id;
13146 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13147 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13149 uint64_t resp_addr;
13151 * This is the host address where the response will be written when the
13152 * request is complete. This area must be 16B aligned and must be
13153 * cleared to zero before the request is made.
13158 /* Reserved for future use. */
13159 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
13161 * When this bit is '1', the function is requested to accept multi-cast
13162 * packets specified by the multicast addr table.
13164 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
13166 * When this bit is '1', the function is requested to accept all multi-
13169 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
13171 * When this bit is '1', the function is requested to accept broadcast
13174 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
13176 * When this bit is '1', the function is requested to be put in the
13177 * promiscuous mode. The HWRM should accept any function to set up
13178 * promiscuous mode. The HWRM shall follow the semantics below for the
13179 * promiscuous mode support. # When partitioning is not enabled on a
13180 * port (i.e. single PF on the port), then the PF shall be allowed to be
13181 * in the promiscuous mode. When the PF is in the promiscuous mode, then
13182 * it shall receive all host bound traffic on that port. # When
13183 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
13184 * PF on that port is in the promiscuous mode, then the PF receives all
13185 * traffic within that partition as identified by a unique identifier
13186 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
13187 * specified, then the setting of promiscuous mode on that PF shall
13188 * result in the PF receiving all host bound traffic with matching outer
13189 * VLAN. # A VF shall can be set in the promiscuous mode. In the
13190 * promiscuous mode, the VF does not receive any traffic unless a unique
13191 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
13192 * is specified, then the setting of promiscuous mode on that VF shall
13193 * result in the VF receiving all host bound traffic with the matching
13194 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
13195 * a function independently from the promiscuous mode settings on other
13198 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
13200 * If this flag is set, the corresponding RX filters shall be set up to
13201 * cover multicast/broadcast filters for the outermost Layer 2
13202 * destination MAC address field.
13204 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
13206 * If this flag is set, the corresponding RX filters shall be set up to
13207 * cover multicast/broadcast filters for the VLAN-tagged packets that
13208 * match the TPID and VID fields of VLAN tags in the VLAN tag table
13209 * specified in this command.
13211 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40)
13213 * If this flag is set, the corresponding RX filters shall be set up to
13214 * cover multicast/broadcast filters for non-VLAN tagged packets and
13215 * VLAN-tagged packets that match the TPID and VID fields of VLAN tags
13216 * in the VLAN tag table specified in this command.
13218 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80)
13220 * If this flag is set, the corresponding RX filters shall be set up to
13221 * cover multicast/broadcast filters for non-VLAN tagged packets and
13222 * VLAN-tagged packets matching any VLAN tag. If this flag is set, then
13223 * the HWRM shall ignore VLAN tags specified in vlan_tag_tbl. If none of
13224 * vlanonly, vlan_nonvlan, and anyvlan_nonvlan flags is set, then the
13225 * HWRM shall ignore VLAN tags specified in vlan_tag_tbl. The HWRM
13226 * client shall set at most one flag out of vlanonly, vlan_nonvlan, and
13229 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN UINT32_C(0x100)
13230 uint64_t mc_tbl_addr;
13231 /* This is the address for mcast address tbl. */
13232 uint32_t num_mc_entries;
13234 * This value indicates how many entries in mc_tbl are valid. Each entry
13238 uint64_t vlan_tag_tbl_addr;
13240 * This is the address for VLAN tag table. Each VLAN entry in the table
13241 * is 4 bytes of a VLAN tag including TPID, PCP, DEI, and VID fields in
13242 * network byte order.
13244 uint32_t num_vlan_tags;
13246 * This value indicates how many entries in vlan_tag_tbl are valid. Each
13247 * entry is 4 bytes.
13250 } __attribute__((packed));
13252 /* Output (16 bytes) */
13254 struct hwrm_cfa_l2_set_rx_mask_output {
13255 uint16_t error_code;
13257 * Pass/Fail or error type Note: receiver to verify the in parameters,
13258 * and fail the call with an error when appropriate
13261 /* This field returns the type of original request. */
13263 /* This field provides original sequence number of the command. */
13266 * This field is the length of the response in bytes. The last byte of
13267 * the response is a valid flag that will read as '1' when the command
13268 * has been completely written to memory.
13276 * This field is used in Output records to indicate that the output is
13277 * completely written to RAM. This field should be read as '1' to
13278 * indicate that the output has been completely written. When writing a
13279 * command completion or response to an internal processor, the order of
13280 * writes has to be such that this field is written last.
13282 } __attribute__((packed));
13284 /* hwrm_cfa_tunnel_filter_alloc */
13286 * Description: This is a tunnel filter that uses fields from tunnel header in
13287 * addition to l2 context. The tunnel filter applies to receive side only. The
13288 * l2_* fields in this command represent fields of inner L2 header. They are
13289 * optional to be specified. It allows l2_filter_id to be created with outer L2
13290 * header fields that can be shared with multiple tunnel filters specified as
13291 * combinations of inner L2 header fields, tunnel type, and VNI.
13293 /* Input (88 bytes) */
13295 struct hwrm_cfa_tunnel_filter_alloc_input {
13298 * This value indicates what type of request this is. The format for the
13299 * rest of the command is determined by this field.
13301 uint16_t cmpl_ring;
13303 * This value indicates the what completion ring the request will be
13304 * optionally completed on. If the value is -1, then no CR completion
13305 * will be generated. Any other value must be a valid CR ring_id value
13306 * for this function.
13309 /* This value indicates the command sequence number. */
13310 uint16_t target_id;
13312 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13313 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13315 uint64_t resp_addr;
13317 * This is the host address where the response will be written when the
13318 * request is complete. This area must be 16B aligned and must be
13319 * cleared to zero before the request is made.
13323 * Setting of this flag indicates the applicability to the loopback
13326 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x1)
13328 /* This bit must be '1' for the l2_filter_id field to be configured. */
13329 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
13330 /* This bit must be '1' for the l2_addr field to be configured. */
13331 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x2)
13332 /* This bit must be '1' for the l2_ivlan field to be configured. */
13333 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x4)
13334 /* This bit must be '1' for the l3_addr field to be configured. */
13335 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_L3_ADDR UINT32_C(0x8)
13336 /* This bit must be '1' for the l3_addr_type field to be configured. */
13337 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_L3_ADDR_TYPE UINT32_C(0x10)
13338 /* This bit must be '1' for the t_l3_addr_type field to be configured. */
13339 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_T_L3_ADDR_TYPE UINT32_C(0x20)
13340 /* This bit must be '1' for the t_l3_addr field to be configured. */
13341 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_T_L3_ADDR UINT32_C(0x40)
13342 /* This bit must be '1' for the tunnel_type field to be configured. */
13343 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x80)
13344 /* This bit must be '1' for the vni field to be configured. */
13345 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_VNI UINT32_C(0x100)
13346 /* This bit must be '1' for the dst_vnic_id field to be configured. */
13347 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_DST_VNIC_ID UINT32_C(0x200)
13348 /* This bit must be '1' for the mirror_vnic_id field to be configured. */
13349 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID UINT32_C(0x400)
13350 uint64_t l2_filter_id;
13352 * This value identifies a set of CFA data structures used for an L2
13355 uint8_t l2_addr[6];
13357 * This value sets the match value for the inner L2 MAC address.
13358 * Destination MAC address for RX path. Source MAC address for TX path.
13362 * This value sets VLAN ID value for inner VLAN. Only 12-bits of VLAN ID
13363 * are used in setting the filter.
13365 uint32_t l3_addr[4];
13367 * The value of inner destination IP address to be used in filtering.
13368 * For IPv4, first four bytes represent the IP address.
13370 uint32_t t_l3_addr[4];
13372 * The value of tunnel destination IP address to be used in filtering.
13373 * For IPv4, first four bytes represent the IP address.
13375 uint8_t l3_addr_type;
13377 * This value indicates the type of inner IP address. 4 - IPv4 6 - IPv6
13378 * All others are invalid.
13380 uint8_t t_l3_addr_type;
13382 * This value indicates the type of tunnel IP address. 4 - IPv4 6 - IPv6
13383 * All others are invalid.
13385 uint8_t tunnel_type;
13388 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL UINT32_C(0x0)
13389 /* Virtual eXtensible Local Area Network (VXLAN) */
13390 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
13391 /* Network Virtualization Generic Routing Encapsulation (NVGRE) */
13392 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
13393 /* Generic Routing Encapsulation (GRE) inside Ethernet payload */
13394 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
13396 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
13397 /* Generic Network Virtualization Encapsulation (Geneve) */
13398 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
13399 /* Multi-Protocol Lable Switching (MPLS) */
13400 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
13401 /* Stateless Transport Tunnel (STT) */
13402 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
13403 /* Generic Routing Encapsulation (GRE) inside IP datagram payload */
13404 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
13405 /* Any tunneled traffic */
13406 #define HWRM_CFA_TUNNEL_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL UINT32_C(0xff)
13410 * Virtual Network Identifier (VNI). Only valid with tunnel_types VXLAN,
13411 * NVGRE, and Geneve. Only lower 24-bits of VNI field are used in
13412 * setting up the filter.
13414 uint32_t dst_vnic_id;
13415 /* Logical VNIC ID of the destination VNIC. */
13416 uint32_t mirror_vnic_id;
13417 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
13418 } __attribute__((packed));
13420 /* Output (24 bytes) */
13422 struct hwrm_cfa_tunnel_filter_alloc_output {
13423 uint16_t error_code;
13425 * Pass/Fail or error type Note: receiver to verify the in parameters,
13426 * and fail the call with an error when appropriate
13429 /* This field returns the type of original request. */
13431 /* This field provides original sequence number of the command. */
13434 * This field is the length of the response in bytes. The last byte of
13435 * the response is a valid flag that will read as '1' when the command
13436 * has been completely written to memory.
13438 uint64_t tunnel_filter_id;
13439 /* This value is an opaque id into CFA data structures. */
13442 * This is the ID of the flow associated with this filter. This value
13443 * shall be used to match and associate the flow identifier returned in
13444 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
13451 * This field is used in Output records to indicate that the output is
13452 * completely written to RAM. This field should be read as '1' to
13453 * indicate that the output has been completely written. When writing a
13454 * command completion or response to an internal processor, the order of
13455 * writes has to be such that this field is written last.
13457 } __attribute__((packed));
13459 /* hwrm_cfa_tunnel_filter_free */
13460 /* Description: Free a tunnel filter */
13461 /* Input (24 bytes) */
13463 struct hwrm_cfa_tunnel_filter_free_input {
13466 * This value indicates what type of request this is. The format for the
13467 * rest of the command is determined by this field.
13469 uint16_t cmpl_ring;
13471 * This value indicates the what completion ring the request will be
13472 * optionally completed on. If the value is -1, then no CR completion
13473 * will be generated. Any other value must be a valid CR ring_id value
13474 * for this function.
13477 /* This value indicates the command sequence number. */
13478 uint16_t target_id;
13480 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13481 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13483 uint64_t resp_addr;
13485 * This is the host address where the response will be written when the
13486 * request is complete. This area must be 16B aligned and must be
13487 * cleared to zero before the request is made.
13489 uint64_t tunnel_filter_id;
13490 /* This value is an opaque id into CFA data structures. */
13491 } __attribute__((packed));
13493 /* Output (16 bytes) */
13495 struct hwrm_cfa_tunnel_filter_free_output {
13496 uint16_t error_code;
13498 * Pass/Fail or error type Note: receiver to verify the in parameters,
13499 * and fail the call with an error when appropriate
13502 /* This field returns the type of original request. */
13504 /* This field provides original sequence number of the command. */
13507 * This field is the length of the response in bytes. The last byte of
13508 * the response is a valid flag that will read as '1' when the command
13509 * has been completely written to memory.
13517 * This field is used in Output records to indicate that the output is
13518 * completely written to RAM. This field should be read as '1' to
13519 * indicate that the output has been completely written. When writing a
13520 * command completion or response to an internal processor, the order of
13521 * writes has to be such that this field is written last.
13523 } __attribute__((packed));
13525 /* hwrm_cfa_encap_record_alloc */
13527 * Description: This command is used to create an encapsulation record. The
13528 * source MAC address and source IP address specified for the source property
13529 * checks shall be used in the encapsulation where applicable.
13531 /* Input (32 bytes) */
13533 struct hwrm_cfa_encap_record_alloc_input {
13536 * This value indicates what type of request this is. The format for the
13537 * rest of the command is determined by this field.
13539 uint16_t cmpl_ring;
13541 * This value indicates the what completion ring the request will be
13542 * optionally completed on. If the value is -1, then no CR completion
13543 * will be generated. Any other value must be a valid CR ring_id value
13544 * for this function.
13547 /* This value indicates the command sequence number. */
13548 uint16_t target_id;
13550 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13551 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13553 uint64_t resp_addr;
13555 * This is the host address where the response will be written when the
13556 * request is complete. This area must be 16B aligned and must be
13557 * cleared to zero before the request is made.
13561 * Setting of this flag indicates the applicability to the loopback
13564 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x1)
13565 uint8_t encap_type;
13566 /* Encapsulation Type. */
13567 /* Virtual eXtensible Local Area Network (VXLAN) */
13568 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_VXLAN UINT32_C(0x1)
13569 /* Network Virtualization Generic Routing Encapsulation (NVGRE) */
13570 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_NVGRE UINT32_C(0x2)
13571 /* Generic Routing Encapsulation (GRE) after inside Ethernet payload */
13572 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_L2GRE UINT32_C(0x3)
13574 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_IPIP UINT32_C(0x4)
13575 /* Generic Network Virtualization Encapsulation (Geneve) */
13576 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_GENEVE UINT32_C(0x5)
13577 /* Multi-Protocol Lable Switching (MPLS) */
13578 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_MPLS UINT32_C(0x6)
13580 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_VLAN UINT32_C(0x7)
13581 /* Generic Routing Encapsulation (GRE) inside IP datagram payload */
13582 #define HWRM_CFA_ENCAP_RECORD_ALLOC_INPUT_ENCAP_TYPE_IPGRE UINT32_C(0x8)
13585 uint32_t encap_data[16];
13586 /* This value is encap data used for the given encap type. */
13587 } __attribute__((packed));
13589 /* Output (16 bytes) */
13591 struct hwrm_cfa_encap_record_alloc_output {
13592 uint16_t error_code;
13594 * Pass/Fail or error type Note: receiver to verify the in parameters,
13595 * and fail the call with an error when appropriate
13598 /* This field returns the type of original request. */
13600 /* This field provides original sequence number of the command. */
13603 * This field is the length of the response in bytes. The last byte of
13604 * the response is a valid flag that will read as '1' when the command
13605 * has been completely written to memory.
13607 uint32_t encap_record_id;
13608 /* This value is an opaque id into CFA data structures. */
13614 * This field is used in Output records to indicate that the output is
13615 * completely written to RAM. This field should be read as '1' to
13616 * indicate that the output has been completely written. When writing a
13617 * command completion or response to an internal processor, the order of
13618 * writes has to be such that this field is written last.
13620 } __attribute__((packed));
13622 /* hwrm_cfa_encap_record_free */
13623 /* Description: Free an encap record */
13624 /* Input (24 bytes) */
13626 struct hwrm_cfa_encap_record_free_input {
13629 * This value indicates what type of request this is. The format for the
13630 * rest of the command is determined by this field.
13632 uint16_t cmpl_ring;
13634 * This value indicates the what completion ring the request will be
13635 * optionally completed on. If the value is -1, then no CR completion
13636 * will be generated. Any other value must be a valid CR ring_id value
13637 * for this function.
13640 /* This value indicates the command sequence number. */
13641 uint16_t target_id;
13643 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13644 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13646 uint64_t resp_addr;
13648 * This is the host address where the response will be written when the
13649 * request is complete. This area must be 16B aligned and must be
13650 * cleared to zero before the request is made.
13652 uint32_t encap_record_id;
13653 /* This value is an opaque id into CFA data structures. */
13655 } __attribute__((packed));
13657 /* Output (16 bytes) */
13659 struct hwrm_cfa_encap_record_free_output {
13660 uint16_t error_code;
13662 * Pass/Fail or error type Note: receiver to verify the in parameters,
13663 * and fail the call with an error when appropriate
13666 /* This field returns the type of original request. */
13668 /* This field provides original sequence number of the command. */
13671 * This field is the length of the response in bytes. The last byte of
13672 * the response is a valid flag that will read as '1' when the command
13673 * has been completely written to memory.
13681 * This field is used in Output records to indicate that the output is
13682 * completely written to RAM. This field should be read as '1' to
13683 * indicate that the output has been completely written. When writing a
13684 * command completion or response to an internal processor, the order of
13685 * writes has to be such that this field is written last.
13687 } __attribute__((packed));
13689 /* hwrm_cfa_ntuple_filter_alloc */
13691 * Description: This is a ntuple filter that uses fields from L4/L3 header and
13692 * optionally fields from L2. The ntuple filters apply to receive traffic only.
13693 * All L2/L3/L4 header fields are specified in network byte order. These filters
13694 * can be used for Receive Flow Steering (RFS). # For ethertype value, only
13695 * 0x0800 (IPv4) and 0x86dd (IPv6) shall be supported for ntuple filters. # If a
13696 * field specified in this command is not enabled as a valid field, then that
13697 * field shall not be used in matching packet header fields against this filter.
13699 /* Input (128 bytes) */
13701 struct hwrm_cfa_ntuple_filter_alloc_input {
13704 * This value indicates what type of request this is. The format for the
13705 * rest of the command is determined by this field.
13707 uint16_t cmpl_ring;
13709 * This value indicates the what completion ring the request will be
13710 * optionally completed on. If the value is -1, then no CR completion
13711 * will be generated. Any other value must be a valid CR ring_id value
13712 * for this function.
13715 /* This value indicates the command sequence number. */
13716 uint16_t target_id;
13718 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13719 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13721 uint64_t resp_addr;
13723 * This is the host address where the response will be written when the
13724 * request is complete. This area must be 16B aligned and must be
13725 * cleared to zero before the request is made.
13729 * Setting of this flag indicates the applicability to the loopback
13732 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x1)
13734 * Setting of this flag indicates drop action. If this flag is not set,
13735 * then it should be considered accept action.
13737 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x2)
13739 /* This bit must be '1' for the l2_filter_id field to be configured. */
13740 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
13741 /* This bit must be '1' for the ethertype field to be configured. */
13742 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE UINT32_C(0x2)
13743 /* This bit must be '1' for the tunnel_type field to be configured. */
13744 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x4)
13745 /* This bit must be '1' for the src_macaddr field to be configured. */
13746 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR UINT32_C(0x8)
13747 /* This bit must be '1' for the ipaddr_type field to be configured. */
13748 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IPADDR_TYPE UINT32_C(0x10)
13749 /* This bit must be '1' for the src_ipaddr field to be configured. */
13750 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR UINT32_C(0x20)
13751 /* This bit must be '1' for the src_ipaddr_mask field to be configured. */
13752 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK UINT32_C(0x40)
13753 /* This bit must be '1' for the dst_ipaddr field to be configured. */
13754 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR UINT32_C(0x80)
13755 /* This bit must be '1' for the dst_ipaddr_mask field to be configured. */
13756 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK UINT32_C(0x100)
13757 /* This bit must be '1' for the ip_protocol field to be configured. */
13758 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL UINT32_C(0x200)
13759 /* This bit must be '1' for the src_port field to be configured. */
13760 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT UINT32_C(0x400)
13761 /* This bit must be '1' for the src_port_mask field to be configured. */
13762 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK UINT32_C(0x800)
13763 /* This bit must be '1' for the dst_port field to be configured. */
13764 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT UINT32_C(0x1000)
13765 /* This bit must be '1' for the dst_port_mask field to be configured. */
13766 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK UINT32_C(0x2000)
13767 /* This bit must be '1' for the pri_hint field to be configured. */
13768 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_PRI_HINT UINT32_C(0x4000)
13769 /* This bit must be '1' for the ntuple_filter_id field to be configured. */
13770 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_NTUPLE_FILTER_ID UINT32_C(0x8000)
13771 /* This bit must be '1' for the dst_id field to be configured. */
13772 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x10000)
13773 /* This bit must be '1' for the mirror_vnic_id field to be configured. */
13774 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID UINT32_C(0x20000)
13775 /* This bit must be '1' for the dst_macaddr field to be configured. */
13776 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR UINT32_C(0x40000)
13777 uint64_t l2_filter_id;
13779 * This value identifies a set of CFA data structures used for an L2
13782 uint8_t src_macaddr[6];
13783 /* This value indicates the source MAC address in the Ethernet header. */
13784 uint16_t ethertype; /* big endian */
13785 /* This value indicates the ethertype in the Ethernet header. */
13786 uint8_t ip_addr_type;
13788 * This value indicates the type of IP address. 4 - IPv4 6 - IPv6 All
13789 * others are invalid.
13792 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN UINT32_C(0x0)
13794 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 UINT32_C(0x4)
13796 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 UINT32_C(0x6)
13797 uint8_t ip_protocol;
13799 * The value of protocol filed in IP header. Applies to UDP and TCP
13800 * traffic. 6 - UDP 17 - TCP
13803 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN UINT32_C(0x0)
13805 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP UINT32_C(0x6)
13807 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP UINT32_C(0x11)
13810 * If set, this value shall represent the Logical VNIC ID of the
13811 * destination VNIC for the RX path and network port id of the
13812 * destination port for the TX path.
13814 uint16_t mirror_vnic_id;
13815 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
13816 uint8_t tunnel_type;
13818 * This value indicates the tunnel type for this filter. If this field
13819 * is not specified, then the filter shall apply to both non-tunneled
13820 * and tunneled packets. If this field conflicts with the tunnel_type
13821 * specified in the l2_filter_id, then the HWRM shall return an error
13822 * for this command.
13825 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL UINT32_C(0x0)
13826 /* Virtual eXtensible Local Area Network (VXLAN) */
13827 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
13828 /* Network Virtualization Generic Routing Encapsulation (NVGRE) */
13829 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
13830 /* Generic Routing Encapsulation (GRE) inside Ethernet payload */
13831 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
13833 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
13834 /* Generic Network Virtualization Encapsulation (Geneve) */
13835 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
13836 /* Multi-Protocol Lable Switching (MPLS) */
13837 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
13838 /* Stateless Transport Tunnel (STT) */
13839 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
13840 /* Generic Routing Encapsulation (GRE) inside IP datagram payload */
13841 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
13842 /* Any tunneled traffic */
13843 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL UINT32_C(0xff)
13846 * This hint is provided to help in placing the filter in the filter
13849 /* No preference */
13850 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER UINT32_C(0x0)
13851 /* Above the given filter */
13852 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE UINT32_C(0x1)
13853 /* Below the given filter */
13854 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_BELOW UINT32_C(0x2)
13855 /* As high as possible */
13856 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_HIGHEST UINT32_C(0x3)
13857 /* As low as possible */
13858 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_LOWEST UINT32_C(0x4)
13859 uint32_t src_ipaddr[4]; /* big endian */
13861 * The value of source IP address to be used in filtering. For IPv4,
13862 * first four bytes represent the IP address.
13864 uint32_t src_ipaddr_mask[4]; /* big endian */
13866 * The value of source IP address mask to be used in filtering. For
13867 * IPv4, first four bytes represent the IP address mask.
13869 uint32_t dst_ipaddr[4]; /* big endian */
13871 * The value of destination IP address to be used in filtering. For
13872 * IPv4, first four bytes represent the IP address.
13874 uint32_t dst_ipaddr_mask[4]; /* big endian */
13876 * The value of destination IP address mask to be used in filtering. For
13877 * IPv4, first four bytes represent the IP address mask.
13879 uint16_t src_port; /* big endian */
13881 * The value of source port to be used in filtering. Applies to UDP and
13884 uint16_t src_port_mask; /* big endian */
13886 * The value of source port mask to be used in filtering. Applies to UDP
13889 uint16_t dst_port; /* big endian */
13891 * The value of destination port to be used in filtering. Applies to UDP
13894 uint16_t dst_port_mask; /* big endian */
13896 * The value of destination port mask to be used in filtering. Applies
13897 * to UDP and TCP traffic.
13899 uint64_t ntuple_filter_id_hint;
13900 /* This is the ID of the filter that goes along with the pri_hint. */
13901 } __attribute__((packed));
13903 /* Output (24 bytes) */
13905 struct hwrm_cfa_ntuple_filter_alloc_output {
13906 uint16_t error_code;
13908 * Pass/Fail or error type Note: receiver to verify the in parameters,
13909 * and fail the call with an error when appropriate
13912 /* This field returns the type of original request. */
13914 /* This field provides original sequence number of the command. */
13917 * This field is the length of the response in bytes. The last byte of
13918 * the response is a valid flag that will read as '1' when the command
13919 * has been completely written to memory.
13921 uint64_t ntuple_filter_id;
13922 /* This value is an opaque id into CFA data structures. */
13925 * This is the ID of the flow associated with this filter. This value
13926 * shall be used to match and associate the flow identifier returned in
13927 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
13934 * This field is used in Output records to indicate that the output is
13935 * completely written to RAM. This field should be read as '1' to
13936 * indicate that the output has been completely written. When writing a
13937 * command completion or response to an internal processor, the order of
13938 * writes has to be such that this field is written last.
13940 } __attribute__((packed));
13942 /* hwrm_cfa_ntuple_filter_free */
13943 /* Description: Free an ntuple filter */
13944 /* Input (24 bytes) */
13946 struct hwrm_cfa_ntuple_filter_free_input {
13949 * This value indicates what type of request this is. The format for the
13950 * rest of the command is determined by this field.
13952 uint16_t cmpl_ring;
13954 * This value indicates the what completion ring the request will be
13955 * optionally completed on. If the value is -1, then no CR completion
13956 * will be generated. Any other value must be a valid CR ring_id value
13957 * for this function.
13960 /* This value indicates the command sequence number. */
13961 uint16_t target_id;
13963 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
13964 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
13966 uint64_t resp_addr;
13968 * This is the host address where the response will be written when the
13969 * request is complete. This area must be 16B aligned and must be
13970 * cleared to zero before the request is made.
13972 uint64_t ntuple_filter_id;
13973 /* This value is an opaque id into CFA data structures. */
13974 } __attribute__((packed));
13976 /* Output (16 bytes) */
13978 struct hwrm_cfa_ntuple_filter_free_output {
13979 uint16_t error_code;
13981 * Pass/Fail or error type Note: receiver to verify the in parameters,
13982 * and fail the call with an error when appropriate
13985 /* This field returns the type of original request. */
13987 /* This field provides original sequence number of the command. */
13990 * This field is the length of the response in bytes. The last byte of
13991 * the response is a valid flag that will read as '1' when the command
13992 * has been completely written to memory.
14000 * This field is used in Output records to indicate that the output is
14001 * completely written to RAM. This field should be read as '1' to
14002 * indicate that the output has been completely written. When writing a
14003 * command completion or response to an internal processor, the order of
14004 * writes has to be such that this field is written last.
14006 } __attribute__((packed));
14008 /* hwrm_cfa_ntuple_filter_cfg */
14009 /* Description: Configure an ntuple filter with new destination VNIC */
14010 /* Input (40 bytes) */
14012 struct hwrm_cfa_ntuple_filter_cfg_input {
14015 * This value indicates what type of request this is. The format for the
14016 * rest of the command is determined by this field.
14018 uint16_t cmpl_ring;
14020 * This value indicates the what completion ring the request will be
14021 * optionally completed on. If the value is -1, then no CR completion
14022 * will be generated. Any other value must be a valid CR ring_id value
14023 * for this function.
14026 /* This value indicates the command sequence number. */
14027 uint16_t target_id;
14029 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14030 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14032 uint64_t resp_addr;
14034 * This is the host address where the response will be written when the
14035 * request is complete. This area must be 16B aligned and must be
14036 * cleared to zero before the request is made.
14039 /* This bit must be '1' for the new_dst_id field to be configured. */
14040 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_DST_ID UINT32_C(0x1)
14042 * This bit must be '1' for the new_mirror_vnic_id field to be
14045 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID UINT32_C(0x2)
14047 uint64_t ntuple_filter_id;
14048 /* This value is an opaque id into CFA data structures. */
14049 uint32_t new_dst_id;
14051 * If set, this value shall represent the new Logical VNIC ID of the
14052 * destination VNIC for the RX path and new network port id of the
14053 * destination port for the TX path.
14055 uint32_t new_mirror_vnic_id;
14056 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
14057 } __attribute__((packed));
14059 /* Output (16 bytes) */
14061 struct hwrm_cfa_ntuple_filter_cfg_output {
14062 uint16_t error_code;
14064 * Pass/Fail or error type Note: receiver to verify the in parameters,
14065 * and fail the call with an error when appropriate
14068 /* This field returns the type of original request. */
14070 /* This field provides original sequence number of the command. */
14073 * This field is the length of the response in bytes. The last byte of
14074 * the response is a valid flag that will read as '1' when the command
14075 * has been completely written to memory.
14083 * This field is used in Output records to indicate that the output is
14084 * completely written to RAM. This field should be read as '1' to
14085 * indicate that the output has been completely written. When writing a
14086 * command completion or response to an internal processor, the order of
14087 * writes has to be such that this field is written last.
14089 } __attribute__((packed));
14091 /* hwrm_cfa_em_flow_alloc */
14093 * Description: This is a generic Exact Match (EM) flow that uses fields from
14094 * L4/L3/L2 headers. The EM flows apply to transmit and receive traffic. All
14095 * L2/L3/L4 header fields are specified in network byte order. For each EM flow,
14096 * there is an associated set of actions specified. For tunneled packets, all
14097 * L2/L3/L4 fields specified are fields of inner headers unless otherwise
14098 * specified. # If a field specified in this command is not enabled as a valid
14099 * field, then that field shall not be used in matching packet header fields
14100 * against this EM flow entry.
14102 /* Input (112 bytes) */
14104 struct hwrm_cfa_em_flow_alloc_input {
14107 * This value indicates what type of request this is. The format for the
14108 * rest of the command is determined by this field.
14110 uint16_t cmpl_ring;
14112 * This value indicates the what completion ring the request will be
14113 * optionally completed on. If the value is -1, then no CR completion
14114 * will be generated. Any other value must be a valid CR ring_id value
14115 * for this function.
14118 /* This value indicates the command sequence number. */
14119 uint16_t target_id;
14121 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14122 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14124 uint64_t resp_addr;
14126 * This is the host address where the response will be written when the
14127 * request is complete. This area must be 16B aligned and must be
14128 * cleared to zero before the request is made.
14132 * Enumeration denoting the RX, TX type of the resource. This
14133 * enumeration is used for resources that are similar for both TX and RX
14134 * paths of the chip.
14136 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
14138 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
14140 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
14141 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_LAST HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX
14143 * Setting of this flag indicates enabling of a byte counter for a given
14146 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_BYTE_CTR UINT32_C(0x2)
14148 * Setting of this flag indicates enabling of a packet counter for a
14151 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PKT_CTR UINT32_C(0x4)
14153 * Setting of this flag indicates de-capsulation action for the given
14156 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DECAP UINT32_C(0x8)
14158 * Setting of this flag indicates encapsulation action for the given
14161 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_ENCAP UINT32_C(0x10)
14163 * Setting of this flag indicates drop action. If this flag is not set,
14164 * then it should be considered accept action.
14166 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x20)
14168 /* This bit must be '1' for the l2_filter_id field to be configured. */
14169 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
14170 /* This bit must be '1' for the tunnel_type field to be configured. */
14171 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x2)
14172 /* This bit must be '1' for the tunnel_id field to be configured. */
14173 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_ID UINT32_C(0x4)
14174 /* This bit must be '1' for the src_macaddr field to be configured. */
14175 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR UINT32_C(0x8)
14176 /* This bit must be '1' for the dst_macaddr field to be configured. */
14177 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR UINT32_C(0x10)
14178 /* This bit must be '1' for the ovlan_vid field to be configured. */
14179 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID UINT32_C(0x20)
14180 /* This bit must be '1' for the ivlan_vid field to be configured. */
14181 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IVLAN_VID UINT32_C(0x40)
14182 /* This bit must be '1' for the ethertype field to be configured. */
14183 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE UINT32_C(0x80)
14184 /* This bit must be '1' for the src_ipaddr field to be configured. */
14185 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR UINT32_C(0x100)
14186 /* This bit must be '1' for the dst_ipaddr field to be configured. */
14187 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR UINT32_C(0x200)
14188 /* This bit must be '1' for the ipaddr_type field to be configured. */
14189 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IPADDR_TYPE UINT32_C(0x400)
14190 /* This bit must be '1' for the ip_protocol field to be configured. */
14191 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL UINT32_C(0x800)
14192 /* This bit must be '1' for the src_port field to be configured. */
14193 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT UINT32_C(0x1000)
14194 /* This bit must be '1' for the dst_port field to be configured. */
14195 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT UINT32_C(0x2000)
14196 /* This bit must be '1' for the dst_id field to be configured. */
14197 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x4000)
14198 /* This bit must be '1' for the mirror_vnic_id field to be configured. */
14199 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID UINT32_C(0x8000)
14200 /* This bit must be '1' for the encap_record_id field to be configured. */
14201 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ENCAP_RECORD_ID UINT32_C(0x10000)
14202 uint64_t l2_filter_id;
14204 * This value identifies a set of CFA data structures used for an L2
14207 uint8_t tunnel_type;
14210 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL UINT32_C(0x0)
14211 /* Virtual eXtensible Local Area Network (VXLAN) */
14212 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
14213 /* Network Virtualization Generic Routing Encapsulation (NVGRE) */
14214 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
14215 /* Generic Routing Encapsulation (GRE) inside Ethernet payload */
14216 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
14218 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
14219 /* Generic Network Virtualization Encapsulation (Geneve) */
14220 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
14221 /* Multi-Protocol Lable Switching (MPLS) */
14222 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
14223 /* Stateless Transport Tunnel (STT) */
14224 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
14225 /* Generic Routing Encapsulation (GRE) inside IP datagram payload */
14226 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
14227 /* Any tunneled traffic */
14228 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL UINT32_C(0xff)
14231 uint32_t tunnel_id;
14233 * Tunnel identifier. Virtual Network Identifier (VNI). Only valid with
14234 * tunnel_types VXLAN, NVGRE, and Geneve. Only lower 24-bits of VNI
14235 * field are used in setting up the filter.
14237 uint8_t src_macaddr[6];
14238 /* This value indicates the source MAC address in the Ethernet header. */
14241 uint8_t dst_macaddr[6];
14243 * This value indicates the destination MAC address in the Ethernet
14246 uint16_t ovlan_vid;
14248 * This value indicates the VLAN ID of the outer VLAN tag in the
14251 uint16_t ivlan_vid;
14253 * This value indicates the VLAN ID of the inner VLAN tag in the
14256 uint16_t ethertype; /* big endian */
14257 /* This value indicates the ethertype in the Ethernet header. */
14258 uint8_t ip_addr_type;
14260 * This value indicates the type of IP address. 4 - IPv4 6 - IPv6 All
14261 * others are invalid.
14264 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN UINT32_C(0x0)
14266 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 UINT32_C(0x4)
14268 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 UINT32_C(0x6)
14269 uint8_t ip_protocol;
14271 * The value of protocol filed in IP header. Applies to UDP and TCP
14272 * traffic. 6 - UDP 17 - TCP
14275 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN UINT32_C(0x0)
14277 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UDP UINT32_C(0x6)
14279 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_TCP UINT32_C(0x11)
14282 uint32_t src_ipaddr[4]; /* big endian */
14284 * The value of source IP address to be used in filtering. For IPv4,
14285 * first four bytes represent the IP address.
14287 uint32_t dst_ipaddr[4]; /* big endian */
14289 * The value of destination IP address to be used in filtering. For
14290 * IPv4, first four bytes represent the IP address.
14292 uint16_t src_port; /* big endian */
14294 * The value of source port to be used in filtering. Applies to UDP and
14297 uint16_t dst_port; /* big endian */
14299 * The value of destination port to be used in filtering. Applies to UDP
14304 * If set, this value shall represent the Logical VNIC ID of the
14305 * destination VNIC for the RX path and network port id of the
14306 * destination port for the TX path.
14308 uint16_t mirror_vnic_id;
14309 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
14310 uint32_t encap_record_id;
14311 /* Logical ID of the encapsulation record. */
14313 } __attribute__((packed));
14315 /* Output (24 bytes) */
14317 struct hwrm_cfa_em_flow_alloc_output {
14318 uint16_t error_code;
14320 * Pass/Fail or error type Note: receiver to verify the in parameters,
14321 * and fail the call with an error when appropriate
14324 /* This field returns the type of original request. */
14326 /* This field provides original sequence number of the command. */
14329 * This field is the length of the response in bytes. The last byte of
14330 * the response is a valid flag that will read as '1' when the command
14331 * has been completely written to memory.
14333 uint64_t em_filter_id;
14334 /* This value is an opaque id into CFA data structures. */
14337 * This is the ID of the flow associated with this filter. This value
14338 * shall be used to match and associate the flow identifier returned in
14339 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
14346 * This field is used in Output records to indicate that the output is
14347 * completely written to RAM. This field should be read as '1' to
14348 * indicate that the output has been completely written. When writing a
14349 * command completion or response to an internal processor, the order of
14350 * writes has to be such that this field is written last.
14352 } __attribute__((packed));
14354 /* hwrm_cfa_em_flow_free */
14355 /* Description: Free an EM flow table entry */
14356 /* Input (24 bytes) */
14358 struct hwrm_cfa_em_flow_free_input {
14361 * This value indicates what type of request this is. The format for the
14362 * rest of the command is determined by this field.
14364 uint16_t cmpl_ring;
14366 * This value indicates the what completion ring the request will be
14367 * optionally completed on. If the value is -1, then no CR completion
14368 * will be generated. Any other value must be a valid CR ring_id value
14369 * for this function.
14372 /* This value indicates the command sequence number. */
14373 uint16_t target_id;
14375 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14376 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14378 uint64_t resp_addr;
14380 * This is the host address where the response will be written when the
14381 * request is complete. This area must be 16B aligned and must be
14382 * cleared to zero before the request is made.
14384 uint64_t em_filter_id;
14385 /* This value is an opaque id into CFA data structures. */
14386 } __attribute__((packed));
14388 /* Output (16 bytes) */
14390 struct hwrm_cfa_em_flow_free_output {
14391 uint16_t error_code;
14393 * Pass/Fail or error type Note: receiver to verify the in parameters,
14394 * and fail the call with an error when appropriate
14397 /* This field returns the type of original request. */
14399 /* This field provides original sequence number of the command. */
14402 * This field is the length of the response in bytes. The last byte of
14403 * the response is a valid flag that will read as '1' when the command
14404 * has been completely written to memory.
14412 * This field is used in Output records to indicate that the output is
14413 * completely written to RAM. This field should be read as '1' to
14414 * indicate that the output has been completely written. When writing a
14415 * command completion or response to an internal processor, the order of
14416 * writes has to be such that this field is written last.
14418 } __attribute__((packed));
14420 /* hwrm_cfa_em_flow_cfg */
14421 /* Description: Configure an EM flow with new destination VNIC */
14422 /* Input (40 bytes) */
14424 struct hwrm_cfa_em_flow_cfg_input {
14427 * This value indicates what type of request this is. The format for the
14428 * rest of the command is determined by this field.
14430 uint16_t cmpl_ring;
14432 * This value indicates the what completion ring the request will be
14433 * optionally completed on. If the value is -1, then no CR completion
14434 * will be generated. Any other value must be a valid CR ring_id value
14435 * for this function.
14438 /* This value indicates the command sequence number. */
14439 uint16_t target_id;
14441 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14442 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14444 uint64_t resp_addr;
14446 * This is the host address where the response will be written when the
14447 * request is complete. This area must be 16B aligned and must be
14448 * cleared to zero before the request is made.
14451 /* This bit must be '1' for the new_dst_id field to be configured. */
14452 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_DST_ID UINT32_C(0x1)
14454 * This bit must be '1' for the new_mirror_vnic_id field to be
14457 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID UINT32_C(0x2)
14459 uint64_t em_filter_id;
14460 /* This value is an opaque id into CFA data structures. */
14461 uint32_t new_dst_id;
14463 * If set, this value shall represent the new Logical VNIC ID of the
14464 * destination VNIC for the RX path and network port id of the
14465 * destination port for the TX path.
14467 uint32_t new_mirror_vnic_id;
14468 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
14469 } __attribute__((packed));
14471 /* Output (16 bytes) */
14473 struct hwrm_cfa_em_flow_cfg_output {
14474 uint16_t error_code;
14476 * Pass/Fail or error type Note: receiver to verify the in parameters,
14477 * and fail the call with an error when appropriate
14480 /* This field returns the type of original request. */
14482 /* This field provides original sequence number of the command. */
14485 * This field is the length of the response in bytes. The last byte of
14486 * the response is a valid flag that will read as '1' when the command
14487 * has been completely written to memory.
14495 * This field is used in Output records to indicate that the output is
14496 * completely written to RAM. This field should be read as '1' to
14497 * indicate that the output has been completely written. When writing a
14498 * command completion or response to an internal processor, the order of
14499 * writes has to be such that this field is written last.
14501 } __attribute__((packed));
14503 /* hwrm_tunnel_dst_port_query */
14505 * Description: This function is called by a driver to query tunnel type
14506 * specific destination port configuration.
14508 /* Input (24 bytes) */
14510 struct hwrm_tunnel_dst_port_query_input {
14513 * This value indicates what type of request this is. The format for the
14514 * rest of the command is determined by this field.
14516 uint16_t cmpl_ring;
14518 * This value indicates the what completion ring the request will be
14519 * optionally completed on. If the value is -1, then no CR completion
14520 * will be generated. Any other value must be a valid CR ring_id value
14521 * for this function.
14524 /* This value indicates the command sequence number. */
14525 uint16_t target_id;
14527 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14528 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14530 uint64_t resp_addr;
14532 * This is the host address where the response will be written when the
14533 * request is complete. This area must be 16B aligned and must be
14534 * cleared to zero before the request is made.
14536 uint8_t tunnel_type;
14538 /* Virtual eXtensible Local Area Network (VXLAN) */
14539 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
14540 /* Generic Network Virtualization Encapsulation (Geneve) */
14541 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
14542 uint8_t unused_0[7];
14543 } __attribute__((packed));
14545 /* Output (16 bytes) */
14547 struct hwrm_tunnel_dst_port_query_output {
14548 uint16_t error_code;
14550 * Pass/Fail or error type Note: receiver to verify the in parameters,
14551 * and fail the call with an error when appropriate
14554 /* This field returns the type of original request. */
14556 /* This field provides original sequence number of the command. */
14559 * This field is the length of the response in bytes. The last byte of
14560 * the response is a valid flag that will read as '1' when the command
14561 * has been completely written to memory.
14563 uint16_t tunnel_dst_port_id;
14565 * This field represents the identifier of L4 destination port used for
14566 * the given tunnel type. This field is valid for specific tunnel types
14567 * that use layer 4 (e.g. UDP) transports for tunneling.
14569 uint16_t tunnel_dst_port_val; /* big endian */
14571 * This field represents the value of L4 destination port identified by
14572 * tunnel_dst_port_id. This field is valid for specific tunnel types
14573 * that use layer 4 (e.g. UDP) transports for tunneling. This field is
14574 * in network byte order. A value of 0 means that the destination port
14575 * is not configured.
14582 * This field is used in Output records to indicate that the output is
14583 * completely written to RAM. This field should be read as '1' to
14584 * indicate that the output has been completely written. When writing a
14585 * command completion or response to an internal processor, the order of
14586 * writes has to be such that this field is written last.
14588 } __attribute__((packed));
14590 /* hwrm_tunnel_dst_port_alloc */
14592 * Description: This function is called by a driver to allocate l4 destination
14593 * port for a specific tunnel type. The destination port value is provided in
14594 * the input. If the HWRM supports only one global destination port for a tunnel
14595 * type, then the HWRM shall keep track of its usage as described below. # The
14596 * first caller that allocates a destination port shall always succeed and the
14597 * HWRM shall save the destination port configuration for that tunnel type and
14598 * increment the usage count to 1. # Subsequent callers allocating the same
14599 * destination port for that tunnel type shall succeed and the HWRM shall
14600 * increment the usage count for that port for each subsequent caller that
14601 * succeeds. # Any subsequent caller trying to allocate a different destination
14602 * port for that tunnel type shall fail until the usage count for the original
14603 * destination port goes to zero. # A caller that frees a port will cause the
14604 * usage count for that port to decrement.
14606 /* Input (24 bytes) */
14608 struct hwrm_tunnel_dst_port_alloc_input {
14611 * This value indicates what type of request this is. The format for the
14612 * rest of the command is determined by this field.
14614 uint16_t cmpl_ring;
14616 * This value indicates the what completion ring the request will be
14617 * optionally completed on. If the value is -1, then no CR completion
14618 * will be generated. Any other value must be a valid CR ring_id value
14619 * for this function.
14622 /* This value indicates the command sequence number. */
14623 uint16_t target_id;
14625 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14626 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14628 uint64_t resp_addr;
14630 * This is the host address where the response will be written when the
14631 * request is complete. This area must be 16B aligned and must be
14632 * cleared to zero before the request is made.
14634 uint8_t tunnel_type;
14636 /* Virtual eXtensible Local Area Network (VXLAN) */
14637 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
14638 /* Generic Network Virtualization Encapsulation (Geneve) */
14639 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
14641 uint16_t tunnel_dst_port_val; /* big endian */
14643 * This field represents the value of L4 destination port used for the
14644 * given tunnel type. This field is valid for specific tunnel types that
14645 * use layer 4 (e.g. UDP) transports for tunneling. This field is in
14646 * network byte order. A value of 0 shall fail the command.
14649 } __attribute__((packed));
14651 /* Output (16 bytes) */
14653 struct hwrm_tunnel_dst_port_alloc_output {
14654 uint16_t error_code;
14656 * Pass/Fail or error type Note: receiver to verify the in parameters,
14657 * and fail the call with an error when appropriate
14660 /* This field returns the type of original request. */
14662 /* This field provides original sequence number of the command. */
14665 * This field is the length of the response in bytes. The last byte of
14666 * the response is a valid flag that will read as '1' when the command
14667 * has been completely written to memory.
14669 uint16_t tunnel_dst_port_id;
14671 * Identifier of a tunnel L4 destination port value. Only applies to
14672 * tunnel types that has l4 destination port parameters.
14681 * This field is used in Output records to indicate that the output is
14682 * completely written to RAM. This field should be read as '1' to
14683 * indicate that the output has been completely written. When writing a
14684 * command completion or response to an internal processor, the order of
14685 * writes has to be such that this field is written last.
14687 } __attribute__((packed));
14689 /* hwrm_tunnel_dst_port_free */
14691 * Description: This function is called by a driver to free l4 destination port
14692 * for a specific tunnel type.
14694 /* Input (24 bytes) */
14696 struct hwrm_tunnel_dst_port_free_input {
14699 * This value indicates what type of request this is. The format for the
14700 * rest of the command is determined by this field.
14702 uint16_t cmpl_ring;
14704 * This value indicates the what completion ring the request will be
14705 * optionally completed on. If the value is -1, then no CR completion
14706 * will be generated. Any other value must be a valid CR ring_id value
14707 * for this function.
14710 /* This value indicates the command sequence number. */
14711 uint16_t target_id;
14713 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14714 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14716 uint64_t resp_addr;
14718 * This is the host address where the response will be written when the
14719 * request is complete. This area must be 16B aligned and must be
14720 * cleared to zero before the request is made.
14722 uint8_t tunnel_type;
14724 /* Virtual eXtensible Local Area Network (VXLAN) */
14725 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
14726 /* Generic Network Virtualization Encapsulation (Geneve) */
14727 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
14729 uint16_t tunnel_dst_port_id;
14731 * Identifier of a tunnel L4 destination port value. Only applies to
14732 * tunnel types that has l4 destination port parameters.
14735 } __attribute__((packed));
14737 /* Output (16 bytes) */
14739 struct hwrm_tunnel_dst_port_free_output {
14740 uint16_t error_code;
14742 * Pass/Fail or error type Note: receiver to verify the in parameters,
14743 * and fail the call with an error when appropriate
14746 /* This field returns the type of original request. */
14748 /* This field provides original sequence number of the command. */
14751 * This field is the length of the response in bytes. The last byte of
14752 * the response is a valid flag that will read as '1' when the command
14753 * has been completely written to memory.
14761 * This field is used in Output records to indicate that the output is
14762 * completely written to RAM. This field should be read as '1' to
14763 * indicate that the output has been completely written. When writing a
14764 * command completion or response to an internal processor, the order of
14765 * writes has to be such that this field is written last.
14767 } __attribute__((packed));
14769 /* hwrm_stat_ctx_alloc */
14771 * Description: This command allocates and does basic preparation for a stat
14774 /* Input (32 bytes) */
14776 struct hwrm_stat_ctx_alloc_input {
14779 * This value indicates what type of request this is. The format for the
14780 * rest of the command is determined by this field.
14782 uint16_t cmpl_ring;
14784 * This value indicates the what completion ring the request will be
14785 * optionally completed on. If the value is -1, then no CR completion
14786 * will be generated. Any other value must be a valid CR ring_id value
14787 * for this function.
14790 /* This value indicates the command sequence number. */
14791 uint16_t target_id;
14793 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14794 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14796 uint64_t resp_addr;
14798 * This is the host address where the response will be written when the
14799 * request is complete. This area must be 16B aligned and must be
14800 * cleared to zero before the request is made.
14802 uint64_t stats_dma_addr;
14803 /* This is the address for statistic block. */
14804 uint32_t update_period_ms;
14806 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
14810 } __attribute__((packed));
14812 /* Output (16 bytes) */
14814 struct hwrm_stat_ctx_alloc_output {
14815 uint16_t error_code;
14817 * Pass/Fail or error type Note: receiver to verify the in parameters,
14818 * and fail the call with an error when appropriate
14821 /* This field returns the type of original request. */
14823 /* This field provides original sequence number of the command. */
14826 * This field is the length of the response in bytes. The last byte of
14827 * the response is a valid flag that will read as '1' when the command
14828 * has been completely written to memory.
14830 uint32_t stat_ctx_id;
14831 /* This is the statistics context ID value. */
14837 * This field is used in Output records to indicate that the output is
14838 * completely written to RAM. This field should be read as '1' to
14839 * indicate that the output has been completely written. When writing a
14840 * command completion or response to an internal processor, the order of
14841 * writes has to be such that this field is written last.
14843 } __attribute__((packed));
14845 /* hwrm_stat_ctx_free */
14846 /* Description: This command is used to free a stat context. */
14847 /* Input (24 bytes) */
14849 struct hwrm_stat_ctx_free_input {
14852 * This value indicates what type of request this is. The format for the
14853 * rest of the command is determined by this field.
14855 uint16_t cmpl_ring;
14857 * This value indicates the what completion ring the request will be
14858 * optionally completed on. If the value is -1, then no CR completion
14859 * will be generated. Any other value must be a valid CR ring_id value
14860 * for this function.
14863 /* This value indicates the command sequence number. */
14864 uint16_t target_id;
14866 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14867 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14869 uint64_t resp_addr;
14871 * This is the host address where the response will be written when the
14872 * request is complete. This area must be 16B aligned and must be
14873 * cleared to zero before the request is made.
14875 uint32_t stat_ctx_id;
14876 /* ID of the statistics context that is being queried. */
14878 } __attribute__((packed));
14880 /* Output (16 bytes) */
14882 struct hwrm_stat_ctx_free_output {
14883 uint16_t error_code;
14885 * Pass/Fail or error type Note: receiver to verify the in parameters,
14886 * and fail the call with an error when appropriate
14889 /* This field returns the type of original request. */
14891 /* This field provides original sequence number of the command. */
14894 * This field is the length of the response in bytes. The last byte of
14895 * the response is a valid flag that will read as '1' when the command
14896 * has been completely written to memory.
14898 uint32_t stat_ctx_id;
14899 /* This is the statistics context ID value. */
14905 * This field is used in Output records to indicate that the output is
14906 * completely written to RAM. This field should be read as '1' to
14907 * indicate that the output has been completely written. When writing a
14908 * command completion or response to an internal processor, the order of
14909 * writes has to be such that this field is written last.
14911 } __attribute__((packed));
14913 /* hwrm_stat_ctx_query */
14914 /* Description: This command returns statistics of a context. */
14915 /* Input (24 bytes) */
14917 struct hwrm_stat_ctx_query_input {
14920 * This value indicates what type of request this is. The format for the
14921 * rest of the command is determined by this field.
14923 uint16_t cmpl_ring;
14925 * This value indicates the what completion ring the request will be
14926 * optionally completed on. If the value is -1, then no CR completion
14927 * will be generated. Any other value must be a valid CR ring_id value
14928 * for this function.
14931 /* This value indicates the command sequence number. */
14932 uint16_t target_id;
14934 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
14935 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
14937 uint64_t resp_addr;
14939 * This is the host address where the response will be written when the
14940 * request is complete. This area must be 16B aligned and must be
14941 * cleared to zero before the request is made.
14943 uint32_t stat_ctx_id;
14944 /* ID of the statistics context that is being queried. */
14946 } __attribute__((packed));
14948 /* Output (176 bytes) */
14950 struct hwrm_stat_ctx_query_output {
14951 uint16_t error_code;
14953 * Pass/Fail or error type Note: receiver to verify the in parameters,
14954 * and fail the call with an error when appropriate
14957 /* This field returns the type of original request. */
14959 /* This field provides original sequence number of the command. */
14962 * This field is the length of the response in bytes. The last byte of
14963 * the response is a valid flag that will read as '1' when the command
14964 * has been completely written to memory.
14966 uint64_t tx_ucast_pkts;
14967 /* Number of transmitted unicast packets */
14968 uint64_t tx_mcast_pkts;
14969 /* Number of transmitted multicast packets */
14970 uint64_t tx_bcast_pkts;
14971 /* Number of transmitted broadcast packets */
14972 uint64_t tx_err_pkts;
14973 /* Number of transmitted packets with error */
14974 uint64_t tx_drop_pkts;
14975 /* Number of dropped packets on transmit path */
14976 uint64_t tx_ucast_bytes;
14977 /* Number of transmitted bytes for unicast traffic */
14978 uint64_t tx_mcast_bytes;
14979 /* Number of transmitted bytes for multicast traffic */
14980 uint64_t tx_bcast_bytes;
14981 /* Number of transmitted bytes for broadcast traffic */
14982 uint64_t rx_ucast_pkts;
14983 /* Number of received unicast packets */
14984 uint64_t rx_mcast_pkts;
14985 /* Number of received multicast packets */
14986 uint64_t rx_bcast_pkts;
14987 /* Number of received broadcast packets */
14988 uint64_t rx_err_pkts;
14989 /* Number of received packets with error */
14990 uint64_t rx_drop_pkts;
14991 /* Number of dropped packets on received path */
14992 uint64_t rx_ucast_bytes;
14993 /* Number of received bytes for unicast traffic */
14994 uint64_t rx_mcast_bytes;
14995 /* Number of received bytes for multicast traffic */
14996 uint64_t rx_bcast_bytes;
14997 /* Number of received bytes for broadcast traffic */
14998 uint64_t rx_agg_pkts;
14999 /* Number of aggregated unicast packets */
15000 uint64_t rx_agg_bytes;
15001 /* Number of aggregated unicast bytes */
15002 uint64_t rx_agg_events;
15003 /* Number of aggregation events */
15004 uint64_t rx_agg_aborts;
15005 /* Number of aborted aggregations */
15012 * This field is used in Output records to indicate that the output is
15013 * completely written to RAM. This field should be read as '1' to
15014 * indicate that the output has been completely written. When writing a
15015 * command completion or response to an internal processor, the order of
15016 * writes has to be such that this field is written last.
15018 } __attribute__((packed));
15020 /* hwrm_stat_ctx_clr_stats */
15021 /* Description: This command clears statistics of a context. */
15022 /* Input (24 bytes) */
15024 struct hwrm_stat_ctx_clr_stats_input {
15027 * This value indicates what type of request this is. The format for the
15028 * rest of the command is determined by this field.
15030 uint16_t cmpl_ring;
15032 * This value indicates the what completion ring the request will be
15033 * optionally completed on. If the value is -1, then no CR completion
15034 * will be generated. Any other value must be a valid CR ring_id value
15035 * for this function.
15038 /* This value indicates the command sequence number. */
15039 uint16_t target_id;
15041 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15042 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15044 uint64_t resp_addr;
15046 * This is the host address where the response will be written when the
15047 * request is complete. This area must be 16B aligned and must be
15048 * cleared to zero before the request is made.
15050 uint32_t stat_ctx_id;
15051 /* ID of the statistics context that is being queried. */
15053 } __attribute__((packed));
15055 /* Output (16 bytes) */
15057 struct hwrm_stat_ctx_clr_stats_output {
15058 uint16_t error_code;
15060 * Pass/Fail or error type Note: receiver to verify the in parameters,
15061 * and fail the call with an error when appropriate
15064 /* This field returns the type of original request. */
15066 /* This field provides original sequence number of the command. */
15069 * This field is the length of the response in bytes. The last byte of
15070 * the response is a valid flag that will read as '1' when the command
15071 * has been completely written to memory.
15079 * This field is used in Output records to indicate that the output is
15080 * completely written to RAM. This field should be read as '1' to
15081 * indicate that the output has been completely written. When writing a
15082 * command completion or response to an internal processor, the order of
15083 * writes has to be such that this field is written last.
15085 } __attribute__((packed));
15087 /* hwrm_fw_reset */
15089 * Description: This function is called by a driver to self reset the firmware
15090 * running on the processor indicated by the embedded_proc_type.
15092 /* Input (24 bytes) */
15094 struct hwrm_fw_reset_input {
15097 * This value indicates what type of request this is. The format for the
15098 * rest of the command is determined by this field.
15100 uint16_t cmpl_ring;
15102 * This value indicates the what completion ring the request will be
15103 * optionally completed on. If the value is -1, then no CR completion
15104 * will be generated. Any other value must be a valid CR ring_id value
15105 * for this function.
15108 /* This value indicates the command sequence number. */
15109 uint16_t target_id;
15111 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15112 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15114 uint64_t resp_addr;
15116 * This is the host address where the response will be written when the
15117 * request is complete. This area must be 16B aligned and must be
15118 * cleared to zero before the request is made.
15120 uint8_t embedded_proc_type;
15121 /* Type of embedded processor. */
15122 /* Boot Processor */
15123 #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_BOOT UINT32_C(0x0)
15124 /* Management Processor */
15125 #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_MGMT UINT32_C(0x1)
15126 /* Network control processor */
15127 #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_NETCTRL UINT32_C(0x2)
15128 /* RoCE control processor */
15129 #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_ROCE UINT32_C(0x3)
15131 #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_RSVD UINT32_C(0x4)
15132 uint8_t selfrst_status;
15133 /* Type of self reset. */
15134 /* No Self Reset */
15135 #define HWRM_FW_RESET_INPUT_SELFRST_STATUS_SELFRSTNONE UINT32_C(0x0)
15136 /* Self Reset as soon as possible to do so safely */
15137 #define HWRM_FW_RESET_INPUT_SELFRST_STATUS_SELFRSTASAP UINT32_C(0x1)
15138 /* Self Reset on PCIe Reset */
15139 #define HWRM_FW_RESET_INPUT_SELFRST_STATUS_SELFRSTPCIERST UINT32_C(0x2)
15140 uint16_t unused_0[3];
15141 } __attribute__((packed));
15143 /* Output (16 bytes) */
15145 struct hwrm_fw_reset_output {
15146 uint16_t error_code;
15148 * Pass/Fail or error type Note: receiver to verify the in parameters,
15149 * and fail the call with an error when appropriate
15152 /* This field returns the type of original request. */
15154 /* This field provides original sequence number of the command. */
15157 * This field is the length of the response in bytes. The last byte of
15158 * the response is a valid flag that will read as '1' when the command
15159 * has been completely written to memory.
15161 uint8_t selfrst_status;
15162 /* Type of self reset. */
15163 /* No Self Reset */
15164 #define HWRM_FW_RESET_OUTPUT_SELFRST_STATUS_SELFRSTNONE UINT32_C(0x0)
15165 /* Self Reset as soon as possible to do so safely */
15166 #define HWRM_FW_RESET_OUTPUT_SELFRST_STATUS_SELFRSTASAP UINT32_C(0x1)
15167 /* Self Reset on PCIe Reset */
15168 #define HWRM_FW_RESET_OUTPUT_SELFRST_STATUS_SELFRSTPCIERST UINT32_C(0x2)
15176 * This field is used in Output records to indicate that the output is
15177 * completely written to RAM. This field should be read as '1' to
15178 * indicate that the output has been completely written. When writing a
15179 * command completion or response to an internal processor, the order of
15180 * writes has to be such that this field is written last.
15182 } __attribute__((packed));
15184 /* hwrm_fw_qstatus */
15186 * Description: This function is called by a driver to query the status of the
15187 * firmware running on the processor indicated by the embedded_proc_type.
15189 /* Input (24 bytes) */
15191 struct hwrm_fw_qstatus_input {
15194 * This value indicates what type of request this is. The format for the
15195 * rest of the command is determined by this field.
15197 uint16_t cmpl_ring;
15199 * This value indicates the what completion ring the request will be
15200 * optionally completed on. If the value is -1, then no CR completion
15201 * will be generated. Any other value must be a valid CR ring_id value
15202 * for this function.
15205 /* This value indicates the command sequence number. */
15206 uint16_t target_id;
15208 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15209 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15211 uint64_t resp_addr;
15213 * This is the host address where the response will be written when the
15214 * request is complete. This area must be 16B aligned and must be
15215 * cleared to zero before the request is made.
15217 uint8_t embedded_proc_type;
15218 /* Type of embedded processor. */
15219 /* Boot Processor */
15220 #define HWRM_FW_QSTATUS_INPUT_EMBEDDED_PROC_TYPE_BOOT UINT32_C(0x0)
15221 /* Management Processor */
15222 #define HWRM_FW_QSTATUS_INPUT_EMBEDDED_PROC_TYPE_MGMT UINT32_C(0x1)
15223 /* Network control processor */
15224 #define HWRM_FW_QSTATUS_INPUT_EMBEDDED_PROC_TYPE_NETCTRL UINT32_C(0x2)
15225 /* RoCE control processor */
15226 #define HWRM_FW_QSTATUS_INPUT_EMBEDDED_PROC_TYPE_ROCE UINT32_C(0x3)
15228 #define HWRM_FW_QSTATUS_INPUT_EMBEDDED_PROC_TYPE_RSVD UINT32_C(0x4)
15229 uint8_t unused_0[7];
15230 } __attribute__((packed));
15232 /* Output (16 bytes) */
15234 struct hwrm_fw_qstatus_output {
15235 uint16_t error_code;
15237 * Pass/Fail or error type Note: receiver to verify the in parameters,
15238 * and fail the call with an error when appropriate
15241 /* This field returns the type of original request. */
15243 /* This field provides original sequence number of the command. */
15246 * This field is the length of the response in bytes. The last byte of
15247 * the response is a valid flag that will read as '1' when the command
15248 * has been completely written to memory.
15250 uint8_t selfrst_status;
15251 /* Type of self reset. */
15252 /* No Self Reset */
15253 #define HWRM_FW_QSTATUS_OUTPUT_SELFRST_STATUS_SELFRSTNONE UINT32_C(0x0)
15254 /* Self Reset as soon as possible to do so safely */
15255 #define HWRM_FW_QSTATUS_OUTPUT_SELFRST_STATUS_SELFRSTASAP UINT32_C(0x1)
15256 /* Self Reset on PCIe Reset */
15257 #define HWRM_FW_QSTATUS_OUTPUT_SELFRST_STATUS_SELFRSTPCIERST UINT32_C(0x2)
15265 * This field is used in Output records to indicate that the output is
15266 * completely written to RAM. This field should be read as '1' to
15267 * indicate that the output has been completely written. When writing a
15268 * command completion or response to an internal processor, the order of
15269 * writes has to be such that this field is written last.
15271 } __attribute__((packed));
15273 /* hwrm_fw_set_time */
15275 * Description: Inform the HWRM firmware of the current date/time. Ideally, the
15276 * date/time will be current time in GMT/UTC and the zone value will be 0
15277 * (indicating UTC). If the time zone is not known, the zone value shall be
15278 * 0xffff. Other values for zone are discouraged, but if specified, they
15279 * indicate the number of minutes east of UTC, while zones west of UTC are
15280 * represented with a 2's complement negative value (e.g. PST would be -480
15281 * while PDT would be -420).
15283 /* Input (32 bytes) */
15285 struct hwrm_fw_set_time_input {
15288 * This value indicates what type of request this is. The format for the
15289 * rest of the command is determined by this field.
15291 uint16_t cmpl_ring;
15293 * This value indicates the what completion ring the request will be
15294 * optionally completed on. If the value is -1, then no CR completion
15295 * will be generated. Any other value must be a valid CR ring_id value
15296 * for this function.
15299 /* This value indicates the command sequence number. */
15300 uint16_t target_id;
15302 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15303 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15305 uint64_t resp_addr;
15307 * This is the host address where the response will be written when the
15308 * request is complete. This area must be 16B aligned and must be
15309 * cleared to zero before the request is made.
15313 /* Date/time is not known */
15314 #define HWRM_FW_SET_TIME_INPUT_YEAR_UNKNOWN UINT32_C(0x0)
15316 /* Current month of year (1-12) */
15318 /* Current day of month (1-31) */
15320 /* Current hour (0-23) */
15322 /* Current minute (0-59) */
15324 /* Current second (0-59) */
15326 uint16_t millisecond;
15327 /* Current millisecond (0-999) */
15329 /* Minutes east of UTC, 0xffff if TZ is not known */
15330 /* Time zone is Coordinated Universal Time (UTC) */
15331 #define HWRM_FW_SET_TIME_INPUT_ZONE_UTC UINT32_C(0x0)
15332 /* Time zone is not known */
15333 #define HWRM_FW_SET_TIME_INPUT_ZONE_UNKNOWN UINT32_C(0xffff)
15335 } __attribute__((packed));
15337 /* Output (16 bytes) */
15339 struct hwrm_fw_set_time_output {
15340 uint16_t error_code;
15342 * Pass/Fail or error type Note: receiver to verify the in parameters,
15343 * and fail the call with an error when appropriate
15346 /* This field returns the type of original request. */
15348 /* This field provides original sequence number of the command. */
15351 * This field is the length of the response in bytes. The last byte of
15352 * the response is a valid flag that will read as '1' when the command
15353 * has been completely written to memory.
15361 * This field is used in Output records to indicate that the output is
15362 * completely written to RAM. This field should be read as '1' to
15363 * indicate that the output has been completely written. When writing a
15364 * command completion or response to an internal processor, the order of
15365 * writes has to be such that this field is written last.
15367 } __attribute__((packed));
15369 /* hwrm_fw_get_time */
15370 /* Description: Query the HWRM firmware's notion of the current date/time. */
15371 /* Input (16 bytes) */
15373 struct hwrm_fw_get_time_input {
15376 * This value indicates what type of request this is. The format for the
15377 * rest of the command is determined by this field.
15379 uint16_t cmpl_ring;
15381 * This value indicates the what completion ring the request will be
15382 * optionally completed on. If the value is -1, then no CR completion
15383 * will be generated. Any other value must be a valid CR ring_id value
15384 * for this function.
15387 /* This value indicates the command sequence number. */
15388 uint16_t target_id;
15390 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15391 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15393 uint64_t resp_addr;
15395 * This is the host address where the response will be written when the
15396 * request is complete. This area must be 16B aligned and must be
15397 * cleared to zero before the request is made.
15399 } __attribute__((packed));
15401 /* Output (24 bytes) */
15403 struct hwrm_fw_get_time_output {
15404 uint16_t error_code;
15406 * Pass/Fail or error type Note: receiver to verify the in parameters,
15407 * and fail the call with an error when appropriate
15410 /* This field returns the type of original request. */
15412 /* This field provides original sequence number of the command. */
15415 * This field is the length of the response in bytes. The last byte of
15416 * the response is a valid flag that will read as '1' when the command
15417 * has been completely written to memory.
15421 /* Date/time is not known */
15422 #define HWRM_FW_GET_TIME_OUTPUT_YEAR_UNKNOWN UINT32_C(0x0)
15424 /* Current month of year (1-12) */
15426 /* Current day of month (1-31) */
15428 /* Current hour (0-23) */
15430 /* Current minute (0-59) */
15432 /* Current second (0-59) */
15434 uint16_t millisecond;
15435 /* Current millisecond (0-999) */
15437 /* Minutes east of UTC, 0xffff if TZ is not known */
15438 /* Time zone is Coordinated Universal Time (UTC) */
15439 #define HWRM_FW_GET_TIME_OUTPUT_ZONE_UTC UINT32_C(0x0)
15440 /* Time zone is not known */
15441 #define HWRM_FW_GET_TIME_OUTPUT_ZONE_UNKNOWN UINT32_C(0xffff)
15447 * This field is used in Output records to indicate that the output is
15448 * completely written to RAM. This field should be read as '1' to
15449 * indicate that the output has been completely written. When writing a
15450 * command completion or response to an internal processor, the order of
15451 * writes has to be such that this field is written last.
15453 } __attribute__((packed));
15455 /* hwrm_exec_fwd_resp */
15457 * Description: This command is used to send an encapsulated request to the
15458 * HWRM. This command instructs the HWRM to execute the request and forward the
15459 * response of the encapsulated request to the location specified in the
15460 * original request that is encapsulated. The target id of this command shall be
15461 * set to 0xFFFF (HWRM). The response location in this command shall be used to
15462 * acknowledge the receipt of the encapsulated request and forwarding of the
15465 /* Input (128 bytes) */
15467 struct hwrm_exec_fwd_resp_input {
15470 * This value indicates what type of request this is. The format for the
15471 * rest of the command is determined by this field.
15473 uint16_t cmpl_ring;
15475 * This value indicates the what completion ring the request will be
15476 * optionally completed on. If the value is -1, then no CR completion
15477 * will be generated. Any other value must be a valid CR ring_id value
15478 * for this function.
15481 /* This value indicates the command sequence number. */
15482 uint16_t target_id;
15484 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15485 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15487 uint64_t resp_addr;
15489 * This is the host address where the response will be written when the
15490 * request is complete. This area must be 16B aligned and must be
15491 * cleared to zero before the request is made.
15493 uint32_t encap_request[26];
15495 * This is an encapsulated request. This request should be executed by
15496 * the HWRM and the response should be provided in the response buffer
15497 * inside the encapsulated request.
15499 uint16_t encap_resp_target_id;
15501 * This value indicates the target id of the response to the
15502 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
15503 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15505 uint16_t unused_0[3];
15506 } __attribute__((packed));
15508 /* Output (16 bytes) */
15510 struct hwrm_exec_fwd_resp_output {
15511 uint16_t error_code;
15513 * Pass/Fail or error type Note: receiver to verify the in parameters,
15514 * and fail the call with an error when appropriate
15517 /* This field returns the type of original request. */
15519 /* This field provides original sequence number of the command. */
15522 * This field is the length of the response in bytes. The last byte of
15523 * the response is a valid flag that will read as '1' when the command
15524 * has been completely written to memory.
15532 * This field is used in Output records to indicate that the output is
15533 * completely written to RAM. This field should be read as '1' to
15534 * indicate that the output has been completely written. When writing a
15535 * command completion or response to an internal processor, the order of
15536 * writes has to be such that this field is written last.
15538 } __attribute__((packed));
15540 /* hwrm_reject_fwd_resp */
15542 * Description: This command is used to send an encapsulated request to the
15543 * HWRM. This command instructs the HWRM to reject the request and forward the
15544 * error response of the encapsulated request to the location specified in the
15545 * original request that is encapsulated. The target id of this command shall be
15546 * set to 0xFFFF (HWRM). The response location in this command shall be used to
15547 * acknowledge the receipt of the encapsulated request and forwarding of the
15550 /* Input (128 bytes) */
15552 struct hwrm_reject_fwd_resp_input {
15555 * This value indicates what type of request this is. The format for the
15556 * rest of the command is determined by this field.
15558 uint16_t cmpl_ring;
15560 * This value indicates the what completion ring the request will be
15561 * optionally completed on. If the value is -1, then no CR completion
15562 * will be generated. Any other value must be a valid CR ring_id value
15563 * for this function.
15566 /* This value indicates the command sequence number. */
15567 uint16_t target_id;
15569 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15570 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15572 uint64_t resp_addr;
15574 * This is the host address where the response will be written when the
15575 * request is complete. This area must be 16B aligned and must be
15576 * cleared to zero before the request is made.
15578 uint32_t encap_request[26];
15580 * This is an encapsulated request. This request should be rejected by
15581 * the HWRM and the error response should be provided in the response
15582 * buffer inside the encapsulated request.
15584 uint16_t encap_resp_target_id;
15586 * This value indicates the target id of the response to the
15587 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
15588 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15590 uint16_t unused_0[3];
15591 } __attribute__((packed));
15593 /* Output (16 bytes) */
15595 struct hwrm_reject_fwd_resp_output {
15596 uint16_t error_code;
15598 * Pass/Fail or error type Note: receiver to verify the in parameters,
15599 * and fail the call with an error when appropriate
15602 /* This field returns the type of original request. */
15604 /* This field provides original sequence number of the command. */
15607 * This field is the length of the response in bytes. The last byte of
15608 * the response is a valid flag that will read as '1' when the command
15609 * has been completely written to memory.
15617 * This field is used in Output records to indicate that the output is
15618 * completely written to RAM. This field should be read as '1' to
15619 * indicate that the output has been completely written. When writing a
15620 * command completion or response to an internal processor, the order of
15621 * writes has to be such that this field is written last.
15623 } __attribute__((packed));
15625 /* hwrm_fwd_resp */
15627 * Description: This command is used to send an encapsulated response to the
15628 * HWRM. The HWRM shall forward this response based on the target id. The
15629 * response address provided in this command shall be used to acknowledge the
15630 * receipt of the encapsulated response. The encapsulated response address
15631 * provided in this command shall be used to provide the encapsulated response.
15633 /* Input (40 bytes) */
15635 struct hwrm_fwd_resp_input {
15638 * This value indicates what type of request this is. The format for the
15639 * rest of the command is determined by this field.
15641 uint16_t cmpl_ring;
15643 * This value indicates the what completion ring the request will be
15644 * optionally completed on. If the value is -1, then no CR completion
15645 * will be generated. Any other value must be a valid CR ring_id value
15646 * for this function.
15649 /* This value indicates the command sequence number. */
15650 uint16_t target_id;
15652 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15653 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15655 uint64_t resp_addr;
15657 * This is the host address where the response will be written when the
15658 * request is complete. This area must be 16B aligned and must be
15659 * cleared to zero before the request is made.
15661 uint16_t encap_resp_target_id;
15663 * This value indicates the target id of the encapsulated response. 0x0
15664 * - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE - Reserved for
15665 * internal processors 0xFFFF - HWRM
15667 uint16_t encap_resp_cmpl_ring;
15669 * This value indicates the completion ring the encapsulated response
15670 * will be optionally completed on. If the value is -1, then no CR
15671 * completion shall be generated for the encapsulated response. Any
15672 * other value must be a valid CR ring_id value. If a valid
15673 * encap_resp_cmpl_ring is provided, then a CR completion shall be
15674 * generated for the encapsulated response.
15676 uint16_t encap_resp_len;
15677 /* This field indicates the length of encapsulated response. */
15680 uint64_t encap_resp_addr;
15682 * This is the host address where the encapsulated response will be
15683 * written. This area must be 16B aligned and must be cleared to zero
15684 * before the original request is made.
15686 uint32_t encap_resp[24];
15687 /* This is an encapsulated response. */
15688 } __attribute__((packed));
15690 /* Output (16 bytes) */
15692 struct hwrm_fwd_resp_output {
15693 uint16_t error_code;
15695 * Pass/Fail or error type Note: receiver to verify the in parameters,
15696 * and fail the call with an error when appropriate
15699 /* This field returns the type of original request. */
15701 /* This field provides original sequence number of the command. */
15704 * This field is the length of the response in bytes. The last byte of
15705 * the response is a valid flag that will read as '1' when the command
15706 * has been completely written to memory.
15714 * This field is used in Output records to indicate that the output is
15715 * completely written to RAM. This field should be read as '1' to
15716 * indicate that the output has been completely written. When writing a
15717 * command completion or response to an internal processor, the order of
15718 * writes has to be such that this field is written last.
15720 } __attribute__((packed));
15722 /* hwrm_fwd_async_event_cmpl */
15724 * Description: This command is used to send an encapsulated asynchronous event
15725 * completion to the HWRM. The HWRM shall forward this asynchronous event
15726 * completion to target(s) specified in the command. The HWRM shall complete
15727 * this command only after forwarding asynchronous event completion to specified
15730 /* Input (32 bytes) */
15732 struct hwrm_fwd_async_event_cmpl_input {
15735 * This value indicates what type of request this is. The format for the
15736 * rest of the command is determined by this field.
15738 uint16_t cmpl_ring;
15740 * This value indicates the what completion ring the request will be
15741 * optionally completed on. If the value is -1, then no CR completion
15742 * will be generated. Any other value must be a valid CR ring_id value
15743 * for this function.
15746 /* This value indicates the command sequence number. */
15747 uint16_t target_id;
15749 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15750 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15752 uint64_t resp_addr;
15754 * This is the host address where the response will be written when the
15755 * request is complete. This area must be 16B aligned and must be
15756 * cleared to zero before the request is made.
15758 uint16_t encap_async_event_target_id;
15760 * This value indicates the target id of the encapsulated asynchronous
15761 * event. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
15762 * Reserved for internal processors 0xFFFF - Broadcast to all children
15763 * VFs (only applicable when a PF is the requester)
15767 uint8_t unused_2[3];
15769 uint32_t encap_async_event_cmpl[4];
15770 /* This is an encapsulated asynchronous event completion. */
15771 } __attribute__((packed));
15773 /* Output (16 bytes) */
15775 struct hwrm_fwd_async_event_cmpl_output {
15776 uint16_t error_code;
15778 * Pass/Fail or error type Note: receiver to verify the in parameters,
15779 * and fail the call with an error when appropriate
15782 /* This field returns the type of original request. */
15784 /* This field provides original sequence number of the command. */
15787 * This field is the length of the response in bytes. The last byte of
15788 * the response is a valid flag that will read as '1' when the command
15789 * has been completely written to memory.
15797 * This field is used in Output records to indicate that the output is
15798 * completely written to RAM. This field should be read as '1' to
15799 * indicate that the output has been completely written. When writing a
15800 * command completion or response to an internal processor, the order of
15801 * writes has to be such that this field is written last.
15803 } __attribute__((packed));
15805 /* hwrm_temp_monitor_query */
15807 * Description: A temperature monitor is used to query the device temperature.
15809 /* Input (16 bytes) */
15811 struct hwrm_temp_monitor_query_input {
15814 * This value indicates what type of request this is. The format for the
15815 * rest of the command is determined by this field.
15817 uint16_t cmpl_ring;
15819 * This value indicates the what completion ring the request will be
15820 * optionally completed on. If the value is -1, then no CR completion
15821 * will be generated. Any other value must be a valid CR ring_id value
15822 * for this function.
15825 /* This value indicates the command sequence number. */
15826 uint16_t target_id;
15828 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15829 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15831 uint64_t resp_addr;
15833 * This is the host address where the response will be written when the
15834 * request is complete. This area must be 16B aligned and must be
15835 * cleared to zero before the request is made.
15837 } __attribute__((packed));
15839 /* Output (16 bytes) */
15841 struct hwrm_temp_monitor_query_output {
15842 uint16_t error_code;
15844 * Pass/Fail or error type Note: receiver to verify the in parameters,
15845 * and fail the call with an error when appropriate
15848 /* This field returns the type of original request. */
15850 /* This field provides original sequence number of the command. */
15853 * This field is the length of the response in bytes. The last byte of
15854 * the response is a valid flag that will read as '1' when the command
15855 * has been completely written to memory.
15858 /* The HWRM shall provide the current temperature of device in Celsius. */
15866 * This field is used in Output records to indicate that the output is
15867 * completely written to RAM. This field should be read as '1' to
15868 * indicate that the output has been completely written. When writing a
15869 * command completion or response to an internal processor, the order of
15870 * writes has to be such that this field is written last.
15872 } __attribute__((packed));
15874 /* hwrm_wol_filter_alloc */
15876 * Description: A Wake-On-LAN (WoL) filter is a filter resource that is used to
15877 * identify a WoL packet. # Among all function drivers, the HWRM shall only
15878 * allow PF drivers to allocate WoL filters. # The HWRM shall not allow VF
15879 * drivers to allocate any WoL filters. # When partitioning is enabled and WoL
15880 * is supported, the HWRM shall support at least one WoL filter per partition. #
15881 * The HWRM shall retain a WoL filter setting until the filter is freed. # If
15882 * the HWRM client is a function driver, then the HWRM shall not allow the HWRM
15883 * client to set up WoL filters on the port that the function is not associated
15884 * with. # If the HWRM client is one of the trusted embedded services (e.g.
15885 * management service), the the HWRM shall allow the HWRM client to set up WoL
15886 * filters on any port of the device.
15888 /* Input (64 bytes) */
15890 struct hwrm_wol_filter_alloc_input {
15893 * This value indicates what type of request this is. The format for the
15894 * rest of the command is determined by this field.
15896 uint16_t cmpl_ring;
15898 * This value indicates the what completion ring the request will be
15899 * optionally completed on. If the value is -1, then no CR completion
15900 * will be generated. Any other value must be a valid CR ring_id value
15901 * for this function.
15904 /* This value indicates the command sequence number. */
15905 uint16_t target_id;
15907 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
15908 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
15910 uint64_t resp_addr;
15912 * This is the host address where the response will be written when the
15913 * request is complete. This area must be 16B aligned and must be
15914 * cleared to zero before the request is made.
15918 /* This bit must be '1' for the mac_address field to be configured. */
15919 #define HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_MAC_ADDRESS UINT32_C(0x1)
15920 /* This bit must be '1' for the pattern_offset field to be configured. */
15921 #define HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_PATTERN_OFFSET UINT32_C(0x2)
15922 /* This bit must be '1' for the pattern_buf_size field to be configured. */
15923 #define HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_PATTERN_BUF_SIZE UINT32_C(0x4)
15924 /* This bit must be '1' for the pattern_buf_addr field to be configured. */
15925 #define HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_PATTERN_BUF_ADDR UINT32_C(0x8)
15927 * This bit must be '1' for the pattern_mask_addr field to be
15930 #define HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_PATTERN_MASK_ADDR UINT32_C(0x10)
15932 * This bit must be '1' for the pattern_mask_size field to be
15935 #define HWRM_WOL_FILTER_ALLOC_INPUT_ENABLES_PATTERN_MASK_SIZE UINT32_C(0x20)
15937 /* Port ID of port on which WoL filter is configured. */
15939 /* This value represents a Wake-on-LAN type. */
15941 #define HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_MAGICPKT UINT32_C(0x0)
15943 #define HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_BMP UINT32_C(0x1)
15945 #define HWRM_WOL_FILTER_ALLOC_INPUT_WOL_TYPE_INVALID UINT32_C(0xff)
15948 uint8_t mac_address[6];
15950 * # If this field is enabled and magic packet WoL filter type is
15951 * specified in this command, the value set in this field shall be used
15952 * in setting the magic packet based WoL filter. # If this field is not
15953 * enabled and magic packet WoL filter type is specified and port id is
15954 * specified to 0xFF in this command, then the HWRM shall use default
15955 * MAC address configured on the function associated with the HWRM
15956 * client. # If this field is not enabled and magic packet WoL filter
15957 * type is specified and port id is not specified to 0xFF in this
15958 * command, then the HWRM shall use default MAC address configured on
15961 uint16_t pattern_offset;
15963 * The offset from the beginning of MAC header where pattern should be
15964 * matched. Applies to bitmap WoL.
15966 uint16_t pattern_buf_size;
15967 /* The size of the pattern that is being matched. Applies to bitmap WoL. */
15968 uint16_t pattern_mask_size;
15969 /* The size of the pattern mask. Applies to bitmap WoL. */
15971 uint64_t pattern_buf_addr;
15972 /* Physical address of the pattern buffer. Applies to bitmap WoL. */
15973 uint64_t pattern_mask_addr;
15974 /* Physical address of the pattern mask. Applies to bitmap WoL. */
15975 } __attribute__((packed));
15977 /* Output (16 bytes) */
15979 struct hwrm_wol_filter_alloc_output {
15980 uint16_t error_code;
15982 * Pass/Fail or error type Note: receiver to verify the in parameters,
15983 * and fail the call with an error when appropriate
15986 /* This field returns the type of original request. */
15988 /* This field provides original sequence number of the command. */
15991 * This field is the length of the response in bytes. The last byte of
15992 * the response is a valid flag that will read as '1' when the command
15993 * has been completely written to memory.
15995 uint8_t wol_filter_id;
15996 /* This value identifies a Wake-on-LAN (WoL) filter. */
16004 * This field is used in Output records to indicate that the output is
16005 * completely written to RAM. This field should be read as '1' to
16006 * indicate that the output has been completely written. When writing a
16007 * command completion or response to an internal processor, the order of
16008 * writes has to be such that this field is written last.
16010 } __attribute__((packed));
16012 /* hwrm_wol_filter_free */
16014 * Description: Free a WoL filter. # Among all function drivers, the HWRM shall
16015 * only allow PF drivers to free WoL filters. # The HWRM shall not allow VF
16016 * drivers to free any WoL filters. # The HWRM shall not allow a function driver
16017 * to free an Out-Of-Box WoL filter. # The HWRM shall not allow a function
16018 * driver to free a WoL filter on a port that the corresponding function is not
16019 * associated with. # The HWRM shall not allow a function driver to free a WoL
16020 * filter on a function that the function driver is not associated with.
16022 /* Input (32 bytes) */
16024 struct hwrm_wol_filter_free_input {
16027 * This value indicates what type of request this is. The format for the
16028 * rest of the command is determined by this field.
16030 uint16_t cmpl_ring;
16032 * This value indicates the what completion ring the request will be
16033 * optionally completed on. If the value is -1, then no CR completion
16034 * will be generated. Any other value must be a valid CR ring_id value
16035 * for this function.
16038 /* This value indicates the command sequence number. */
16039 uint16_t target_id;
16041 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16042 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16044 uint64_t resp_addr;
16046 * This is the host address where the response will be written when the
16047 * request is complete. This area must be 16B aligned and must be
16048 * cleared to zero before the request is made.
16052 * # When this bit is set to '1', then all active WoL filters on the
16053 * port are requested to be freed. # If the a function driver sets this
16054 * flag to '1', then the HWRM shall free all active WoL filters that are
16055 * not set by other function drivers on that port.
16057 #define HWRM_WOL_FILTER_FREE_INPUT_FLAGS_FREE_ALL_WOL_FILTERS UINT32_C(0x1)
16059 /* This bit must be '1' for the wol_filter_id field to be configured. */
16060 #define HWRM_WOL_FILTER_FREE_INPUT_ENABLES_WOL_FILTER_ID UINT32_C(0x1)
16062 /* Port ID of the port on which WoL filter(s) is (are) being freed. */
16063 uint8_t wol_filter_id;
16064 /* The HWRM shall ignore this field if free_all_wol_filters flag is set. */
16065 uint8_t unused_0[5];
16066 } __attribute__((packed));
16068 /* Output (16 bytes) */
16070 struct hwrm_wol_filter_free_output {
16071 uint16_t error_code;
16073 * Pass/Fail or error type Note: receiver to verify the in parameters,
16074 * and fail the call with an error when appropriate
16077 /* This field returns the type of original request. */
16079 /* This field provides original sequence number of the command. */
16082 * This field is the length of the response in bytes. The last byte of
16083 * the response is a valid flag that will read as '1' when the command
16084 * has been completely written to memory.
16092 * This field is used in Output records to indicate that the output is
16093 * completely written to RAM. This field should be read as '1' to
16094 * indicate that the output has been completely written. When writing a
16095 * command completion or response to an internal processor, the order of
16096 * writes has to be such that this field is written last.
16098 } __attribute__((packed));
16100 /* hwrm_wol_filter_qcfg */
16102 * Description: Query WoL filter configuration. # Among all function drivers,
16103 * the HWRM shall only allow PF drivers to query WoL filters. # The HWRM shall
16104 * not allow VF drivers to query any WoL filters. # The HWRM shall return WoL
16105 * filters that are active on the associated port for which this query is being
16106 * performed. # If the HWRM client is a function driver, then the HWRM shall not
16107 * allow the HWRM client to query WoL filters that are set up by other function
16108 * drivers. # If the HWRM client is a function driver, then the HWRM shall not
16109 * allow the HWRM client to query WoL filters on the port that the function is
16110 * not associated with. # If the HWRM client is one of the trusted embedded
16111 * service (e.g. management service), the the HWRM shall allow the HWRM client
16112 * to query WoL filters on any port of the device.
16114 /* Input (56 bytes) */
16116 struct hwrm_wol_filter_qcfg_input {
16119 * This value indicates what type of request this is. The format for the
16120 * rest of the command is determined by this field.
16122 uint16_t cmpl_ring;
16124 * This value indicates the what completion ring the request will be
16125 * optionally completed on. If the value is -1, then no CR completion
16126 * will be generated. Any other value must be a valid CR ring_id value
16127 * for this function.
16130 /* This value indicates the command sequence number. */
16131 uint16_t target_id;
16133 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16134 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16136 uint64_t resp_addr;
16138 * This is the host address where the response will be written when the
16139 * request is complete. This area must be 16B aligned and must be
16140 * cleared to zero before the request is made.
16143 /* Port ID of port on which WoL filter that is being queried. */
16146 * This is an opaque handle used to access filters. # The HWRM client
16147 * shall set this field to 0x0000 to begin the query. # After the first
16148 * query, the HWRM client shall retrieve next filters (if they exist)
16149 * using the HWRM provided handle in the response.
16152 uint64_t pattern_buf_addr;
16154 * Physical address of the pattern buffer. Applies to bitmap WoL filter
16155 * only. # Value of 0 indicates an invalid buffer address. If this field
16156 * is set to 0, then HWRM shall ignore pattern_buf_size. # If the HWRM
16157 * client provides an invalid buffer address for the pattern, then the
16158 * HWRM is not required to provide pattern when the response contains a
16159 * bitmap WoL filter.
16161 uint64_t pattern_buf_size;
16162 /* The sixe of the pattern buffer. Applies to bitmap WoL filter only. */
16163 uint64_t pattern_mask_addr;
16165 * Physical address of the pattern mask. Applies to bitmap WoL filter
16166 * only. # Value of 0 indicates an invalid pattern mask address. If this
16167 * field is set to 0, then HWRM shall ignore pattern_mask_size. # If the
16168 * HWRM client provides an invalid mask address for the pattern, then
16169 * the HWRM is not required to provide mask when the response contains a
16170 * bitmap WoL filter.
16172 uint64_t pattern_mask_size;
16174 * The size of the buffer for pattern mask. Applies to bitmap WoL filter
16177 } __attribute__((packed));
16179 /* Output (32 bytes) */
16181 struct hwrm_wol_filter_qcfg_output {
16182 uint16_t error_code;
16184 * Pass/Fail or error type Note: receiver to verify the in parameters,
16185 * and fail the call with an error when appropriate
16188 /* This field returns the type of original request. */
16190 /* This field provides original sequence number of the command. */
16193 * This field is the length of the response in bytes. The last byte of
16194 * the response is a valid flag that will read as '1' when the command
16195 * has been completely written to memory.
16197 uint16_t next_handle;
16199 * This is the next handle that is used to access filters. # If this
16200 * field is set to 0x0000, then no WoL filters are currently configured
16201 * on this port and all other fields in the output shall be ignored by
16202 * the HWRM client. # If this field is set to neither 0x0000 nor 0xFFFF,
16203 * then the wol_filter_id is valid and the parameters provided in the
16204 * response are based on the wol_type. # If this field is set to 0xFFFF,
16205 * then there are no remaining configured WoL filters to be queried for
16206 * the queried function after this response, wol_filter_id is valid and
16207 * the parameters provided in the response are based on the wol_type.
16209 uint8_t wol_filter_id;
16210 /* This value identifies the filter returned in this response. */
16213 * This value identifies the type of WoL filter returned in this
16217 #define HWRM_WOL_FILTER_QCFG_OUTPUT_WOL_TYPE_MAGICPKT UINT32_C(0x0)
16219 #define HWRM_WOL_FILTER_QCFG_OUTPUT_WOL_TYPE_BMP UINT32_C(0x1)
16221 #define HWRM_WOL_FILTER_QCFG_OUTPUT_WOL_TYPE_INVALID UINT32_C(0xff)
16223 uint8_t mac_address[6];
16225 * The MAC address value used by the WoL filter. Applies to magic packet
16228 uint16_t pattern_offset;
16230 * The offset from the beginning of MAC header where pattern should be
16231 * matched. Applies to bitmap WoL.
16233 uint16_t pattern_size;
16235 * The actual size of the pattern that is being returned. Applies to
16238 uint16_t pattern_mask_size;
16240 * The actual size of the pattern mask that is being returned. Applies
16248 * This field is used in Output records to indicate that the output is
16249 * completely written to RAM. This field should be read as '1' to
16250 * indicate that the output has been completely written. When writing a
16251 * command completion or response to an internal processor, the order of
16252 * writes has to be such that this field is written last.
16254 } __attribute__((packed));
16256 /* hwrm_wol_reason_qcfg */
16257 /* Description: Query WoL reason for the last system wake up. */
16258 /* Input (40 bytes) */
16260 struct hwrm_wol_reason_qcfg_input {
16263 * This value indicates what type of request this is. The format for the
16264 * rest of the command is determined by this field.
16266 uint16_t cmpl_ring;
16268 * This value indicates the what completion ring the request will be
16269 * optionally completed on. If the value is -1, then no CR completion
16270 * will be generated. Any other value must be a valid CR ring_id value
16271 * for this function.
16274 /* This value indicates the command sequence number. */
16275 uint16_t target_id;
16277 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16278 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16280 uint64_t resp_addr;
16282 * This is the host address where the response will be written when the
16283 * request is complete. This area must be 16B aligned and must be
16284 * cleared to zero before the request is made.
16287 /* Port ID of port for which this query is for. */
16290 uint8_t unused_2[3];
16292 uint64_t wol_pkt_buf_addr;
16293 /* Physical address of the packet buffer for querying WoL packet. */
16294 uint64_t wol_pkt_buf_size;
16295 /* The size of the buffer for the WoL packet. */
16296 } __attribute__((packed));
16298 /* Output (16 bytes) */
16300 struct hwrm_wol_reason_qcfg_output {
16301 uint16_t error_code;
16303 * Pass/Fail or error type Note: receiver to verify the in parameters,
16304 * and fail the call with an error when appropriate
16307 /* This field returns the type of original request. */
16309 /* This field provides original sequence number of the command. */
16312 * This field is the length of the response in bytes. The last byte of
16313 * the response is a valid flag that will read as '1' when the command
16314 * has been completely written to memory.
16316 uint8_t wol_filter_id;
16318 * This value identifies the filter that matched the last WoL packet.
16319 * This id is only valid with valid WoL reason.
16321 uint8_t wol_reason;
16323 * This value identifies the type of WoL reason returned in this
16324 * response. When the wol_type is set to invalid, then there is no WoL
16325 * event that happened during last system wake-up.
16328 #define HWRM_WOL_REASON_QCFG_OUTPUT_WOL_REASON_MAGICPKT UINT32_C(0x0)
16330 #define HWRM_WOL_REASON_QCFG_OUTPUT_WOL_REASON_BMP UINT32_C(0x1)
16332 #define HWRM_WOL_REASON_QCFG_OUTPUT_WOL_REASON_INVALID UINT32_C(0xff)
16340 * This field is used in Output records to indicate that the output is
16341 * completely written to RAM. This field should be read as '1' to
16342 * indicate that the output has been completely written. When writing a
16343 * command completion or response to an internal processor, the order of
16344 * writes has to be such that this field is written last.
16346 } __attribute__((packed));
16348 /* hwrm_dbg_dump */
16350 * Description: This command is used by to initiate the dump of debug
16351 * information to a driver specified address.
16353 /* Input (40 bytes) */
16355 struct hwrm_dbg_dump_input {
16358 * This value indicates what type of request this is. The format for the
16359 * rest of the command is determined by this field.
16361 uint16_t cmpl_ring;
16363 * This value indicates the what completion ring the request will be
16364 * optionally completed on. If the value is -1, then no CR completion
16365 * will be generated. Any other value must be a valid CR ring_id value
16366 * for this function.
16369 /* This value indicates the command sequence number. */
16370 uint16_t target_id;
16372 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16373 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16375 uint64_t resp_addr;
16377 * This is the host address where the response will be written when the
16378 * request is complete. This area must be 16B aligned and must be
16379 * cleared to zero before the request is made.
16383 * Handle used to dump debug data. handle = 0 indicates the beginning of
16384 * the dump. handle != 0 indicates the request to dump the next part.
16387 uint64_t host_dbg_dump_addr;
16389 * Address of the host buffer where the debug data is requested to be
16392 uint64_t host_dbg_dump_addr_len;
16393 /* Length of host buffer used for transferring debug data. */
16394 } __attribute__((packed));
16396 /* Output (24 bytes) */
16398 struct hwrm_dbg_dump_output {
16399 uint16_t error_code;
16401 * Pass/Fail or error type Note: receiver to verify the in parameters,
16402 * and fail the call with an error when appropriate
16405 /* This field returns the type of original request. */
16407 /* This field provides original sequence number of the command. */
16410 * This field is the length of the response in bytes. The last byte of
16411 * the response is a valid flag that will read as '1' when the command
16412 * has been completely written to memory.
16414 uint32_t nexthandle;
16416 * Handle used to indicate availability of additional debug data.
16417 * nexthandle = 0 indicates that there is no more debug data available.
16418 * nexthandle != 0 indicates the handle value that should be used to
16419 * request the next part of debug data.
16421 uint32_t dbg_data_len;
16422 /* The number of bytes of debug data written to debug dump buffer. */
16429 * This field is used in Output records to indicate that the output is
16430 * completely written to RAM. This field should be read as '1' to
16431 * indicate that the output has been completely written. When writing a
16432 * command completion or response to an internal processor, the order of
16433 * writes has to be such that this field is written last.
16435 } __attribute__((packed));
16437 /* hwrm_nvm_raw_write_blk */
16439 * Note: Write an unmanaged block of data at any physical offset within the
16440 * NVRAM. Used for initial provisioning/manufacturing purposes only. Implemented
16441 * in the ChiMP boot-strap firmware (fwutil.bin) only.
16443 /* Input (32 bytes) */
16445 struct hwrm_nvm_raw_write_blk_input {
16448 * This value indicates what type of request this is. The format for the
16449 * rest of the command is determined by this field.
16451 uint16_t cmpl_ring;
16453 * This value indicates the what completion ring the request will be
16454 * optionally completed on. If the value is -1, then no CR completion
16455 * will be generated. Any other value must be a valid CR ring_id value
16456 * for this function.
16459 /* This value indicates the command sequence number. */
16460 uint16_t target_id;
16462 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16463 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16465 uint64_t resp_addr;
16467 * This is the host address where the response will be written when the
16468 * request is complete. This area must be 16B aligned and must be
16469 * cleared to zero before the request is made.
16471 uint64_t host_src_addr;
16473 * 64-bit Host Source Address. This is the loation of the source data to
16476 uint32_t dest_addr;
16478 * 32-bit Destination Address. This is the NVRAM byte-offset where the
16479 * source data will be written to.
16482 /* Length of data to be written, in bytes. */
16483 } __attribute__((packed));
16485 /* Output (16 bytes) */
16487 struct hwrm_nvm_raw_write_blk_output {
16488 uint16_t error_code;
16490 * Pass/Fail or error type Note: receiver to verify the in parameters,
16491 * and fail the call with an error when appropriate
16494 /* This field returns the type of original request. */
16496 /* This field provides original sequence number of the command. */
16499 * This field is the length of the response in bytes. The last byte of
16500 * the response is a valid flag that will read as '1' when the command
16501 * has been completely written to memory.
16509 * This field is used in Output records to indicate that the output is
16510 * completely written to RAM. This field should be read as '1' to
16511 * indicate that the output has been completely written. When writing a
16512 * command completion or response to an internal processor, the order of
16513 * writes has to be such that this field is written last.
16515 } __attribute__((packed));
16517 /* hwrm_nvm_read */
16519 * Note: Read the contents of an NVRAM item as referenced (indexed) by an
16520 * existing directory entry.
16522 /* Input (40 bytes) */
16524 struct hwrm_nvm_read_input {
16527 * This value indicates what type of request this is. The format for the
16528 * rest of the command is determined by this field.
16530 uint16_t cmpl_ring;
16532 * This value indicates the what completion ring the request will be
16533 * optionally completed on. If the value is -1, then no CR completion
16534 * will be generated. Any other value must be a valid CR ring_id value
16535 * for this function.
16538 /* This value indicates the command sequence number. */
16539 uint16_t target_id;
16541 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16542 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16544 uint64_t resp_addr;
16546 * This is the host address where the response will be written when the
16547 * request is complete. This area must be 16B aligned and must be
16548 * cleared to zero before the request is made.
16550 uint64_t host_dest_addr;
16552 * 64-bit Host Destination Address. This is the host address where the
16553 * data will be written to.
16556 /* The 0-based index of the directory entry. */
16560 /* The NVRAM byte-offset to read from. */
16562 /* The length of the data to be read, in bytes. */
16564 } __attribute__((packed));
16566 /* Output (16 bytes) */
16568 struct hwrm_nvm_read_output {
16569 uint16_t error_code;
16571 * Pass/Fail or error type Note: receiver to verify the in parameters,
16572 * and fail the call with an error when appropriate
16575 /* This field returns the type of original request. */
16577 /* This field provides original sequence number of the command. */
16580 * This field is the length of the response in bytes. The last byte of
16581 * the response is a valid flag that will read as '1' when the command
16582 * has been completely written to memory.
16590 * This field is used in Output records to indicate that the output is
16591 * completely written to RAM. This field should be read as '1' to
16592 * indicate that the output has been completely written. When writing a
16593 * command completion or response to an internal processor, the order of
16594 * writes has to be such that this field is written last.
16596 } __attribute__((packed));
16598 /* hwrm_nvm_raw_dump */
16599 /* Note: Dump a raw block of data from NVRAM. */
16600 /* Input (32 bytes) */
16602 struct hwrm_nvm_raw_dump_input {
16605 * This value indicates what type of request this is. The format for the
16606 * rest of the command is determined by this field.
16608 uint16_t cmpl_ring;
16610 * This value indicates the what completion ring the request will be
16611 * optionally completed on. If the value is -1, then no CR completion
16612 * will be generated. Any other value must be a valid CR ring_id value
16613 * for this function.
16616 /* This value indicates the command sequence number. */
16617 uint16_t target_id;
16619 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16620 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16622 uint64_t resp_addr;
16624 * This is the host address where the response will be written when the
16625 * request is complete. This area must be 16B aligned and must be
16626 * cleared to zero before the request is made.
16628 uint64_t host_dest_addr;
16630 * 64-bit Host Destination Address. This is the host address where the
16631 * data will be written to.
16634 /* 32-bit NVRAM byte-offset to read from. */
16636 /* Total length of NVRAM contents to be read, in bytes. */
16637 } __attribute__((packed));
16639 /* Output (16 bytes) */
16641 struct hwrm_nvm_raw_dump_output {
16642 uint16_t error_code;
16644 * Pass/Fail or error type Note: receiver to verify the in parameters,
16645 * and fail the call with an error when appropriate
16648 /* This field returns the type of original request. */
16650 /* This field provides original sequence number of the command. */
16653 * This field is the length of the response in bytes. The last byte of
16654 * the response is a valid flag that will read as '1' when the command
16655 * has been completely written to memory.
16663 * This field is used in Output records to indicate that the output is
16664 * completely written to RAM. This field should be read as '1' to
16665 * indicate that the output has been completely written. When writing a
16666 * command completion or response to an internal processor, the order of
16667 * writes has to be such that this field is written last.
16669 } __attribute__((packed));
16671 /* hwrm_nvm_get_dir_entries */
16673 * Description: Read the NVRAM directory. Each directory entry is at least 24
16674 * bytes in length and contains the: - 16-bit directory entry type
16675 * (BNX_DIR_TYPE_* value) - 16-bit ordinal (instance of this directory entry
16676 * type) - 16-bit extension flags (identifies inactive entries and entries for
16677 * firmware update) - 16-bit attribute flags (identifies entries with a
16678 * purposely invalid chksum value) - 32-bit byte-offset into NVRAM where this
16679 * item data is located - 32-bit length of allocated NVRAM for item, in bytes
16680 * (multiple of block size) - 32-bit length of data (excluding padding), in
16681 * bytes (may be 0) - 32-bit data checksum (CRC-32) See the
16682 * bnxnvm_directory_entry_t definition in the file bnxnvm_defs.h.
16684 /* Input (24 bytes) */
16686 struct hwrm_nvm_get_dir_entries_input {
16689 * This value indicates what type of request this is. The format for the
16690 * rest of the command is determined by this field.
16692 uint16_t cmpl_ring;
16694 * This value indicates the what completion ring the request will be
16695 * optionally completed on. If the value is -1, then no CR completion
16696 * will be generated. Any other value must be a valid CR ring_id value
16697 * for this function.
16700 /* This value indicates the command sequence number. */
16701 uint16_t target_id;
16703 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16704 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16706 uint64_t resp_addr;
16708 * This is the host address where the response will be written when the
16709 * request is complete. This area must be 16B aligned and must be
16710 * cleared to zero before the request is made.
16712 uint64_t host_dest_addr;
16714 * 64-bit Host Destination Address. This is the host address where the
16715 * directory will be written.
16717 } __attribute__((packed));
16719 /* Output (16 bytes) */
16721 struct hwrm_nvm_get_dir_entries_output {
16722 uint16_t error_code;
16724 * Pass/Fail or error type Note: receiver to verify the in parameters,
16725 * and fail the call with an error when appropriate
16728 /* This field returns the type of original request. */
16730 /* This field provides original sequence number of the command. */
16733 * This field is the length of the response in bytes. The last byte of
16734 * the response is a valid flag that will read as '1' when the command
16735 * has been completely written to memory.
16743 * This field is used in Output records to indicate that the output is
16744 * completely written to RAM. This field should be read as '1' to
16745 * indicate that the output has been completely written. When writing a
16746 * command completion or response to an internal processor, the order of
16747 * writes has to be such that this field is written last.
16749 } __attribute__((packed));
16751 /* hwrm_nvm_get_dir_info */
16752 /* Note: Get Directory Header info. */
16753 /* Input (16 bytes) */
16755 struct hwrm_nvm_get_dir_info_input {
16758 * This value indicates what type of request this is. The format for the
16759 * rest of the command is determined by this field.
16761 uint16_t cmpl_ring;
16763 * This value indicates the what completion ring the request will be
16764 * optionally completed on. If the value is -1, then no CR completion
16765 * will be generated. Any other value must be a valid CR ring_id value
16766 * for this function.
16769 /* This value indicates the command sequence number. */
16770 uint16_t target_id;
16772 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16773 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16775 uint64_t resp_addr;
16777 * This is the host address where the response will be written when the
16778 * request is complete. This area must be 16B aligned and must be
16779 * cleared to zero before the request is made.
16781 } __attribute__((packed));
16783 /* Output (24 bytes) */
16785 struct hwrm_nvm_get_dir_info_output {
16786 uint16_t error_code;
16788 * Pass/Fail or error type Note: receiver to verify the in parameters,
16789 * and fail the call with an error when appropriate
16792 /* This field returns the type of original request. */
16794 /* This field provides original sequence number of the command. */
16797 * This field is the length of the response in bytes. The last byte of
16798 * the response is a valid flag that will read as '1' when the command
16799 * has been completely written to memory.
16802 /* Number of directory entries in the directory. */
16803 uint32_t entry_length;
16804 /* Size of each directory entry, in bytes. */
16811 * This field is used in Output records to indicate that the output is
16812 * completely written to RAM. This field should be read as '1' to
16813 * indicate that the output has been completely written. When writing a
16814 * command completion or response to an internal processor, the order of
16815 * writes has to be such that this field is written last.
16817 } __attribute__((packed));
16819 /* hwrm_nvm_write */
16821 * Note: Write to the allocated NVRAM of an item referenced by an existing
16824 /* Input (48 bytes) */
16826 struct hwrm_nvm_write_input {
16829 * This value indicates what type of request this is. The format for the
16830 * rest of the command is determined by this field.
16832 uint16_t cmpl_ring;
16834 * This value indicates the what completion ring the request will be
16835 * optionally completed on. If the value is -1, then no CR completion
16836 * will be generated. Any other value must be a valid CR ring_id value
16837 * for this function.
16840 /* This value indicates the command sequence number. */
16841 uint16_t target_id;
16843 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16844 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16846 uint64_t resp_addr;
16848 * This is the host address where the response will be written when the
16849 * request is complete. This area must be 16B aligned and must be
16850 * cleared to zero before the request is made.
16852 uint64_t host_src_addr;
16853 /* 64-bit Host Source Address. This is where the source data is. */
16856 * The Directory Entry Type (valid values are defined in the
16857 * bnxnvm_directory_type enum defined in the file bnxnvm_defs.h).
16859 uint16_t dir_ordinal;
16861 * Directory ordinal. The 0-based instance of the combined Directory
16862 * Entry Type and Extension.
16866 * The Directory Entry Extension flags (see BNX_DIR_EXT_* in the file
16871 * Directory Entry Attribute flags (see BNX_DIR_ATTR_* in the file
16874 uint32_t dir_data_length;
16876 * Length of data to write, in bytes. May be less than or equal to the
16877 * allocated size for the directory entry. The data length stored in the
16878 * directory entry will be updated to reflect this value once the write
16885 * When this bit is '1', the original active image will not be removed.
16886 * TBD: what purpose is this?
16888 #define HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG UINT32_C(0x1)
16889 uint32_t dir_item_length;
16891 * The requested length of the allocated NVM for the item, in bytes.
16892 * This value may be greater than or equal to the specified data length
16893 * (dir_data_length). If this value is less than the specified data
16894 * length, it will be ignored. The response will contain the actual
16895 * allocated item length, which may be greater than the requested item
16896 * length. The purpose for allocating more than the required number of
16897 * bytes for an item's data is to pre-allocate extra storage (padding)
16898 * to accommodate the potential future growth of an item (e.g. upgraded
16899 * firmware with a size increase, log growth, expanded configuration
16903 } __attribute__((packed));
16905 /* Output (16 bytes) */
16907 struct hwrm_nvm_write_output {
16908 uint16_t error_code;
16910 * Pass/Fail or error type Note: receiver to verify the in parameters,
16911 * and fail the call with an error when appropriate
16914 /* This field returns the type of original request. */
16916 /* This field provides original sequence number of the command. */
16919 * This field is the length of the response in bytes. The last byte of
16920 * the response is a valid flag that will read as '1' when the command
16921 * has been completely written to memory.
16923 uint32_t dir_item_length;
16925 * Length of the allocated NVM for the item, in bytes. The value may be
16926 * greater than or equal to the specified data length or the requested
16927 * item length. The actual item length used when creating a new
16928 * directory entry will be a multiple of an NVM block size.
16931 /* The directory index of the created or modified item. */
16935 * This field is used in Output records to indicate that the output is
16936 * completely written to RAM. This field should be read as '1' to
16937 * indicate that the output has been completely written. When writing a
16938 * command completion or response to an internal processor, the order of
16939 * writes has to be such that this field is written last.
16941 } __attribute__((packed));
16943 /* hwrm_nvm_modify */
16945 * Note: Modify the contents of an NVRAM item as referenced (indexed) by an
16946 * existing directory entry.
16948 /* Input (40 bytes) */
16950 struct hwrm_nvm_modify_input {
16953 * This value indicates what type of request this is. The format for the
16954 * rest of the command is determined by this field.
16956 uint16_t cmpl_ring;
16958 * This value indicates the what completion ring the request will be
16959 * optionally completed on. If the value is -1, then no CR completion
16960 * will be generated. Any other value must be a valid CR ring_id value
16961 * for this function.
16964 /* This value indicates the command sequence number. */
16965 uint16_t target_id;
16967 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
16968 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
16970 uint64_t resp_addr;
16972 * This is the host address where the response will be written when the
16973 * request is complete. This area must be 16B aligned and must be
16974 * cleared to zero before the request is made.
16976 uint64_t host_src_addr;
16977 /* 64-bit Host Source Address. This is where the modified data is. */
16979 /* 16-bit directory entry index. */
16983 /* 32-bit NVRAM byte-offset to modify content from. */
16986 * Length of data to be modified, in bytes. The length shall be non-
16990 } __attribute__((packed));
16992 /* Output (16 bytes) */
16994 struct hwrm_nvm_modify_output {
16995 uint16_t error_code;
16997 * Pass/Fail or error type Note: receiver to verify the in parameters,
16998 * and fail the call with an error when appropriate
17001 /* This field returns the type of original request. */
17003 /* This field provides original sequence number of the command. */
17006 * This field is the length of the response in bytes. The last byte of
17007 * the response is a valid flag that will read as '1' when the command
17008 * has been completely written to memory.
17016 * This field is used in Output records to indicate that the output is
17017 * completely written to RAM. This field should be read as '1' to
17018 * indicate that the output has been completely written. When writing a
17019 * command completion or response to an internal processor, the order of
17020 * writes has to be such that this field is written last.
17022 } __attribute__((packed));
17024 /* hwrm_nvm_find_dir_entry */
17026 * Note: Search a directory entry in the directory by either directory entry
17027 * index or directory entry parameters.
17029 /* Input (32 bytes) */
17031 struct hwrm_nvm_find_dir_entry_input {
17034 * This value indicates what type of request this is. The format for the
17035 * rest of the command is determined by this field.
17037 uint16_t cmpl_ring;
17039 * This value indicates the what completion ring the request will be
17040 * optionally completed on. If the value is -1, then no CR completion
17041 * will be generated. Any other value must be a valid CR ring_id value
17042 * for this function.
17045 /* This value indicates the command sequence number. */
17046 uint16_t target_id;
17048 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
17049 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
17051 uint64_t resp_addr;
17053 * This is the host address where the response will be written when the
17054 * request is complete. This area must be 16B aligned and must be
17055 * cleared to zero before the request is made.
17058 /* This bit must be '1' for the dir_idx_valid field to be configured. */
17059 #define HWRM_NVM_FIND_DIR_ENTRY_INPUT_ENABLES_DIR_IDX_VALID UINT32_C(0x1)
17061 /* Directory Entry Index */
17063 /* Directory Entry (Image) Type */
17064 uint16_t dir_ordinal;
17065 /* Directory ordinal. The instance of this Directory Type */
17067 /* The Directory Entry Extension flags. */
17068 uint8_t opt_ordinal;
17069 /* This value indicates the search option using dir_ordinal. */
17070 #define HWRM_NVM_FIND_DIR_ENTRY_INPUT_OPT_ORDINAL_MASK UINT32_C(0x3)
17071 #define HWRM_NVM_FIND_DIR_ENTRY_INPUT_OPT_ORDINAL_SFT 0
17072 /* Equal to specified ordinal value. */
17073 #define HWRM_NVM_FIND_DIR_ENTRY_INPUT_OPT_ORDINAL_EQ UINT32_C(0x0)
17074 /* Greater than or equal to specified ordinal value */
17075 #define HWRM_NVM_FIND_DIR_ENTRY_INPUT_OPT_ORDINAL_GE UINT32_C(0x1)
17076 /* Greater than specified ordinal value */
17077 #define HWRM_NVM_FIND_DIR_ENTRY_INPUT_OPT_ORDINAL_GT UINT32_C(0x2)
17078 uint8_t unused_1[3];
17079 } __attribute__((packed));
17081 /* Output (32 bytes) */
17083 struct hwrm_nvm_find_dir_entry_output {
17084 uint16_t error_code;
17086 * Pass/Fail or error type Note: receiver to verify the in parameters,
17087 * and fail the call with an error when appropriate
17090 /* This field returns the type of original request. */
17092 /* This field provides original sequence number of the command. */
17095 * This field is the length of the response in bytes. The last byte of
17096 * the response is a valid flag that will read as '1' when the command
17097 * has been completely written to memory.
17099 uint32_t dir_item_length;
17100 /* Allocated NVRAM for this directory entry, in bytes. */
17101 uint32_t dir_data_length;
17102 /* Size of the stored data for this directory entry, in bytes. */
17105 * Firmware version. Only valid if the directory entry is for embedded
17106 * firmware stored in APE_BIN Format.
17108 uint16_t dir_ordinal;
17109 /* Directory ordinal. */
17111 /* Directory Entry Index */
17118 * This field is used in Output records to indicate that the output is
17119 * completely written to RAM. This field should be read as '1' to
17120 * indicate that the output has been completely written. When writing a
17121 * command completion or response to an internal processor, the order of
17122 * writes has to be such that this field is written last.
17124 } __attribute__((packed));
17126 /* hwrm_nvm_erase_dir_entry */
17128 * Note: Remove a directory entry specified by the directory entry index from
17131 /* Input (24 bytes) */
17133 struct hwrm_nvm_erase_dir_entry_input {
17136 * This value indicates what type of request this is. The format for the
17137 * rest of the command is determined by this field.
17139 uint16_t cmpl_ring;
17141 * This value indicates the what completion ring the request will be
17142 * optionally completed on. If the value is -1, then no CR completion
17143 * will be generated. Any other value must be a valid CR ring_id value
17144 * for this function.
17147 /* This value indicates the command sequence number. */
17148 uint16_t target_id;
17150 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
17151 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
17153 uint64_t resp_addr;
17155 * This is the host address where the response will be written when the
17156 * request is complete. This area must be 16B aligned and must be
17157 * cleared to zero before the request is made.
17160 /* Directory Entry Index */
17161 uint16_t unused_0[3];
17162 } __attribute__((packed));
17164 /* Output (16 bytes) */
17166 struct hwrm_nvm_erase_dir_entry_output {
17167 uint16_t error_code;
17169 * Pass/Fail or error type Note: receiver to verify the in parameters,
17170 * and fail the call with an error when appropriate
17173 /* This field returns the type of original request. */
17175 /* This field provides original sequence number of the command. */
17178 * This field is the length of the response in bytes. The last byte of
17179 * the response is a valid flag that will read as '1' when the command
17180 * has been completely written to memory.
17188 * This field is used in Output records to indicate that the output is
17189 * completely written to RAM. This field should be read as '1' to
17190 * indicate that the output has been completely written. When writing a
17191 * command completion or response to an internal processor, the order of
17192 * writes has to be such that this field is written last.
17194 } __attribute__((packed));
17196 /* hwrm_nvm_get_dev_info */
17198 * Note: Get device info. Return Manufacturer_ID, Device_ID, block_size,
17199 * nvram_size, reserved_size and available_size.
17201 /* Input (16 bytes) */
17203 struct hwrm_nvm_get_dev_info_input {
17206 * This value indicates what type of request this is. The format for the
17207 * rest of the command is determined by this field.
17209 uint16_t cmpl_ring;
17211 * This value indicates the what completion ring the request will be
17212 * optionally completed on. If the value is -1, then no CR completion
17213 * will be generated. Any other value must be a valid CR ring_id value
17214 * for this function.
17217 /* This value indicates the command sequence number. */
17218 uint16_t target_id;
17220 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
17221 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
17223 uint64_t resp_addr;
17225 * This is the host address where the response will be written when the
17226 * request is complete. This area must be 16B aligned and must be
17227 * cleared to zero before the request is made.
17229 } __attribute__((packed));
17231 /* Output (32 bytes) */
17233 struct hwrm_nvm_get_dev_info_output {
17234 uint16_t error_code;
17236 * Pass/Fail or error type Note: receiver to verify the in parameters,
17237 * and fail the call with an error when appropriate
17240 /* This field returns the type of original request. */
17242 /* This field provides original sequence number of the command. */
17245 * This field is the length of the response in bytes. The last byte of
17246 * the response is a valid flag that will read as '1' when the command
17247 * has been completely written to memory.
17249 uint16_t manufacturer_id;
17250 /* Manufacturer ID. */
17251 uint16_t device_id;
17253 uint32_t sector_size;
17254 /* Sector size of the NVRAM device. */
17255 uint32_t nvram_size;
17256 /* Total size, in bytes of the NVRAM device. */
17257 uint32_t reserved_size;
17258 uint32_t available_size;
17260 * Available size that can be used, in bytes. Available size is the
17261 * NVRAM size take away the used size and reserved size.
17268 * This field is used in Output records to indicate that the output is
17269 * completely written to RAM. This field should be read as '1' to
17270 * indicate that the output has been completely written. When writing a
17271 * command completion or response to an internal processor, the order of
17272 * writes has to be such that this field is written last.
17274 } __attribute__((packed));
17276 /* hwrm_nvm_mod_dir_entry */
17277 /* Note: Modify a directory entry parameters in the directory. */
17278 /* Input (32 bytes) */
17280 struct hwrm_nvm_mod_dir_entry_input {
17283 * This value indicates what type of request this is. The format for the
17284 * rest of the command is determined by this field.
17286 uint16_t cmpl_ring;
17288 * This value indicates the what completion ring the request will be
17289 * optionally completed on. If the value is -1, then no CR completion
17290 * will be generated. Any other value must be a valid CR ring_id value
17291 * for this function.
17294 /* This value indicates the command sequence number. */
17295 uint16_t target_id;
17297 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
17298 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
17300 uint64_t resp_addr;
17302 * This is the host address where the response will be written when the
17303 * request is complete. This area must be 16B aligned and must be
17304 * cleared to zero before the request is made.
17307 /* This bit must be '1' for the checksum field to be configured. */
17308 #define HWRM_NVM_MOD_DIR_ENTRY_INPUT_ENABLES_CHECKSUM UINT32_C(0x1)
17310 /* Directory Entry Index */
17311 uint16_t dir_ordinal;
17312 /* Directory ordinal. The (0-based) instance of this Directory Type. */
17315 * The Directory Entry Extension flags (see BNX_DIR_EXT_* for extension
17316 * flag definitions).
17320 * Directory Entry Attribute flags (see BNX_DIR_ATTR_* for attribute
17321 * flag definitions).
17325 * If valid, then this field updates the checksum value of the content
17326 * in the directory entry.
17328 } __attribute__((packed));
17330 /* Output (16 bytes) */
17332 struct hwrm_nvm_mod_dir_entry_output {
17333 uint16_t error_code;
17335 * Pass/Fail or error type Note: receiver to verify the in parameters,
17336 * and fail the call with an error when appropriate
17339 /* This field returns the type of original request. */
17341 /* This field provides original sequence number of the command. */
17344 * This field is the length of the response in bytes. The last byte of
17345 * the response is a valid flag that will read as '1' when the command
17346 * has been completely written to memory.
17354 * This field is used in Output records to indicate that the output is
17355 * completely written to RAM. This field should be read as '1' to
17356 * indicate that the output has been completely written. When writing a
17357 * command completion or response to an internal processor, the order of
17358 * writes has to be such that this field is written last.
17360 } __attribute__((packed));
17362 /* hwrm_nvm_verify_update */
17364 * Description: Verify updated content of a directory entry. Before this
17365 * verification, there should be two valid directory entries of the given
17366 * directory type (one with "UPDATE" directory extension flag and the current
17367 * one "ACTIVE"). Below are steps the HWRM performs for executing this command:
17368 * # The HWRM finds the directory entry with "UDPATE" extension flag based on
17369 * input parameters. The new directory entry should already have updated
17370 * contents. # The HWRM performs signature verification of the updated content.
17371 * # If the signature verification is successful, the two directory entries are
17372 * switched (the verified updated entry is made active and the current "ACTIVE"
17373 * entry is marked with "UPDATE" extension flag). Implementation notes: # The
17374 * HWRM shall allow this command to be requested against any dir_type value (and
17375 * not limit it to a subset). # In the case of an updated HWRM firmware, the new
17376 * firmware version shall not automatically take effect (i.e. be executed).
17378 /* Input (24 bytes) */
17380 struct hwrm_nvm_verify_update_input {
17383 * This value indicates what type of request this is. The format for the
17384 * rest of the command is determined by this field.
17386 uint16_t cmpl_ring;
17388 * This value indicates the what completion ring the request will be
17389 * optionally completed on. If the value is -1, then no CR completion
17390 * will be generated. Any other value must be a valid CR ring_id value
17391 * for this function.
17394 /* This value indicates the command sequence number. */
17395 uint16_t target_id;
17397 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
17398 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
17400 uint64_t resp_addr;
17402 * This is the host address where the response will be written when the
17403 * request is complete. This area must be 16B aligned and must be
17404 * cleared to zero before the request is made.
17407 /* Directory Entry Type, to be verified. */
17408 uint16_t dir_ordinal;
17409 /* Directory ordinal. The instance of the Directory Type to be verified. */
17412 * The Directory Entry Extension flags. The "UPDATE" extension flag must
17413 * be set in this value. A corresponding directory entry with the same
17414 * type and ordinal values but *without* the "UPDATE" extension flag
17415 * must also exist. The other flags of the extension must be identical
17416 * between the active and update entries.
17419 } __attribute__((packed));
17421 /* Output (16 bytes) */
17423 struct hwrm_nvm_verify_update_output {
17424 uint16_t error_code;
17426 * Pass/Fail or error type Note: receiver to verify the in parameters,
17427 * and fail the call with an error when appropriate
17430 /* This field returns the type of original request. */
17432 /* This field provides original sequence number of the command. */
17435 * This field is the length of the response in bytes. The last byte of
17436 * the response is a valid flag that will read as '1' when the command
17437 * has been completely written to memory.
17445 * This field is used in Output records to indicate that the output is
17446 * completely written to RAM. This field should be read as '1' to
17447 * indicate that the output has been completely written. When writing a
17448 * command completion or response to an internal processor, the order of
17449 * writes has to be such that this field is written last.
17451 } __attribute__((packed));
17453 /* hwrm_nvm_install_update */
17455 * Description: Install a staged NVM package. A package file must first be
17456 * staged into the "UPDATE" NVM item. This staging is accomplished using the
17457 * nvm_write and/or nvm_modify HWRM commands.
17459 /* Input (24 bytes) */
17461 struct hwrm_nvm_install_update_input {
17464 * This value indicates what type of request this is. The format for the
17465 * rest of the command is determined by this field.
17467 uint16_t cmpl_ring;
17469 * This value indicates the what completion ring the request will be
17470 * optionally completed on. If the value is -1, then no CR completion
17471 * will be generated. Any other value must be a valid CR ring_id value
17472 * for this function.
17475 /* This value indicates the command sequence number. */
17476 uint16_t target_id;
17478 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
17479 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
17481 uint64_t resp_addr;
17483 * This is the host address where the response will be written when the
17484 * request is complete. This area must be 16B aligned and must be
17485 * cleared to zero before the request is made.
17487 uint32_t install_type;
17489 * Installation type. If the value 3 through 0xffff is used, only
17490 * packaged items with that type value will be installed and conditional
17491 * installation directives for those packaged items will be over-ridden
17492 * (i.e. 'create' or 'replace' will be treated as 'install').
17495 * Perform a normal package installation. Conditional
17496 * installation directives (e.g. 'create' and 'replace') of
17497 * packaged items will be followed.
17499 #define HWRM_NVM_INSTALL_UPDATE_INPUT_INSTALL_TYPE_NORMAL UINT32_C(0x0)
17501 * Install all packaged items regardless of installation
17502 * directive (i.e. treat all packaged items as though they have
17503 * an installation directive of 'install').
17505 #define HWRM_NVM_INSTALL_UPDATE_INPUT_INSTALL_TYPE_ALL UINT32_C(0xffffffff)
17507 } __attribute__((packed));
17509 /* Output (24 bytes) */
17511 struct hwrm_nvm_install_update_output {
17512 uint16_t error_code;
17514 * Pass/Fail or error type Note: receiver to verify the in parameters,
17515 * and fail the call with an error when appropriate
17518 /* This field returns the type of original request. */
17520 /* This field provides original sequence number of the command. */
17523 * This field is the length of the response in bytes. The last byte of
17524 * the response is a valid flag that will read as '1' when the command
17525 * has been completely written to memory.
17527 uint64_t installed_items;
17529 * Bit-mask of successfully installed items. Bit-0 corresponding to the
17530 * first packaged item, Bit-1 for the second item, etc. A value of 0
17531 * indicates that no items were successfully installed.
17534 /* result is 8 b */
17535 /* There was no problem with the package installation. */
17536 #define HWRM_NVM_INSTALL_UPDATE_OUTPUT_RESULT_SUCCESS UINT32_C(0x0)
17537 uint8_t problem_item;
17538 /* problem_item is 8 b */
17539 /* There was no problem with any packaged items. */
17540 #define HWRM_NVM_INSTALL_UPDATE_OUTPUT_PROBLEM_ITEM_NONE UINT32_C(0x0)
17541 /* There was a problem with the NVM package itself. */
17542 #define HWRM_NVM_INSTALL_UPDATE_OUTPUT_PROBLEM_ITEM_PACKAGE UINT32_C(0xff)
17543 uint8_t reset_required;
17544 /* reset_required is 8 b */
17546 * No reset is required for installed/updated firmware or
17547 * microcode to take effect.
17549 #define HWRM_NVM_INSTALL_UPDATE_OUTPUT_RESET_REQUIRED_NONE UINT32_C(0x0)
17551 * A PCIe reset (e.g. system reboot) is required for newly
17552 * installed/updated firmware or microcode to take effect.
17554 #define HWRM_NVM_INSTALL_UPDATE_OUTPUT_RESET_REQUIRED_PCI UINT32_C(0x1)
17556 * A controller power reset (e.g. system power-cycle) is
17557 * required for newly installed/updated firmware or microcode to
17558 * take effect. Some newly installed/updated firmware or
17559 * microcode may still take effect upon the next PCIe reset.
17561 #define HWRM_NVM_INSTALL_UPDATE_OUTPUT_RESET_REQUIRED_POWER UINT32_C(0x2)
17568 * This field is used in Output records to indicate that the output is
17569 * completely written to RAM. This field should be read as '1' to
17570 * indicate that the output has been completely written. When writing a
17571 * command completion or response to an internal processor, the order of
17572 * writes has to be such that this field is written last.
17574 } __attribute__((packed));
17576 #endif /* _HSI_STRUCT_DEF_EXTERNAL_H_ */