sys/dev/bnxt/if_bnxt.c

   1 /*-
   2  * Broadcom NetXtreme-C/E network driver.
   3  *
   4  * Copyright (c) 2016 Broadcom, All Rights Reserved.
   5  * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
  20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  26  * THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/param.h>
  33 #include <sys/socket.h>
  34 #include <sys/kernel.h>
  35 #include <sys/bus.h>
  36 #include <sys/module.h>
  37 #include <sys/rman.h>
  38 #include <sys/endian.h>
  39 #include <sys/sockio.h>
  40 #include <sys/priv.h>
  41
  42 #include <machine/bus.h>
  43 #include <machine/resource.h>
  44
  45 #include <dev/pci/pcireg.h>
  46 #include <dev/pci/pcivar.h>
  47
  48 #include <net/if.h>
  49 #include <net/if_media.h>
  50 #include <net/if_var.h>
  51 #include <net/ethernet.h>
  52 #include <net/iflib.h>
  53
  54 #include "opt_inet.h"
  55 #include "opt_inet6.h"
  56 #include "opt_rss.h"
  57
  58 #include "ifdi_if.h"
  59
  60 #include "bnxt.h"
  61 #include "bnxt_hwrm.h"
  62 #include "bnxt_ioctl.h"
  63 #include "bnxt_sysctl.h"
  64 #include "hsi_struct_def.h"
  65
  66 /*
  67  * PCI Device ID Table
  68  */
  69
  70 static pci_vendor_info_t bnxt_vendor_info_array[] =
  71 {
  72     PVID(BROADCOM_VENDOR_ID, BCM57301,
  73         "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet Controller"),
  74     PVID(BROADCOM_VENDOR_ID, BCM57302,
  75         "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet Controller"),
  76     PVID(BROADCOM_VENDOR_ID, BCM57304,
  77         "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet Controller"),
  78     PVID(BROADCOM_VENDOR_ID, BCM57311,
  79         "Broadcom BCM57311 NetXtreme-C 10Gb Ethernet"),
  80     PVID(BROADCOM_VENDOR_ID, BCM57312,
  81         "Broadcom BCM57312 NetXtreme-C 10Gb/25Gb Ethernet"),
  82     PVID(BROADCOM_VENDOR_ID, BCM57314,
  83         "Broadcom BCM57314 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet"),
  84     PVID(BROADCOM_VENDOR_ID, BCM57402,
  85         "Broadcom BCM57402 NetXtreme-E 10Gb Ethernet Controller"),
  86     PVID(BROADCOM_VENDOR_ID, BCM57402_NPAR,
  87         "Broadcom BCM57402 NetXtreme-E Partition"),
  88     PVID(BROADCOM_VENDOR_ID, BCM57404,
  89         "Broadcom BCM57404 NetXtreme-E 10Gb/25Gb Ethernet Controller"),
  90     PVID(BROADCOM_VENDOR_ID, BCM57404_NPAR,
  91         "Broadcom BCM57404 NetXtreme-E Partition"),
  92     PVID(BROADCOM_VENDOR_ID, BCM57406,
  93         "Broadcom BCM57406 NetXtreme-E 10GBase-T Ethernet Controller"),
  94     PVID(BROADCOM_VENDOR_ID, BCM57406_NPAR,
  95         "Broadcom BCM57406 NetXtreme-E Partition"),
  96     PVID(BROADCOM_VENDOR_ID, BCM57407,
  97         "Broadcom BCM57407 NetXtreme-E 10GBase-T Ethernet Controller"),
  98     PVID(BROADCOM_VENDOR_ID, BCM57407_NPAR,
  99         "Broadcom BCM57407 NetXtreme-E Ethernet Partition"),
 100     PVID(BROADCOM_VENDOR_ID, BCM57407_SFP,
 101         "Broadcom BCM57407 NetXtreme-E 25Gb Ethernet Controller"),
 102     PVID(BROADCOM_VENDOR_ID, BCM57412,
 103         "Broadcom BCM57412 NetXtreme-E 10Gb Ethernet"),
 104     PVID(BROADCOM_VENDOR_ID, BCM57412_NPAR1,
 105         "Broadcom BCM57412 NetXtreme-E Ethernet Partition"),
 106     PVID(BROADCOM_VENDOR_ID, BCM57412_NPAR2,
 107         "Broadcom BCM57412 NetXtreme-E Ethernet Partition"),
 108     PVID(BROADCOM_VENDOR_ID, BCM57414,
 109         "Broadcom BCM57414 NetXtreme-E 10Gb/25Gb Ethernet"),
 110     PVID(BROADCOM_VENDOR_ID, BCM57414_NPAR1,
 111         "Broadcom BCM57414 NetXtreme-E Ethernet Partition"),
 112     PVID(BROADCOM_VENDOR_ID, BCM57414_NPAR2,
 113         "Broadcom BCM57414 NetXtreme-E Ethernet Partition"),
 114     PVID(BROADCOM_VENDOR_ID, BCM57416,
 115         "Broadcom BCM57416 NetXtreme-E 10GBase-T Ethernet"),
 116     PVID(BROADCOM_VENDOR_ID, BCM57416_NPAR1,
 117         "Broadcom BCM57416 NetXtreme-E Ethernet Partition"),
 118     PVID(BROADCOM_VENDOR_ID, BCM57416_NPAR2,
 119         "Broadcom BCM57416 NetXtreme-E Ethernet Partition"),
 120     PVID(BROADCOM_VENDOR_ID, BCM57416_SFP,
 121         "Broadcom BCM57416 NetXtreme-E 10Gb Ethernet"),
 122     PVID(BROADCOM_VENDOR_ID, BCM57417,
 123         "Broadcom BCM57417 NetXtreme-E 10GBase-T Ethernet"),
 124     PVID(BROADCOM_VENDOR_ID, BCM57417_NPAR1,
 125         "Broadcom BCM57417 NetXtreme-E Ethernet Partition"),
 126     PVID(BROADCOM_VENDOR_ID, BCM57417_NPAR2,
 127         "Broadcom BCM57417 NetXtreme-E Ethernet Partition"),
 128     PVID(BROADCOM_VENDOR_ID, BCM57417_SFP,
 129         "Broadcom BCM57417 NetXtreme-E 10Gb/25Gb Ethernet"),
 130     PVID(BROADCOM_VENDOR_ID, BCM58700,
 131         "Broadcom BCM58700 Nitro 1Gb/2.5Gb/10Gb Ethernet"),
 132     PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF1,
 133         "Broadcom NetXtreme-C Ethernet Virtual Function"),
 134     PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF2,
 135         "Broadcom NetXtreme-C Ethernet Virtual Function"),
 136     PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF3,
 137         "Broadcom NetXtreme-C Ethernet Virtual Function"),
 138     PVID(BROADCOM_VENDOR_ID, NETXTREME_E_VF1,
 139         "Broadcom NetXtreme-E Ethernet Virtual Function"),
 140     PVID(BROADCOM_VENDOR_ID, NETXTREME_E_VF2,
 141         "Broadcom NetXtreme-E Ethernet Virtual Function"),
 142     PVID(BROADCOM_VENDOR_ID, NETXTREME_E_VF3,
 143         "Broadcom NetXtreme-E Ethernet Virtual Function"),
 144     /* required last entry */
 145
 146     PVID_END
 147 };
 148
 149 /*
 150  * Function prototypes
 151  */
 152
 153 static void *bnxt_register(device_t dev);
 154
 155 /* Soft queue setup and teardown */
 156 static int bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
 157     uint64_t *paddrs, int ntxqs, int ntxqsets);
 158 static int bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
 159     uint64_t *paddrs, int nrxqs, int nrxqsets);
 160 static void bnxt_queues_free(if_ctx_t ctx);
 161
 162 /* Device setup and teardown */
 163 static int bnxt_attach_pre(if_ctx_t ctx);
 164 static int bnxt_attach_post(if_ctx_t ctx);
 165 static int bnxt_detach(if_ctx_t ctx);
 166
 167 /* Device configuration */
 168 static void bnxt_init(if_ctx_t ctx);
 169 static void bnxt_stop(if_ctx_t ctx);
 170 static void bnxt_multi_set(if_ctx_t ctx);
 171 static int bnxt_mtu_set(if_ctx_t ctx, uint32_t mtu);
 172 static void bnxt_media_status(if_ctx_t ctx, struct ifmediareq * ifmr);
 173 static int bnxt_media_change(if_ctx_t ctx);
 174 static int bnxt_promisc_set(if_ctx_t ctx, int flags);
 175 static uint64_t bnxt_get_counter(if_ctx_t, ift_counter);
 176 static void bnxt_update_admin_status(if_ctx_t ctx);
 177
 178 /* Interrupt enable / disable */
 179 static void bnxt_intr_enable(if_ctx_t ctx);
 180 static int bnxt_queue_intr_enable(if_ctx_t ctx, uint16_t qid);
 181 static void bnxt_disable_intr(if_ctx_t ctx);
 182 static int bnxt_msix_intr_assign(if_ctx_t ctx, int msix);
 183
 184 /* vlan support */
 185 static void bnxt_vlan_register(if_ctx_t ctx, uint16_t vtag);
 186 static void bnxt_vlan_unregister(if_ctx_t ctx, uint16_t vtag);
 187
 188 /* ioctl */
 189 static int bnxt_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data);
 190
 191 /* Internal support functions */
 192 static int bnxt_probe_phy(struct bnxt_softc *softc);
 193 static void bnxt_add_media_types(struct bnxt_softc *softc);
 194 static int bnxt_pci_mapping(struct bnxt_softc *softc);
 195 static void bnxt_pci_mapping_free(struct bnxt_softc *softc);
 196 static int bnxt_update_link(struct bnxt_softc *softc, bool chng_link_state);
 197 static int bnxt_handle_def_cp(void *arg);
 198 static int bnxt_handle_rx_cp(void *arg);
 199 static void bnxt_clear_ids(struct bnxt_softc *softc);
 200 static void inline bnxt_do_enable_intr(struct bnxt_cp_ring *cpr);
 201 static void inline bnxt_do_disable_intr(struct bnxt_cp_ring *cpr);
 202 static void bnxt_mark_cpr_invalid(struct bnxt_cp_ring *cpr);
 203 static void bnxt_def_cp_task(void *context);
 204 static void bnxt_handle_async_event(struct bnxt_softc *softc,
 205     struct cmpl_base *cmpl);
 206 static uint8_t get_phy_type(struct bnxt_softc *softc);
 207 static uint64_t bnxt_get_baudrate(struct bnxt_link_info *link);
 208
 209 /*
 210  * Device Interface Declaration
 211  */
 212
 213 static device_method_t bnxt_methods[] = {
 214         /* Device interface */
 215         DEVMETHOD(device_register, bnxt_register),
 216         DEVMETHOD(device_probe, iflib_device_probe),
 217         DEVMETHOD(device_attach, iflib_device_attach),
 218         DEVMETHOD(device_detach, iflib_device_detach),
 219         DEVMETHOD(device_shutdown, iflib_device_shutdown),
 220         DEVMETHOD(device_suspend, iflib_device_suspend),
 221         DEVMETHOD(device_resume, iflib_device_resume),
 222         DEVMETHOD_END
 223 };
 224
 225 static driver_t bnxt_driver = {
 226         "bnxt", bnxt_methods, sizeof(struct bnxt_softc),
 227 };
 228
 229 devclass_t bnxt_devclass;
 230 DRIVER_MODULE(bnxt, pci, bnxt_driver, bnxt_devclass, 0, 0);
 231
 232 MODULE_DEPEND(bnxt, pci, 1, 1, 1);
 233 MODULE_DEPEND(bnxt, ether, 1, 1, 1);
 234 MODULE_DEPEND(bnxt, iflib, 1, 1, 1);
 235
 236 static device_method_t bnxt_iflib_methods[] = {
 237         DEVMETHOD(ifdi_tx_queues_alloc, bnxt_tx_queues_alloc),
 238         DEVMETHOD(ifdi_rx_queues_alloc, bnxt_rx_queues_alloc),
 239         DEVMETHOD(ifdi_queues_free, bnxt_queues_free),
 240
 241         DEVMETHOD(ifdi_attach_pre, bnxt_attach_pre),
 242         DEVMETHOD(ifdi_attach_post, bnxt_attach_post),
 243         DEVMETHOD(ifdi_detach, bnxt_detach),
 244
 245         DEVMETHOD(ifdi_init, bnxt_init),
 246         DEVMETHOD(ifdi_stop, bnxt_stop),
 247         DEVMETHOD(ifdi_multi_set, bnxt_multi_set),
 248         DEVMETHOD(ifdi_mtu_set, bnxt_mtu_set),
 249         DEVMETHOD(ifdi_media_status, bnxt_media_status),
 250         DEVMETHOD(ifdi_media_change, bnxt_media_change),
 251         DEVMETHOD(ifdi_promisc_set, bnxt_promisc_set),
 252         DEVMETHOD(ifdi_get_counter, bnxt_get_counter),
 253         DEVMETHOD(ifdi_update_admin_status, bnxt_update_admin_status),
 254
 255         DEVMETHOD(ifdi_intr_enable, bnxt_intr_enable),
 256         DEVMETHOD(ifdi_queue_intr_enable, bnxt_queue_intr_enable),
 257         DEVMETHOD(ifdi_intr_disable, bnxt_disable_intr),
 258         DEVMETHOD(ifdi_msix_intr_assign, bnxt_msix_intr_assign),
 259
 260         DEVMETHOD(ifdi_vlan_register, bnxt_vlan_register),
 261         DEVMETHOD(ifdi_vlan_unregister, bnxt_vlan_unregister),
 262
 263         DEVMETHOD(ifdi_priv_ioctl, bnxt_priv_ioctl),
 264
 265         DEVMETHOD_END
 266 };
 267
 268 static driver_t bnxt_iflib_driver = {
 269         "bnxt", bnxt_iflib_methods, sizeof(struct bnxt_softc)
 270 };
 271
 272 /*
 273  * iflib shared context
 274  */
 275
 276 char bnxt_driver_version[] = "FreeBSD base";
 277 extern struct if_txrx bnxt_txrx;
 278 static struct if_shared_ctx bnxt_sctx_init = {
 279         .isc_magic = IFLIB_MAGIC,
 280         .isc_driver = &bnxt_iflib_driver,
 281         .isc_nfl = 2,                           // Number of Free Lists
 282         .isc_flags = IFLIB_HAS_RXCQ | IFLIB_HAS_TXCQ,
 283         .isc_q_align = PAGE_SIZE,
 284         .isc_tx_maxsize = BNXT_TSO_SIZE,
 285         .isc_tx_maxsegsize = BNXT_TSO_SIZE,
 286         .isc_rx_maxsize = BNXT_TSO_SIZE,
 287         .isc_rx_maxsegsize = BNXT_TSO_SIZE,
 288
 289         // Only use a single segment to avoid page size constraints
 290         .isc_rx_nsegments = 1,
 291         .isc_ntxqs = 2,
 292         .isc_nrxqs = 3,
 293         .isc_nrxd_min = {16, 16, 16},
 294         .isc_nrxd_default = {PAGE_SIZE / sizeof(struct cmpl_base) * 8,
 295             PAGE_SIZE / sizeof(struct rx_prod_pkt_bd),
 296             PAGE_SIZE / sizeof(struct rx_prod_pkt_bd)},
 297         .isc_nrxd_max = {INT32_MAX, INT32_MAX, INT32_MAX},
 298         .isc_ntxd_min = {16, 16, 16},
 299         .isc_ntxd_default = {PAGE_SIZE / sizeof(struct cmpl_base) * 2,
 300             PAGE_SIZE / sizeof(struct tx_bd_short)},
 301         .isc_ntxd_max = {INT32_MAX, INT32_MAX, INT32_MAX},
 302
 303         .isc_admin_intrcnt = 1,
 304         .isc_vendor_info = bnxt_vendor_info_array,
 305         .isc_driver_version = bnxt_driver_version,
 306 };
 307
 308 if_shared_ctx_t bnxt_sctx = &bnxt_sctx_init;
 309
 310 /*
 311  * Device Methods
 312  */
 313
 314 static void *
 315 bnxt_register(device_t dev)
 316 {
 317         return bnxt_sctx;
 318 }
 319
 320 /*
 321  * Device Dependent Configuration Functions
 322 */
 323
 324 /* Soft queue setup and teardown */
 325 static int
 326 bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
 327     uint64_t *paddrs, int ntxqs, int ntxqsets)
 328 {
 329         struct bnxt_softc *softc;
 330         int i;
 331         int rc;
 332
 333         softc = iflib_get_softc(ctx);
 334
 335         softc->tx_cp_rings = malloc(sizeof(struct bnxt_cp_ring) * ntxqsets,
 336             M_DEVBUF, M_NOWAIT | M_ZERO);
 337         if (!softc->tx_cp_rings) {
 338                 device_printf(iflib_get_dev(ctx),
 339                     "unable to allocate TX completion rings\n");
 340                 rc = ENOMEM;
 341                 goto cp_alloc_fail;
 342         }
 343         softc->tx_rings = malloc(sizeof(struct bnxt_ring) * ntxqsets,
 344             M_DEVBUF, M_NOWAIT | M_ZERO);
 345         if (!softc->tx_rings) {
 346                 device_printf(iflib_get_dev(ctx),
 347                     "unable to allocate TX rings\n");
 348                 rc = ENOMEM;
 349                 goto ring_alloc_fail;
 350         }
 351         rc = iflib_dma_alloc(ctx, sizeof(struct ctx_hw_stats) * ntxqsets,
 352             &softc->tx_stats, 0);
 353         if (rc)
 354                 goto dma_alloc_fail;
 355         bus_dmamap_sync(softc->tx_stats.idi_tag, softc->tx_stats.idi_map,
 356             BUS_DMASYNC_PREREAD);
 357
 358         for (i = 0; i < ntxqsets; i++) {
 359                 /* Set up the completion ring */
 360                 softc->tx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
 361                 softc->tx_cp_rings[i].ring.phys_id =
 362                     (uint16_t)HWRM_NA_SIGNATURE;
 363                 softc->tx_cp_rings[i].ring.softc = softc;
 364                 softc->tx_cp_rings[i].ring.id =
 365                     (softc->scctx->isc_nrxqsets * 2) + 1 + i;
 366                 softc->tx_cp_rings[i].ring.doorbell =
 367                     softc->tx_cp_rings[i].ring.id * 0x80;
 368                 softc->tx_cp_rings[i].ring.ring_size =
 369                     softc->scctx->isc_ntxd[0];
 370                 softc->tx_cp_rings[i].ring.vaddr = vaddrs[i * ntxqs];
 371                 softc->tx_cp_rings[i].ring.paddr = paddrs[i * ntxqs];
 372
 373                 /* Set up the TX ring */
 374                 softc->tx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
 375                 softc->tx_rings[i].softc = softc;
 376                 softc->tx_rings[i].id =
 377                     (softc->scctx->isc_nrxqsets * 2) + 1 + i;
 378                 softc->tx_rings[i].doorbell = softc->tx_rings[i].id * 0x80;
 379                 softc->tx_rings[i].ring_size = softc->scctx->isc_ntxd[1];
 380                 softc->tx_rings[i].vaddr = vaddrs[i * ntxqs + 1];
 381                 softc->tx_rings[i].paddr = paddrs[i * ntxqs + 1];
 382
 383                 bnxt_create_tx_sysctls(softc, i);
 384         }
 385
 386         softc->ntxqsets = ntxqsets;
 387         return rc;
 388
 389 dma_alloc_fail:
 390         free(softc->tx_rings, M_DEVBUF);
 391 ring_alloc_fail:
 392         free(softc->tx_cp_rings, M_DEVBUF);
 393 cp_alloc_fail:
 394         return rc;
 395 }
 396
 397 static void
 398 bnxt_queues_free(if_ctx_t ctx)
 399 {
 400         struct bnxt_softc *softc = iflib_get_softc(ctx);
 401
 402         // Free TX queues
 403         iflib_dma_free(&softc->tx_stats);
 404         free(softc->tx_rings, M_DEVBUF);
 405         softc->tx_rings = NULL;
 406         free(softc->tx_cp_rings, M_DEVBUF);
 407         softc->tx_cp_rings = NULL;
 408         softc->ntxqsets = 0;
 409
 410         // Free RX queues
 411         iflib_dma_free(&softc->rx_stats);
 412         free(softc->grp_info, M_DEVBUF);
 413         free(softc->ag_rings, M_DEVBUF);
 414         free(softc->rx_rings, M_DEVBUF);
 415         free(softc->rx_cp_rings, M_DEVBUF);
 416 }
 417
 418 static int
 419 bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
 420     uint64_t *paddrs, int nrxqs, int nrxqsets)
 421 {
 422         struct bnxt_softc *softc;
 423         int i;
 424         int rc;
 425
 426         softc = iflib_get_softc(ctx);
 427
 428         softc->rx_cp_rings = malloc(sizeof(struct bnxt_cp_ring) * nrxqsets,
 429             M_DEVBUF, M_NOWAIT | M_ZERO);
 430         if (!softc->rx_cp_rings) {
 431                 device_printf(iflib_get_dev(ctx),
 432                     "unable to allocate RX completion rings\n");
 433                 rc = ENOMEM;
 434                 goto cp_alloc_fail;
 435         }
 436         softc->rx_rings = malloc(sizeof(struct bnxt_ring) * nrxqsets,
 437             M_DEVBUF, M_NOWAIT | M_ZERO);
 438         if (!softc->rx_rings) {
 439                 device_printf(iflib_get_dev(ctx),
 440                     "unable to allocate RX rings\n");
 441                 rc = ENOMEM;
 442                 goto ring_alloc_fail;
 443         }
 444         softc->ag_rings = malloc(sizeof(struct bnxt_ring) * nrxqsets,
 445             M_DEVBUF, M_NOWAIT | M_ZERO);
 446         if (!softc->ag_rings) {
 447                 device_printf(iflib_get_dev(ctx),
 448                     "unable to allocate aggregation rings\n");
 449                 rc = ENOMEM;
 450                 goto ag_alloc_fail;
 451         }
 452         softc->grp_info = malloc(sizeof(struct bnxt_grp_info) * nrxqsets,
 453             M_DEVBUF, M_NOWAIT | M_ZERO);
 454         if (!softc->grp_info) {
 455                 device_printf(iflib_get_dev(ctx),
 456                     "unable to allocate ring groups\n");
 457                 rc = ENOMEM;
 458                 goto grp_alloc_fail;
 459         }
 460
 461         rc = iflib_dma_alloc(ctx, sizeof(struct ctx_hw_stats) * nrxqsets,
 462             &softc->rx_stats, 0);
 463         if (rc)
 464                 goto hw_stats_alloc_fail;
 465         bus_dmamap_sync(softc->rx_stats.idi_tag, softc->rx_stats.idi_map,
 466             BUS_DMASYNC_PREREAD);
 467
 468         for (i = 0; i < nrxqsets; i++) {
 469                 /* Allocation the completion ring */
 470                 softc->rx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
 471                 softc->rx_cp_rings[i].ring.phys_id =
 472                     (uint16_t)HWRM_NA_SIGNATURE;
 473                 softc->rx_cp_rings[i].ring.softc = softc;
 474                 softc->rx_cp_rings[i].ring.id = i + 1;
 475                 softc->rx_cp_rings[i].ring.doorbell =
 476                     softc->rx_cp_rings[i].ring.id * 0x80;
 477                 /*
 478                  * If this ring overflows, RX stops working.
 479                  */
 480                 softc->rx_cp_rings[i].ring.ring_size =
 481                     softc->scctx->isc_nrxd[0];
 482                 softc->rx_cp_rings[i].ring.vaddr = vaddrs[i * nrxqs];
 483                 softc->rx_cp_rings[i].ring.paddr = paddrs[i * nrxqs];
 484
 485                 /* Allocate the RX ring */
 486                 softc->rx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
 487                 softc->rx_rings[i].softc = softc;
 488                 softc->rx_rings[i].id = i + 1;
 489                 softc->rx_rings[i].doorbell = softc->rx_rings[i].id * 0x80;
 490                 softc->rx_rings[i].ring_size = softc->scctx->isc_nrxd[1];
 491                 softc->rx_rings[i].vaddr = vaddrs[i * nrxqs + 1];
 492                 softc->rx_rings[i].paddr = paddrs[i * nrxqs + 1];
 493
 494                 /* Allocate the AG ring */
 495                 softc->ag_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
 496                 softc->ag_rings[i].softc = softc;
 497                 softc->ag_rings[i].id = nrxqsets + i + 1;
 498                 softc->ag_rings[i].doorbell = softc->ag_rings[i].id * 0x80;
 499                 softc->ag_rings[i].ring_size = softc->scctx->isc_nrxd[2];
 500                 softc->ag_rings[i].vaddr = vaddrs[i * nrxqs + 2];
 501                 softc->ag_rings[i].paddr = paddrs[i * nrxqs + 2];
 502
 503                 /* Allocate the ring group */
 504                 softc->grp_info[i].grp_id = (uint16_t)HWRM_NA_SIGNATURE;
 505                 softc->grp_info[i].stats_ctx =
 506                     softc->rx_cp_rings[i].stats_ctx_id;
 507                 softc->grp_info[i].rx_ring_id = softc->rx_rings[i].phys_id;
 508                 softc->grp_info[i].ag_ring_id = softc->ag_rings[i].phys_id;
 509                 softc->grp_info[i].cp_ring_id =
 510                     softc->rx_cp_rings[i].ring.phys_id;
 511
 512                 bnxt_create_rx_sysctls(softc, i);
 513         }
 514
 515         /* And finally, the VNIC */
 516         softc->vnic_info.id = (uint16_t)HWRM_NA_SIGNATURE;
 517         softc->vnic_info.flow_id = (uint16_t)HWRM_NA_SIGNATURE;
 518         softc->vnic_info.filter_id = -1;
 519         softc->vnic_info.def_ring_grp = (uint16_t)HWRM_NA_SIGNATURE;
 520         softc->vnic_info.cos_rule = (uint16_t)HWRM_NA_SIGNATURE;
 521         softc->vnic_info.lb_rule = (uint16_t)HWRM_NA_SIGNATURE;
 522         softc->vnic_info.rx_mask = HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST;
 523         softc->vnic_info.mc_list_count = 0;
 524         softc->vnic_info.flags = BNXT_VNIC_FLAG_DEFAULT;
 525         rc = iflib_dma_alloc(ctx, BNXT_MAX_MC_ADDRS * ETHER_ADDR_LEN,
 526             &softc->vnic_info.mc_list, 0);
 527         if (rc)
 528                 goto mc_list_alloc_fail;
 529
 530         /* The VNIC RSS Hash Key */
 531         rc = iflib_dma_alloc(ctx, HW_HASH_KEY_SIZE,
 532             &softc->vnic_info.rss_hash_key_tbl, 0);
 533         if (rc)
 534                 goto rss_hash_alloc_fail;
 535         bus_dmamap_sync(softc->vnic_info.rss_hash_key_tbl.idi_tag,
 536             softc->vnic_info.rss_hash_key_tbl.idi_map,
 537             BUS_DMASYNC_PREWRITE);
 538         memcpy(softc->vnic_info.rss_hash_key_tbl.idi_vaddr,
 539             softc->vnic_info.rss_hash_key, HW_HASH_KEY_SIZE);
 540
 541         /* Allocate the RSS tables */
 542         rc = iflib_dma_alloc(ctx, HW_HASH_INDEX_SIZE * sizeof(uint16_t),
 543             &softc->vnic_info.rss_grp_tbl, 0);
 544         if (rc)
 545                 goto rss_grp_alloc_fail;
 546         bus_dmamap_sync(softc->vnic_info.rss_grp_tbl.idi_tag,
 547             softc->vnic_info.rss_grp_tbl.idi_map,
 548             BUS_DMASYNC_PREWRITE);
 549         memset(softc->vnic_info.rss_grp_tbl.idi_vaddr, 0xff,
 550             softc->vnic_info.rss_grp_tbl.idi_size);
 551
 552         softc->nrxqsets = nrxqsets;
 553         return rc;
 554
 555 rss_grp_alloc_fail:
 556         iflib_dma_free(&softc->vnic_info.rss_hash_key_tbl);
 557 rss_hash_alloc_fail:
 558         iflib_dma_free(&softc->vnic_info.mc_list);
 559 mc_list_alloc_fail:
 560         iflib_dma_free(&softc->rx_stats);
 561 hw_stats_alloc_fail:
 562         free(softc->grp_info, M_DEVBUF);
 563 grp_alloc_fail:
 564         free(softc->ag_rings, M_DEVBUF);
 565 ag_alloc_fail:
 566         free(softc->rx_rings, M_DEVBUF);
 567 ring_alloc_fail:
 568         free(softc->rx_cp_rings, M_DEVBUF);
 569 cp_alloc_fail:
 570         return rc;
 571 }
 572
 573 /* Device setup and teardown */
 574 static int
 575 bnxt_attach_pre(if_ctx_t ctx)
 576 {
 577         struct bnxt_softc *softc = iflib_get_softc(ctx);
 578         if_softc_ctx_t scctx;
 579         int rc = 0;
 580
 581         softc->ctx = ctx;
 582         softc->dev = iflib_get_dev(ctx);
 583         softc->media = iflib_get_media(ctx);
 584         softc->scctx = iflib_get_softc_ctx(ctx);
 585         softc->sctx = iflib_get_sctx(ctx);
 586         scctx = softc->scctx;
 587
 588         /* TODO: Better way of detecting NPAR/VF is needed */
 589         switch (softc->sctx->isc_vendor_info->pvi_device_id) {
 590         case BCM57402_NPAR:
 591         case BCM57404_NPAR:
 592         case BCM57406_NPAR:
 593         case BCM57407_NPAR:
 594         case BCM57412_NPAR1:
 595         case BCM57412_NPAR2:
 596         case BCM57414_NPAR1:
 597         case BCM57414_NPAR2:
 598         case BCM57416_NPAR1:
 599         case BCM57416_NPAR2:
 600                 softc->flags |= BNXT_FLAG_NPAR;
 601                 break;
 602         case NETXTREME_C_VF1:
 603         case NETXTREME_C_VF2:
 604         case NETXTREME_C_VF3:
 605         case NETXTREME_E_VF1:
 606         case NETXTREME_E_VF2:
 607         case NETXTREME_E_VF3:
 608                 softc->flags |= BNXT_FLAG_VF;
 609                 break;
 610         }
 611
 612         pci_enable_busmaster(softc->dev);
 613
 614         if (bnxt_pci_mapping(softc))
 615                 return (ENXIO);
 616
 617         /* HWRM setup/init */
 618         BNXT_HWRM_LOCK_INIT(softc, device_get_nameunit(softc->dev));
 619         rc = bnxt_alloc_hwrm_dma_mem(softc);
 620         if (rc)
 621                 goto dma_fail;
 622
 623         /* Allocate the TPA start buffer */
 624         softc->tpa_start = malloc(sizeof(struct bnxt_full_tpa_start) *
 625             (RX_TPA_START_CMPL_AGG_ID_MASK >> RX_TPA_START_CMPL_AGG_ID_SFT),
 626             M_DEVBUF, M_NOWAIT | M_ZERO);
 627         if (softc->tpa_start == NULL) {
 628                 rc = ENOMEM;
 629                 device_printf(softc->dev,
 630                     "Unable to allocate space for TPA\n");
 631                 goto tpa_failed;
 632         }
 633
 634         /* Get firmware version and compare with driver */
 635         softc->ver_info = malloc(sizeof(struct bnxt_ver_info),
 636             M_DEVBUF, M_NOWAIT | M_ZERO);
 637         if (softc->ver_info == NULL) {
 638                 rc = ENOMEM;
 639                 device_printf(softc->dev,
 640                     "Unable to allocate space for version info\n");
 641                 goto ver_alloc_fail;
 642         }
 643         /* Default minimum required HWRM version */
 644         softc->ver_info->hwrm_min_major = 1;
 645         softc->ver_info->hwrm_min_minor = 2;
 646         softc->ver_info->hwrm_min_update = 2;
 647
 648         rc = bnxt_hwrm_ver_get(softc);
 649         if (rc) {
 650                 device_printf(softc->dev, "attach: hwrm ver get failed\n");
 651                 goto ver_fail;
 652         }
 653
 654         /* Get NVRAM info */
 655         softc->nvm_info = malloc(sizeof(struct bnxt_nvram_info),
 656             M_DEVBUF, M_NOWAIT | M_ZERO);
 657         if (softc->nvm_info == NULL) {
 658                 rc = ENOMEM;
 659                 device_printf(softc->dev,
 660                     "Unable to allocate space for NVRAM info\n");
 661                 goto nvm_alloc_fail;
 662         }
 663         rc = bnxt_hwrm_nvm_get_dev_info(softc, &softc->nvm_info->mfg_id,
 664             &softc->nvm_info->device_id, &softc->nvm_info->sector_size,
 665             &softc->nvm_info->size, &softc->nvm_info->reserved_size,
 666             &softc->nvm_info->available_size);
 667
 668         /* Register the driver with the FW */
 669         rc = bnxt_hwrm_func_drv_rgtr(softc);
 670         if (rc) {
 671                 device_printf(softc->dev, "attach: hwrm drv rgtr failed\n");
 672                 goto drv_rgtr_fail;
 673         }
 674
 675         /* Get the HW capabilities */
 676         rc = bnxt_hwrm_func_qcaps(softc);
 677         if (rc)
 678                 goto failed;
 679         iflib_set_mac(ctx, softc->func.mac_addr);
 680
 681         scctx->isc_txrx = &bnxt_txrx;
 682         scctx->isc_tx_csum_flags = (CSUM_IP | CSUM_TCP | CSUM_UDP |
 683             CSUM_TCP_IPV6 | CSUM_UDP_IPV6 | CSUM_TSO);
 684         scctx->isc_capenable =
 685             /* These are translated to hwassit bits */
 686             IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | IFCAP_TSO4 | IFCAP_TSO6 |
 687             /* These are checked by iflib */
 688             IFCAP_LRO | IFCAP_VLAN_HWFILTER |
 689             /* These are part of the iflib mask */
 690             IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | IFCAP_VLAN_MTU |
 691             IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO |
 692             /* These likely get lost... */
 693             IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU;
 694
 695         /* Get the queue config */
 696         rc = bnxt_hwrm_queue_qportcfg(softc);
 697         if (rc) {
 698                 device_printf(softc->dev, "attach: hwrm qportcfg failed\n");
 699                 goto failed;
 700         }
 701
 702         /* Now perform a function reset */
 703         rc = bnxt_hwrm_func_reset(softc);
 704         bnxt_clear_ids(softc);
 705         if (rc)
 706                 goto failed;
 707
 708         /* Now set up iflib sc */
 709         scctx->isc_tx_nsegments = 31,
 710         scctx->isc_tx_tso_segments_max = 31;
 711         scctx->isc_tx_tso_size_max = BNXT_TSO_SIZE;
 712         scctx->isc_tx_tso_segsize_max = BNXT_TSO_SIZE;
 713         scctx->isc_vectors = softc->func.max_cp_rings;
 714         if (scctx->isc_nrxd[0] <
 715             ((scctx->isc_nrxd[1] * 4) + scctx->isc_nrxd[2]))
 716                 device_printf(softc->dev,
 717                     "WARNING: nrxd0 (%d) should be at least 4 * nrxd1 (%d) + nrxd2 (%d).  Driver may be unstable\n",
 718                     scctx->isc_nrxd[0], scctx->isc_nrxd[1], scctx->isc_nrxd[2]);
 719         if (scctx->isc_ntxd[0] < scctx->isc_ntxd[1] * 2)
 720                 device_printf(softc->dev,
 721                     "WARNING: ntxd0 (%d) should be at least 2 * ntxd1 (%d).  Driver may be unstable\n",
 722                     scctx->isc_ntxd[0], scctx->isc_ntxd[1]);
 723         scctx->isc_txqsizes[0] = sizeof(struct cmpl_base) * scctx->isc_ntxd[0];
 724         scctx->isc_txqsizes[1] = sizeof(struct tx_bd_short) *
 725             scctx->isc_ntxd[1];
 726         scctx->isc_rxqsizes[0] = sizeof(struct cmpl_base) * scctx->isc_nrxd[0];
 727         scctx->isc_rxqsizes[1] = sizeof(struct rx_prod_pkt_bd) *
 728             scctx->isc_nrxd[1];
 729         scctx->isc_rxqsizes[2] = sizeof(struct rx_prod_pkt_bd) *
 730             scctx->isc_nrxd[2];
 731         scctx->isc_max_rxqsets = min(pci_msix_count(softc->dev)-1,
 732             softc->func.max_cp_rings - 1);
 733         scctx->isc_max_rxqsets = min(scctx->isc_max_rxqsets,
 734             softc->func.max_rx_rings);
 735         scctx->isc_max_txqsets = min(softc->func.max_rx_rings,
 736             softc->func.max_cp_rings - scctx->isc_max_rxqsets - 1);
 737         scctx->isc_rss_table_size = HW_HASH_INDEX_SIZE;
 738         scctx->isc_rss_table_mask = scctx->isc_rss_table_size - 1;
 739
 740         /* iflib will map and release this bar */
 741         scctx->isc_msix_bar = pci_msix_table_bar(softc->dev);
 742
 743         /* Allocate the default completion ring */
 744         softc->def_cp_ring.stats_ctx_id = HWRM_NA_SIGNATURE;
 745         softc->def_cp_ring.ring.phys_id = (uint16_t)HWRM_NA_SIGNATURE;
 746         softc->def_cp_ring.ring.softc = softc;
 747         softc->def_cp_ring.ring.id = 0;
 748         softc->def_cp_ring.ring.doorbell = softc->def_cp_ring.ring.id * 0x80;
 749         softc->def_cp_ring.ring.ring_size = PAGE_SIZE /
 750             sizeof(struct cmpl_base);
 751         rc = iflib_dma_alloc(ctx,
 752             sizeof(struct cmpl_base) * softc->def_cp_ring.ring.ring_size,
 753             &softc->def_cp_ring_mem, 0);
 754         softc->def_cp_ring.ring.vaddr = softc->def_cp_ring_mem.idi_vaddr;
 755         softc->def_cp_ring.ring.paddr = softc->def_cp_ring_mem.idi_paddr;
 756         iflib_config_gtask_init(ctx, &softc->def_cp_task, bnxt_def_cp_task,
 757             "dflt_cp");
 758
 759         rc = bnxt_init_sysctl_ctx(softc);
 760         if (rc)
 761                 goto init_sysctl_failed;
 762         rc = bnxt_create_nvram_sysctls(softc->nvm_info);
 763         if (rc)
 764                 goto failed;
 765
 766         arc4rand(softc->vnic_info.rss_hash_key, HW_HASH_KEY_SIZE, 0);
 767         softc->vnic_info.rss_hash_type =
 768             HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 |
 769             HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 |
 770             HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 |
 771             HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 |
 772             HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 |
 773             HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 774         rc = bnxt_create_config_sysctls_pre(softc);
 775         if (rc)
 776                 goto failed;
 777
 778         /* Initialize the vlan list */
 779         SLIST_INIT(&softc->vnic_info.vlan_tags);
 780         softc->vnic_info.vlan_tag_list.idi_vaddr = NULL;
 781
 782         return (rc);
 783
 784 failed:
 785         bnxt_free_sysctl_ctx(softc);
 786 init_sysctl_failed:
 787         bnxt_hwrm_func_drv_unrgtr(softc, false);
 788 drv_rgtr_fail:
 789         free(softc->nvm_info, M_DEVBUF);
 790 nvm_alloc_fail:
 791 ver_fail:
 792         free(softc->ver_info, M_DEVBUF);
 793 ver_alloc_fail:
 794         free(softc->tpa_start, M_DEVBUF);
 795 tpa_failed:
 796         bnxt_free_hwrm_dma_mem(softc);
 797 dma_fail:
 798         BNXT_HWRM_LOCK_DESTROY(softc);
 799         bnxt_pci_mapping_free(softc);
 800         pci_disable_busmaster(softc->dev);
 801         return (rc);
 802 }
 803
 804 static int
 805 bnxt_attach_post(if_ctx_t ctx)
 806 {
 807         struct bnxt_softc *softc = iflib_get_softc(ctx);
 808         if_t ifp = iflib_get_ifp(ctx);
 809         int rc;
 810
 811         bnxt_create_config_sysctls_post(softc);
 812
 813         /* Update link state etc... */
 814         rc = bnxt_probe_phy(softc);
 815         if (rc)
 816                 goto failed;
 817
 818         /* Needs to be done after probing the phy */
 819         bnxt_create_ver_sysctls(softc);
 820         bnxt_add_media_types(softc);
 821         ifmedia_set(softc->media, IFM_ETHER | IFM_AUTO);
 822
 823         softc->scctx->isc_max_frame_size = ifp->if_mtu + ETHER_HDR_LEN +
 824             ETHER_CRC_LEN;
 825
 826 failed:
 827         return rc;
 828 }
 829
 830 static int
 831 bnxt_detach(if_ctx_t ctx)
 832 {
 833         struct bnxt_softc *softc = iflib_get_softc(ctx);
 834         struct bnxt_vlan_tag *tag;
 835         struct bnxt_vlan_tag *tmp;
 836         int i;
 837
 838         bnxt_do_disable_intr(&softc->def_cp_ring);
 839         bnxt_free_sysctl_ctx(softc);
 840         bnxt_hwrm_func_reset(softc);
 841         bnxt_clear_ids(softc);
 842         iflib_irq_free(ctx, &softc->def_cp_ring.irq);
 843         iflib_config_gtask_deinit(&softc->def_cp_task);
 844         /* We need to free() these here... */
 845         for (i = softc->nrxqsets-1; i>=0; i--) {
 846                 iflib_irq_free(ctx, &softc->rx_cp_rings[i].irq);
 847         }
 848         iflib_dma_free(&softc->vnic_info.mc_list);
 849         iflib_dma_free(&softc->vnic_info.rss_hash_key_tbl);
 850         iflib_dma_free(&softc->vnic_info.rss_grp_tbl);
 851         if (softc->vnic_info.vlan_tag_list.idi_vaddr)
 852                 iflib_dma_free(&softc->vnic_info.vlan_tag_list);
 853         SLIST_FOREACH_SAFE(tag, &softc->vnic_info.vlan_tags, next, tmp)
 854                 free(tag, M_DEVBUF);
 855         iflib_dma_free(&softc->def_cp_ring_mem);
 856         free(softc->tpa_start, M_DEVBUF);
 857         free(softc->ver_info, M_DEVBUF);
 858         free(softc->nvm_info, M_DEVBUF);
 859
 860         bnxt_hwrm_func_drv_unrgtr(softc, false);
 861         bnxt_free_hwrm_dma_mem(softc);
 862         BNXT_HWRM_LOCK_DESTROY(softc);
 863
 864         pci_disable_busmaster(softc->dev);
 865         bnxt_pci_mapping_free(softc);
 866
 867         return 0;
 868 }
 869
 870 /* Device configuration */
 871 static void
 872 bnxt_init(if_ctx_t ctx)
 873 {
 874         struct bnxt_softc *softc = iflib_get_softc(ctx);
 875         struct ifmediareq ifmr;
 876         int i, j;
 877         int rc;
 878
 879         rc = bnxt_hwrm_func_reset(softc);
 880         if (rc)
 881                 return;
 882         bnxt_clear_ids(softc);
 883
 884         /* Allocate the default completion ring */
 885         softc->def_cp_ring.cons = UINT32_MAX;
 886         softc->def_cp_ring.v_bit = 1;
 887         bnxt_mark_cpr_invalid(&softc->def_cp_ring);
 888         rc = bnxt_hwrm_ring_alloc(softc,
 889             HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL,
 890             &softc->def_cp_ring.ring,
 891             (uint16_t)HWRM_NA_SIGNATURE,
 892             HWRM_NA_SIGNATURE, true);
 893         if (rc)
 894                 goto fail;
 895
 896         /* And now set the default CP ring as the async CP ring */
 897         rc = bnxt_hwrm_func_cfg(softc);
 898         if (rc)
 899                 goto fail;
 900
 901         for (i = 0; i < softc->nrxqsets; i++) {
 902                 /* Allocate the statistics context */
 903                 rc = bnxt_hwrm_stat_ctx_alloc(softc, &softc->rx_cp_rings[i],
 904                     softc->rx_stats.idi_paddr +
 905                     (sizeof(struct ctx_hw_stats) * i));
 906                 if (rc)
 907                         goto fail;
 908
 909                 /* Allocate the completion ring */
 910                 softc->rx_cp_rings[i].cons = UINT32_MAX;
 911                 softc->rx_cp_rings[i].v_bit = 1;
 912                 softc->rx_cp_rings[i].last_idx = UINT32_MAX;
 913                 bnxt_mark_cpr_invalid(&softc->rx_cp_rings[i]);
 914                 rc = bnxt_hwrm_ring_alloc(softc,
 915                     HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL,
 916                     &softc->rx_cp_rings[i].ring, (uint16_t)HWRM_NA_SIGNATURE,
 917                     HWRM_NA_SIGNATURE, true);
 918                 if (rc)
 919                         goto fail;
 920
 921                 /* Allocate the RX ring */
 922                 rc = bnxt_hwrm_ring_alloc(softc,
 923                     HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
 924                     &softc->rx_rings[i], (uint16_t)HWRM_NA_SIGNATURE,
 925                     HWRM_NA_SIGNATURE, false);
 926                 if (rc)
 927                         goto fail;
 928                 BNXT_RX_DB(&softc->rx_rings[i], 0);
 929                 /* TODO: Cumulus+ doesn't need the double doorbell */
 930                 BNXT_RX_DB(&softc->rx_rings[i], 0);
 931
 932                 /* Allocate the AG ring */
 933                 rc = bnxt_hwrm_ring_alloc(softc,
 934                     HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
 935                     &softc->ag_rings[i], (uint16_t)HWRM_NA_SIGNATURE,
 936                     HWRM_NA_SIGNATURE, false);
 937                 if (rc)
 938                         goto fail;
 939                 BNXT_RX_DB(&softc->rx_rings[i], 0);
 940                 /* TODO: Cumulus+ doesn't need the double doorbell */
 941                 BNXT_RX_DB(&softc->ag_rings[i], 0);
 942
 943                 /* Allocate the ring group */
 944                 softc->grp_info[i].stats_ctx =
 945                     softc->rx_cp_rings[i].stats_ctx_id;
 946                 softc->grp_info[i].rx_ring_id = softc->rx_rings[i].phys_id;
 947                 softc->grp_info[i].ag_ring_id = softc->ag_rings[i].phys_id;
 948                 softc->grp_info[i].cp_ring_id =
 949                     softc->rx_cp_rings[i].ring.phys_id;
 950                 rc = bnxt_hwrm_ring_grp_alloc(softc, &softc->grp_info[i]);
 951                 if (rc)
 952                         goto fail;
 953
 954         }
 955
 956         /* Allocate the VNIC RSS context */
 957         rc = bnxt_hwrm_vnic_ctx_alloc(softc, &softc->vnic_info.rss_id);
 958         if (rc)
 959                 goto fail;
 960
 961         /* Allocate the vnic */
 962         softc->vnic_info.def_ring_grp = softc->grp_info[0].grp_id;
 963         softc->vnic_info.mru = softc->scctx->isc_max_frame_size;
 964         rc = bnxt_hwrm_vnic_alloc(softc, &softc->vnic_info);
 965         if (rc)
 966                 goto fail;
 967         rc = bnxt_hwrm_vnic_cfg(softc, &softc->vnic_info);
 968         if (rc)
 969                 goto fail;
 970         rc = bnxt_hwrm_set_filter(softc, &softc->vnic_info);
 971         if (rc)
 972                 goto fail;
 973
 974         /* Enable RSS on the VNICs */
 975         for (i = 0, j = 0; i < HW_HASH_INDEX_SIZE; i++) {
 976                 ((uint16_t *)
 977                     softc->vnic_info.rss_grp_tbl.idi_vaddr)[i] =
 978                     htole16(softc->grp_info[j].grp_id);
 979                 if (++j == softc->nrxqsets)
 980                         j = 0;
 981         }
 982
 983         rc = bnxt_hwrm_rss_cfg(softc, &softc->vnic_info,
 984             softc->vnic_info.rss_hash_type);
 985         if (rc)
 986                 goto fail;
 987
 988 #ifdef notyet
 989         /* Enable LRO/TPA/GRO */
 990         rc = bnxt_hwrm_vnic_tpa_cfg(softc, &softc->vnic_info,
 991             (if_getcapenable(iflib_get_ifp(ctx)) & IFCAP_LRO) ?
 992             HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA : 0);
 993         if (rc)
 994                 goto fail;
 995 #endif
 996
 997         for (i = 0; i < softc->ntxqsets; i++) {
 998                 /* Allocate the statistics context */
 999                 rc = bnxt_hwrm_stat_ctx_alloc(softc, &softc->tx_cp_rings[i],
1000                     softc->tx_stats.idi_paddr +
1001                     (sizeof(struct ctx_hw_stats) * i));
1002                 if (rc)
1003                         goto fail;
1004
1005                 /* Allocate the completion ring */
1006                 softc->tx_cp_rings[i].cons = UINT32_MAX;
1007                 softc->tx_cp_rings[i].v_bit = 1;
1008                 bnxt_mark_cpr_invalid(&softc->tx_cp_rings[i]);
1009                 rc = bnxt_hwrm_ring_alloc(softc,
1010                     HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL,
1011                     &softc->tx_cp_rings[i].ring, (uint16_t)HWRM_NA_SIGNATURE,
1012                     HWRM_NA_SIGNATURE, false);
1013                 if (rc)
1014                         goto fail;
1015
1016                 /* Allocate the TX ring */
1017                 rc = bnxt_hwrm_ring_alloc(softc,
1018                     HWRM_RING_ALLOC_INPUT_RING_TYPE_TX,
1019                     &softc->tx_rings[i], softc->tx_cp_rings[i].ring.phys_id,
1020                     softc->tx_cp_rings[i].stats_ctx_id, false);
1021                 if (rc)
1022                         goto fail;
1023                 BNXT_TX_DB(&softc->tx_rings[i], 0);
1024                 /* TODO: Cumulus+ doesn't need the double doorbell */
1025                 BNXT_TX_DB(&softc->tx_rings[i], 0);
1026         }
1027
1028         bnxt_do_enable_intr(&softc->def_cp_ring);
1029         bnxt_media_status(softc->ctx, &ifmr);
1030         return;
1031
1032 fail:
1033         bnxt_hwrm_func_reset(softc);
1034         bnxt_clear_ids(softc);
1035         return;
1036 }
1037
1038 static void
1039 bnxt_stop(if_ctx_t ctx)
1040 {
1041         struct bnxt_softc *softc = iflib_get_softc(ctx);
1042
1043         bnxt_do_disable_intr(&softc->def_cp_ring);
1044         bnxt_hwrm_func_reset(softc);
1045         bnxt_clear_ids(softc);
1046         return;
1047 }
1048
1049 static void
1050 bnxt_multi_set(if_ctx_t ctx)
1051 {
1052         struct bnxt_softc *softc = iflib_get_softc(ctx);
1053         if_t ifp = iflib_get_ifp(ctx);
1054         uint8_t *mta;
1055         int cnt, mcnt;
1056
1057         mcnt = if_multiaddr_count(ifp, -1);
1058
1059         if (mcnt > BNXT_MAX_MC_ADDRS) {
1060                 softc->vnic_info.rx_mask |=
1061                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1062                 bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info);
1063         }
1064         else {
1065                 softc->vnic_info.rx_mask &=
1066                     ~HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1067                 mta = softc->vnic_info.mc_list.idi_vaddr;
1068                 bzero(mta, softc->vnic_info.mc_list.idi_size);
1069                 if_multiaddr_array(ifp, mta, &cnt, mcnt);
1070                 bus_dmamap_sync(softc->vnic_info.mc_list.idi_tag,
1071                     softc->vnic_info.mc_list.idi_map, BUS_DMASYNC_PREWRITE);
1072                 softc->vnic_info.mc_list_count = cnt;
1073                 softc->vnic_info.rx_mask |=
1074                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST;
1075                 if (bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info))
1076                         device_printf(softc->dev,
1077                             "set_multi: rx_mask set failed\n");
1078         }
1079 }
1080
1081 static int
1082 bnxt_mtu_set(if_ctx_t ctx, uint32_t mtu)
1083 {
1084         struct bnxt_softc *softc = iflib_get_softc(ctx);
1085
1086         if (mtu > BNXT_MAX_MTU)
1087                 return EINVAL;
1088
1089         softc->scctx->isc_max_frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1090         return 0;
1091 }
1092
1093 static void
1094 bnxt_media_status(if_ctx_t ctx, struct ifmediareq * ifmr)
1095 {
1096         struct bnxt_softc *softc = iflib_get_softc(ctx);
1097         struct bnxt_link_info *link_info = &softc->link_info;
1098         uint8_t phy_type = get_phy_type(softc);
1099
1100         bnxt_update_link(softc, true);
1101
1102         ifmr->ifm_status = IFM_AVALID;
1103         ifmr->ifm_active = IFM_ETHER;
1104
1105         if (link_info->link_up)
1106                 ifmr->ifm_status |= IFM_ACTIVE;
1107         else
1108                 ifmr->ifm_status &= ~IFM_ACTIVE;
1109
1110         if (link_info->duplex == HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL)
1111                 ifmr->ifm_active |= IFM_FDX;
1112         else
1113                 ifmr->ifm_active |= IFM_HDX;
1114
1115         switch (link_info->link_speed) {
1116         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB:
1117                 ifmr->ifm_active |= IFM_100_T;
1118                 break;
1119         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB:
1120                 switch (phy_type) {
1121                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX:
1122                         ifmr->ifm_active |= IFM_1000_KX;
1123                         break;
1124                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET:
1125                         ifmr->ifm_active |= IFM_1000_T;
1126                         break;
1127                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY:
1128                         ifmr->ifm_active |= IFM_1000_SGMII;
1129                         break;
1130                 default:
1131                         ifmr->ifm_active |= IFM_UNKNOWN;
1132                         break;
1133                 }
1134         break;
1135         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB:
1136                 switch (phy_type) {
1137                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX:
1138                         ifmr->ifm_active |= IFM_2500_KX;
1139                         break;
1140                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET:
1141                         ifmr->ifm_active |= IFM_2500_T;
1142                         break;
1143                 default:
1144                         ifmr->ifm_active |= IFM_UNKNOWN;
1145                         break;
1146                 }
1147                 break;
1148         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB:
1149                 switch (phy_type) {
1150                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
1151                         ifmr->ifm_active |= IFM_10G_CR1;
1152                         break;
1153                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
1154                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
1155                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
1156                         ifmr->ifm_active |= IFM_10G_KR;
1157                         break;
1158                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR:
1159                         ifmr->ifm_active |= IFM_10G_LR;
1160                         break;
1161                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR:
1162                         ifmr->ifm_active |= IFM_10G_SR;
1163                         break;
1164                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX:
1165                         ifmr->ifm_active |= IFM_10G_KX4;
1166                         break;
1167                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET:
1168                         ifmr->ifm_active |= IFM_10G_T;
1169                         break;
1170                 default:
1171                         ifmr->ifm_active |= IFM_UNKNOWN;
1172                         break;
1173                 }
1174                 break;
1175         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB:
1176                 ifmr->ifm_active |= IFM_20G_KR2;
1177                 break;
1178         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB:
1179                 switch (phy_type) {
1180                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
1181                         ifmr->ifm_active |= IFM_25G_CR;
1182                         break;
1183                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
1184                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
1185                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
1186                         ifmr->ifm_active |= IFM_25G_KR;
1187                         break;
1188                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR:
1189                         ifmr->ifm_active |= IFM_25G_SR;
1190                         break;
1191                 default:
1192                         ifmr->ifm_active |= IFM_UNKNOWN;
1193                         break;
1194                 }
1195                 break;
1196         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB:
1197                 switch (phy_type) {
1198                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
1199                         ifmr->ifm_active |= IFM_40G_CR4;
1200                         break;
1201                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
1202                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
1203                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
1204                         ifmr->ifm_active |= IFM_40G_KR4;
1205                         break;
1206                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR:
1207                         ifmr->ifm_active |= IFM_40G_LR4;
1208                         break;
1209                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR:
1210                         ifmr->ifm_active |= IFM_40G_SR4;
1211                         break;
1212                 default:
1213                         ifmr->ifm_active |= IFM_UNKNOWN;
1214                         break;
1215                 }
1216                 break;
1217         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB:
1218                 switch (phy_type) {
1219                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
1220                         ifmr->ifm_active |= IFM_50G_CR2;
1221                         break;
1222                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
1223                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
1224                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
1225                         ifmr->ifm_active |= IFM_50G_KR2;
1226                         break;
1227                 default:
1228                         ifmr->ifm_active |= IFM_UNKNOWN;
1229                         break;
1230                 }
1231                 break;
1232         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB:
1233                 switch (phy_type) {
1234                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
1235                         ifmr->ifm_active |= IFM_100G_CR4;
1236                         break;
1237                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
1238                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
1239                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
1240                         ifmr->ifm_active |= IFM_100G_KR4;
1241                         break;
1242                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR:
1243                         ifmr->ifm_active |= IFM_100G_LR4;
1244                         break;
1245                 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR:
1246                         ifmr->ifm_active |= IFM_100G_SR4;
1247                         break;
1248                 default:
1249                         ifmr->ifm_active |= IFM_UNKNOWN;
1250                         break;
1251                 }
1252         default:
1253                 return;
1254         }
1255
1256         if (link_info->pause == (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1257             HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX))
1258                 ifmr->ifm_active |= (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE);
1259         else if (link_info->pause == HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX)
1260                 ifmr->ifm_active |= IFM_ETH_TXPAUSE;
1261         else if (link_info->pause == HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)
1262                 ifmr->ifm_active |= IFM_ETH_RXPAUSE;
1263
1264         bnxt_report_link(softc);
1265         return;
1266 }
1267
1268 static int
1269 bnxt_media_change(if_ctx_t ctx)
1270 {
1271         struct bnxt_softc *softc = iflib_get_softc(ctx);
1272         struct ifmedia *ifm = iflib_get_media(ctx);
1273         struct ifmediareq ifmr;
1274         int rc;
1275
1276         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1277                 return EINVAL;
1278
1279         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1280         case IFM_100_T:
1281                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1282                 softc->link_info.req_link_speed =
1283                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB;
1284                 break;
1285         case IFM_1000_KX:
1286         case IFM_1000_T:
1287         case IFM_1000_SGMII:
1288                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1289                 softc->link_info.req_link_speed =
1290                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB;
1291                 break;
1292         case IFM_2500_KX:
1293         case IFM_2500_T:
1294                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1295                 softc->link_info.req_link_speed =
1296                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB;
1297                 break;
1298         case IFM_10G_CR1:
1299         case IFM_10G_KR:
1300         case IFM_10G_LR:
1301         case IFM_10G_SR:
1302         case IFM_10G_T:
1303                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1304                 softc->link_info.req_link_speed =
1305                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB;
1306                 break;
1307         case IFM_20G_KR2:
1308                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1309                 softc->link_info.req_link_speed =
1310                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB;
1311                 break;
1312         case IFM_25G_CR:
1313         case IFM_25G_KR:
1314         case IFM_25G_SR:
1315                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1316                 softc->link_info.req_link_speed =
1317                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB;
1318                 break;
1319         case IFM_40G_CR4:
1320         case IFM_40G_KR4:
1321         case IFM_40G_LR4:
1322         case IFM_40G_SR4:
1323                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1324                 softc->link_info.req_link_speed =
1325                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB;
1326                 break;
1327         case IFM_50G_CR2:
1328         case IFM_50G_KR2:
1329                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1330                 softc->link_info.req_link_speed =
1331                     HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB;
1332                 break;
1333         case IFM_100G_CR4:
1334         case IFM_100G_KR4:
1335         case IFM_100G_LR4:
1336         case IFM_100G_SR4:
1337                 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1338                 softc->link_info.req_link_speed =
1339                         HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB;
1340                 break;
1341         default:
1342                 device_printf(softc->dev,
1343                     "Unsupported media type!  Using auto\n");
1344                 /* Fall-through */
1345         case IFM_AUTO:
1346                 // Auto
1347                 softc->link_info.autoneg |= BNXT_AUTONEG_SPEED;
1348                 break;
1349         }
1350         rc = bnxt_hwrm_set_link_setting(softc, true, true);
1351         bnxt_media_status(softc->ctx, &ifmr);
1352         return rc;
1353 }
1354
1355 static int
1356 bnxt_promisc_set(if_ctx_t ctx, int flags)
1357 {
1358         struct bnxt_softc *softc = iflib_get_softc(ctx);
1359         if_t ifp = iflib_get_ifp(ctx);
1360         int rc;
1361
1362         if (ifp->if_flags & IFF_ALLMULTI ||
1363             if_multiaddr_count(ifp, -1) > BNXT_MAX_MC_ADDRS)
1364                 softc->vnic_info.rx_mask |=
1365                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1366         else
1367                 softc->vnic_info.rx_mask &=
1368                     ~HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1369
1370         if (ifp->if_flags & IFF_PROMISC)
1371                 softc->vnic_info.rx_mask |=
1372                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS |
1373                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN;
1374         else
1375                 softc->vnic_info.rx_mask &=
1376                     ~(HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS |
1377                     HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN);
1378
1379         rc = bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info);
1380
1381         return rc;
1382 }
1383
1384 static uint64_t
1385 bnxt_get_counter(if_ctx_t ctx, ift_counter cnt)
1386 {
1387         if_t ifp = iflib_get_ifp(ctx);
1388
1389         if (cnt < IFCOUNTERS)
1390                 return if_get_counter_default(ifp, cnt);
1391
1392         return 0;
1393 }
1394
1395 static void
1396 bnxt_update_admin_status(if_ctx_t ctx)
1397 {
1398         /* TODO: do we need to do anything here? */
1399         return;
1400 }
1401
1402 static void inline
1403 bnxt_do_enable_intr(struct bnxt_cp_ring *cpr)
1404 {
1405         if (cpr->ring.phys_id != (uint16_t)HWRM_NA_SIGNATURE) {
1406                 /* First time enabling, do not set index */
1407                 if (cpr->cons == UINT32_MAX)
1408                         BNXT_CP_ENABLE_DB(&cpr->ring);
1409                 else
1410                         BNXT_CP_IDX_ENABLE_DB(&cpr->ring, cpr->cons);
1411         }
1412 }
1413
1414 static void inline
1415 bnxt_do_disable_intr(struct bnxt_cp_ring *cpr)
1416 {
1417         if (cpr->ring.phys_id != (uint16_t)HWRM_NA_SIGNATURE)
1418                 BNXT_CP_DISABLE_DB(&cpr->ring);
1419 }
1420
1421 /* Enable all interrupts */
1422 static void
1423 bnxt_intr_enable(if_ctx_t ctx)
1424 {
1425         struct bnxt_softc *softc = iflib_get_softc(ctx);
1426         int i;
1427
1428         bnxt_do_enable_intr(&softc->def_cp_ring);
1429         for (i = 0; i < softc->nrxqsets; i++)
1430                 bnxt_do_enable_intr(&softc->rx_cp_rings[i]);
1431
1432         return;
1433 }
1434
1435 /* Enable interrupt for a single queue */
1436 static int
1437 bnxt_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
1438 {
1439         struct bnxt_softc *softc = iflib_get_softc(ctx);
1440
1441         bnxt_do_enable_intr(&softc->rx_cp_rings[qid]);
1442         return 0;
1443 }
1444
1445 /* Disable all interrupts */
1446 static void
1447 bnxt_disable_intr(if_ctx_t ctx)
1448 {
1449         struct bnxt_softc *softc = iflib_get_softc(ctx);
1450         int i;
1451
1452         /*
1453          * NOTE: These TX interrupts should never get enabled, so don't
1454          * update the index
1455          */
1456         for (i = 0; i < softc->ntxqsets; i++)
1457                 bnxt_do_disable_intr(&softc->tx_cp_rings[i]);
1458         for (i = 0; i < softc->nrxqsets; i++)
1459                 bnxt_do_disable_intr(&softc->rx_cp_rings[i]);
1460
1461         return;
1462 }
1463
1464 static int
1465 bnxt_msix_intr_assign(if_ctx_t ctx, int msix)
1466 {
1467         struct bnxt_softc *softc = iflib_get_softc(ctx);
1468         int rc;
1469         int i;
1470
1471         rc = iflib_irq_alloc_generic(ctx, &softc->def_cp_ring.irq,
1472             softc->def_cp_ring.ring.id + 1, IFLIB_INTR_ADMIN,
1473             bnxt_handle_def_cp, softc, 0, "def_cp");
1474         if (rc) {
1475                 device_printf(iflib_get_dev(ctx),
1476                     "Failed to register default completion ring handler\n");
1477                 return rc;
1478         }
1479
1480         for (i=0; i<softc->scctx->isc_nrxqsets; i++) {
1481                 rc = iflib_irq_alloc_generic(ctx, &softc->rx_cp_rings[i].irq,
1482                     softc->rx_cp_rings[i].ring.id + 1, IFLIB_INTR_RX,
1483                     bnxt_handle_rx_cp, &softc->rx_cp_rings[i], i, "rx_cp");
1484                 if (rc) {
1485                         device_printf(iflib_get_dev(ctx),
1486                             "Failed to register RX completion ring handler\n");
1487                         i--;
1488                         goto fail;
1489                 }
1490         }
1491
1492         for (i=0; i<softc->scctx->isc_ntxqsets; i++)
1493                 iflib_softirq_alloc_generic(ctx, i + 1, IFLIB_INTR_TX, NULL, i,
1494                     "tx_cp");
1495
1496         return rc;
1497
1498 fail:
1499         for (; i>=0; i--)
1500                 iflib_irq_free(ctx, &softc->rx_cp_rings[i].irq);
1501         iflib_irq_free(ctx, &softc->def_cp_ring.irq);
1502         return rc;
1503 }
1504
1505 /*
1506  * We're explicitly allowing duplicates here.  They will need to be
1507  * removed as many times as they are added.
1508  */
1509 static void
1510 bnxt_vlan_register(if_ctx_t ctx, uint16_t vtag)
1511 {
1512         struct bnxt_softc *softc = iflib_get_softc(ctx);
1513         struct bnxt_vlan_tag *new_tag;
1514
1515         new_tag = malloc(sizeof(struct bnxt_vlan_tag), M_DEVBUF, M_NOWAIT);
1516         if (new_tag == NULL)
1517                 return;
1518         new_tag->tag = vtag;
1519         new_tag->tpid = 8100;
1520         SLIST_INSERT_HEAD(&softc->vnic_info.vlan_tags, new_tag, next);
1521 };
1522
1523 static void
1524 bnxt_vlan_unregister(if_ctx_t ctx, uint16_t vtag)
1525 {
1526         struct bnxt_softc *softc = iflib_get_softc(ctx);
1527         struct bnxt_vlan_tag *vlan_tag;
1528
1529         SLIST_FOREACH(vlan_tag, &softc->vnic_info.vlan_tags, next) {
1530                 if (vlan_tag->tag == vtag) {
1531                         SLIST_REMOVE(&softc->vnic_info.vlan_tags, vlan_tag,
1532                             bnxt_vlan_tag, next);
1533                         free(vlan_tag, M_DEVBUF);
1534                         break;
1535                 }
1536         }
1537 }
1538
1539 static int
1540 bnxt_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data)
1541 {
1542         struct bnxt_softc *softc = iflib_get_softc(ctx);
1543         struct ifreq *ifr = (struct ifreq *)data;
1544         struct ifreq_buffer *ifbuf = &ifr->ifr_ifru.ifru_buffer;
1545         struct bnxt_ioctl_header *ioh =
1546             (struct bnxt_ioctl_header *)(ifbuf->buffer);
1547         int rc = ENOTSUP;
1548         struct bnxt_ioctl_data *iod = NULL;
1549
1550         switch (command) {
1551         case SIOCGPRIVATE_0:
1552                 if ((rc = priv_check(curthread, PRIV_DRIVER)) != 0)
1553                         goto exit;
1554
1555                 iod = malloc(ifbuf->length, M_DEVBUF, M_NOWAIT | M_ZERO);
1556                 if (!iod) {
1557                         rc = ENOMEM;
1558                         goto exit;
1559                 }
1560                 copyin(ioh, iod, ifbuf->length);
1561
1562                 switch (ioh->type) {
1563                 case BNXT_HWRM_NVM_FIND_DIR_ENTRY:
1564                 {
1565                         struct bnxt_ioctl_hwrm_nvm_find_dir_entry *find =
1566                             &iod->find;
1567
1568                         rc = bnxt_hwrm_nvm_find_dir_entry(softc, find->type,
1569                             &find->ordinal, find->ext, &find->index,
1570                             find->use_index, find->search_opt,
1571                             &find->data_length, &find->item_length,
1572                             &find->fw_ver);
1573                         if (rc) {
1574                                 iod->hdr.rc = rc;
1575                                 copyout(&iod->hdr.rc, &ioh->rc,
1576                                     sizeof(ioh->rc));
1577                         }
1578                         else {
1579                                 iod->hdr.rc = 0;
1580                                 copyout(iod, ioh, ifbuf->length);
1581                         }
1582
1583                         rc = 0;
1584                         goto exit;
1585                 }
1586                 case BNXT_HWRM_NVM_READ:
1587                 {
1588                         struct bnxt_ioctl_hwrm_nvm_read *rd = &iod->read;
1589                         struct iflib_dma_info dma_data;
1590                         size_t offset;
1591                         size_t remain;
1592                         size_t csize;
1593
1594                         /*
1595                          * Some HWRM versions can't read more than 0x8000 bytes
1596                          */
1597                         rc = iflib_dma_alloc(softc->ctx,
1598                             min(rd->length, 0x8000), &dma_data, BUS_DMA_NOWAIT);
1599                         if (rc)
1600                                 break;
1601                         for (remain = rd->length, offset = 0;
1602                             remain && offset < rd->length; offset += 0x8000) {
1603                                 csize = min(remain, 0x8000);
1604                                 rc = bnxt_hwrm_nvm_read(softc, rd->index,
1605                                     rd->offset + offset, csize, &dma_data);
1606                                 if (rc) {
1607                                         iod->hdr.rc = rc;
1608                                         copyout(&iod->hdr.rc, &ioh->rc,
1609                                             sizeof(ioh->rc));
1610                                         break;
1611                                 }
1612                                 else {
1613                                         copyout(dma_data.idi_vaddr,
1614                                             rd->data + offset, csize);
1615                                         iod->hdr.rc = 0;
1616                                 }
1617                                 remain -= csize;
1618                         }
1619                         if (iod->hdr.rc == 0)
1620                                 copyout(iod, ioh, ifbuf->length);
1621
1622                         iflib_dma_free(&dma_data);
1623                         rc = 0;
1624                         goto exit;
1625                 }
1626                 case BNXT_HWRM_FW_RESET:
1627                 {
1628                         struct bnxt_ioctl_hwrm_fw_reset *rst =
1629                             &iod->reset;
1630
1631                         rc = bnxt_hwrm_fw_reset(softc, rst->processor,
1632                             &rst->selfreset);
1633                         if (rc) {
1634                                 iod->hdr.rc = rc;
1635                                 copyout(&iod->hdr.rc, &ioh->rc,
1636                                     sizeof(ioh->rc));
1637                         }
1638                         else {
1639                                 iod->hdr.rc = 0;
1640                                 copyout(iod, ioh, ifbuf->length);
1641                         }
1642
1643                         rc = 0;
1644                         goto exit;
1645                 }
1646                 case BNXT_HWRM_FW_QSTATUS:
1647                 {
1648                         struct bnxt_ioctl_hwrm_fw_qstatus *qstat =
1649                             &iod->status;
1650
1651                         rc = bnxt_hwrm_fw_qstatus(softc, qstat->processor,
1652                             &qstat->selfreset);
1653                         if (rc) {
1654                                 iod->hdr.rc = rc;
1655                                 copyout(&iod->hdr.rc, &ioh->rc,
1656                                     sizeof(ioh->rc));
1657                         }
1658                         else {
1659                                 iod->hdr.rc = 0;
1660                                 copyout(iod, ioh, ifbuf->length);
1661                         }
1662
1663                         rc = 0;
1664                         goto exit;
1665                 }
1666                 case BNXT_HWRM_NVM_WRITE:
1667                 {
1668                         struct bnxt_ioctl_hwrm_nvm_write *wr =
1669                             &iod->write;
1670
1671                         rc = bnxt_hwrm_nvm_write(softc, wr->data, true,
1672                             wr->type, wr->ordinal, wr->ext, wr->attr,
1673                             wr->option, wr->data_length, wr->keep,
1674                             &wr->item_length, &wr->index);
1675                         if (rc) {
1676                                 iod->hdr.rc = rc;
1677                                 copyout(&iod->hdr.rc, &ioh->rc,
1678                                     sizeof(ioh->rc));
1679                         }
1680                         else {
1681                                 iod->hdr.rc = 0;
1682                                 copyout(iod, ioh, ifbuf->length);
1683                         }
1684
1685                         rc = 0;
1686                         goto exit;
1687                 }
1688                 case BNXT_HWRM_NVM_ERASE_DIR_ENTRY:
1689                 {
1690                         struct bnxt_ioctl_hwrm_nvm_erase_dir_entry *erase =
1691                             &iod->erase;
1692
1693                         rc = bnxt_hwrm_nvm_erase_dir_entry(softc, erase->index);
1694                         if (rc) {
1695                                 iod->hdr.rc = rc;
1696                                 copyout(&iod->hdr.rc, &ioh->rc,
1697                                     sizeof(ioh->rc));
1698                         }
1699                         else {
1700                                 iod->hdr.rc = 0;
1701                                 copyout(iod, ioh, ifbuf->length);
1702                         }
1703
1704                         rc = 0;
1705                         goto exit;
1706                 }
1707                 case BNXT_HWRM_NVM_GET_DIR_INFO:
1708                 {
1709                         struct bnxt_ioctl_hwrm_nvm_get_dir_info *info =
1710                             &iod->dir_info;
1711
1712                         rc = bnxt_hwrm_nvm_get_dir_info(softc, &info->entries,
1713                             &info->entry_length);
1714                         if (rc) {
1715                                 iod->hdr.rc = rc;
1716                                 copyout(&iod->hdr.rc, &ioh->rc,
1717                                     sizeof(ioh->rc));
1718                         }
1719                         else {
1720                                 iod->hdr.rc = 0;
1721                                 copyout(iod, ioh, ifbuf->length);
1722                         }
1723
1724                         rc = 0;
1725                         goto exit;
1726                 }
1727                 case BNXT_HWRM_NVM_GET_DIR_ENTRIES:
1728                 {
1729                         struct bnxt_ioctl_hwrm_nvm_get_dir_entries *get =
1730                             &iod->dir_entries;
1731                         struct iflib_dma_info dma_data;
1732
1733                         rc = iflib_dma_alloc(softc->ctx, get->max_size,
1734                             &dma_data, BUS_DMA_NOWAIT);
1735                         if (rc)
1736                                 break;
1737                         rc = bnxt_hwrm_nvm_get_dir_entries(softc, &get->entries,
1738                             &get->entry_length, &dma_data);
1739                         if (rc) {
1740                                 iod->hdr.rc = rc;
1741                                 copyout(&iod->hdr.rc, &ioh->rc,
1742                                     sizeof(ioh->rc));
1743                         }
1744                         else {
1745                                 copyout(dma_data.idi_vaddr, get->data,
1746                                     get->entry_length * get->entries);
1747                                 iod->hdr.rc = 0;
1748                                 copyout(iod, ioh, ifbuf->length);
1749                         }
1750                         iflib_dma_free(&dma_data);
1751
1752                         rc = 0;
1753                         goto exit;
1754                 }
1755                 case BNXT_HWRM_NVM_VERIFY_UPDATE:
1756                 {
1757                         struct bnxt_ioctl_hwrm_nvm_verify_update *vrfy =
1758                             &iod->verify;
1759
1760                         rc = bnxt_hwrm_nvm_verify_update(softc, vrfy->type,
1761                             vrfy->ordinal, vrfy->ext);
1762                         if (rc) {
1763                                 iod->hdr.rc = rc;
1764                                 copyout(&iod->hdr.rc, &ioh->rc,
1765                                     sizeof(ioh->rc));
1766                         }
1767                         else {
1768                                 iod->hdr.rc = 0;
1769                                 copyout(iod, ioh, ifbuf->length);
1770                         }
1771
1772                         rc = 0;
1773                         goto exit;
1774                 }
1775                 case BNXT_HWRM_NVM_INSTALL_UPDATE:
1776                 {
1777                         struct bnxt_ioctl_hwrm_nvm_install_update *inst =
1778                             &iod->install;
1779
1780                         rc = bnxt_hwrm_nvm_install_update(softc,
1781                             inst->install_type, &inst->installed_items,
1782                             &inst->result, &inst->problem_item,
1783                             &inst->reset_required);
1784                         if (rc) {
1785                                 iod->hdr.rc = rc;
1786                                 copyout(&iod->hdr.rc, &ioh->rc,
1787                                     sizeof(ioh->rc));
1788                         }
1789                         else {
1790                                 iod->hdr.rc = 0;
1791                                 copyout(iod, ioh, ifbuf->length);
1792                         }
1793
1794                         rc = 0;
1795                         goto exit;
1796                 }
1797                 case BNXT_HWRM_NVM_MODIFY:
1798                 {
1799                         struct bnxt_ioctl_hwrm_nvm_modify *mod = &iod->modify;
1800
1801                         rc = bnxt_hwrm_nvm_modify(softc, mod->index,
1802                             mod->offset, mod->data, true, mod->length);
1803                         if (rc) {
1804                                 iod->hdr.rc = rc;
1805                                 copyout(&iod->hdr.rc, &ioh->rc,
1806                                     sizeof(ioh->rc));
1807                         }
1808                         else {
1809                                 iod->hdr.rc = 0;
1810                                 copyout(iod, ioh, ifbuf->length);
1811                         }
1812
1813                         rc = 0;
1814                         goto exit;
1815                 }
1816                 case BNXT_HWRM_FW_GET_TIME:
1817                 {
1818                         struct bnxt_ioctl_hwrm_fw_get_time *gtm =
1819                             &iod->get_time;
1820
1821                         rc = bnxt_hwrm_fw_get_time(softc, &gtm->year,
1822                             &gtm->month, &gtm->day, &gtm->hour, &gtm->minute,
1823                             &gtm->second, &gtm->millisecond, &gtm->zone);
1824                         if (rc) {
1825                                 iod->hdr.rc = rc;
1826                                 copyout(&iod->hdr.rc, &ioh->rc,
1827                                     sizeof(ioh->rc));
1828                         }
1829                         else {
1830                                 iod->hdr.rc = 0;
1831                                 copyout(iod, ioh, ifbuf->length);
1832                         }
1833
1834                         rc = 0;
1835                         goto exit;
1836                 }
1837                 case BNXT_HWRM_FW_SET_TIME:
1838                 {
1839                         struct bnxt_ioctl_hwrm_fw_set_time *stm =
1840                             &iod->set_time;
1841
1842                         rc = bnxt_hwrm_fw_set_time(softc, stm->year,
1843                             stm->month, stm->day, stm->hour, stm->minute,
1844                             stm->second, stm->millisecond, stm->zone);
1845                         if (rc) {
1846                                 iod->hdr.rc = rc;
1847                                 copyout(&iod->hdr.rc, &ioh->rc,
1848                                     sizeof(ioh->rc));
1849                         }
1850                         else {
1851                                 iod->hdr.rc = 0;
1852                                 copyout(iod, ioh, ifbuf->length);
1853                         }
1854
1855                         rc = 0;
1856                         goto exit;
1857                 }
1858                 }
1859                 break;
1860         }
1861
1862 exit:
1863         if (iod)
1864                 free(iod, M_DEVBUF);
1865         return rc;
1866 }
1867
1868 /*
1869  * Support functions
1870  */
1871 static int
1872 bnxt_probe_phy(struct bnxt_softc *softc)
1873 {
1874         struct bnxt_link_info *link_info = &softc->link_info;
1875         int rc = 0;
1876
1877         rc = bnxt_update_link(softc, false);
1878         if (rc) {
1879                 device_printf(softc->dev,
1880                     "Probe phy can't update link (rc: %x)\n", rc);
1881                 return (rc);
1882         }
1883
1884         /*initialize the ethool setting copy with NVM settings */
1885         if (link_info->auto_mode != HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE)
1886                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1887
1888         if (link_info->auto_pause & (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1889             HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)) {
1890                 if (link_info->auto_pause == (
1891                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1892                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX))
1893                         link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1894                 link_info->req_flow_ctrl = link_info->auto_pause;
1895         } else if (link_info->force_pause & (
1896             HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1897             HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)) {
1898                 link_info->req_flow_ctrl = link_info->force_pause;
1899         }
1900         link_info->req_duplex = link_info->duplex_setting;
1901         if (link_info->autoneg & BNXT_AUTONEG_SPEED)
1902                 link_info->req_link_speed = link_info->auto_link_speed;
1903         else
1904                 link_info->req_link_speed = link_info->force_link_speed;
1905         return (rc);
1906 }
1907
1908 static void
1909 bnxt_add_media_types(struct bnxt_softc *softc)
1910 {
1911         struct bnxt_link_info *link_info = &softc->link_info;
1912         uint16_t supported;
1913         uint8_t phy_type = get_phy_type(softc);
1914
1915         supported = link_info->support_speeds;
1916
1917         /* Auto is always supported */
1918         ifmedia_add(softc->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1919
1920         if (softc->flags & BNXT_FLAG_NPAR)
1921                 return;
1922
1923         switch (phy_type) {
1924         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
1925                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB)
1926                         ifmedia_add(softc->media, IFM_ETHER | IFM_100G_CR4, 0,
1927                             NULL);
1928                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB)
1929                         ifmedia_add(softc->media, IFM_ETHER | IFM_50G_CR2, 0,
1930                             NULL);
1931                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB)
1932                         ifmedia_add(softc->media, IFM_ETHER | IFM_40G_CR4, 0,
1933                             NULL);
1934                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB)
1935                         ifmedia_add(softc->media, IFM_ETHER | IFM_25G_CR, 0,
1936                             NULL);
1937                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
1938                         ifmedia_add(softc->media, IFM_ETHER | IFM_10G_CR1, 0,
1939                             NULL);
1940                 break;
1941         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN:
1942                 /* Auto only */
1943                 break;
1944         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
1945         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
1946         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
1947                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB)
1948                         ifmedia_add(softc->media, IFM_ETHER | IFM_100G_KR4, 0,
1949                             NULL);
1950                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB)
1951                         ifmedia_add(softc->media, IFM_ETHER | IFM_50G_KR2, 0,
1952                             NULL);
1953                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB)
1954                         ifmedia_add(softc->media, IFM_ETHER | IFM_40G_KR4, 0,
1955                             NULL);
1956                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB)
1957                         ifmedia_add(softc->media, IFM_ETHER | IFM_25G_KR, 0,
1958                             NULL);
1959                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB)
1960                         ifmedia_add(softc->media, IFM_ETHER | IFM_20G_KR2, 0,
1961                             NULL);
1962                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
1963                         ifmedia_add(softc->media, IFM_ETHER | IFM_10G_KR, 0,
1964                             NULL);
1965                 break;
1966         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR:
1967                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB)
1968                         ifmedia_add(softc->media, IFM_ETHER | IFM_100G_LR4, 0,
1969                             NULL);
1970                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB)
1971                         ifmedia_add(softc->media, IFM_ETHER | IFM_40G_LR4, 0,
1972                             NULL);
1973                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
1974                         ifmedia_add(softc->media, IFM_ETHER | IFM_10G_LR, 0,
1975                             NULL);
1976                 break;
1977         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR:
1978                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB)
1979                         ifmedia_add(softc->media, IFM_ETHER | IFM_100G_SR4, 0,
1980                             NULL);
1981                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB)
1982                         ifmedia_add(softc->media, IFM_ETHER | IFM_40G_SR4, 0,
1983                             NULL);
1984                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB)
1985                         ifmedia_add(softc->media, IFM_ETHER | IFM_25G_SR, 0,
1986                             NULL);
1987                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
1988                         ifmedia_add(softc->media, IFM_ETHER | IFM_10G_SR, 0,
1989                             NULL);
1990                 break;
1991         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX:
1992                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
1993                         ifmedia_add(softc->media, IFM_ETHER | IFM_10G_KX4, 0,
1994                             NULL);
1995                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB)
1996                         ifmedia_add(softc->media, IFM_ETHER | IFM_2500_KX, 0,
1997                             NULL);
1998                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB)
1999                         ifmedia_add(softc->media, IFM_ETHER | IFM_1000_KX, 0,
2000                             NULL);
2001                 break;
2002         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET:
2003         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE:
2004                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB)
2005                         ifmedia_add(softc->media, IFM_ETHER | IFM_10_T, 0,
2006                             NULL);
2007                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB)
2008                         ifmedia_add(softc->media, IFM_ETHER | IFM_100_T, 0,
2009                             NULL);
2010                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB)
2011                         ifmedia_add(softc->media, IFM_ETHER | IFM_1000_T, 0,
2012                             NULL);
2013                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB)
2014                         ifmedia_add(softc->media, IFM_ETHER | IFM_2500_T, 0,
2015                             NULL);
2016                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB)
2017                         ifmedia_add(softc->media, IFM_ETHER | IFM_10G_T, 0,
2018                             NULL);
2019                 break;
2020         case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY:
2021                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB)
2022                         ifmedia_add(softc->media, IFM_ETHER | IFM_1000_SGMII, 0,
2023                             NULL);
2024                 break;
2025         }
2026
2027         return;
2028 }
2029
2030 static int
2031 bnxt_map_bar(struct bnxt_softc *softc, struct bnxt_bar_info *bar, int bar_num, bool shareable)
2032 {
2033         uint32_t        flag;
2034
2035         if (bar->res != NULL) {
2036                 device_printf(softc->dev, "Bar %d already mapped\n", bar_num);
2037                 return EDOOFUS;
2038         }
2039
2040         bar->rid = PCIR_BAR(bar_num);
2041         flag = RF_ACTIVE;
2042         if (shareable)
2043                 flag |= RF_SHAREABLE;
2044
2045         if ((bar->res =
2046                 bus_alloc_resource_any(softc->dev,
2047                            SYS_RES_MEMORY,
2048                            &bar->rid,
2049                            flag)) == NULL) {
2050                 device_printf(softc->dev,
2051                     "PCI BAR%d mapping failure\n", bar_num);
2052                 return (ENXIO);
2053         }
2054         bar->tag = rman_get_bustag(bar->res);
2055         bar->handle = rman_get_bushandle(bar->res);
2056         bar->size = rman_get_size(bar->res);
2057
2058         return 0;
2059 }
2060
2061 static int
2062 bnxt_pci_mapping(struct bnxt_softc *softc)
2063 {
2064         int rc;
2065
2066         rc = bnxt_map_bar(softc, &softc->hwrm_bar, 0, true);
2067         if (rc)
2068                 return rc;
2069
2070         rc = bnxt_map_bar(softc, &softc->doorbell_bar, 2, false);
2071
2072         return rc;
2073 }
2074
2075 static void
2076 bnxt_pci_mapping_free(struct bnxt_softc *softc)
2077 {
2078         if (softc->hwrm_bar.res != NULL)
2079                 bus_release_resource(softc->dev, SYS_RES_MEMORY,
2080                     softc->hwrm_bar.rid, softc->hwrm_bar.res);
2081         softc->hwrm_bar.res = NULL;
2082
2083         if (softc->doorbell_bar.res != NULL)
2084                 bus_release_resource(softc->dev, SYS_RES_MEMORY,
2085                     softc->doorbell_bar.rid, softc->doorbell_bar.res);
2086         softc->doorbell_bar.res = NULL;
2087 }
2088
2089 static int
2090 bnxt_update_link(struct bnxt_softc *softc, bool chng_link_state)
2091 {
2092         struct bnxt_link_info *link_info = &softc->link_info;
2093         uint8_t link_up = link_info->link_up;
2094         int rc = 0;
2095
2096         rc = bnxt_hwrm_port_phy_qcfg(softc);
2097         if (rc)
2098                 goto exit;
2099
2100         /* TODO: need to add more logic to report VF link */
2101         if (chng_link_state) {
2102                 if (link_info->phy_link_status ==
2103                     HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK)
2104                         link_info->link_up = 1;
2105                 else
2106                         link_info->link_up = 0;
2107                 if (link_up != link_info->link_up)
2108                         bnxt_report_link(softc);
2109         } else {
2110                 /* always link down if not require to update link state */
2111                 link_info->link_up = 0;
2112         }
2113
2114 exit:
2115         return rc;
2116 }
2117
2118 void
2119 bnxt_report_link(struct bnxt_softc *softc)
2120 {
2121         const char *duplex = NULL, *flow_ctrl = NULL;
2122
2123         if (softc->link_info.link_up == softc->link_info.last_link_up) {
2124                 if (!softc->link_info.link_up)
2125                         return;
2126                 if (softc->link_info.pause == softc->link_info.last_pause &&
2127                     softc->link_info.duplex == softc->link_info.last_duplex)
2128                         return;
2129         }
2130
2131         if (softc->link_info.link_up) {
2132                 if (softc->link_info.duplex ==
2133                     HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL)
2134                         duplex = "full duplex";
2135                 else
2136                         duplex = "half duplex";
2137                 if (softc->link_info.pause == (
2138                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
2139                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX))
2140                         flow_ctrl = "FC - receive & transmit";
2141                 else if (softc->link_info.pause ==
2142                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX)
2143                         flow_ctrl = "FC - transmit";
2144                 else if (softc->link_info.pause ==
2145                     HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX)
2146                         flow_ctrl = "FC - receive";
2147                 else
2148                         flow_ctrl = "none";
2149                 iflib_link_state_change(softc->ctx, LINK_STATE_UP,
2150                     IF_Gbps(100));
2151                 device_printf(softc->dev, "Link is UP %s, %s\n", duplex,
2152                     flow_ctrl);
2153         } else {
2154                 iflib_link_state_change(softc->ctx, LINK_STATE_DOWN,
2155                     bnxt_get_baudrate(&softc->link_info));
2156                 device_printf(softc->dev, "Link is Down\n");
2157         }
2158
2159         softc->link_info.last_link_up = softc->link_info.link_up;
2160         softc->link_info.last_pause = softc->link_info.pause;
2161         softc->link_info.last_duplex = softc->link_info.duplex;
2162 }
2163
2164 static int
2165 bnxt_handle_rx_cp(void *arg)
2166 {
2167         struct bnxt_cp_ring *cpr = arg;
2168
2169         /* Disable further interrupts for this queue */
2170         BNXT_CP_DISABLE_DB(&cpr->ring);
2171         return FILTER_SCHEDULE_THREAD;
2172 }
2173
2174 static int
2175 bnxt_handle_def_cp(void *arg)
2176 {
2177         struct bnxt_softc *softc = arg;
2178
2179         BNXT_CP_DISABLE_DB(&softc->def_cp_ring.ring);
2180         GROUPTASK_ENQUEUE(&softc->def_cp_task);
2181         return FILTER_HANDLED;
2182 }
2183
2184 static void
2185 bnxt_clear_ids(struct bnxt_softc *softc)
2186 {
2187         int i;
2188
2189         softc->def_cp_ring.stats_ctx_id = HWRM_NA_SIGNATURE;
2190         softc->def_cp_ring.ring.phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2191         for (i = 0; i < softc->ntxqsets; i++) {
2192                 softc->tx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
2193                 softc->tx_cp_rings[i].ring.phys_id =
2194                     (uint16_t)HWRM_NA_SIGNATURE;
2195                 softc->tx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2196         }
2197         for (i = 0; i < softc->nrxqsets; i++) {
2198                 softc->rx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
2199                 softc->rx_cp_rings[i].ring.phys_id =
2200                     (uint16_t)HWRM_NA_SIGNATURE;
2201                 softc->rx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2202                 softc->ag_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2203                 softc->grp_info[i].grp_id = (uint16_t)HWRM_NA_SIGNATURE;
2204         }
2205         softc->vnic_info.filter_id = -1;
2206         softc->vnic_info.id = (uint16_t)HWRM_NA_SIGNATURE;
2207         softc->vnic_info.rss_id = (uint16_t)HWRM_NA_SIGNATURE;
2208         memset(softc->vnic_info.rss_grp_tbl.idi_vaddr, 0xff,
2209             softc->vnic_info.rss_grp_tbl.idi_size);
2210 }
2211
2212 static void
2213 bnxt_mark_cpr_invalid(struct bnxt_cp_ring *cpr)
2214 {
2215         struct cmpl_base *cmp = (void *)cpr->ring.vaddr;
2216         int i;
2217
2218         for (i = 0; i < cpr->ring.ring_size; i++)
2219                 cmp[i].info3_v = !cpr->v_bit;
2220 }
2221
2222 static void
2223 bnxt_handle_async_event(struct bnxt_softc *softc, struct cmpl_base *cmpl)
2224 {
2225         struct hwrm_async_event_cmpl *ae = (void *)cmpl;
2226         uint16_t async_id = le16toh(ae->event_id);
2227         struct ifmediareq ifmr;
2228
2229         switch (async_id) {
2230         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE:
2231         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE:
2232         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE:
2233                 bnxt_media_status(softc->ctx, &ifmr);
2234                 break;
2235         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE:
2236         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE:
2237         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED:
2238         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED:
2239         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD:
2240         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD:
2241         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD:
2242         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD:
2243         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR:
2244         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE:
2245         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE:
2246         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE:
2247         case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR:
2248                 device_printf(softc->dev,
2249                     "Unhandled async completion type %u\n", async_id);
2250                 break;
2251         default:
2252                 device_printf(softc->dev,
2253                     "Unknown async completion type %u\n", async_id);
2254                 break;
2255         }
2256 }
2257
2258 static void
2259 bnxt_def_cp_task(void *context)
2260 {
2261         if_ctx_t ctx = context;
2262         struct bnxt_softc *softc = iflib_get_softc(ctx);
2263         struct bnxt_cp_ring *cpr = &softc->def_cp_ring;
2264
2265         /* Handle completions on the default completion ring */
2266         struct cmpl_base *cmpl;
2267         uint32_t cons = cpr->cons;
2268         bool v_bit = cpr->v_bit;
2269         bool last_v_bit;
2270         uint32_t last_cons;
2271         uint16_t type;
2272
2273         for (;;) {
2274                 last_cons = cons;
2275                 last_v_bit = v_bit;
2276                 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
2277                 cmpl = &((struct cmpl_base *)cpr->ring.vaddr)[cons];
2278
2279                 if (!CMP_VALID(cmpl, v_bit))
2280                         break;
2281
2282                 type = le16toh(cmpl->type) & CMPL_BASE_TYPE_MASK;
2283                 switch (type) {
2284                 case CMPL_BASE_TYPE_HWRM_ASYNC_EVENT:
2285                         bnxt_handle_async_event(softc, cmpl);
2286                         break;
2287                 case CMPL_BASE_TYPE_TX_L2:
2288                 case CMPL_BASE_TYPE_RX_L2:
2289                 case CMPL_BASE_TYPE_RX_AGG:
2290                 case CMPL_BASE_TYPE_RX_TPA_START:
2291                 case CMPL_BASE_TYPE_RX_TPA_END:
2292                 case CMPL_BASE_TYPE_STAT_EJECT:
2293                 case CMPL_BASE_TYPE_HWRM_DONE:
2294                 case CMPL_BASE_TYPE_HWRM_FWD_REQ:
2295                 case CMPL_BASE_TYPE_HWRM_FWD_RESP:
2296                 case CMPL_BASE_TYPE_CQ_NOTIFICATION:
2297                 case CMPL_BASE_TYPE_SRQ_EVENT:
2298                 case CMPL_BASE_TYPE_DBQ_EVENT:
2299                 case CMPL_BASE_TYPE_QP_EVENT:
2300                 case CMPL_BASE_TYPE_FUNC_EVENT:
2301                         device_printf(softc->dev,
2302                             "Unhandled completion type %u\n", type);
2303                         break;
2304                 default:
2305                         device_printf(softc->dev,
2306                             "Unknown completion type %u\n", type);
2307                         break;
2308                 }
2309         }
2310
2311         cpr->cons = last_cons;
2312         cpr->v_bit = last_v_bit;
2313         BNXT_CP_IDX_ENABLE_DB(&cpr->ring, cpr->cons);
2314 }
2315
2316 static uint8_t
2317 get_phy_type(struct bnxt_softc *softc)
2318 {
2319         struct bnxt_link_info *link_info = &softc->link_info;
2320         uint8_t phy_type = link_info->phy_type;
2321         uint16_t supported;
2322
2323         if (phy_type != HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN)
2324                 return phy_type;
2325
2326         /* Deduce the phy type from the media type and supported speeds */
2327         supported = link_info->support_speeds;
2328
2329         if (link_info->media_type ==
2330             HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP)
2331                 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET;
2332         if (link_info->media_type ==
2333             HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC) {
2334                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB)
2335                         return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX;
2336                 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB)
2337                         return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR;
2338                 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR;
2339         }
2340         if (link_info->media_type ==
2341             HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE)
2342                 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR;
2343
2344         return phy_type;
2345 }
2346
2347 bool
2348 bnxt_check_hwrm_version(struct bnxt_softc *softc)
2349 {
2350         char buf[16];
2351
2352         sprintf(buf, "%hhu.%hhu.%hhu", softc->ver_info->hwrm_min_major,
2353             softc->ver_info->hwrm_min_minor, softc->ver_info->hwrm_min_update);
2354         if (softc->ver_info->hwrm_min_major > softc->ver_info->hwrm_if_major) {
2355                 device_printf(softc->dev,
2356                     "WARNING: HWRM version %s is too old (older than %s)\n",
2357                     softc->ver_info->hwrm_if_ver, buf);
2358                 return false;
2359         }
2360         else if(softc->ver_info->hwrm_min_major ==
2361             softc->ver_info->hwrm_if_major) {
2362                 if (softc->ver_info->hwrm_min_minor >
2363                     softc->ver_info->hwrm_if_minor) {
2364                         device_printf(softc->dev,
2365                             "WARNING: HWRM version %s is too old (older than %s)\n",
2366                             softc->ver_info->hwrm_if_ver, buf);
2367                         return false;
2368                 }
2369                 else if (softc->ver_info->hwrm_min_minor ==
2370                     softc->ver_info->hwrm_if_minor) {
2371                         if (softc->ver_info->hwrm_min_update >
2372                             softc->ver_info->hwrm_if_update) {
2373                                 device_printf(softc->dev,
2374                                     "WARNING: HWRM version %s is too old (older than %s)\n",
2375                                     softc->ver_info->hwrm_if_ver, buf);
2376                                 return false;
2377                         }
2378                 }
2379         }
2380         return true;
2381 }
2382
2383 static uint64_t
2384 bnxt_get_baudrate(struct bnxt_link_info *link)
2385 {
2386         switch (link->link_speed) {
2387         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB:
2388                 return IF_Mbps(100);
2389         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB:
2390                 return IF_Gbps(1);
2391         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB:
2392                 return IF_Gbps(2);
2393         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB:
2394                 return IF_Mbps(2500);
2395         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB:
2396                 return IF_Gbps(10);
2397         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB:
2398                 return IF_Gbps(20);
2399         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB:
2400                 return IF_Gbps(25);
2401         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB:
2402                 return IF_Gbps(40);
2403         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB:
2404                 return IF_Gbps(50);
2405         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB:
2406                 return IF_Gbps(100);
2407         case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB:
2408                 return IF_Mbps(10);
2409         }
2410         return IF_Gbps(100);
2411 }