sys/dev/bwi/if_bwi.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-3-Clause
   3  *
   4  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
   5  *
   6  * This code is derived from software contributed to The DragonFly Project
   7  * by Sepherosa Ziehau <sepherosa@gmail.com>
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  *
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in
  17  *    the documentation and/or other materials provided with the
  18  *    distribution.
  19  * 3. Neither the name of The DragonFly Project nor the names of its
  20  *    contributors may be used to endorse or promote products derived
  21  *    from this software without specific, prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  25  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  26  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  27  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  28  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  29  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  31  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  33  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  34  * SUCH DAMAGE.
  35  *
  36  * $DragonFly: src/sys/dev/netif/bwi/if_bwi.c,v 1.19 2008/02/15 11:15:38 sephe Exp $
  37  */
  38
  39 #include <sys/cdefs.h>
  40 __FBSDID("$FreeBSD$");
  41
  42 #include "opt_inet.h"
  43 #include "opt_bwi.h"
  44 #include "opt_wlan.h"
  45
  46 #include <sys/param.h>
  47 #include <sys/endian.h>
  48 #include <sys/kernel.h>
  49 #include <sys/bus.h>
  50 #include <sys/malloc.h>
  51 #include <sys/proc.h>
  52 #include <sys/rman.h>
  53 #include <sys/socket.h>
  54 #include <sys/sockio.h>
  55 #include <sys/sysctl.h>
  56 #include <sys/systm.h>
  57 #include <sys/taskqueue.h>
  58
  59 #include <net/if.h>
  60 #include <net/if_var.h>
  61 #include <net/if_dl.h>
  62 #include <net/if_media.h>
  63 #include <net/if_types.h>
  64 #include <net/if_arp.h>
  65 #include <net/ethernet.h>
  66 #include <net/if_llc.h>
  67
  68 #include <net80211/ieee80211_var.h>
  69 #include <net80211/ieee80211_radiotap.h>
  70 #include <net80211/ieee80211_regdomain.h>
  71 #include <net80211/ieee80211_phy.h>
  72 #include <net80211/ieee80211_ratectl.h>
  73
  74 #include <net/bpf.h>
  75
  76 #ifdef INET
  77 #include <netinet/in.h>
  78 #include <netinet/if_ether.h>
  79 #endif
  80
  81 #include <machine/bus.h>
  82
  83 #include <dev/pci/pcivar.h>
  84 #include <dev/pci/pcireg.h>
  85
  86 #include <dev/bwi/bitops.h>
  87 #include <dev/bwi/if_bwireg.h>
  88 #include <dev/bwi/if_bwivar.h>
  89 #include <dev/bwi/bwimac.h>
  90 #include <dev/bwi/bwirf.h>
  91
  92 struct bwi_clock_freq {
  93         u_int           clkfreq_min;
  94         u_int           clkfreq_max;
  95 };
  96
  97 struct bwi_myaddr_bssid {
  98         uint8_t         myaddr[IEEE80211_ADDR_LEN];
  99         uint8_t         bssid[IEEE80211_ADDR_LEN];
 100 } __packed;
 101
 102 static struct ieee80211vap *bwi_vap_create(struct ieee80211com *,
 103                     const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
 104                     const uint8_t [IEEE80211_ADDR_LEN],
 105                     const uint8_t [IEEE80211_ADDR_LEN]);
 106 static void     bwi_vap_delete(struct ieee80211vap *);
 107 static void     bwi_init(struct bwi_softc *);
 108 static void     bwi_parent(struct ieee80211com *);
 109 static int      bwi_transmit(struct ieee80211com *, struct mbuf *);
 110 static void     bwi_start_locked(struct bwi_softc *);
 111 static int      bwi_raw_xmit(struct ieee80211_node *, struct mbuf *,
 112                         const struct ieee80211_bpf_params *);
 113 static void     bwi_watchdog(void *);
 114 static void     bwi_scan_start(struct ieee80211com *);
 115 static void     bwi_getradiocaps(struct ieee80211com *, int, int *,
 116                     struct ieee80211_channel[]);
 117 static void     bwi_set_channel(struct ieee80211com *);
 118 static void     bwi_scan_end(struct ieee80211com *);
 119 static int      bwi_newstate(struct ieee80211vap *, enum ieee80211_state, int);
 120 static void     bwi_updateslot(struct ieee80211com *);
 121 static int      bwi_media_change(struct ifnet *);
 122
 123 static void     bwi_calibrate(void *);
 124
 125 static int      bwi_calc_rssi(struct bwi_softc *, const struct bwi_rxbuf_hdr *);
 126 static int      bwi_calc_noise(struct bwi_softc *);
 127 static __inline uint8_t bwi_plcp2rate(uint32_t, enum ieee80211_phytype);
 128 static void     bwi_rx_radiotap(struct bwi_softc *, struct mbuf *,
 129                         struct bwi_rxbuf_hdr *, const void *, int, int, int);
 130
 131 static void     bwi_restart(void *, int);
 132 static void     bwi_init_statechg(struct bwi_softc *, int);
 133 static void     bwi_stop(struct bwi_softc *, int);
 134 static void     bwi_stop_locked(struct bwi_softc *, int);
 135 static int      bwi_newbuf(struct bwi_softc *, int, int);
 136 static int      bwi_encap(struct bwi_softc *, int, struct mbuf *,
 137                           struct ieee80211_node *);
 138 static int      bwi_encap_raw(struct bwi_softc *, int, struct mbuf *,
 139                           struct ieee80211_node *,
 140                           const struct ieee80211_bpf_params *);
 141
 142 static void     bwi_init_rxdesc_ring32(struct bwi_softc *, uint32_t,
 143                                        bus_addr_t, int, int);
 144 static void     bwi_reset_rx_ring32(struct bwi_softc *, uint32_t);
 145
 146 static int      bwi_init_tx_ring32(struct bwi_softc *, int);
 147 static int      bwi_init_rx_ring32(struct bwi_softc *);
 148 static int      bwi_init_txstats32(struct bwi_softc *);
 149 static void     bwi_free_tx_ring32(struct bwi_softc *, int);
 150 static void     bwi_free_rx_ring32(struct bwi_softc *);
 151 static void     bwi_free_txstats32(struct bwi_softc *);
 152 static void     bwi_setup_rx_desc32(struct bwi_softc *, int, bus_addr_t, int);
 153 static void     bwi_setup_tx_desc32(struct bwi_softc *, struct bwi_ring_data *,
 154                                     int, bus_addr_t, int);
 155 static int      bwi_rxeof32(struct bwi_softc *);
 156 static void     bwi_start_tx32(struct bwi_softc *, uint32_t, int);
 157 static void     bwi_txeof_status32(struct bwi_softc *);
 158
 159 static int      bwi_init_tx_ring64(struct bwi_softc *, int);
 160 static int      bwi_init_rx_ring64(struct bwi_softc *);
 161 static int      bwi_init_txstats64(struct bwi_softc *);
 162 static void     bwi_free_tx_ring64(struct bwi_softc *, int);
 163 static void     bwi_free_rx_ring64(struct bwi_softc *);
 164 static void     bwi_free_txstats64(struct bwi_softc *);
 165 static void     bwi_setup_rx_desc64(struct bwi_softc *, int, bus_addr_t, int);
 166 static void     bwi_setup_tx_desc64(struct bwi_softc *, struct bwi_ring_data *,
 167                                     int, bus_addr_t, int);
 168 static int      bwi_rxeof64(struct bwi_softc *);
 169 static void     bwi_start_tx64(struct bwi_softc *, uint32_t, int);
 170 static void     bwi_txeof_status64(struct bwi_softc *);
 171
 172 static int      bwi_rxeof(struct bwi_softc *, int);
 173 static void     _bwi_txeof(struct bwi_softc *, uint16_t, int, int);
 174 static void     bwi_txeof(struct bwi_softc *);
 175 static void     bwi_txeof_status(struct bwi_softc *, int);
 176 static void     bwi_enable_intrs(struct bwi_softc *, uint32_t);
 177 static void     bwi_disable_intrs(struct bwi_softc *, uint32_t);
 178
 179 static int      bwi_dma_alloc(struct bwi_softc *);
 180 static void     bwi_dma_free(struct bwi_softc *);
 181 static int      bwi_dma_ring_alloc(struct bwi_softc *, bus_dma_tag_t,
 182                                    struct bwi_ring_data *, bus_size_t,
 183                                    uint32_t);
 184 static int      bwi_dma_mbuf_create(struct bwi_softc *);
 185 static void     bwi_dma_mbuf_destroy(struct bwi_softc *, int, int);
 186 static int      bwi_dma_txstats_alloc(struct bwi_softc *, uint32_t, bus_size_t);
 187 static void     bwi_dma_txstats_free(struct bwi_softc *);
 188 static void     bwi_dma_ring_addr(void *, bus_dma_segment_t *, int, int);
 189 static void     bwi_dma_buf_addr(void *, bus_dma_segment_t *, int,
 190                                  bus_size_t, int);
 191
 192 static void     bwi_power_on(struct bwi_softc *, int);
 193 static int      bwi_power_off(struct bwi_softc *, int);
 194 static int      bwi_set_clock_mode(struct bwi_softc *, enum bwi_clock_mode);
 195 static int      bwi_set_clock_delay(struct bwi_softc *);
 196 static void     bwi_get_clock_freq(struct bwi_softc *, struct bwi_clock_freq *);
 197 static int      bwi_get_pwron_delay(struct bwi_softc *sc);
 198 static void     bwi_set_addr_filter(struct bwi_softc *, uint16_t,
 199                                     const uint8_t *);
 200 static void     bwi_set_bssid(struct bwi_softc *, const uint8_t *);
 201
 202 static void     bwi_get_card_flags(struct bwi_softc *);
 203 static void     bwi_get_eaddr(struct bwi_softc *, uint16_t, uint8_t *);
 204
 205 static int      bwi_bus_attach(struct bwi_softc *);
 206 static int      bwi_bbp_attach(struct bwi_softc *);
 207 static int      bwi_bbp_power_on(struct bwi_softc *, enum bwi_clock_mode);
 208 static void     bwi_bbp_power_off(struct bwi_softc *);
 209
 210 static const char *bwi_regwin_name(const struct bwi_regwin *);
 211 static uint32_t bwi_regwin_disable_bits(struct bwi_softc *);
 212 static void     bwi_regwin_info(struct bwi_softc *, uint16_t *, uint8_t *);
 213 static int      bwi_regwin_select(struct bwi_softc *, int);
 214
 215 static void     bwi_led_attach(struct bwi_softc *);
 216 static void     bwi_led_newstate(struct bwi_softc *, enum ieee80211_state);
 217 static void     bwi_led_event(struct bwi_softc *, int);
 218 static void     bwi_led_blink_start(struct bwi_softc *, int, int);
 219 static void     bwi_led_blink_next(void *);
 220 static void     bwi_led_blink_end(void *);
 221
 222 static const struct {
 223         uint16_t        did_min;
 224         uint16_t        did_max;
 225         uint16_t        bbp_id;
 226 } bwi_bbpid_map[] = {
 227         { 0x4301, 0x4301, 0x4301 },
 228         { 0x4305, 0x4307, 0x4307 },
 229         { 0x4402, 0x4403, 0x4402 },
 230         { 0x4610, 0x4615, 0x4610 },
 231         { 0x4710, 0x4715, 0x4710 },
 232         { 0x4720, 0x4725, 0x4309 }
 233 };
 234
 235 static const struct {
 236         uint16_t        bbp_id;
 237         int             nregwin;
 238 } bwi_regwin_count[] = {
 239         { 0x4301, 5 },
 240         { 0x4306, 6 },
 241         { 0x4307, 5 },
 242         { 0x4310, 8 },
 243         { 0x4401, 3 },
 244         { 0x4402, 3 },
 245         { 0x4610, 9 },
 246         { 0x4704, 9 },
 247         { 0x4710, 9 },
 248         { 0x5365, 7 }
 249 };
 250
 251 #define CLKSRC(src)                             \
 252 [BWI_CLKSRC_ ## src] = {                        \
 253         .freq_min = BWI_CLKSRC_ ##src## _FMIN,  \
 254         .freq_max = BWI_CLKSRC_ ##src## _FMAX   \
 255 }
 256
 257 static const struct {
 258         u_int   freq_min;
 259         u_int   freq_max;
 260 } bwi_clkfreq[BWI_CLKSRC_MAX] = {
 261         CLKSRC(LP_OSC),
 262         CLKSRC(CS_OSC),
 263         CLKSRC(PCI)
 264 };
 265
 266 #undef CLKSRC
 267
 268 #define VENDOR_LED_ACT(vendor)                          \
 269 {                                                       \
 270         .vid = PCI_VENDOR_##vendor,                     \
 271         .led_act = { BWI_VENDOR_LED_ACT_##vendor }      \
 272 }
 273
 274 static const struct {
 275 #define PCI_VENDOR_COMPAQ       0x0e11
 276 #define PCI_VENDOR_LINKSYS      0x1737
 277         uint16_t        vid;
 278         uint8_t         led_act[BWI_LED_MAX];
 279 } bwi_vendor_led_act[] = {
 280         VENDOR_LED_ACT(COMPAQ),
 281         VENDOR_LED_ACT(LINKSYS)
 282 #undef PCI_VENDOR_LINKSYS
 283 #undef PCI_VENDOR_COMPAQ
 284 };
 285
 286 static const uint8_t bwi_default_led_act[BWI_LED_MAX] =
 287         { BWI_VENDOR_LED_ACT_DEFAULT };
 288
 289 #undef VENDOR_LED_ACT
 290
 291 static const struct {
 292         int     on_dur;
 293         int     off_dur;
 294 } bwi_led_duration[109] = {
 295         [0]     = { 400, 100 },
 296         [2]     = { 150, 75 },
 297         [4]     = { 90, 45 },
 298         [11]    = { 66, 34 },
 299         [12]    = { 53, 26 },
 300         [18]    = { 42, 21 },
 301         [22]    = { 35, 17 },
 302         [24]    = { 32, 16 },
 303         [36]    = { 21, 10 },
 304         [48]    = { 16, 8 },
 305         [72]    = { 11, 5 },
 306         [96]    = { 9, 4 },
 307         [108]   = { 7, 3 }
 308 };
 309
 310 static const uint8_t bwi_chan_2ghz[] =
 311         { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 };
 312
 313 #ifdef BWI_DEBUG
 314 #ifdef BWI_DEBUG_VERBOSE
 315 static uint32_t bwi_debug = BWI_DBG_ATTACH | BWI_DBG_INIT | BWI_DBG_TXPOWER;
 316 #else
 317 static uint32_t bwi_debug;
 318 #endif
 319 TUNABLE_INT("hw.bwi.debug", (int *)&bwi_debug);
 320 #endif  /* BWI_DEBUG */
 321
 322 static const uint8_t bwi_zero_addr[IEEE80211_ADDR_LEN];
 323
 324 uint16_t
 325 bwi_read_sprom(struct bwi_softc *sc, uint16_t ofs)
 326 {
 327         return CSR_READ_2(sc, ofs + BWI_SPROM_START);
 328 }
 329
 330 static __inline void
 331 bwi_setup_desc32(struct bwi_softc *sc, struct bwi_desc32 *desc_array,
 332                  int ndesc, int desc_idx, bus_addr_t paddr, int buf_len,
 333                  int tx)
 334 {
 335         struct bwi_desc32 *desc = &desc_array[desc_idx];
 336         uint32_t ctrl, addr, addr_hi, addr_lo;
 337
 338         addr_lo = __SHIFTOUT(paddr, BWI_DESC32_A_ADDR_MASK);
 339         addr_hi = __SHIFTOUT(paddr, BWI_DESC32_A_FUNC_MASK);
 340
 341         addr = __SHIFTIN(addr_lo, BWI_DESC32_A_ADDR_MASK) |
 342                __SHIFTIN(BWI_DESC32_A_FUNC_TXRX, BWI_DESC32_A_FUNC_MASK);
 343
 344         ctrl = __SHIFTIN(buf_len, BWI_DESC32_C_BUFLEN_MASK) |
 345                __SHIFTIN(addr_hi, BWI_DESC32_C_ADDRHI_MASK);
 346         if (desc_idx == ndesc - 1)
 347                 ctrl |= BWI_DESC32_C_EOR;
 348         if (tx) {
 349                 /* XXX */
 350                 ctrl |= BWI_DESC32_C_FRAME_START |
 351                         BWI_DESC32_C_FRAME_END |
 352                         BWI_DESC32_C_INTR;
 353         }
 354
 355         desc->addr = htole32(addr);
 356         desc->ctrl = htole32(ctrl);
 357 }
 358
 359 int
 360 bwi_attach(struct bwi_softc *sc)
 361 {
 362         struct ieee80211com *ic = &sc->sc_ic;
 363         device_t dev = sc->sc_dev;
 364         struct bwi_mac *mac;
 365         struct bwi_phy *phy;
 366         int i, error;
 367
 368         BWI_LOCK_INIT(sc);
 369
 370         /*
 371          * Initialize taskq and various tasks
 372          */
 373         sc->sc_tq = taskqueue_create("bwi_taskq", M_NOWAIT | M_ZERO,
 374                 taskqueue_thread_enqueue, &sc->sc_tq);
 375         taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq",
 376                 device_get_nameunit(dev));
 377         TASK_INIT(&sc->sc_restart_task, 0, bwi_restart, sc);
 378         callout_init_mtx(&sc->sc_calib_ch, &sc->sc_mtx, 0);
 379         mbufq_init(&sc->sc_snd, ifqmaxlen);
 380
 381         /*
 382          * Initialize sysctl variables
 383          */
 384         sc->sc_fw_version = BWI_FW_VERSION3;
 385         sc->sc_led_idle = (2350 * hz) / 1000;
 386         sc->sc_led_ticks = ticks - sc->sc_led_idle;
 387         sc->sc_led_blink = 1;
 388         sc->sc_txpwr_calib = 1;
 389 #ifdef BWI_DEBUG
 390         sc->sc_debug = bwi_debug;
 391 #endif
 392         bwi_power_on(sc, 1);
 393
 394         error = bwi_bbp_attach(sc);
 395         if (error)
 396                 goto fail;
 397
 398         error = bwi_bbp_power_on(sc, BWI_CLOCK_MODE_FAST);
 399         if (error)
 400                 goto fail;
 401
 402         if (BWI_REGWIN_EXIST(&sc->sc_com_regwin)) {
 403                 error = bwi_set_clock_delay(sc);
 404                 if (error)
 405                         goto fail;
 406
 407                 error = bwi_set_clock_mode(sc, BWI_CLOCK_MODE_FAST);
 408                 if (error)
 409                         goto fail;
 410
 411                 error = bwi_get_pwron_delay(sc);
 412                 if (error)
 413                         goto fail;
 414         }
 415
 416         error = bwi_bus_attach(sc);
 417         if (error)
 418                 goto fail;
 419
 420         bwi_get_card_flags(sc);
 421
 422         bwi_led_attach(sc);
 423
 424         for (i = 0; i < sc->sc_nmac; ++i) {
 425                 struct bwi_regwin *old;
 426
 427                 mac = &sc->sc_mac[i];
 428                 error = bwi_regwin_switch(sc, &mac->mac_regwin, &old);
 429                 if (error)
 430                         goto fail;
 431
 432                 error = bwi_mac_lateattach(mac);
 433                 if (error)
 434                         goto fail;
 435
 436                 error = bwi_regwin_switch(sc, old, NULL);
 437                 if (error)
 438                         goto fail;
 439         }
 440
 441         /*
 442          * XXX First MAC is known to exist
 443          * TODO2
 444          */
 445         mac = &sc->sc_mac[0];
 446         phy = &mac->mac_phy;
 447
 448         bwi_bbp_power_off(sc);
 449
 450         error = bwi_dma_alloc(sc);
 451         if (error)
 452                 goto fail;
 453
 454         error = bwi_mac_fw_alloc(mac);
 455         if (error)
 456                 goto fail;
 457
 458         callout_init_mtx(&sc->sc_watchdog_timer, &sc->sc_mtx, 0);
 459
 460         /*
 461          * Setup ratesets, phytype, channels and get MAC address
 462          */
 463         if (phy->phy_mode == IEEE80211_MODE_11B ||
 464             phy->phy_mode == IEEE80211_MODE_11G) {
 465                 if (phy->phy_mode == IEEE80211_MODE_11B) {
 466                         ic->ic_phytype = IEEE80211_T_DS;
 467                 } else {
 468                         ic->ic_phytype = IEEE80211_T_OFDM;
 469                 }
 470
 471                 bwi_get_eaddr(sc, BWI_SPROM_11BG_EADDR, ic->ic_macaddr);
 472                 if (IEEE80211_IS_MULTICAST(ic->ic_macaddr)) {
 473                         bwi_get_eaddr(sc, BWI_SPROM_11A_EADDR, ic->ic_macaddr);
 474                         if (IEEE80211_IS_MULTICAST(ic->ic_macaddr)) {
 475                                 device_printf(dev,
 476                                     "invalid MAC address: %6D\n",
 477                                     ic->ic_macaddr, ":");
 478                         }
 479                 }
 480         } else if (phy->phy_mode == IEEE80211_MODE_11A) {
 481                 /* TODO:11A */
 482                 error = ENXIO;
 483                 goto fail;
 484         } else {
 485                 panic("unknown phymode %d\n", phy->phy_mode);
 486         }
 487
 488         /* Get locale */
 489         sc->sc_locale = __SHIFTOUT(bwi_read_sprom(sc, BWI_SPROM_CARD_INFO),
 490                                    BWI_SPROM_CARD_INFO_LOCALE);
 491         DPRINTF(sc, BWI_DBG_ATTACH, "locale: %d\n", sc->sc_locale);
 492         /* XXX use locale */
 493
 494         ic->ic_softc = sc;
 495
 496         bwi_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
 497             ic->ic_channels);
 498
 499         ic->ic_name = device_get_nameunit(dev);
 500         ic->ic_caps = IEEE80211_C_STA |
 501                       IEEE80211_C_SHSLOT |
 502                       IEEE80211_C_SHPREAMBLE |
 503                       IEEE80211_C_WPA |
 504                       IEEE80211_C_BGSCAN |
 505                       IEEE80211_C_MONITOR;
 506         ic->ic_opmode = IEEE80211_M_STA;
 507         ieee80211_ifattach(ic);
 508
 509         ic->ic_headroom = sizeof(struct bwi_txbuf_hdr);
 510
 511         /* override default methods */
 512         ic->ic_vap_create = bwi_vap_create;
 513         ic->ic_vap_delete = bwi_vap_delete;
 514         ic->ic_raw_xmit = bwi_raw_xmit;
 515         ic->ic_updateslot = bwi_updateslot;
 516         ic->ic_scan_start = bwi_scan_start;
 517         ic->ic_scan_end = bwi_scan_end;
 518         ic->ic_getradiocaps = bwi_getradiocaps;
 519         ic->ic_set_channel = bwi_set_channel;
 520         ic->ic_transmit = bwi_transmit;
 521         ic->ic_parent = bwi_parent;
 522
 523         sc->sc_rates = ieee80211_get_ratetable(ic->ic_curchan);
 524
 525         ieee80211_radiotap_attach(ic,
 526             &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th),
 527                 BWI_TX_RADIOTAP_PRESENT,
 528             &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th),
 529                 BWI_RX_RADIOTAP_PRESENT);
 530
 531         /*
 532          * Add sysctl nodes
 533          */
 534         SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
 535                         SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
 536                         "fw_version", CTLFLAG_RD, &sc->sc_fw_version, 0,
 537                         "Firmware version");
 538         SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
 539                         SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
 540                         "led_idle", CTLFLAG_RW, &sc->sc_led_idle, 0,
 541                         "# ticks before LED enters idle state");
 542         SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
 543                        SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
 544                        "led_blink", CTLFLAG_RW, &sc->sc_led_blink, 0,
 545                        "Allow LED to blink");
 546         SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
 547                        SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
 548                        "txpwr_calib", CTLFLAG_RW, &sc->sc_txpwr_calib, 0,
 549                        "Enable software TX power calibration");
 550 #ifdef BWI_DEBUG
 551         SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
 552                         SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
 553                         "debug", CTLFLAG_RW, &sc->sc_debug, 0, "Debug flags");
 554 #endif
 555         if (bootverbose)
 556                 ieee80211_announce(ic);
 557
 558         return (0);
 559 fail:
 560         BWI_LOCK_DESTROY(sc);
 561         return (error);
 562 }
 563
 564 int
 565 bwi_detach(struct bwi_softc *sc)
 566 {
 567         struct ieee80211com *ic = &sc->sc_ic;
 568         int i;
 569
 570         bwi_stop(sc, 1);
 571         callout_drain(&sc->sc_led_blink_ch);
 572         callout_drain(&sc->sc_calib_ch);
 573         callout_drain(&sc->sc_watchdog_timer);
 574         ieee80211_ifdetach(ic);
 575
 576         for (i = 0; i < sc->sc_nmac; ++i)
 577                 bwi_mac_detach(&sc->sc_mac[i]);
 578         bwi_dma_free(sc);
 579         taskqueue_free(sc->sc_tq);
 580         mbufq_drain(&sc->sc_snd);
 581
 582         BWI_LOCK_DESTROY(sc);
 583
 584         return (0);
 585 }
 586
 587 static struct ieee80211vap *
 588 bwi_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
 589     enum ieee80211_opmode opmode, int flags,
 590     const uint8_t bssid[IEEE80211_ADDR_LEN],
 591     const uint8_t mac[IEEE80211_ADDR_LEN])
 592 {
 593         struct bwi_vap *bvp;
 594         struct ieee80211vap *vap;
 595
 596         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
 597                 return NULL;
 598         bvp = malloc(sizeof(struct bwi_vap), M_80211_VAP, M_WAITOK | M_ZERO);
 599         vap = &bvp->bv_vap;
 600         /* enable s/w bmiss handling for sta mode */
 601         ieee80211_vap_setup(ic, vap, name, unit, opmode,
 602             flags | IEEE80211_CLONE_NOBEACONS, bssid);
 603
 604         /* override default methods */
 605         bvp->bv_newstate = vap->iv_newstate;
 606         vap->iv_newstate = bwi_newstate;
 607 #if 0
 608         vap->iv_update_beacon = bwi_beacon_update;
 609 #endif
 610         ieee80211_ratectl_init(vap);
 611
 612         /* complete setup */
 613         ieee80211_vap_attach(vap, bwi_media_change, ieee80211_media_status,
 614             mac);
 615         ic->ic_opmode = opmode;
 616         return vap;
 617 }
 618
 619 static void
 620 bwi_vap_delete(struct ieee80211vap *vap)
 621 {
 622         struct bwi_vap *bvp = BWI_VAP(vap);
 623
 624         ieee80211_ratectl_deinit(vap);
 625         ieee80211_vap_detach(vap);
 626         free(bvp, M_80211_VAP);
 627 }
 628
 629 void
 630 bwi_suspend(struct bwi_softc *sc)
 631 {
 632         bwi_stop(sc, 1);
 633 }
 634
 635 void
 636 bwi_resume(struct bwi_softc *sc)
 637 {
 638
 639         if (sc->sc_ic.ic_nrunning > 0)
 640                 bwi_init(sc);
 641 }
 642
 643 int
 644 bwi_shutdown(struct bwi_softc *sc)
 645 {
 646         bwi_stop(sc, 1);
 647         return 0;
 648 }
 649
 650 static void
 651 bwi_power_on(struct bwi_softc *sc, int with_pll)
 652 {
 653         uint32_t gpio_in, gpio_out, gpio_en;
 654         uint16_t status;
 655
 656         gpio_in = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_IN, 4);
 657         if (gpio_in & BWI_PCIM_GPIO_PWR_ON)
 658                 goto back;
 659
 660         gpio_out = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
 661         gpio_en = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, 4);
 662
 663         gpio_out |= BWI_PCIM_GPIO_PWR_ON;
 664         gpio_en |= BWI_PCIM_GPIO_PWR_ON;
 665         if (with_pll) {
 666                 /* Turn off PLL first */
 667                 gpio_out |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 668                 gpio_en |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 669         }
 670
 671         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 672         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, gpio_en, 4);
 673         DELAY(1000);
 674
 675         if (with_pll) {
 676                 /* Turn on PLL */
 677                 gpio_out &= ~BWI_PCIM_GPIO_PLL_PWR_OFF;
 678                 pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 679                 DELAY(5000);
 680         }
 681
 682 back:
 683         /* Clear "Signaled Target Abort" */
 684         status = pci_read_config(sc->sc_dev, PCIR_STATUS, 2);
 685         status &= ~PCIM_STATUS_STABORT;
 686         pci_write_config(sc->sc_dev, PCIR_STATUS, status, 2);
 687 }
 688
 689 static int
 690 bwi_power_off(struct bwi_softc *sc, int with_pll)
 691 {
 692         uint32_t gpio_out, gpio_en;
 693
 694         pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_IN, 4); /* dummy read */
 695         gpio_out = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
 696         gpio_en = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, 4);
 697
 698         gpio_out &= ~BWI_PCIM_GPIO_PWR_ON;
 699         gpio_en |= BWI_PCIM_GPIO_PWR_ON;
 700         if (with_pll) {
 701                 gpio_out |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 702                 gpio_en |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 703         }
 704
 705         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 706         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, gpio_en, 4);
 707         return 0;
 708 }
 709
 710 int
 711 bwi_regwin_switch(struct bwi_softc *sc, struct bwi_regwin *rw,
 712                   struct bwi_regwin **old_rw)
 713 {
 714         int error;
 715
 716         if (old_rw != NULL)
 717                 *old_rw = NULL;
 718
 719         if (!BWI_REGWIN_EXIST(rw))
 720                 return EINVAL;
 721
 722         if (sc->sc_cur_regwin != rw) {
 723                 error = bwi_regwin_select(sc, rw->rw_id);
 724                 if (error) {
 725                         device_printf(sc->sc_dev, "can't select regwin %d\n",
 726                                   rw->rw_id);
 727                         return error;
 728                 }
 729         }
 730
 731         if (old_rw != NULL)
 732                 *old_rw = sc->sc_cur_regwin;
 733         sc->sc_cur_regwin = rw;
 734         return 0;
 735 }
 736
 737 static int
 738 bwi_regwin_select(struct bwi_softc *sc, int id)
 739 {
 740         uint32_t win = BWI_PCIM_REGWIN(id);
 741         int i;
 742
 743 #define RETRY_MAX       50
 744         for (i = 0; i < RETRY_MAX; ++i) {
 745                 pci_write_config(sc->sc_dev, BWI_PCIR_SEL_REGWIN, win, 4);
 746                 if (pci_read_config(sc->sc_dev, BWI_PCIR_SEL_REGWIN, 4) == win)
 747                         return 0;
 748                 DELAY(10);
 749         }
 750 #undef RETRY_MAX
 751
 752         return ENXIO;
 753 }
 754
 755 static void
 756 bwi_regwin_info(struct bwi_softc *sc, uint16_t *type, uint8_t *rev)
 757 {
 758         uint32_t val;
 759
 760         val = CSR_READ_4(sc, BWI_ID_HI);
 761         *type = BWI_ID_HI_REGWIN_TYPE(val);
 762         *rev = BWI_ID_HI_REGWIN_REV(val);
 763
 764         DPRINTF(sc, BWI_DBG_ATTACH, "regwin: type 0x%03x, rev %d, "
 765                 "vendor 0x%04x\n", *type, *rev,
 766                 __SHIFTOUT(val, BWI_ID_HI_REGWIN_VENDOR_MASK));
 767 }
 768
 769 static int
 770 bwi_bbp_attach(struct bwi_softc *sc)
 771 {
 772         uint16_t bbp_id, rw_type;
 773         uint8_t rw_rev;
 774         uint32_t info;
 775         int error, nregwin, i;
 776
 777         /*
 778          * Get 0th regwin information
 779          * NOTE: 0th regwin should exist
 780          */
 781         error = bwi_regwin_select(sc, 0);
 782         if (error) {
 783                 device_printf(sc->sc_dev, "can't select regwin 0\n");
 784                 return error;
 785         }
 786         bwi_regwin_info(sc, &rw_type, &rw_rev);
 787
 788         /*
 789          * Find out BBP id
 790          */
 791         bbp_id = 0;
 792         info = 0;
 793         if (rw_type == BWI_REGWIN_T_COM) {
 794                 info = CSR_READ_4(sc, BWI_INFO);
 795                 bbp_id = __SHIFTOUT(info, BWI_INFO_BBPID_MASK);
 796
 797                 BWI_CREATE_REGWIN(&sc->sc_com_regwin, 0, rw_type, rw_rev);
 798
 799                 sc->sc_cap = CSR_READ_4(sc, BWI_CAPABILITY);
 800         } else {
 801                 for (i = 0; i < nitems(bwi_bbpid_map); ++i) {
 802                         if (sc->sc_pci_did >= bwi_bbpid_map[i].did_min &&
 803                             sc->sc_pci_did <= bwi_bbpid_map[i].did_max) {
 804                                 bbp_id = bwi_bbpid_map[i].bbp_id;
 805                                 break;
 806                         }
 807                 }
 808                 if (bbp_id == 0) {
 809                         device_printf(sc->sc_dev, "no BBP id for device id "
 810                                       "0x%04x\n", sc->sc_pci_did);
 811                         return ENXIO;
 812                 }
 813
 814                 info = __SHIFTIN(sc->sc_pci_revid, BWI_INFO_BBPREV_MASK) |
 815                        __SHIFTIN(0, BWI_INFO_BBPPKG_MASK);
 816         }
 817
 818         /*
 819          * Find out number of regwins
 820          */
 821         nregwin = 0;
 822         if (rw_type == BWI_REGWIN_T_COM && rw_rev >= 4) {
 823                 nregwin = __SHIFTOUT(info, BWI_INFO_NREGWIN_MASK);
 824         } else {
 825                 for (i = 0; i < nitems(bwi_regwin_count); ++i) {
 826                         if (bwi_regwin_count[i].bbp_id == bbp_id) {
 827                                 nregwin = bwi_regwin_count[i].nregwin;
 828                                 break;
 829                         }
 830                 }
 831                 if (nregwin == 0) {
 832                         device_printf(sc->sc_dev, "no number of win for "
 833                                       "BBP id 0x%04x\n", bbp_id);
 834                         return ENXIO;
 835                 }
 836         }
 837
 838         /* Record BBP id/rev for later using */
 839         sc->sc_bbp_id = bbp_id;
 840         sc->sc_bbp_rev = __SHIFTOUT(info, BWI_INFO_BBPREV_MASK);
 841         sc->sc_bbp_pkg = __SHIFTOUT(info, BWI_INFO_BBPPKG_MASK);
 842         device_printf(sc->sc_dev, "BBP: id 0x%04x, rev 0x%x, pkg %d\n",
 843                       sc->sc_bbp_id, sc->sc_bbp_rev, sc->sc_bbp_pkg);
 844
 845         DPRINTF(sc, BWI_DBG_ATTACH, "nregwin %d, cap 0x%08x\n",
 846                 nregwin, sc->sc_cap);
 847
 848         /*
 849          * Create rest of the regwins
 850          */
 851
 852         /* Don't re-create common regwin, if it is already created */
 853         i = BWI_REGWIN_EXIST(&sc->sc_com_regwin) ? 1 : 0;
 854
 855         for (; i < nregwin; ++i) {
 856                 /*
 857                  * Get regwin information
 858                  */
 859                 error = bwi_regwin_select(sc, i);
 860                 if (error) {
 861                         device_printf(sc->sc_dev,
 862                                       "can't select regwin %d\n", i);
 863                         return error;
 864                 }
 865                 bwi_regwin_info(sc, &rw_type, &rw_rev);
 866
 867                 /*
 868                  * Try attach:
 869                  * 1) Bus (PCI/PCIE) regwin
 870                  * 2) MAC regwin
 871                  * Ignore rest types of regwin
 872                  */
 873                 if (rw_type == BWI_REGWIN_T_BUSPCI ||
 874                     rw_type == BWI_REGWIN_T_BUSPCIE) {
 875                         if (BWI_REGWIN_EXIST(&sc->sc_bus_regwin)) {
 876                                 device_printf(sc->sc_dev,
 877                                               "bus regwin already exists\n");
 878                         } else {
 879                                 BWI_CREATE_REGWIN(&sc->sc_bus_regwin, i,
 880                                                   rw_type, rw_rev);
 881                         }
 882                 } else if (rw_type == BWI_REGWIN_T_MAC) {
 883                         /* XXX ignore return value */
 884                         bwi_mac_attach(sc, i, rw_rev);
 885                 }
 886         }
 887
 888         /* At least one MAC shold exist */
 889         if (!BWI_REGWIN_EXIST(&sc->sc_mac[0].mac_regwin)) {
 890                 device_printf(sc->sc_dev, "no MAC was found\n");
 891                 return ENXIO;
 892         }
 893         KASSERT(sc->sc_nmac > 0, ("no mac's"));
 894
 895         /* Bus regwin must exist */
 896         if (!BWI_REGWIN_EXIST(&sc->sc_bus_regwin)) {
 897                 device_printf(sc->sc_dev, "no bus regwin was found\n");
 898                 return ENXIO;
 899         }
 900
 901         /* Start with first MAC */
 902         error = bwi_regwin_switch(sc, &sc->sc_mac[0].mac_regwin, NULL);
 903         if (error)
 904                 return error;
 905
 906         return 0;
 907 }
 908
 909 int
 910 bwi_bus_init(struct bwi_softc *sc, struct bwi_mac *mac)
 911 {
 912         struct bwi_regwin *old, *bus;
 913         uint32_t val;
 914         int error;
 915
 916         bus = &sc->sc_bus_regwin;
 917         KASSERT(sc->sc_cur_regwin == &mac->mac_regwin, ("not cur regwin"));
 918
 919         /*
 920          * Tell bus to generate requested interrupts
 921          */
 922         if (bus->rw_rev < 6 && bus->rw_type == BWI_REGWIN_T_BUSPCI) {
 923                 /*
 924                  * NOTE: Read BWI_FLAGS from MAC regwin
 925                  */
 926                 val = CSR_READ_4(sc, BWI_FLAGS);
 927
 928                 error = bwi_regwin_switch(sc, bus, &old);
 929                 if (error)
 930                         return error;
 931
 932                 CSR_SETBITS_4(sc, BWI_INTRVEC, (val & BWI_FLAGS_INTR_MASK));
 933         } else {
 934                 uint32_t mac_mask;
 935
 936                 mac_mask = 1 << mac->mac_id;
 937
 938                 error = bwi_regwin_switch(sc, bus, &old);
 939                 if (error)
 940                         return error;
 941
 942                 val = pci_read_config(sc->sc_dev, BWI_PCIR_INTCTL, 4);
 943                 val |= mac_mask << 8;
 944                 pci_write_config(sc->sc_dev, BWI_PCIR_INTCTL, val, 4);
 945         }
 946
 947         if (sc->sc_flags & BWI_F_BUS_INITED)
 948                 goto back;
 949
 950         if (bus->rw_type == BWI_REGWIN_T_BUSPCI) {
 951                 /*
 952                  * Enable prefetch and burst
 953                  */
 954                 CSR_SETBITS_4(sc, BWI_BUS_CONFIG,
 955                               BWI_BUS_CONFIG_PREFETCH | BWI_BUS_CONFIG_BURST);
 956
 957                 if (bus->rw_rev < 5) {
 958                         struct bwi_regwin *com = &sc->sc_com_regwin;
 959
 960                         /*
 961                          * Configure timeouts for bus operation
 962                          */
 963
 964                         /*
 965                          * Set service timeout and request timeout
 966                          */
 967                         CSR_SETBITS_4(sc, BWI_CONF_LO,
 968                         __SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |
 969                         __SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));
 970
 971                         /*
 972                          * If there is common regwin, we switch to that regwin
 973                          * and switch back to bus regwin once we have done.
 974                          */
 975                         if (BWI_REGWIN_EXIST(com)) {
 976                                 error = bwi_regwin_switch(sc, com, NULL);
 977                                 if (error)
 978                                         return error;
 979                         }
 980
 981                         /* Let bus know what we have changed */
 982                         CSR_WRITE_4(sc, BWI_BUS_ADDR, BWI_BUS_ADDR_MAGIC);
 983                         CSR_READ_4(sc, BWI_BUS_ADDR); /* Flush */
 984                         CSR_WRITE_4(sc, BWI_BUS_DATA, 0);
 985                         CSR_READ_4(sc, BWI_BUS_DATA); /* Flush */
 986
 987                         if (BWI_REGWIN_EXIST(com)) {
 988                                 error = bwi_regwin_switch(sc, bus, NULL);
 989                                 if (error)
 990                                         return error;
 991                         }
 992                 } else if (bus->rw_rev >= 11) {
 993                         /*
 994                          * Enable memory read multiple
 995                          */
 996                         CSR_SETBITS_4(sc, BWI_BUS_CONFIG, BWI_BUS_CONFIG_MRM);
 997                 }
 998         } else {
 999                 /* TODO:PCIE */
1000         }
1001
1002         sc->sc_flags |= BWI_F_BUS_INITED;
1003 back:
1004         return bwi_regwin_switch(sc, old, NULL);
1005 }
1006
1007 static void
1008 bwi_get_card_flags(struct bwi_softc *sc)
1009 {
1010 #define PCI_VENDOR_APPLE 0x106b
1011 #define PCI_VENDOR_DELL  0x1028
1012         sc->sc_card_flags = bwi_read_sprom(sc, BWI_SPROM_CARD_FLAGS);
1013         if (sc->sc_card_flags == 0xffff)
1014                 sc->sc_card_flags = 0;
1015
1016         if (sc->sc_pci_subvid == PCI_VENDOR_DELL &&
1017             sc->sc_bbp_id == BWI_BBPID_BCM4301 &&
1018             sc->sc_pci_revid == 0x74)
1019                 sc->sc_card_flags |= BWI_CARD_F_BT_COEXIST;
1020
1021         if (sc->sc_pci_subvid == PCI_VENDOR_APPLE &&
1022             sc->sc_pci_subdid == 0x4e && /* XXX */
1023             sc->sc_pci_revid > 0x40)
1024                 sc->sc_card_flags |= BWI_CARD_F_PA_GPIO9;
1025
1026         DPRINTF(sc, BWI_DBG_ATTACH, "card flags 0x%04x\n", sc->sc_card_flags);
1027 #undef PCI_VENDOR_DELL
1028 #undef PCI_VENDOR_APPLE
1029 }
1030
1031 static void
1032 bwi_get_eaddr(struct bwi_softc *sc, uint16_t eaddr_ofs, uint8_t *eaddr)
1033 {
1034         int i;
1035
1036         for (i = 0; i < 3; ++i) {
1037                 *((uint16_t *)eaddr + i) =
1038                         htobe16(bwi_read_sprom(sc, eaddr_ofs + 2 * i));
1039         }
1040 }
1041
1042 static void
1043 bwi_get_clock_freq(struct bwi_softc *sc, struct bwi_clock_freq *freq)
1044 {
1045         struct bwi_regwin *com;
1046         uint32_t val;
1047         u_int div;
1048         int src;
1049
1050         bzero(freq, sizeof(*freq));
1051         com = &sc->sc_com_regwin;
1052
1053         KASSERT(BWI_REGWIN_EXIST(com), ("regwin does not exist"));
1054         KASSERT(sc->sc_cur_regwin == com, ("wrong regwin"));
1055         KASSERT(sc->sc_cap & BWI_CAP_CLKMODE, ("wrong clock mode"));
1056
1057         /*
1058          * Calculate clock frequency
1059          */
1060         src = -1;
1061         div = 0;
1062         if (com->rw_rev < 6) {
1063                 val = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
1064                 if (val & BWI_PCIM_GPIO_OUT_CLKSRC) {
1065                         src = BWI_CLKSRC_PCI;
1066                         div = 64;
1067                 } else {
1068                         src = BWI_CLKSRC_CS_OSC;
1069                         div = 32;
1070                 }
1071         } else if (com->rw_rev < 10) {
1072                 val = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1073
1074                 src = __SHIFTOUT(val, BWI_CLOCK_CTRL_CLKSRC);
1075                 if (src == BWI_CLKSRC_LP_OSC) {
1076                         div = 1;
1077                 } else {
1078                         div = (__SHIFTOUT(val, BWI_CLOCK_CTRL_FDIV) + 1) << 2;
1079
1080                         /* Unknown source */
1081                         if (src >= BWI_CLKSRC_MAX)
1082                                 src = BWI_CLKSRC_CS_OSC;
1083                 }
1084         } else {
1085                 val = CSR_READ_4(sc, BWI_CLOCK_INFO);
1086
1087                 src = BWI_CLKSRC_CS_OSC;
1088                 div = (__SHIFTOUT(val, BWI_CLOCK_INFO_FDIV) + 1) << 2;
1089         }
1090
1091         KASSERT(src >= 0 && src < BWI_CLKSRC_MAX, ("bad src %d", src));
1092         KASSERT(div != 0, ("div zero"));
1093
1094         DPRINTF(sc, BWI_DBG_ATTACH, "clksrc %s\n",
1095                 src == BWI_CLKSRC_PCI ? "PCI" :
1096                 (src == BWI_CLKSRC_LP_OSC ? "LP_OSC" : "CS_OSC"));
1097
1098         freq->clkfreq_min = bwi_clkfreq[src].freq_min / div;
1099         freq->clkfreq_max = bwi_clkfreq[src].freq_max / div;
1100
1101         DPRINTF(sc, BWI_DBG_ATTACH, "clkfreq min %u, max %u\n",
1102                 freq->clkfreq_min, freq->clkfreq_max);
1103 }
1104
1105 static int
1106 bwi_set_clock_mode(struct bwi_softc *sc, enum bwi_clock_mode clk_mode)
1107 {
1108         struct bwi_regwin *old, *com;
1109         uint32_t clk_ctrl, clk_src;
1110         int error, pwr_off = 0;
1111
1112         com = &sc->sc_com_regwin;
1113         if (!BWI_REGWIN_EXIST(com))
1114                 return 0;
1115
1116         if (com->rw_rev >= 10 || com->rw_rev < 6)
1117                 return 0;
1118
1119         /*
1120          * For common regwin whose rev is [6, 10), the chip
1121          * must be capable to change clock mode.
1122          */
1123         if ((sc->sc_cap & BWI_CAP_CLKMODE) == 0)
1124                 return 0;
1125
1126         error = bwi_regwin_switch(sc, com, &old);
1127         if (error)
1128                 return error;
1129
1130         if (clk_mode == BWI_CLOCK_MODE_FAST)
1131                 bwi_power_on(sc, 0);    /* Don't turn on PLL */
1132
1133         clk_ctrl = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1134         clk_src = __SHIFTOUT(clk_ctrl, BWI_CLOCK_CTRL_CLKSRC);
1135
1136         switch (clk_mode) {
1137         case BWI_CLOCK_MODE_FAST:
1138                 clk_ctrl &= ~BWI_CLOCK_CTRL_SLOW;
1139                 clk_ctrl |= BWI_CLOCK_CTRL_IGNPLL;
1140                 break;
1141         case BWI_CLOCK_MODE_SLOW:
1142                 clk_ctrl |= BWI_CLOCK_CTRL_SLOW;
1143                 break;
1144         case BWI_CLOCK_MODE_DYN:
1145                 clk_ctrl &= ~(BWI_CLOCK_CTRL_SLOW |
1146                               BWI_CLOCK_CTRL_IGNPLL |
1147                               BWI_CLOCK_CTRL_NODYN);
1148                 if (clk_src != BWI_CLKSRC_CS_OSC) {
1149                         clk_ctrl |= BWI_CLOCK_CTRL_NODYN;
1150                         pwr_off = 1;
1151                 }
1152                 break;
1153         }
1154         CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl);
1155
1156         if (pwr_off)
1157                 bwi_power_off(sc, 0);   /* Leave PLL as it is */
1158
1159         return bwi_regwin_switch(sc, old, NULL);
1160 }
1161
1162 static int
1163 bwi_set_clock_delay(struct bwi_softc *sc)
1164 {
1165         struct bwi_regwin *old, *com;
1166         int error;
1167
1168         com = &sc->sc_com_regwin;
1169         if (!BWI_REGWIN_EXIST(com))
1170                 return 0;
1171
1172         error = bwi_regwin_switch(sc, com, &old);
1173         if (error)
1174                 return error;
1175
1176         if (sc->sc_bbp_id == BWI_BBPID_BCM4321) {
1177                 if (sc->sc_bbp_rev == 0)
1178                         CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC0);
1179                 else if (sc->sc_bbp_rev == 1)
1180                         CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC1);
1181         }
1182
1183         if (sc->sc_cap & BWI_CAP_CLKMODE) {
1184                 if (com->rw_rev >= 10) {
1185                         CSR_FILT_SETBITS_4(sc, BWI_CLOCK_INFO, 0xffff, 0x40000);
1186                 } else {
1187                         struct bwi_clock_freq freq;
1188
1189                         bwi_get_clock_freq(sc, &freq);
1190                         CSR_WRITE_4(sc, BWI_PLL_ON_DELAY,
1191                                 howmany(freq.clkfreq_max * 150, 1000000));
1192                         CSR_WRITE_4(sc, BWI_FREQ_SEL_DELAY,
1193                                 howmany(freq.clkfreq_max * 15, 1000000));
1194                 }
1195         }
1196
1197         return bwi_regwin_switch(sc, old, NULL);
1198 }
1199
1200 static void
1201 bwi_init(struct bwi_softc *sc)
1202 {
1203         struct ieee80211com *ic = &sc->sc_ic;
1204
1205         BWI_LOCK(sc);
1206         bwi_init_statechg(sc, 1);
1207         BWI_UNLOCK(sc);
1208
1209         if (sc->sc_flags & BWI_F_RUNNING)
1210                 ieee80211_start_all(ic);                /* start all vap's */
1211 }
1212
1213 static void
1214 bwi_init_statechg(struct bwi_softc *sc, int statechg)
1215 {
1216         struct bwi_mac *mac;
1217         int error;
1218
1219         BWI_ASSERT_LOCKED(sc);
1220
1221         bwi_stop_locked(sc, statechg);
1222
1223         bwi_bbp_power_on(sc, BWI_CLOCK_MODE_FAST);
1224
1225         /* TODO: 2 MAC */
1226
1227         mac = &sc->sc_mac[0];
1228         error = bwi_regwin_switch(sc, &mac->mac_regwin, NULL);
1229         if (error) {
1230                 device_printf(sc->sc_dev, "%s: error %d on regwin switch\n",
1231                     __func__, error);
1232                 goto bad;
1233         }
1234         error = bwi_mac_init(mac);
1235         if (error) {
1236                 device_printf(sc->sc_dev, "%s: error %d on MAC init\n",
1237                     __func__, error);
1238                 goto bad;
1239         }
1240
1241         bwi_bbp_power_on(sc, BWI_CLOCK_MODE_DYN);
1242
1243         bwi_set_bssid(sc, bwi_zero_addr);       /* Clear BSSID */
1244         bwi_set_addr_filter(sc, BWI_ADDR_FILTER_MYADDR, sc->sc_ic.ic_macaddr);
1245
1246         bwi_mac_reset_hwkeys(mac);
1247
1248         if ((mac->mac_flags & BWI_MAC_F_HAS_TXSTATS) == 0) {
1249                 int i;
1250
1251 #define NRETRY  1000
1252                 /*
1253                  * Drain any possible pending TX status
1254                  */
1255                 for (i = 0; i < NRETRY; ++i) {
1256                         if ((CSR_READ_4(sc, BWI_TXSTATUS0) &
1257                              BWI_TXSTATUS0_VALID) == 0)
1258                                 break;
1259                         CSR_READ_4(sc, BWI_TXSTATUS1);
1260                 }
1261                 if (i == NRETRY)
1262                         device_printf(sc->sc_dev,
1263                             "%s: can't drain TX status\n", __func__);
1264 #undef NRETRY
1265         }
1266
1267         if (mac->mac_phy.phy_mode == IEEE80211_MODE_11G)
1268                 bwi_mac_updateslot(mac, 1);
1269
1270         /* Start MAC */
1271         error = bwi_mac_start(mac);
1272         if (error) {
1273                 device_printf(sc->sc_dev, "%s: error %d starting MAC\n",
1274                     __func__, error);
1275                 goto bad;
1276         }
1277
1278         /* Clear stop flag before enabling interrupt */
1279         sc->sc_flags &= ~BWI_F_STOP;
1280         sc->sc_flags |= BWI_F_RUNNING;
1281         callout_reset(&sc->sc_watchdog_timer, hz, bwi_watchdog, sc);
1282
1283         /* Enable intrs */
1284         bwi_enable_intrs(sc, BWI_INIT_INTRS);
1285         return;
1286 bad:
1287         bwi_stop_locked(sc, 1);
1288 }
1289
1290 static void
1291 bwi_parent(struct ieee80211com *ic)
1292 {
1293         struct bwi_softc *sc = ic->ic_softc;
1294         int startall = 0;
1295
1296         BWI_LOCK(sc);
1297         if (ic->ic_nrunning > 0) {
1298                 struct bwi_mac *mac;
1299                 int promisc = -1;
1300
1301                 KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
1302                     ("current regwin type %d",
1303                     sc->sc_cur_regwin->rw_type));
1304                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1305
1306                 if (ic->ic_promisc > 0 && (sc->sc_flags & BWI_F_PROMISC) == 0) {
1307                         promisc = 1;
1308                         sc->sc_flags |= BWI_F_PROMISC;
1309                 } else if (ic->ic_promisc == 0 &&
1310                     (sc->sc_flags & BWI_F_PROMISC) != 0) {
1311                         promisc = 0;
1312                         sc->sc_flags &= ~BWI_F_PROMISC;
1313                 }
1314
1315                 if (promisc >= 0)
1316                         bwi_mac_set_promisc(mac, promisc);
1317         }
1318         if (ic->ic_nrunning > 0) {
1319                 if ((sc->sc_flags & BWI_F_RUNNING) == 0) {
1320                         bwi_init_statechg(sc, 1);
1321                         startall = 1;
1322                 }
1323         } else if (sc->sc_flags & BWI_F_RUNNING)
1324                 bwi_stop_locked(sc, 1);
1325         BWI_UNLOCK(sc);
1326         if (startall)
1327                 ieee80211_start_all(ic);
1328 }
1329
1330 static int
1331 bwi_transmit(struct ieee80211com *ic, struct mbuf *m)
1332 {
1333         struct bwi_softc *sc = ic->ic_softc;
1334         int error;
1335
1336         BWI_LOCK(sc);
1337         if ((sc->sc_flags & BWI_F_RUNNING) == 0) {
1338                 BWI_UNLOCK(sc);
1339                 return (ENXIO);
1340         }
1341         error = mbufq_enqueue(&sc->sc_snd, m);
1342         if (error) {
1343                 BWI_UNLOCK(sc);
1344                 return (error);
1345         }
1346         bwi_start_locked(sc);
1347         BWI_UNLOCK(sc);
1348         return (0);
1349 }
1350
1351 static void
1352 bwi_start_locked(struct bwi_softc *sc)
1353 {
1354         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
1355         struct ieee80211_frame *wh;
1356         struct ieee80211_node *ni;
1357         struct mbuf *m;
1358         int trans, idx;
1359
1360         BWI_ASSERT_LOCKED(sc);
1361
1362         trans = 0;
1363         idx = tbd->tbd_idx;
1364
1365         while (tbd->tbd_buf[idx].tb_mbuf == NULL &&
1366             tbd->tbd_used + BWI_TX_NSPRDESC < BWI_TX_NDESC &&
1367             (m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1368                 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1369                 wh = mtod(m, struct ieee80211_frame *);
1370                 if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) != 0 &&
1371                     ieee80211_crypto_encap(ni, m) == NULL) {
1372                         if_inc_counter(ni->ni_vap->iv_ifp,
1373                             IFCOUNTER_OERRORS, 1);
1374                         ieee80211_free_node(ni);
1375                         m_freem(m);
1376                         continue;
1377                 }
1378                 if (bwi_encap(sc, idx, m, ni) != 0) {
1379                         /* 'm' is freed in bwi_encap() if we reach here */
1380                         if (ni != NULL) {
1381                                 if_inc_counter(ni->ni_vap->iv_ifp,
1382                                     IFCOUNTER_OERRORS, 1);
1383                                 ieee80211_free_node(ni);
1384                         } else
1385                                 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
1386                         continue;
1387                 }
1388                 trans = 1;
1389                 tbd->tbd_used++;
1390                 idx = (idx + 1) % BWI_TX_NDESC;
1391         }
1392
1393         tbd->tbd_idx = idx;
1394         if (trans)
1395                 sc->sc_tx_timer = 5;
1396 }
1397
1398 static int
1399 bwi_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1400         const struct ieee80211_bpf_params *params)
1401 {
1402         struct ieee80211com *ic = ni->ni_ic;
1403         struct bwi_softc *sc = ic->ic_softc;
1404         /* XXX wme? */
1405         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
1406         int idx, error;
1407
1408         if ((sc->sc_flags & BWI_F_RUNNING) == 0) {
1409                 m_freem(m);
1410                 return ENETDOWN;
1411         }
1412
1413         BWI_LOCK(sc);
1414         idx = tbd->tbd_idx;
1415         KASSERT(tbd->tbd_buf[idx].tb_mbuf == NULL, ("slot %d not empty", idx));
1416         if (params == NULL) {
1417                 /*
1418                  * Legacy path; interpret frame contents to decide
1419                  * precisely how to send the frame.
1420                  */
1421                 error = bwi_encap(sc, idx, m, ni);
1422         } else {
1423                 /*
1424                  * Caller supplied explicit parameters to use in
1425                  * sending the frame.
1426                  */
1427                 error = bwi_encap_raw(sc, idx, m, ni, params);
1428         }
1429         if (error == 0) {
1430                 tbd->tbd_used++;
1431                 tbd->tbd_idx = (idx + 1) % BWI_TX_NDESC;
1432                 sc->sc_tx_timer = 5;
1433         }
1434         BWI_UNLOCK(sc);
1435         return error;
1436 }
1437
1438 static void
1439 bwi_watchdog(void *arg)
1440 {
1441         struct bwi_softc *sc;
1442
1443         sc = arg;
1444         BWI_ASSERT_LOCKED(sc);
1445         if (sc->sc_tx_timer != 0 && --sc->sc_tx_timer == 0) {
1446                 device_printf(sc->sc_dev, "watchdog timeout\n");
1447                 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
1448                 taskqueue_enqueue(sc->sc_tq, &sc->sc_restart_task);
1449         }
1450         callout_reset(&sc->sc_watchdog_timer, hz, bwi_watchdog, sc);
1451 }
1452
1453 static void
1454 bwi_stop(struct bwi_softc *sc, int statechg)
1455 {
1456         BWI_LOCK(sc);
1457         bwi_stop_locked(sc, statechg);
1458         BWI_UNLOCK(sc);
1459 }
1460
1461 static void
1462 bwi_stop_locked(struct bwi_softc *sc, int statechg)
1463 {
1464         struct bwi_mac *mac;
1465         int i, error, pwr_off = 0;
1466
1467         BWI_ASSERT_LOCKED(sc);
1468
1469         callout_stop(&sc->sc_calib_ch);
1470         callout_stop(&sc->sc_led_blink_ch);
1471         sc->sc_led_blinking = 0;
1472         sc->sc_flags |= BWI_F_STOP;
1473
1474         if (sc->sc_flags & BWI_F_RUNNING) {
1475                 KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
1476                     ("current regwin type %d", sc->sc_cur_regwin->rw_type));
1477                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1478
1479                 bwi_disable_intrs(sc, BWI_ALL_INTRS);
1480                 CSR_READ_4(sc, BWI_MAC_INTR_MASK);
1481                 bwi_mac_stop(mac);
1482         }
1483
1484         for (i = 0; i < sc->sc_nmac; ++i) {
1485                 struct bwi_regwin *old_rw;
1486
1487                 mac = &sc->sc_mac[i];
1488                 if ((mac->mac_flags & BWI_MAC_F_INITED) == 0)
1489                         continue;
1490
1491                 error = bwi_regwin_switch(sc, &mac->mac_regwin, &old_rw);
1492                 if (error)
1493                         continue;
1494
1495                 bwi_mac_shutdown(mac);
1496                 pwr_off = 1;
1497
1498                 bwi_regwin_switch(sc, old_rw, NULL);
1499         }
1500
1501         if (pwr_off)
1502                 bwi_bbp_power_off(sc);
1503
1504         sc->sc_tx_timer = 0;
1505         callout_stop(&sc->sc_watchdog_timer);
1506         sc->sc_flags &= ~BWI_F_RUNNING;
1507 }
1508
1509 void
1510 bwi_intr(void *xsc)
1511 {
1512         struct bwi_softc *sc = xsc;
1513         struct bwi_mac *mac;
1514         uint32_t intr_status;
1515         uint32_t txrx_intr_status[BWI_TXRX_NRING];
1516         int i, txrx_error, tx = 0, rx_data = -1;
1517
1518         BWI_LOCK(sc);
1519
1520         if ((sc->sc_flags & BWI_F_RUNNING) == 0 ||
1521             (sc->sc_flags & BWI_F_STOP)) {
1522                 BWI_UNLOCK(sc);
1523                 return;
1524         }
1525         /*
1526          * Get interrupt status
1527          */
1528         intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1529         if (intr_status == 0xffffffff) {        /* Not for us */
1530                 BWI_UNLOCK(sc);
1531                 return;
1532         }
1533
1534         DPRINTF(sc, BWI_DBG_INTR, "intr status 0x%08x\n", intr_status);
1535
1536         intr_status &= CSR_READ_4(sc, BWI_MAC_INTR_MASK);
1537         if (intr_status == 0) {         /* Nothing is interesting */
1538                 BWI_UNLOCK(sc);
1539                 return;
1540         }
1541
1542         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
1543             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
1544         mac = (struct bwi_mac *)sc->sc_cur_regwin;
1545
1546         txrx_error = 0;
1547         DPRINTF(sc, BWI_DBG_INTR, "%s\n", "TX/RX intr");
1548         for (i = 0; i < BWI_TXRX_NRING; ++i) {
1549                 uint32_t mask;
1550
1551                 if (BWI_TXRX_IS_RX(i))
1552                         mask = BWI_TXRX_RX_INTRS;
1553                 else
1554                         mask = BWI_TXRX_TX_INTRS;
1555
1556                 txrx_intr_status[i] =
1557                 CSR_READ_4(sc, BWI_TXRX_INTR_STATUS(i)) & mask;
1558
1559                 _DPRINTF(sc, BWI_DBG_INTR, ", %d 0x%08x",
1560                          i, txrx_intr_status[i]);
1561
1562                 if (txrx_intr_status[i] & BWI_TXRX_INTR_ERROR) {
1563                         device_printf(sc->sc_dev,
1564                             "%s: intr fatal TX/RX (%d) error 0x%08x\n",
1565                             __func__, i, txrx_intr_status[i]);
1566                         txrx_error = 1;
1567                 }
1568         }
1569         _DPRINTF(sc, BWI_DBG_INTR, "%s\n", "");
1570
1571         /*
1572          * Acknowledge interrupt
1573          */
1574         CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, intr_status);
1575
1576         for (i = 0; i < BWI_TXRX_NRING; ++i)
1577                 CSR_WRITE_4(sc, BWI_TXRX_INTR_STATUS(i), txrx_intr_status[i]);
1578
1579         /* Disable all interrupts */
1580         bwi_disable_intrs(sc, BWI_ALL_INTRS);
1581
1582         /*
1583          * http://bcm-specs.sipsolutions.net/Interrupts
1584          * Says for this bit (0x800):
1585          * "Fatal Error
1586          *
1587          * We got this one while testing things when by accident the
1588          * template ram wasn't set to big endian when it should have
1589          * been after writing the initial values. It keeps on being
1590          * triggered, the only way to stop it seems to shut down the
1591          * chip."
1592          *
1593          * Suggesting that we should never get it and if we do we're not
1594          * feeding TX packets into the MAC correctly if we do...  Apparently,
1595          * it is valid only on mac version 5 and higher, but I couldn't
1596          * find a reference for that...  Since I see them from time to time
1597          * on my card, this suggests an error in the tx path still...
1598          */
1599         if (intr_status & BWI_INTR_PHY_TXERR) {
1600                 if (mac->mac_flags & BWI_MAC_F_PHYE_RESET) {
1601                         device_printf(sc->sc_dev, "%s: intr PHY TX error\n",
1602                             __func__);
1603                         taskqueue_enqueue(sc->sc_tq, &sc->sc_restart_task);
1604                         BWI_UNLOCK(sc);
1605                         return;
1606                 }
1607         }
1608
1609         if (txrx_error) {
1610                 /* TODO: reset device */
1611         }
1612
1613         if (intr_status & BWI_INTR_TBTT)
1614                 bwi_mac_config_ps(mac);
1615
1616         if (intr_status & BWI_INTR_EO_ATIM)
1617                 device_printf(sc->sc_dev, "EO_ATIM\n");
1618
1619         if (intr_status & BWI_INTR_PMQ) {
1620                 for (;;) {
1621                         if ((CSR_READ_4(sc, BWI_MAC_PS_STATUS) & 0x8) == 0)
1622                                 break;
1623                 }
1624                 CSR_WRITE_2(sc, BWI_MAC_PS_STATUS, 0x2);
1625         }
1626
1627         if (intr_status & BWI_INTR_NOISE)
1628                 device_printf(sc->sc_dev, "intr noise\n");
1629
1630         if (txrx_intr_status[0] & BWI_TXRX_INTR_RX) {
1631                 rx_data = sc->sc_rxeof(sc);
1632                 if (sc->sc_flags & BWI_F_STOP) {
1633                         BWI_UNLOCK(sc);
1634                         return;
1635                 }
1636         }
1637
1638         if (txrx_intr_status[3] & BWI_TXRX_INTR_RX) {
1639                 sc->sc_txeof_status(sc);
1640                 tx = 1;
1641         }
1642
1643         if (intr_status & BWI_INTR_TX_DONE) {
1644                 bwi_txeof(sc);
1645                 tx = 1;
1646         }
1647
1648         /* Re-enable interrupts */
1649         bwi_enable_intrs(sc, BWI_INIT_INTRS);
1650
1651         if (sc->sc_blink_led != NULL && sc->sc_led_blink) {
1652                 int evt = BWI_LED_EVENT_NONE;
1653
1654                 if (tx && rx_data > 0) {
1655                         if (sc->sc_rx_rate > sc->sc_tx_rate)
1656                                 evt = BWI_LED_EVENT_RX;
1657                         else
1658                                 evt = BWI_LED_EVENT_TX;
1659                 } else if (tx) {
1660                         evt = BWI_LED_EVENT_TX;
1661                 } else if (rx_data > 0) {
1662                         evt = BWI_LED_EVENT_RX;
1663                 } else if (rx_data == 0) {
1664                         evt = BWI_LED_EVENT_POLL;
1665                 }
1666
1667                 if (evt != BWI_LED_EVENT_NONE)
1668                         bwi_led_event(sc, evt);
1669         }
1670
1671         BWI_UNLOCK(sc);
1672 }
1673
1674 static void
1675 bwi_scan_start(struct ieee80211com *ic)
1676 {
1677         struct bwi_softc *sc = ic->ic_softc;
1678
1679         BWI_LOCK(sc);
1680         /* Enable MAC beacon promiscuity */
1681         CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PASS_BCN);
1682         BWI_UNLOCK(sc);
1683 }
1684
1685 static void
1686 bwi_getradiocaps(struct ieee80211com *ic,
1687     int maxchans, int *nchans, struct ieee80211_channel chans[])
1688 {
1689         struct bwi_softc *sc = ic->ic_softc;
1690         struct bwi_mac *mac;
1691         struct bwi_phy *phy;
1692         uint8_t bands[IEEE80211_MODE_BYTES];
1693
1694         /*
1695          * XXX First MAC is known to exist
1696          * TODO2
1697          */
1698         mac = &sc->sc_mac[0];
1699         phy = &mac->mac_phy;
1700
1701         memset(bands, 0, sizeof(bands));
1702         switch (phy->phy_mode) {
1703         case IEEE80211_MODE_11G:
1704                 setbit(bands, IEEE80211_MODE_11G);
1705                 /* FALLTHROUGH */
1706         case IEEE80211_MODE_11B:
1707                 setbit(bands, IEEE80211_MODE_11B);
1708                 break;
1709         case IEEE80211_MODE_11A:
1710                 /* TODO:11A */
1711                 setbit(bands, IEEE80211_MODE_11A);
1712                 device_printf(sc->sc_dev, "no 11a support\n");
1713                 return;
1714         default:
1715                 panic("unknown phymode %d\n", phy->phy_mode);
1716         }
1717
1718         ieee80211_add_channel_list_2ghz(chans, maxchans, nchans,
1719             bwi_chan_2ghz, nitems(bwi_chan_2ghz), bands, 0);
1720 }
1721
1722 static void
1723 bwi_set_channel(struct ieee80211com *ic)
1724 {
1725         struct bwi_softc *sc = ic->ic_softc;
1726         struct ieee80211_channel *c = ic->ic_curchan;
1727         struct bwi_mac *mac;
1728
1729         BWI_LOCK(sc);
1730         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
1731             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
1732         mac = (struct bwi_mac *)sc->sc_cur_regwin;
1733         bwi_rf_set_chan(mac, ieee80211_chan2ieee(ic, c), 0);
1734
1735         sc->sc_rates = ieee80211_get_ratetable(c);
1736
1737         /*
1738          * Setup radio tap channel freq and flags
1739          */
1740         sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
1741                 htole16(c->ic_freq);
1742         sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
1743                 htole16(c->ic_flags & 0xffff);
1744
1745         BWI_UNLOCK(sc);
1746 }
1747
1748 static void
1749 bwi_scan_end(struct ieee80211com *ic)
1750 {
1751         struct bwi_softc *sc = ic->ic_softc;
1752
1753         BWI_LOCK(sc);
1754         CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PASS_BCN);
1755         BWI_UNLOCK(sc);
1756 }
1757
1758 static int
1759 bwi_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1760 {
1761         struct bwi_vap *bvp = BWI_VAP(vap);
1762         struct ieee80211com *ic= vap->iv_ic;
1763         struct bwi_softc *sc = ic->ic_softc;
1764         enum ieee80211_state ostate = vap->iv_state;
1765         struct bwi_mac *mac;
1766         int error;
1767
1768         BWI_LOCK(sc);
1769
1770         callout_stop(&sc->sc_calib_ch);
1771
1772         if (nstate == IEEE80211_S_INIT)
1773                 sc->sc_txpwrcb_type = BWI_TXPWR_INIT;
1774
1775         bwi_led_newstate(sc, nstate);
1776
1777         error = bvp->bv_newstate(vap, nstate, arg);
1778         if (error != 0)
1779                 goto back;
1780
1781         /*
1782          * Clear the BSSID when we stop a STA
1783          */
1784         if (vap->iv_opmode == IEEE80211_M_STA) {
1785                 if (ostate == IEEE80211_S_RUN && nstate != IEEE80211_S_RUN) {
1786                         /*
1787                          * Clear out the BSSID.  If we reassociate to
1788                          * the same AP, this will reinialize things
1789                          * correctly...
1790                          */
1791                         if (ic->ic_opmode == IEEE80211_M_STA &&
1792                             !(sc->sc_flags & BWI_F_STOP))
1793                                 bwi_set_bssid(sc, bwi_zero_addr);
1794                 }
1795         }
1796
1797         if (vap->iv_opmode == IEEE80211_M_MONITOR) {
1798                 /* Nothing to do */
1799         } else if (nstate == IEEE80211_S_RUN) {
1800                 bwi_set_bssid(sc, vap->iv_bss->ni_bssid);
1801
1802                 KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
1803                     ("current regwin type %d", sc->sc_cur_regwin->rw_type));
1804                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1805
1806                 /* Initial TX power calibration */
1807                 bwi_mac_calibrate_txpower(mac, BWI_TXPWR_INIT);
1808 #ifdef notyet
1809                 sc->sc_txpwrcb_type = BWI_TXPWR_FORCE;
1810 #else
1811                 sc->sc_txpwrcb_type = BWI_TXPWR_CALIB;
1812 #endif
1813
1814                 callout_reset(&sc->sc_calib_ch, hz, bwi_calibrate, sc);
1815         }
1816 back:
1817         BWI_UNLOCK(sc);
1818
1819         return error;
1820 }
1821
1822 static int
1823 bwi_media_change(struct ifnet *ifp)
1824 {
1825         int error = ieee80211_media_change(ifp);
1826         /* NB: only the fixed rate can change and that doesn't need a reset */
1827         return (error == ENETRESET ? 0 : error);
1828 }
1829
1830 static int
1831 bwi_dma_alloc(struct bwi_softc *sc)
1832 {
1833         int error, i, has_txstats;
1834         bus_addr_t lowaddr = 0;
1835         bus_size_t tx_ring_sz, rx_ring_sz, desc_sz = 0;
1836         uint32_t txrx_ctrl_step = 0;
1837
1838         has_txstats = 0;
1839         for (i = 0; i < sc->sc_nmac; ++i) {
1840                 if (sc->sc_mac[i].mac_flags & BWI_MAC_F_HAS_TXSTATS) {
1841                         has_txstats = 1;
1842                         break;
1843                 }
1844         }
1845
1846         switch (sc->sc_bus_space) {
1847         case BWI_BUS_SPACE_30BIT:
1848         case BWI_BUS_SPACE_32BIT:
1849                 if (sc->sc_bus_space == BWI_BUS_SPACE_30BIT)
1850                         lowaddr = BWI_BUS_SPACE_MAXADDR;
1851                 else
1852                         lowaddr = BUS_SPACE_MAXADDR_32BIT;
1853                 desc_sz = sizeof(struct bwi_desc32);
1854                 txrx_ctrl_step = 0x20;
1855
1856                 sc->sc_init_tx_ring = bwi_init_tx_ring32;
1857                 sc->sc_free_tx_ring = bwi_free_tx_ring32;
1858                 sc->sc_init_rx_ring = bwi_init_rx_ring32;
1859                 sc->sc_free_rx_ring = bwi_free_rx_ring32;
1860                 sc->sc_setup_rxdesc = bwi_setup_rx_desc32;
1861                 sc->sc_setup_txdesc = bwi_setup_tx_desc32;
1862                 sc->sc_rxeof = bwi_rxeof32;
1863                 sc->sc_start_tx = bwi_start_tx32;
1864                 if (has_txstats) {
1865                         sc->sc_init_txstats = bwi_init_txstats32;
1866                         sc->sc_free_txstats = bwi_free_txstats32;
1867                         sc->sc_txeof_status = bwi_txeof_status32;
1868                 }
1869                 break;
1870
1871         case BWI_BUS_SPACE_64BIT:
1872                 lowaddr = BUS_SPACE_MAXADDR;    /* XXX */
1873                 desc_sz = sizeof(struct bwi_desc64);
1874                 txrx_ctrl_step = 0x40;
1875
1876                 sc->sc_init_tx_ring = bwi_init_tx_ring64;
1877                 sc->sc_free_tx_ring = bwi_free_tx_ring64;
1878                 sc->sc_init_rx_ring = bwi_init_rx_ring64;
1879                 sc->sc_free_rx_ring = bwi_free_rx_ring64;
1880                 sc->sc_setup_rxdesc = bwi_setup_rx_desc64;
1881                 sc->sc_setup_txdesc = bwi_setup_tx_desc64;
1882                 sc->sc_rxeof = bwi_rxeof64;
1883                 sc->sc_start_tx = bwi_start_tx64;
1884                 if (has_txstats) {
1885                         sc->sc_init_txstats = bwi_init_txstats64;
1886                         sc->sc_free_txstats = bwi_free_txstats64;
1887                         sc->sc_txeof_status = bwi_txeof_status64;
1888                 }
1889                 break;
1890         }
1891
1892         KASSERT(lowaddr != 0, ("lowaddr zero"));
1893         KASSERT(desc_sz != 0, ("desc_sz zero"));
1894         KASSERT(txrx_ctrl_step != 0, ("txrx_ctrl_step zero"));
1895
1896         tx_ring_sz = roundup(desc_sz * BWI_TX_NDESC, BWI_RING_ALIGN);
1897         rx_ring_sz = roundup(desc_sz * BWI_RX_NDESC, BWI_RING_ALIGN);
1898
1899         /*
1900          * Create top level DMA tag
1901          */
1902         error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), /* parent */
1903                                BWI_ALIGN, 0,            /* alignment, bounds */
1904                                lowaddr,                 /* lowaddr */
1905                                BUS_SPACE_MAXADDR,       /* highaddr */
1906                                NULL, NULL,              /* filter, filterarg */
1907                                BUS_SPACE_MAXSIZE,       /* maxsize */
1908                                BUS_SPACE_UNRESTRICTED,  /* nsegments */
1909                                BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
1910                                0,                       /* flags */
1911                                NULL, NULL,              /* lockfunc, lockarg */
1912                                &sc->sc_parent_dtag);
1913         if (error) {
1914                 device_printf(sc->sc_dev, "can't create parent DMA tag\n");
1915                 return error;
1916         }
1917
1918 #define TXRX_CTRL(idx)  (BWI_TXRX_CTRL_BASE + (idx) * txrx_ctrl_step)
1919
1920         /*
1921          * Create TX ring DMA stuffs
1922          */
1923         error = bus_dma_tag_create(sc->sc_parent_dtag,
1924                                 BWI_RING_ALIGN, 0,
1925                                 BUS_SPACE_MAXADDR,
1926                                 BUS_SPACE_MAXADDR,
1927                                 NULL, NULL,
1928                                 tx_ring_sz,
1929                                 1,
1930                                 tx_ring_sz,
1931                                 0,
1932                                 NULL, NULL,
1933                                 &sc->sc_txring_dtag);
1934         if (error) {
1935                 device_printf(sc->sc_dev, "can't create TX ring DMA tag\n");
1936                 return error;
1937         }
1938
1939         for (i = 0; i < BWI_TX_NRING; ++i) {
1940                 error = bwi_dma_ring_alloc(sc, sc->sc_txring_dtag,
1941                                            &sc->sc_tx_rdata[i], tx_ring_sz,
1942                                            TXRX_CTRL(i));
1943                 if (error) {
1944                         device_printf(sc->sc_dev, "%dth TX ring "
1945                                       "DMA alloc failed\n", i);
1946                         return error;
1947                 }
1948         }
1949
1950         /*
1951          * Create RX ring DMA stuffs
1952          */
1953         error = bus_dma_tag_create(sc->sc_parent_dtag,
1954                                 BWI_RING_ALIGN, 0,
1955                                 BUS_SPACE_MAXADDR,
1956                                 BUS_SPACE_MAXADDR,
1957                                 NULL, NULL,
1958                                 rx_ring_sz,
1959                                 1,
1960                                 rx_ring_sz,
1961                                 0,
1962                                 NULL, NULL,
1963                                 &sc->sc_rxring_dtag);
1964         if (error) {
1965                 device_printf(sc->sc_dev, "can't create RX ring DMA tag\n");
1966                 return error;
1967         }
1968
1969         error = bwi_dma_ring_alloc(sc, sc->sc_rxring_dtag, &sc->sc_rx_rdata,
1970                                    rx_ring_sz, TXRX_CTRL(0));
1971         if (error) {
1972                 device_printf(sc->sc_dev, "RX ring DMA alloc failed\n");
1973                 return error;
1974         }
1975
1976         if (has_txstats) {
1977                 error = bwi_dma_txstats_alloc(sc, TXRX_CTRL(3), desc_sz);
1978                 if (error) {
1979                         device_printf(sc->sc_dev,
1980                                       "TX stats DMA alloc failed\n");
1981                         return error;
1982                 }
1983         }
1984
1985 #undef TXRX_CTRL
1986
1987         return bwi_dma_mbuf_create(sc);
1988 }
1989
1990 static void
1991 bwi_dma_free(struct bwi_softc *sc)
1992 {
1993         if (sc->sc_txring_dtag != NULL) {
1994                 int i;
1995
1996                 for (i = 0; i < BWI_TX_NRING; ++i) {
1997                         struct bwi_ring_data *rd = &sc->sc_tx_rdata[i];
1998
1999                         if (rd->rdata_desc != NULL) {
2000                                 bus_dmamap_unload(sc->sc_txring_dtag,
2001                                                   rd->rdata_dmap);
2002                                 bus_dmamem_free(sc->sc_txring_dtag,
2003                                                 rd->rdata_desc,
2004                                                 rd->rdata_dmap);
2005                         }
2006                 }
2007                 bus_dma_tag_destroy(sc->sc_txring_dtag);
2008         }
2009
2010         if (sc->sc_rxring_dtag != NULL) {
2011                 struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2012
2013                 if (rd->rdata_desc != NULL) {
2014                         bus_dmamap_unload(sc->sc_rxring_dtag, rd->rdata_dmap);
2015                         bus_dmamem_free(sc->sc_rxring_dtag, rd->rdata_desc,
2016                                         rd->rdata_dmap);
2017                 }
2018                 bus_dma_tag_destroy(sc->sc_rxring_dtag);
2019         }
2020
2021         bwi_dma_txstats_free(sc);
2022         bwi_dma_mbuf_destroy(sc, BWI_TX_NRING, 1);
2023
2024         if (sc->sc_parent_dtag != NULL)
2025                 bus_dma_tag_destroy(sc->sc_parent_dtag);
2026 }
2027
2028 static int
2029 bwi_dma_ring_alloc(struct bwi_softc *sc, bus_dma_tag_t dtag,
2030                    struct bwi_ring_data *rd, bus_size_t size,
2031                    uint32_t txrx_ctrl)
2032 {
2033         int error;
2034
2035         error = bus_dmamem_alloc(dtag, &rd->rdata_desc,
2036                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2037                                  &rd->rdata_dmap);
2038         if (error) {
2039                 device_printf(sc->sc_dev, "can't allocate DMA mem\n");
2040                 return error;
2041         }
2042
2043         error = bus_dmamap_load(dtag, rd->rdata_dmap, rd->rdata_desc, size,
2044                                 bwi_dma_ring_addr, &rd->rdata_paddr,
2045                                 BUS_DMA_NOWAIT);
2046         if (error) {
2047                 device_printf(sc->sc_dev, "can't load DMA mem\n");
2048                 bus_dmamem_free(dtag, rd->rdata_desc, rd->rdata_dmap);
2049                 rd->rdata_desc = NULL;
2050                 return error;
2051         }
2052
2053         rd->rdata_txrx_ctrl = txrx_ctrl;
2054         return 0;
2055 }
2056
2057 static int
2058 bwi_dma_txstats_alloc(struct bwi_softc *sc, uint32_t ctrl_base,
2059                       bus_size_t desc_sz)
2060 {
2061         struct bwi_txstats_data *st;
2062         bus_size_t dma_size;
2063         int error;
2064
2065         st = malloc(sizeof(*st), M_DEVBUF, M_NOWAIT | M_ZERO);
2066         if (st == NULL) {
2067                 device_printf(sc->sc_dev, "can't allocate txstats data\n");
2068                 return ENOMEM;
2069         }
2070         sc->sc_txstats = st;
2071
2072         /*
2073          * Create TX stats descriptor DMA stuffs
2074          */
2075         dma_size = roundup(desc_sz * BWI_TXSTATS_NDESC, BWI_RING_ALIGN);
2076
2077         error = bus_dma_tag_create(sc->sc_parent_dtag,
2078                                 BWI_RING_ALIGN,
2079                                 0,
2080                                 BUS_SPACE_MAXADDR,
2081                                 BUS_SPACE_MAXADDR,
2082                                 NULL, NULL,
2083                                 dma_size,
2084                                 1,
2085                                 dma_size,
2086                                 0,
2087                                 NULL, NULL,
2088                                 &st->stats_ring_dtag);
2089         if (error) {
2090                 device_printf(sc->sc_dev, "can't create txstats ring "
2091                               "DMA tag\n");
2092                 return error;
2093         }
2094
2095         error = bus_dmamem_alloc(st->stats_ring_dtag, &st->stats_ring,
2096                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2097                                  &st->stats_ring_dmap);
2098         if (error) {
2099                 device_printf(sc->sc_dev, "can't allocate txstats ring "
2100                               "DMA mem\n");
2101                 bus_dma_tag_destroy(st->stats_ring_dtag);
2102                 st->stats_ring_dtag = NULL;
2103                 return error;
2104         }
2105
2106         error = bus_dmamap_load(st->stats_ring_dtag, st->stats_ring_dmap,
2107                                 st->stats_ring, dma_size,
2108                                 bwi_dma_ring_addr, &st->stats_ring_paddr,
2109                                 BUS_DMA_NOWAIT);
2110         if (error) {
2111                 device_printf(sc->sc_dev, "can't load txstats ring DMA mem\n");
2112                 bus_dmamem_free(st->stats_ring_dtag, st->stats_ring,
2113                                 st->stats_ring_dmap);
2114                 bus_dma_tag_destroy(st->stats_ring_dtag);
2115                 st->stats_ring_dtag = NULL;
2116                 return error;
2117         }
2118
2119         /*
2120          * Create TX stats DMA stuffs
2121          */
2122         dma_size = roundup(sizeof(struct bwi_txstats) * BWI_TXSTATS_NDESC,
2123                            BWI_ALIGN);
2124
2125         error = bus_dma_tag_create(sc->sc_parent_dtag,
2126                                 BWI_ALIGN,
2127                                 0,
2128                                 BUS_SPACE_MAXADDR,
2129                                 BUS_SPACE_MAXADDR,
2130                                 NULL, NULL,
2131                                 dma_size,
2132                                 1,
2133                                 dma_size,
2134                                 0,
2135                                 NULL, NULL,
2136                                 &st->stats_dtag);
2137         if (error) {
2138                 device_printf(sc->sc_dev, "can't create txstats DMA tag\n");
2139                 return error;
2140         }
2141
2142         error = bus_dmamem_alloc(st->stats_dtag, (void **)&st->stats,
2143                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2144                                  &st->stats_dmap);
2145         if (error) {
2146                 device_printf(sc->sc_dev, "can't allocate txstats DMA mem\n");
2147                 bus_dma_tag_destroy(st->stats_dtag);
2148                 st->stats_dtag = NULL;
2149                 return error;
2150         }
2151
2152         error = bus_dmamap_load(st->stats_dtag, st->stats_dmap, st->stats,
2153                                 dma_size, bwi_dma_ring_addr, &st->stats_paddr,
2154                                 BUS_DMA_NOWAIT);
2155         if (error) {
2156                 device_printf(sc->sc_dev, "can't load txstats DMA mem\n");
2157                 bus_dmamem_free(st->stats_dtag, st->stats, st->stats_dmap);
2158                 bus_dma_tag_destroy(st->stats_dtag);
2159                 st->stats_dtag = NULL;
2160                 return error;
2161         }
2162
2163         st->stats_ctrl_base = ctrl_base;
2164         return 0;
2165 }
2166
2167 static void
2168 bwi_dma_txstats_free(struct bwi_softc *sc)
2169 {
2170         struct bwi_txstats_data *st;
2171
2172         if (sc->sc_txstats == NULL)
2173                 return;
2174         st = sc->sc_txstats;
2175
2176         if (st->stats_ring_dtag != NULL) {
2177                 bus_dmamap_unload(st->stats_ring_dtag, st->stats_ring_dmap);
2178                 bus_dmamem_free(st->stats_ring_dtag, st->stats_ring,
2179                                 st->stats_ring_dmap);
2180                 bus_dma_tag_destroy(st->stats_ring_dtag);
2181         }
2182
2183         if (st->stats_dtag != NULL) {
2184                 bus_dmamap_unload(st->stats_dtag, st->stats_dmap);
2185                 bus_dmamem_free(st->stats_dtag, st->stats, st->stats_dmap);
2186                 bus_dma_tag_destroy(st->stats_dtag);
2187         }
2188
2189         free(st, M_DEVBUF);
2190 }
2191
2192 static void
2193 bwi_dma_ring_addr(void *arg, bus_dma_segment_t *seg, int nseg, int error)
2194 {
2195         KASSERT(nseg == 1, ("too many segments\n"));
2196         *((bus_addr_t *)arg) = seg->ds_addr;
2197 }
2198
2199 static int
2200 bwi_dma_mbuf_create(struct bwi_softc *sc)
2201 {
2202         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2203         int i, j, k, ntx, error;
2204
2205         /*
2206          * Create TX/RX mbuf DMA tag
2207          */
2208         error = bus_dma_tag_create(sc->sc_parent_dtag,
2209                                 1,
2210                                 0,
2211                                 BUS_SPACE_MAXADDR,
2212                                 BUS_SPACE_MAXADDR,
2213                                 NULL, NULL,
2214                                 MCLBYTES,
2215                                 1,
2216                                 MCLBYTES,
2217                                 BUS_DMA_ALLOCNOW,
2218                                 NULL, NULL,
2219                                 &sc->sc_buf_dtag);
2220         if (error) {
2221                 device_printf(sc->sc_dev, "can't create mbuf DMA tag\n");
2222                 return error;
2223         }
2224
2225         ntx = 0;
2226
2227         /*
2228          * Create TX mbuf DMA map
2229          */
2230         for (i = 0; i < BWI_TX_NRING; ++i) {
2231                 struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[i];
2232
2233                 for (j = 0; j < BWI_TX_NDESC; ++j) {
2234                         error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2235                                                   &tbd->tbd_buf[j].tb_dmap);
2236                         if (error) {
2237                                 device_printf(sc->sc_dev, "can't create "
2238                                               "%dth tbd, %dth DMA map\n", i, j);
2239
2240                                 ntx = i;
2241                                 for (k = 0; k < j; ++k) {
2242                                         bus_dmamap_destroy(sc->sc_buf_dtag,
2243                                                 tbd->tbd_buf[k].tb_dmap);
2244                                 }
2245                                 goto fail;
2246                         }
2247                 }
2248         }
2249         ntx = BWI_TX_NRING;
2250
2251         /*
2252          * Create RX mbuf DMA map and a spare DMA map
2253          */
2254         error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2255                                   &rbd->rbd_tmp_dmap);
2256         if (error) {
2257                 device_printf(sc->sc_dev,
2258                               "can't create spare RX buf DMA map\n");
2259                 goto fail;
2260         }
2261
2262         for (j = 0; j < BWI_RX_NDESC; ++j) {
2263                 error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2264                                           &rbd->rbd_buf[j].rb_dmap);
2265                 if (error) {
2266                         device_printf(sc->sc_dev, "can't create %dth "
2267                                       "RX buf DMA map\n", j);
2268
2269                         for (k = 0; k < j; ++k) {
2270                                 bus_dmamap_destroy(sc->sc_buf_dtag,
2271                                         rbd->rbd_buf[j].rb_dmap);
2272                         }
2273                         bus_dmamap_destroy(sc->sc_buf_dtag,
2274                                            rbd->rbd_tmp_dmap);
2275                         goto fail;
2276                 }
2277         }
2278
2279         return 0;
2280 fail:
2281         bwi_dma_mbuf_destroy(sc, ntx, 0);
2282         return error;
2283 }
2284
2285 static void
2286 bwi_dma_mbuf_destroy(struct bwi_softc *sc, int ntx, int nrx)
2287 {
2288         int i, j;
2289
2290         if (sc->sc_buf_dtag == NULL)
2291                 return;
2292
2293         for (i = 0; i < ntx; ++i) {
2294                 struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[i];
2295
2296                 for (j = 0; j < BWI_TX_NDESC; ++j) {
2297                         struct bwi_txbuf *tb = &tbd->tbd_buf[j];
2298
2299                         if (tb->tb_mbuf != NULL) {
2300                                 bus_dmamap_unload(sc->sc_buf_dtag,
2301                                                   tb->tb_dmap);
2302                                 m_freem(tb->tb_mbuf);
2303                         }
2304                         if (tb->tb_ni != NULL)
2305                                 ieee80211_free_node(tb->tb_ni);
2306                         bus_dmamap_destroy(sc->sc_buf_dtag, tb->tb_dmap);
2307                 }
2308         }
2309
2310         if (nrx) {
2311                 struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2312
2313                 bus_dmamap_destroy(sc->sc_buf_dtag, rbd->rbd_tmp_dmap);
2314                 for (j = 0; j < BWI_RX_NDESC; ++j) {
2315                         struct bwi_rxbuf *rb = &rbd->rbd_buf[j];
2316
2317                         if (rb->rb_mbuf != NULL) {
2318                                 bus_dmamap_unload(sc->sc_buf_dtag,
2319                                                   rb->rb_dmap);
2320                                 m_freem(rb->rb_mbuf);
2321                         }
2322                         bus_dmamap_destroy(sc->sc_buf_dtag, rb->rb_dmap);
2323                 }
2324         }
2325
2326         bus_dma_tag_destroy(sc->sc_buf_dtag);
2327         sc->sc_buf_dtag = NULL;
2328 }
2329
2330 static void
2331 bwi_enable_intrs(struct bwi_softc *sc, uint32_t enable_intrs)
2332 {
2333         CSR_SETBITS_4(sc, BWI_MAC_INTR_MASK, enable_intrs);
2334 }
2335
2336 static void
2337 bwi_disable_intrs(struct bwi_softc *sc, uint32_t disable_intrs)
2338 {
2339         CSR_CLRBITS_4(sc, BWI_MAC_INTR_MASK, disable_intrs);
2340 }
2341
2342 static int
2343 bwi_init_tx_ring32(struct bwi_softc *sc, int ring_idx)
2344 {
2345         struct bwi_ring_data *rd;
2346         struct bwi_txbuf_data *tbd;
2347         uint32_t val, addr_hi, addr_lo;
2348
2349         KASSERT(ring_idx < BWI_TX_NRING, ("ring_idx %d", ring_idx));
2350         rd = &sc->sc_tx_rdata[ring_idx];
2351         tbd = &sc->sc_tx_bdata[ring_idx];
2352
2353         tbd->tbd_idx = 0;
2354         tbd->tbd_used = 0;
2355
2356         bzero(rd->rdata_desc, sizeof(struct bwi_desc32) * BWI_TX_NDESC);
2357         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
2358                         BUS_DMASYNC_PREWRITE);
2359
2360         addr_lo = __SHIFTOUT(rd->rdata_paddr, BWI_TXRX32_RINGINFO_ADDR_MASK);
2361         addr_hi = __SHIFTOUT(rd->rdata_paddr, BWI_TXRX32_RINGINFO_FUNC_MASK);
2362
2363         val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
2364               __SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,
2365                         BWI_TXRX32_RINGINFO_FUNC_MASK);
2366         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);
2367
2368         val = __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
2369               BWI_TXRX32_CTRL_ENABLE;
2370         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);
2371
2372         return 0;
2373 }
2374
2375 static void
2376 bwi_init_rxdesc_ring32(struct bwi_softc *sc, uint32_t ctrl_base,
2377                        bus_addr_t paddr, int hdr_size, int ndesc)
2378 {
2379         uint32_t val, addr_hi, addr_lo;
2380
2381         addr_lo = __SHIFTOUT(paddr, BWI_TXRX32_RINGINFO_ADDR_MASK);
2382         addr_hi = __SHIFTOUT(paddr, BWI_TXRX32_RINGINFO_FUNC_MASK);
2383
2384         val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
2385               __SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,
2386                         BWI_TXRX32_RINGINFO_FUNC_MASK);
2387         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);
2388
2389         val = __SHIFTIN(hdr_size, BWI_RX32_CTRL_HDRSZ_MASK) |
2390               __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
2391               BWI_TXRX32_CTRL_ENABLE;
2392         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
2393
2394         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
2395                     (ndesc - 1) * sizeof(struct bwi_desc32));
2396 }
2397
2398 static int
2399 bwi_init_rx_ring32(struct bwi_softc *sc)
2400 {
2401         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2402         int i, error;
2403
2404         sc->sc_rx_bdata.rbd_idx = 0;
2405
2406         for (i = 0; i < BWI_RX_NDESC; ++i) {
2407                 error = bwi_newbuf(sc, i, 1);
2408                 if (error) {
2409                         device_printf(sc->sc_dev,
2410                                   "can't allocate %dth RX buffer\n", i);
2411                         return error;
2412                 }
2413         }
2414         bus_dmamap_sync(sc->sc_rxring_dtag, rd->rdata_dmap,
2415                         BUS_DMASYNC_PREWRITE);
2416
2417         bwi_init_rxdesc_ring32(sc, rd->rdata_txrx_ctrl, rd->rdata_paddr,
2418                                sizeof(struct bwi_rxbuf_hdr), BWI_RX_NDESC);
2419         return 0;
2420 }
2421
2422 static int
2423 bwi_init_txstats32(struct bwi_softc *sc)
2424 {
2425         struct bwi_txstats_data *st = sc->sc_txstats;
2426         bus_addr_t stats_paddr;
2427         int i;
2428
2429         bzero(st->stats, BWI_TXSTATS_NDESC * sizeof(struct bwi_txstats));
2430         bus_dmamap_sync(st->stats_dtag, st->stats_dmap, BUS_DMASYNC_PREWRITE);
2431
2432         st->stats_idx = 0;
2433
2434         stats_paddr = st->stats_paddr;
2435         for (i = 0; i < BWI_TXSTATS_NDESC; ++i) {
2436                 bwi_setup_desc32(sc, st->stats_ring, BWI_TXSTATS_NDESC, i,
2437                                  stats_paddr, sizeof(struct bwi_txstats), 0);
2438                 stats_paddr += sizeof(struct bwi_txstats);
2439         }
2440         bus_dmamap_sync(st->stats_ring_dtag, st->stats_ring_dmap,
2441                         BUS_DMASYNC_PREWRITE);
2442
2443         bwi_init_rxdesc_ring32(sc, st->stats_ctrl_base,
2444                                st->stats_ring_paddr, 0, BWI_TXSTATS_NDESC);
2445         return 0;
2446 }
2447
2448 static void
2449 bwi_setup_rx_desc32(struct bwi_softc *sc, int buf_idx, bus_addr_t paddr,
2450                     int buf_len)
2451 {
2452         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2453
2454         KASSERT(buf_idx < BWI_RX_NDESC, ("buf_idx %d", buf_idx));
2455         bwi_setup_desc32(sc, rd->rdata_desc, BWI_RX_NDESC, buf_idx,
2456                          paddr, buf_len, 0);
2457 }
2458
2459 static void
2460 bwi_setup_tx_desc32(struct bwi_softc *sc, struct bwi_ring_data *rd,
2461                     int buf_idx, bus_addr_t paddr, int buf_len)
2462 {
2463         KASSERT(buf_idx < BWI_TX_NDESC, ("buf_idx %d", buf_idx));
2464         bwi_setup_desc32(sc, rd->rdata_desc, BWI_TX_NDESC, buf_idx,
2465                          paddr, buf_len, 1);
2466 }
2467
2468 static int
2469 bwi_init_tx_ring64(struct bwi_softc *sc, int ring_idx)
2470 {
2471         /* TODO:64 */
2472         return EOPNOTSUPP;
2473 }
2474
2475 static int
2476 bwi_init_rx_ring64(struct bwi_softc *sc)
2477 {
2478         /* TODO:64 */
2479         return EOPNOTSUPP;
2480 }
2481
2482 static int
2483 bwi_init_txstats64(struct bwi_softc *sc)
2484 {
2485         /* TODO:64 */
2486         return EOPNOTSUPP;
2487 }
2488
2489 static void
2490 bwi_setup_rx_desc64(struct bwi_softc *sc, int buf_idx, bus_addr_t paddr,
2491                     int buf_len)
2492 {
2493         /* TODO:64 */
2494 }
2495
2496 static void
2497 bwi_setup_tx_desc64(struct bwi_softc *sc, struct bwi_ring_data *rd,
2498                     int buf_idx, bus_addr_t paddr, int buf_len)
2499 {
2500         /* TODO:64 */
2501 }
2502
2503 static void
2504 bwi_dma_buf_addr(void *arg, bus_dma_segment_t *seg, int nseg,
2505                  bus_size_t mapsz __unused, int error)
2506 {
2507         if (!error) {
2508                 KASSERT(nseg == 1, ("too many segments(%d)\n", nseg));
2509                 *((bus_addr_t *)arg) = seg->ds_addr;
2510         }
2511 }
2512
2513 static int
2514 bwi_newbuf(struct bwi_softc *sc, int buf_idx, int init)
2515 {
2516         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2517         struct bwi_rxbuf *rxbuf = &rbd->rbd_buf[buf_idx];
2518         struct bwi_rxbuf_hdr *hdr;
2519         bus_dmamap_t map;
2520         bus_addr_t paddr;
2521         struct mbuf *m;
2522         int error;
2523
2524         KASSERT(buf_idx < BWI_RX_NDESC, ("buf_idx %d", buf_idx));
2525
2526         m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
2527         if (m == NULL) {
2528                 error = ENOBUFS;
2529
2530                 /*
2531                  * If the NIC is up and running, we need to:
2532                  * - Clear RX buffer's header.
2533                  * - Restore RX descriptor settings.
2534                  */
2535                 if (init)
2536                         return error;
2537                 else
2538                         goto back;
2539         }
2540         m->m_len = m->m_pkthdr.len = MCLBYTES;
2541
2542         /*
2543          * Try to load RX buf into temporary DMA map
2544          */
2545         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, rbd->rbd_tmp_dmap, m,
2546                                      bwi_dma_buf_addr, &paddr, BUS_DMA_NOWAIT);
2547         if (error) {
2548                 m_freem(m);
2549
2550                 /*
2551                  * See the comment above
2552                  */
2553                 if (init)
2554                         return error;
2555                 else
2556                         goto back;
2557         }
2558
2559         if (!init)
2560                 bus_dmamap_unload(sc->sc_buf_dtag, rxbuf->rb_dmap);
2561         rxbuf->rb_mbuf = m;
2562         rxbuf->rb_paddr = paddr;
2563
2564         /*
2565          * Swap RX buf's DMA map with the loaded temporary one
2566          */
2567         map = rxbuf->rb_dmap;
2568         rxbuf->rb_dmap = rbd->rbd_tmp_dmap;
2569         rbd->rbd_tmp_dmap = map;
2570
2571 back:
2572         /*
2573          * Clear RX buf header
2574          */
2575         hdr = mtod(rxbuf->rb_mbuf, struct bwi_rxbuf_hdr *);
2576         bzero(hdr, sizeof(*hdr));
2577         bus_dmamap_sync(sc->sc_buf_dtag, rxbuf->rb_dmap, BUS_DMASYNC_PREWRITE);
2578
2579         /*
2580          * Setup RX buf descriptor
2581          */
2582         sc->sc_setup_rxdesc(sc, buf_idx, rxbuf->rb_paddr,
2583                             rxbuf->rb_mbuf->m_len - sizeof(*hdr));
2584         return error;
2585 }
2586
2587 static void
2588 bwi_set_addr_filter(struct bwi_softc *sc, uint16_t addr_ofs,
2589                     const uint8_t *addr)
2590 {
2591         int i;
2592
2593         CSR_WRITE_2(sc, BWI_ADDR_FILTER_CTRL,
2594                     BWI_ADDR_FILTER_CTRL_SET | addr_ofs);
2595
2596         for (i = 0; i < (IEEE80211_ADDR_LEN / 2); ++i) {
2597                 uint16_t addr_val;
2598
2599                 addr_val = (uint16_t)addr[i * 2] |
2600                            (((uint16_t)addr[(i * 2) + 1]) << 8);
2601                 CSR_WRITE_2(sc, BWI_ADDR_FILTER_DATA, addr_val);
2602         }
2603 }
2604
2605 static int
2606 bwi_rxeof(struct bwi_softc *sc, int end_idx)
2607 {
2608         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2609         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2610         struct ieee80211com *ic = &sc->sc_ic;
2611         int idx, rx_data = 0;
2612
2613         idx = rbd->rbd_idx;
2614         while (idx != end_idx) {
2615                 struct bwi_rxbuf *rb = &rbd->rbd_buf[idx];
2616                 struct bwi_rxbuf_hdr *hdr;
2617                 struct ieee80211_frame_min *wh;
2618                 struct ieee80211_node *ni;
2619                 struct mbuf *m;
2620                 uint32_t plcp;
2621                 uint16_t flags2;
2622                 int buflen, wh_ofs, hdr_extra, rssi, noise, type, rate;
2623
2624                 m = rb->rb_mbuf;
2625                 bus_dmamap_sync(sc->sc_buf_dtag, rb->rb_dmap,
2626                                 BUS_DMASYNC_POSTREAD);
2627
2628                 if (bwi_newbuf(sc, idx, 0)) {
2629                         counter_u64_add(ic->ic_ierrors, 1);
2630                         goto next;
2631                 }
2632
2633                 hdr = mtod(m, struct bwi_rxbuf_hdr *);
2634                 flags2 = le16toh(hdr->rxh_flags2);
2635
2636                 hdr_extra = 0;
2637                 if (flags2 & BWI_RXH_F2_TYPE2FRAME)
2638                         hdr_extra = 2;
2639                 wh_ofs = hdr_extra + 6; /* XXX magic number */
2640
2641                 buflen = le16toh(hdr->rxh_buflen);
2642                 if (buflen < BWI_FRAME_MIN_LEN(wh_ofs)) {
2643                         device_printf(sc->sc_dev,
2644                             "%s: zero length data, hdr_extra %d\n",
2645                             __func__, hdr_extra);
2646                         counter_u64_add(ic->ic_ierrors, 1);
2647                         m_freem(m);
2648                         goto next;
2649                 }
2650
2651                 bcopy((uint8_t *)(hdr + 1) + hdr_extra, &plcp, sizeof(plcp));
2652                 rssi = bwi_calc_rssi(sc, hdr);
2653                 noise = bwi_calc_noise(sc);
2654
2655                 m->m_len = m->m_pkthdr.len = buflen + sizeof(*hdr);
2656                 m_adj(m, sizeof(*hdr) + wh_ofs);
2657
2658                 if (htole16(hdr->rxh_flags1) & BWI_RXH_F1_OFDM)
2659                         rate = bwi_plcp2rate(plcp, IEEE80211_T_OFDM);
2660                 else
2661                         rate = bwi_plcp2rate(plcp, IEEE80211_T_CCK);
2662
2663                 /* RX radio tap */
2664                 if (ieee80211_radiotap_active(ic))
2665                         bwi_rx_radiotap(sc, m, hdr, &plcp, rate, rssi, noise);
2666
2667                 m_adj(m, -IEEE80211_CRC_LEN);
2668
2669                 BWI_UNLOCK(sc);
2670
2671                 wh = mtod(m, struct ieee80211_frame_min *);
2672                 ni = ieee80211_find_rxnode(ic, wh);
2673                 if (ni != NULL) {
2674                         type = ieee80211_input(ni, m, rssi - noise, noise);
2675                         ieee80211_free_node(ni);
2676                 } else
2677                         type = ieee80211_input_all(ic, m, rssi - noise, noise);
2678                 if (type == IEEE80211_FC0_TYPE_DATA) {
2679                         rx_data = 1;
2680                         sc->sc_rx_rate = rate;
2681                 }
2682
2683                 BWI_LOCK(sc);
2684 next:
2685                 idx = (idx + 1) % BWI_RX_NDESC;
2686
2687                 if (sc->sc_flags & BWI_F_STOP) {
2688                         /*
2689                          * Take the fast lane, don't do
2690                          * any damage to softc
2691                          */
2692                         return -1;
2693                 }
2694         }
2695
2696         rbd->rbd_idx = idx;
2697         bus_dmamap_sync(sc->sc_rxring_dtag, rd->rdata_dmap,
2698                         BUS_DMASYNC_PREWRITE);
2699
2700         return rx_data;
2701 }
2702
2703 static int
2704 bwi_rxeof32(struct bwi_softc *sc)
2705 {
2706         uint32_t val, rx_ctrl;
2707         int end_idx, rx_data;
2708
2709         rx_ctrl = sc->sc_rx_rdata.rdata_txrx_ctrl;
2710
2711         val = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
2712         end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
2713                   sizeof(struct bwi_desc32);
2714
2715         rx_data = bwi_rxeof(sc, end_idx);
2716         if (rx_data >= 0) {
2717                 CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_INDEX,
2718                             end_idx * sizeof(struct bwi_desc32));
2719         }
2720         return rx_data;
2721 }
2722
2723 static int
2724 bwi_rxeof64(struct bwi_softc *sc)
2725 {
2726         /* TODO:64 */
2727         return 0;
2728 }
2729
2730 static void
2731 bwi_reset_rx_ring32(struct bwi_softc *sc, uint32_t rx_ctrl)
2732 {
2733         int i;
2734
2735         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_CTRL, 0);
2736
2737 #define NRETRY 10
2738
2739         for (i = 0; i < NRETRY; ++i) {
2740                 uint32_t status;
2741
2742                 status = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
2743                 if (__SHIFTOUT(status, BWI_RX32_STATUS_STATE_MASK) ==
2744                     BWI_RX32_STATUS_STATE_DISABLED)
2745                         break;
2746
2747                 DELAY(1000);
2748         }
2749         if (i == NRETRY)
2750                 device_printf(sc->sc_dev, "reset rx ring timedout\n");
2751
2752 #undef NRETRY
2753
2754         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_RINGINFO, 0);
2755 }
2756
2757 static void
2758 bwi_free_txstats32(struct bwi_softc *sc)
2759 {
2760         bwi_reset_rx_ring32(sc, sc->sc_txstats->stats_ctrl_base);
2761 }
2762
2763 static void
2764 bwi_free_rx_ring32(struct bwi_softc *sc)
2765 {
2766         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2767         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2768         int i;
2769
2770         bwi_reset_rx_ring32(sc, rd->rdata_txrx_ctrl);
2771
2772         for (i = 0; i < BWI_RX_NDESC; ++i) {
2773                 struct bwi_rxbuf *rb = &rbd->rbd_buf[i];
2774
2775                 if (rb->rb_mbuf != NULL) {
2776                         bus_dmamap_unload(sc->sc_buf_dtag, rb->rb_dmap);
2777                         m_freem(rb->rb_mbuf);
2778                         rb->rb_mbuf = NULL;
2779                 }
2780         }
2781 }
2782
2783 static void
2784 bwi_free_tx_ring32(struct bwi_softc *sc, int ring_idx)
2785 {
2786         struct bwi_ring_data *rd;
2787         struct bwi_txbuf_data *tbd;
2788         uint32_t state, val;
2789         int i;
2790
2791         KASSERT(ring_idx < BWI_TX_NRING, ("ring_idx %d", ring_idx));
2792         rd = &sc->sc_tx_rdata[ring_idx];
2793         tbd = &sc->sc_tx_bdata[ring_idx];
2794
2795 #define NRETRY 10
2796
2797         for (i = 0; i < NRETRY; ++i) {
2798                 val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
2799                 state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
2800                 if (state == BWI_TX32_STATUS_STATE_DISABLED ||
2801                     state == BWI_TX32_STATUS_STATE_IDLE ||
2802                     state == BWI_TX32_STATUS_STATE_STOPPED)
2803                         break;
2804
2805                 DELAY(1000);
2806         }
2807         if (i == NRETRY) {
2808                 device_printf(sc->sc_dev,
2809                     "%s: wait for TX ring(%d) stable timed out\n",
2810                     __func__, ring_idx);
2811         }
2812
2813         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, 0);
2814         for (i = 0; i < NRETRY; ++i) {
2815                 val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
2816                 state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
2817                 if (state == BWI_TX32_STATUS_STATE_DISABLED)
2818                         break;
2819
2820                 DELAY(1000);
2821         }
2822         if (i == NRETRY)
2823                 device_printf(sc->sc_dev, "%s: reset TX ring (%d) timed out\n",
2824                      __func__, ring_idx);
2825
2826 #undef NRETRY
2827
2828         DELAY(1000);
2829
2830         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, 0);
2831
2832         for (i = 0; i < BWI_TX_NDESC; ++i) {
2833                 struct bwi_txbuf *tb = &tbd->tbd_buf[i];
2834
2835                 if (tb->tb_mbuf != NULL) {
2836                         bus_dmamap_unload(sc->sc_buf_dtag, tb->tb_dmap);
2837                         m_freem(tb->tb_mbuf);
2838                         tb->tb_mbuf = NULL;
2839                 }
2840                 if (tb->tb_ni != NULL) {
2841                         ieee80211_free_node(tb->tb_ni);
2842                         tb->tb_ni = NULL;
2843                 }
2844         }
2845 }
2846
2847 static void
2848 bwi_free_txstats64(struct bwi_softc *sc)
2849 {
2850         /* TODO:64 */
2851 }
2852
2853 static void
2854 bwi_free_rx_ring64(struct bwi_softc *sc)
2855 {
2856         /* TODO:64 */
2857 }
2858
2859 static void
2860 bwi_free_tx_ring64(struct bwi_softc *sc, int ring_idx)
2861 {
2862         /* TODO:64 */
2863 }
2864
2865 /* XXX does not belong here */
2866 #define IEEE80211_OFDM_PLCP_RATE_MASK   __BITS(3, 0)
2867 #define IEEE80211_OFDM_PLCP_LEN_MASK    __BITS(16, 5)
2868
2869 static __inline void
2870 bwi_ofdm_plcp_header(uint32_t *plcp0, int pkt_len, uint8_t rate)
2871 {
2872         uint32_t plcp;
2873
2874         plcp = __SHIFTIN(ieee80211_rate2plcp(rate, IEEE80211_T_OFDM),
2875                     IEEE80211_OFDM_PLCP_RATE_MASK) |
2876                __SHIFTIN(pkt_len, IEEE80211_OFDM_PLCP_LEN_MASK);
2877         *plcp0 = htole32(plcp);
2878 }
2879
2880 static __inline void
2881 bwi_ds_plcp_header(struct ieee80211_ds_plcp_hdr *plcp, int pkt_len,
2882                    uint8_t rate)
2883 {
2884         int len, service, pkt_bitlen;
2885
2886         pkt_bitlen = pkt_len * NBBY;
2887         len = howmany(pkt_bitlen * 2, rate);
2888
2889         service = IEEE80211_PLCP_SERVICE_LOCKED;
2890         if (rate == (11 * 2)) {
2891                 int pkt_bitlen1;
2892
2893                 /*
2894                  * PLCP service field needs to be adjusted,
2895                  * if TX rate is 11Mbytes/s
2896                  */
2897                 pkt_bitlen1 = len * 11;
2898                 if (pkt_bitlen1 - pkt_bitlen >= NBBY)
2899                         service |= IEEE80211_PLCP_SERVICE_LENEXT7;
2900         }
2901
2902         plcp->i_signal = ieee80211_rate2plcp(rate, IEEE80211_T_CCK);
2903         plcp->i_service = service;
2904         plcp->i_length = htole16(len);
2905         /* NOTE: do NOT touch i_crc */
2906 }
2907
2908 static __inline void
2909 bwi_plcp_header(const struct ieee80211_rate_table *rt,
2910         void *plcp, int pkt_len, uint8_t rate)
2911 {
2912         enum ieee80211_phytype modtype;
2913
2914         /*
2915          * Assume caller has zeroed 'plcp'
2916          */
2917         modtype = ieee80211_rate2phytype(rt, rate);
2918         if (modtype == IEEE80211_T_OFDM)
2919                 bwi_ofdm_plcp_header(plcp, pkt_len, rate);
2920         else if (modtype == IEEE80211_T_DS)
2921                 bwi_ds_plcp_header(plcp, pkt_len, rate);
2922         else
2923                 panic("unsupport modulation type %u\n", modtype);
2924 }
2925
2926 static int
2927 bwi_encap(struct bwi_softc *sc, int idx, struct mbuf *m,
2928           struct ieee80211_node *ni)
2929 {
2930         struct ieee80211vap *vap = ni->ni_vap;
2931         struct ieee80211com *ic = &sc->sc_ic;
2932         struct bwi_ring_data *rd = &sc->sc_tx_rdata[BWI_TX_DATA_RING];
2933         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
2934         struct bwi_txbuf *tb = &tbd->tbd_buf[idx];
2935         struct bwi_mac *mac;
2936         struct bwi_txbuf_hdr *hdr;
2937         struct ieee80211_frame *wh;
2938         const struct ieee80211_txparam *tp = ni->ni_txparms;
2939         uint8_t rate, rate_fb;
2940         uint32_t mac_ctrl;
2941         uint16_t phy_ctrl;
2942         bus_addr_t paddr;
2943         int type, ismcast, pkt_len, error, rix;
2944 #if 0
2945         const uint8_t *p;
2946         int i;
2947 #endif
2948
2949         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
2950             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
2951         mac = (struct bwi_mac *)sc->sc_cur_regwin;
2952
2953         wh = mtod(m, struct ieee80211_frame *);
2954         type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2955         ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2956
2957         /* Get 802.11 frame len before prepending TX header */
2958         pkt_len = m->m_pkthdr.len + IEEE80211_CRC_LEN;
2959
2960         /*
2961          * Find TX rate
2962          */
2963         if (type != IEEE80211_FC0_TYPE_DATA || (m->m_flags & M_EAPOL)) {
2964                 rate = rate_fb = tp->mgmtrate;
2965         } else if (ismcast) {
2966                 rate = rate_fb = tp->mcastrate;
2967         } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
2968                 rate = rate_fb = tp->ucastrate;
2969         } else {
2970                 rix = ieee80211_ratectl_rate(ni, NULL, pkt_len);
2971                 rate = ni->ni_txrate;
2972
2973                 if (rix > 0) {
2974                         rate_fb = ni->ni_rates.rs_rates[rix-1] &
2975                                   IEEE80211_RATE_VAL;
2976                 } else {
2977                         rate_fb = rate;
2978                 }
2979         }
2980         tb->tb_rate[0] = rate;
2981         tb->tb_rate[1] = rate_fb;
2982         sc->sc_tx_rate = rate;
2983
2984         /*
2985          * TX radio tap
2986          */
2987         if (ieee80211_radiotap_active_vap(vap)) {
2988                 sc->sc_tx_th.wt_flags = 0;
2989                 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2990                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2991                 if (ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_DS &&
2992                     (ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
2993                     rate != (1 * 2)) {
2994                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2995                 }
2996                 sc->sc_tx_th.wt_rate = rate;
2997
2998                 ieee80211_radiotap_tx(vap, m);
2999         }
3000
3001         /*
3002          * Setup the embedded TX header
3003          */
3004         M_PREPEND(m, sizeof(*hdr), M_NOWAIT);
3005         if (m == NULL) {
3006                 device_printf(sc->sc_dev, "%s: prepend TX header failed\n",
3007                     __func__);
3008                 return ENOBUFS;
3009         }
3010         hdr = mtod(m, struct bwi_txbuf_hdr *);
3011
3012         bzero(hdr, sizeof(*hdr));
3013
3014         bcopy(wh->i_fc, hdr->txh_fc, sizeof(hdr->txh_fc));
3015         bcopy(wh->i_addr1, hdr->txh_addr1, sizeof(hdr->txh_addr1));
3016
3017         if (!ismcast) {
3018                 uint16_t dur;
3019
3020                 dur = ieee80211_ack_duration(sc->sc_rates, rate,
3021                     ic->ic_flags & ~IEEE80211_F_SHPREAMBLE);
3022
3023                 hdr->txh_fb_duration = htole16(dur);
3024         }
3025
3026         hdr->txh_id = __SHIFTIN(BWI_TX_DATA_RING, BWI_TXH_ID_RING_MASK) |
3027                       __SHIFTIN(idx, BWI_TXH_ID_IDX_MASK);
3028
3029         bwi_plcp_header(sc->sc_rates, hdr->txh_plcp, pkt_len, rate);
3030         bwi_plcp_header(sc->sc_rates, hdr->txh_fb_plcp, pkt_len, rate_fb);
3031
3032         phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,
3033                              BWI_TXH_PHY_C_ANTMODE_MASK);
3034         if (ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM)
3035                 phy_ctrl |= BWI_TXH_PHY_C_OFDM;
3036         else if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && rate != (2 * 1))
3037                 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE;
3038
3039         mac_ctrl = BWI_TXH_MAC_C_HWSEQ | BWI_TXH_MAC_C_FIRST_FRAG;
3040         if (!ismcast)
3041                 mac_ctrl |= BWI_TXH_MAC_C_ACK;
3042         if (ieee80211_rate2phytype(sc->sc_rates, rate_fb) == IEEE80211_T_OFDM)
3043                 mac_ctrl |= BWI_TXH_MAC_C_FB_OFDM;
3044
3045         hdr->txh_mac_ctrl = htole32(mac_ctrl);
3046         hdr->txh_phy_ctrl = htole16(phy_ctrl);
3047
3048         /* Catch any further usage */
3049         hdr = NULL;
3050         wh = NULL;
3051
3052         /* DMA load */
3053         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3054                                      bwi_dma_buf_addr, &paddr, BUS_DMA_NOWAIT);
3055         if (error && error != EFBIG) {
3056                 device_printf(sc->sc_dev, "%s: can't load TX buffer (1) %d\n",
3057                     __func__, error);
3058                 goto back;
3059         }
3060
3061         if (error) {    /* error == EFBIG */
3062                 struct mbuf *m_new;
3063
3064                 m_new = m_defrag(m, M_NOWAIT);
3065                 if (m_new == NULL) {
3066                         device_printf(sc->sc_dev,
3067                             "%s: can't defrag TX buffer\n", __func__);
3068                         error = ENOBUFS;
3069                         goto back;
3070                 } else {
3071                         m = m_new;
3072                 }
3073
3074                 error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3075                                              bwi_dma_buf_addr, &paddr,
3076                                              BUS_DMA_NOWAIT);
3077                 if (error) {
3078                         device_printf(sc->sc_dev,
3079                             "%s: can't load TX buffer (2) %d\n",
3080                             __func__, error);
3081                         goto back;
3082                 }
3083         }
3084         error = 0;
3085
3086         bus_dmamap_sync(sc->sc_buf_dtag, tb->tb_dmap, BUS_DMASYNC_PREWRITE);
3087
3088         tb->tb_mbuf = m;
3089         tb->tb_ni = ni;
3090
3091 #if 0
3092         p = mtod(m, const uint8_t *);
3093         for (i = 0; i < m->m_pkthdr.len; ++i) {
3094                 if (i != 0 && i % 8 == 0)
3095                         printf("\n");
3096                 printf("%02x ", p[i]);
3097         }
3098         printf("\n");
3099 #endif
3100         DPRINTF(sc, BWI_DBG_TX, "idx %d, pkt_len %d, buflen %d\n",
3101                 idx, pkt_len, m->m_pkthdr.len);
3102
3103         /* Setup TX descriptor */
3104         sc->sc_setup_txdesc(sc, rd, idx, paddr, m->m_pkthdr.len);
3105         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
3106                         BUS_DMASYNC_PREWRITE);
3107
3108         /* Kick start */
3109         sc->sc_start_tx(sc, rd->rdata_txrx_ctrl, idx);
3110
3111 back:
3112         if (error)
3113                 m_freem(m);
3114         return error;
3115 }
3116
3117 static int
3118 bwi_encap_raw(struct bwi_softc *sc, int idx, struct mbuf *m,
3119           struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
3120 {
3121         struct ieee80211vap *vap = ni->ni_vap;
3122         struct ieee80211com *ic = ni->ni_ic;
3123         struct bwi_ring_data *rd = &sc->sc_tx_rdata[BWI_TX_DATA_RING];
3124         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
3125         struct bwi_txbuf *tb = &tbd->tbd_buf[idx];
3126         struct bwi_mac *mac;
3127         struct bwi_txbuf_hdr *hdr;
3128         struct ieee80211_frame *wh;
3129         uint8_t rate, rate_fb;
3130         uint32_t mac_ctrl;
3131         uint16_t phy_ctrl;
3132         bus_addr_t paddr;
3133         int ismcast, pkt_len, error;
3134
3135         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
3136             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
3137         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3138
3139         wh = mtod(m, struct ieee80211_frame *);
3140         ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
3141
3142         /* Get 802.11 frame len before prepending TX header */
3143         pkt_len = m->m_pkthdr.len + IEEE80211_CRC_LEN;
3144
3145         /*
3146          * Find TX rate
3147          */
3148         rate = params->ibp_rate0;
3149         if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
3150                 /* XXX fall back to mcast/mgmt rate? */
3151                 m_freem(m);
3152                 return EINVAL;
3153         }
3154         if (params->ibp_try1 != 0) {
3155                 rate_fb = params->ibp_rate1;
3156                 if (!ieee80211_isratevalid(ic->ic_rt, rate_fb)) {
3157                         /* XXX fall back to rate0? */
3158                         m_freem(m);
3159                         return EINVAL;
3160                 }
3161         } else
3162                 rate_fb = rate;
3163         tb->tb_rate[0] = rate;
3164         tb->tb_rate[1] = rate_fb;
3165         sc->sc_tx_rate = rate;
3166
3167         /*
3168          * TX radio tap
3169          */
3170         if (ieee80211_radiotap_active_vap(vap)) {
3171                 sc->sc_tx_th.wt_flags = 0;
3172                 /* XXX IEEE80211_BPF_CRYPTO */
3173                 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
3174                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
3175                 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
3176                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3177                 sc->sc_tx_th.wt_rate = rate;
3178
3179                 ieee80211_radiotap_tx(vap, m);
3180         }
3181
3182         /*
3183          * Setup the embedded TX header
3184          */
3185         M_PREPEND(m, sizeof(*hdr), M_NOWAIT);
3186         if (m == NULL) {
3187                 device_printf(sc->sc_dev, "%s: prepend TX header failed\n",
3188                     __func__);
3189                 return ENOBUFS;
3190         }
3191         hdr = mtod(m, struct bwi_txbuf_hdr *);
3192
3193         bzero(hdr, sizeof(*hdr));
3194
3195         bcopy(wh->i_fc, hdr->txh_fc, sizeof(hdr->txh_fc));
3196         bcopy(wh->i_addr1, hdr->txh_addr1, sizeof(hdr->txh_addr1));
3197
3198         mac_ctrl = BWI_TXH_MAC_C_HWSEQ | BWI_TXH_MAC_C_FIRST_FRAG;
3199         if (!ismcast && (params->ibp_flags & IEEE80211_BPF_NOACK) == 0) {
3200                 uint16_t dur;
3201
3202                 dur = ieee80211_ack_duration(sc->sc_rates, rate_fb, 0);
3203
3204                 hdr->txh_fb_duration = htole16(dur);
3205                 mac_ctrl |= BWI_TXH_MAC_C_ACK;
3206         }
3207
3208         hdr->txh_id = __SHIFTIN(BWI_TX_DATA_RING, BWI_TXH_ID_RING_MASK) |
3209                       __SHIFTIN(idx, BWI_TXH_ID_IDX_MASK);
3210
3211         bwi_plcp_header(sc->sc_rates, hdr->txh_plcp, pkt_len, rate);
3212         bwi_plcp_header(sc->sc_rates, hdr->txh_fb_plcp, pkt_len, rate_fb);
3213
3214         phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,
3215                              BWI_TXH_PHY_C_ANTMODE_MASK);
3216         if (ieee80211_rate2phytype(sc->sc_rates, rate) == IEEE80211_T_OFDM) {
3217                 phy_ctrl |= BWI_TXH_PHY_C_OFDM;
3218                 mac_ctrl |= BWI_TXH_MAC_C_FB_OFDM;
3219         } else if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
3220                 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE;
3221
3222         hdr->txh_mac_ctrl = htole32(mac_ctrl);
3223         hdr->txh_phy_ctrl = htole16(phy_ctrl);
3224
3225         /* Catch any further usage */
3226         hdr = NULL;
3227         wh = NULL;
3228
3229         /* DMA load */
3230         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3231                                      bwi_dma_buf_addr, &paddr, BUS_DMA_NOWAIT);
3232         if (error != 0) {
3233                 struct mbuf *m_new;
3234
3235                 if (error != EFBIG) {
3236                         device_printf(sc->sc_dev,
3237                             "%s: can't load TX buffer (1) %d\n",
3238                             __func__, error);
3239                         goto back;
3240                 }
3241                 m_new = m_defrag(m, M_NOWAIT);
3242                 if (m_new == NULL) {
3243                         device_printf(sc->sc_dev,
3244                             "%s: can't defrag TX buffer\n", __func__);
3245                         error = ENOBUFS;
3246                         goto back;
3247                 }
3248                 m = m_new;
3249                 error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3250                                              bwi_dma_buf_addr, &paddr,
3251                                              BUS_DMA_NOWAIT);
3252                 if (error) {
3253                         device_printf(sc->sc_dev,
3254                             "%s: can't load TX buffer (2) %d\n",
3255                             __func__, error);
3256                         goto back;
3257                 }
3258         }
3259
3260         bus_dmamap_sync(sc->sc_buf_dtag, tb->tb_dmap, BUS_DMASYNC_PREWRITE);
3261
3262         tb->tb_mbuf = m;
3263         tb->tb_ni = ni;
3264
3265         DPRINTF(sc, BWI_DBG_TX, "idx %d, pkt_len %d, buflen %d\n",
3266                 idx, pkt_len, m->m_pkthdr.len);
3267
3268         /* Setup TX descriptor */
3269         sc->sc_setup_txdesc(sc, rd, idx, paddr, m->m_pkthdr.len);
3270         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
3271                         BUS_DMASYNC_PREWRITE);
3272
3273         /* Kick start */
3274         sc->sc_start_tx(sc, rd->rdata_txrx_ctrl, idx);
3275 back:
3276         if (error)
3277                 m_freem(m);
3278         return error;
3279 }
3280
3281 static void
3282 bwi_start_tx32(struct bwi_softc *sc, uint32_t tx_ctrl, int idx)
3283 {
3284         idx = (idx + 1) % BWI_TX_NDESC;
3285         CSR_WRITE_4(sc, tx_ctrl + BWI_TX32_INDEX,
3286                     idx * sizeof(struct bwi_desc32));
3287 }
3288
3289 static void
3290 bwi_start_tx64(struct bwi_softc *sc, uint32_t tx_ctrl, int idx)
3291 {
3292         /* TODO:64 */
3293 }
3294
3295 static void
3296 bwi_txeof_status32(struct bwi_softc *sc)
3297 {
3298         uint32_t val, ctrl_base;
3299         int end_idx;
3300
3301         ctrl_base = sc->sc_txstats->stats_ctrl_base;
3302
3303         val = CSR_READ_4(sc, ctrl_base + BWI_RX32_STATUS);
3304         end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
3305                   sizeof(struct bwi_desc32);
3306
3307         bwi_txeof_status(sc, end_idx);
3308
3309         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
3310                     end_idx * sizeof(struct bwi_desc32));
3311
3312         bwi_start_locked(sc);
3313 }
3314
3315 static void
3316 bwi_txeof_status64(struct bwi_softc *sc)
3317 {
3318         /* TODO:64 */
3319 }
3320
3321 static void
3322 _bwi_txeof(struct bwi_softc *sc, uint16_t tx_id, int acked, int data_txcnt)
3323 {
3324         struct bwi_txbuf_data *tbd;
3325         struct bwi_txbuf *tb;
3326         int ring_idx, buf_idx;
3327         struct ieee80211_node *ni;
3328
3329         if (tx_id == 0) {
3330                 device_printf(sc->sc_dev, "%s: zero tx id\n", __func__);
3331                 return;
3332         }
3333
3334         ring_idx = __SHIFTOUT(tx_id, BWI_TXH_ID_RING_MASK);
3335         buf_idx = __SHIFTOUT(tx_id, BWI_TXH_ID_IDX_MASK);
3336
3337         KASSERT(ring_idx == BWI_TX_DATA_RING, ("ring_idx %d", ring_idx));
3338         KASSERT(buf_idx < BWI_TX_NDESC, ("buf_idx %d", buf_idx));
3339
3340         tbd = &sc->sc_tx_bdata[ring_idx];
3341         KASSERT(tbd->tbd_used > 0, ("tbd_used %d", tbd->tbd_used));
3342         tbd->tbd_used--;
3343
3344         tb = &tbd->tbd_buf[buf_idx];
3345         DPRINTF(sc, BWI_DBG_TXEOF, "txeof idx %d, "
3346                 "acked %d, data_txcnt %d, ni %p\n",
3347                 buf_idx, acked, data_txcnt, tb->tb_ni);
3348
3349         bus_dmamap_unload(sc->sc_buf_dtag, tb->tb_dmap);
3350
3351         if ((ni = tb->tb_ni) != NULL) {
3352                 const struct bwi_txbuf_hdr *hdr =
3353                     mtod(tb->tb_mbuf, const struct bwi_txbuf_hdr *);
3354                 struct ieee80211_ratectl_tx_status txs;
3355
3356                 /* NB: update rate control only for unicast frames */
3357                 if (hdr->txh_mac_ctrl & htole32(BWI_TXH_MAC_C_ACK)) {
3358                         /*
3359                          * Feed back 'acked and data_txcnt'.  Note that the
3360                          * generic AMRR code only understands one tx rate
3361                          * and the estimator doesn't handle real retry counts
3362                          * well so to avoid over-aggressive downshifting we
3363                          * treat any number of retries as "1".
3364                          */
3365                         txs.flags = IEEE80211_RATECTL_STATUS_LONG_RETRY;
3366                         txs.long_retries = acked;
3367                         if (data_txcnt > 1)
3368                                 txs.status = IEEE80211_RATECTL_TX_SUCCESS;
3369                         else {
3370                                 txs.status =
3371                                     IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
3372                         }
3373                         ieee80211_ratectl_tx_complete(ni, &txs);
3374                 }
3375                 ieee80211_tx_complete(ni, tb->tb_mbuf, !acked);
3376                 tb->tb_ni = NULL;
3377         } else
3378                 m_freem(tb->tb_mbuf);
3379         tb->tb_mbuf = NULL;
3380
3381         if (tbd->tbd_used == 0)
3382                 sc->sc_tx_timer = 0;
3383 }
3384
3385 static void
3386 bwi_txeof_status(struct bwi_softc *sc, int end_idx)
3387 {
3388         struct bwi_txstats_data *st = sc->sc_txstats;
3389         int idx;
3390
3391         bus_dmamap_sync(st->stats_dtag, st->stats_dmap, BUS_DMASYNC_POSTREAD);
3392
3393         idx = st->stats_idx;
3394         while (idx != end_idx) {
3395                 const struct bwi_txstats *stats = &st->stats[idx];
3396
3397                 if ((stats->txs_flags & BWI_TXS_F_PENDING) == 0) {
3398                         int data_txcnt;
3399
3400                         data_txcnt = __SHIFTOUT(stats->txs_txcnt,
3401                                                 BWI_TXS_TXCNT_DATA);
3402                         _bwi_txeof(sc, le16toh(stats->txs_id),
3403                                    stats->txs_flags & BWI_TXS_F_ACKED,
3404                                    data_txcnt);
3405                 }
3406                 idx = (idx + 1) % BWI_TXSTATS_NDESC;
3407         }
3408         st->stats_idx = idx;
3409 }
3410
3411 static void
3412 bwi_txeof(struct bwi_softc *sc)
3413 {
3414
3415         for (;;) {
3416                 uint32_t tx_status0, tx_status1;
3417                 uint16_t tx_id;
3418                 int data_txcnt;
3419
3420                 tx_status0 = CSR_READ_4(sc, BWI_TXSTATUS0);
3421                 if ((tx_status0 & BWI_TXSTATUS0_VALID) == 0)
3422                         break;
3423                 tx_status1 = CSR_READ_4(sc, BWI_TXSTATUS1);
3424
3425                 tx_id = __SHIFTOUT(tx_status0, BWI_TXSTATUS0_TXID_MASK);
3426                 data_txcnt = __SHIFTOUT(tx_status0,
3427                                 BWI_TXSTATUS0_DATA_TXCNT_MASK);
3428
3429                 if (tx_status0 & (BWI_TXSTATUS0_AMPDU | BWI_TXSTATUS0_PENDING))
3430                         continue;
3431
3432                 _bwi_txeof(sc, le16toh(tx_id), tx_status0 & BWI_TXSTATUS0_ACKED,
3433                     data_txcnt);
3434         }
3435
3436         bwi_start_locked(sc);
3437 }
3438
3439 static int
3440 bwi_bbp_power_on(struct bwi_softc *sc, enum bwi_clock_mode clk_mode)
3441 {
3442         bwi_power_on(sc, 1);
3443         return bwi_set_clock_mode(sc, clk_mode);
3444 }
3445
3446 static void
3447 bwi_bbp_power_off(struct bwi_softc *sc)
3448 {
3449         bwi_set_clock_mode(sc, BWI_CLOCK_MODE_SLOW);
3450         bwi_power_off(sc, 1);
3451 }
3452
3453 static int
3454 bwi_get_pwron_delay(struct bwi_softc *sc)
3455 {
3456         struct bwi_regwin *com, *old;
3457         struct bwi_clock_freq freq;
3458         uint32_t val;
3459         int error;
3460
3461         com = &sc->sc_com_regwin;
3462         KASSERT(BWI_REGWIN_EXIST(com), ("no regwin"));
3463
3464         if ((sc->sc_cap & BWI_CAP_CLKMODE) == 0)
3465                 return 0;
3466
3467         error = bwi_regwin_switch(sc, com, &old);
3468         if (error)
3469                 return error;
3470
3471         bwi_get_clock_freq(sc, &freq);
3472
3473         val = CSR_READ_4(sc, BWI_PLL_ON_DELAY);
3474         sc->sc_pwron_delay = howmany((val + 2) * 1000000, freq.clkfreq_min);
3475         DPRINTF(sc, BWI_DBG_ATTACH, "power on delay %u\n", sc->sc_pwron_delay);
3476
3477         return bwi_regwin_switch(sc, old, NULL);
3478 }
3479
3480 static int
3481 bwi_bus_attach(struct bwi_softc *sc)
3482 {
3483         struct bwi_regwin *bus, *old;
3484         int error;
3485
3486         bus = &sc->sc_bus_regwin;
3487
3488         error = bwi_regwin_switch(sc, bus, &old);
3489         if (error)
3490                 return error;
3491
3492         if (!bwi_regwin_is_enabled(sc, bus))
3493                 bwi_regwin_enable(sc, bus, 0);
3494
3495         /* Disable interripts */
3496         CSR_WRITE_4(sc, BWI_INTRVEC, 0);
3497
3498         return bwi_regwin_switch(sc, old, NULL);
3499 }
3500
3501 static const char *
3502 bwi_regwin_name(const struct bwi_regwin *rw)
3503 {
3504         switch (rw->rw_type) {
3505         case BWI_REGWIN_T_COM:
3506                 return "COM";
3507         case BWI_REGWIN_T_BUSPCI:
3508                 return "PCI";
3509         case BWI_REGWIN_T_MAC:
3510                 return "MAC";
3511         case BWI_REGWIN_T_BUSPCIE:
3512                 return "PCIE";
3513         }
3514         panic("unknown regwin type 0x%04x\n", rw->rw_type);
3515         return NULL;
3516 }
3517
3518 static uint32_t
3519 bwi_regwin_disable_bits(struct bwi_softc *sc)
3520 {
3521         uint32_t busrev;
3522
3523         /* XXX cache this */
3524         busrev = __SHIFTOUT(CSR_READ_4(sc, BWI_ID_LO), BWI_ID_LO_BUSREV_MASK);
3525         DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT | BWI_DBG_MISC,
3526                 "bus rev %u\n", busrev);
3527
3528         if (busrev == BWI_BUSREV_0)
3529                 return BWI_STATE_LO_DISABLE1;
3530         else if (busrev == BWI_BUSREV_1)
3531                 return BWI_STATE_LO_DISABLE2;
3532         else
3533                 return (BWI_STATE_LO_DISABLE1 | BWI_STATE_LO_DISABLE2);
3534 }
3535
3536 int
3537 bwi_regwin_is_enabled(struct bwi_softc *sc, struct bwi_regwin *rw)
3538 {
3539         uint32_t val, disable_bits;
3540
3541         disable_bits = bwi_regwin_disable_bits(sc);
3542         val = CSR_READ_4(sc, BWI_STATE_LO);
3543
3544         if ((val & (BWI_STATE_LO_CLOCK |
3545                     BWI_STATE_LO_RESET |
3546                     disable_bits)) == BWI_STATE_LO_CLOCK) {
3547                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT, "%s is enabled\n",
3548                         bwi_regwin_name(rw));
3549                 return 1;
3550         } else {
3551                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT, "%s is disabled\n",
3552                         bwi_regwin_name(rw));
3553                 return 0;
3554         }
3555 }
3556
3557 void
3558 bwi_regwin_disable(struct bwi_softc *sc, struct bwi_regwin *rw, uint32_t flags)
3559 {
3560         uint32_t state_lo, disable_bits;
3561         int i;
3562
3563         state_lo = CSR_READ_4(sc, BWI_STATE_LO);
3564
3565         /*
3566          * If current regwin is in 'reset' state, it was already disabled.
3567          */
3568         if (state_lo & BWI_STATE_LO_RESET) {
3569                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT,
3570                         "%s was already disabled\n", bwi_regwin_name(rw));
3571                 return;
3572         }
3573
3574         disable_bits = bwi_regwin_disable_bits(sc);
3575
3576         /*
3577          * Disable normal clock
3578          */
3579         state_lo = BWI_STATE_LO_CLOCK | disable_bits;
3580         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3581
3582         /*
3583          * Wait until normal clock is disabled
3584          */
3585 #define NRETRY  1000
3586         for (i = 0; i < NRETRY; ++i) {
3587                 state_lo = CSR_READ_4(sc, BWI_STATE_LO);
3588                 if (state_lo & disable_bits)
3589                         break;
3590                 DELAY(10);
3591         }
3592         if (i == NRETRY) {
3593                 device_printf(sc->sc_dev, "%s disable clock timeout\n",
3594                               bwi_regwin_name(rw));
3595         }
3596
3597         for (i = 0; i < NRETRY; ++i) {
3598                 uint32_t state_hi;
3599
3600                 state_hi = CSR_READ_4(sc, BWI_STATE_HI);
3601                 if ((state_hi & BWI_STATE_HI_BUSY) == 0)
3602                         break;
3603                 DELAY(10);
3604         }
3605         if (i == NRETRY) {
3606                 device_printf(sc->sc_dev, "%s wait BUSY unset timeout\n",
3607                               bwi_regwin_name(rw));
3608         }
3609 #undef NRETRY
3610
3611         /*
3612          * Reset and disable regwin with gated clock
3613          */
3614         state_lo = BWI_STATE_LO_RESET | disable_bits |
3615                    BWI_STATE_LO_CLOCK | BWI_STATE_LO_GATED_CLOCK |
3616                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3617         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3618
3619         /* Flush pending bus write */
3620         CSR_READ_4(sc, BWI_STATE_LO);
3621         DELAY(1);
3622
3623         /* Reset and disable regwin */
3624         state_lo = BWI_STATE_LO_RESET | disable_bits |
3625                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3626         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3627
3628         /* Flush pending bus write */
3629         CSR_READ_4(sc, BWI_STATE_LO);
3630         DELAY(1);
3631 }
3632
3633 void
3634 bwi_regwin_enable(struct bwi_softc *sc, struct bwi_regwin *rw, uint32_t flags)
3635 {
3636         uint32_t state_lo, state_hi, imstate;
3637
3638         bwi_regwin_disable(sc, rw, flags);
3639
3640         /* Reset regwin with gated clock */
3641         state_lo = BWI_STATE_LO_RESET |
3642                    BWI_STATE_LO_CLOCK |
3643                    BWI_STATE_LO_GATED_CLOCK |
3644                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3645         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3646
3647         /* Flush pending bus write */
3648         CSR_READ_4(sc, BWI_STATE_LO);
3649         DELAY(1);
3650
3651         state_hi = CSR_READ_4(sc, BWI_STATE_HI);
3652         if (state_hi & BWI_STATE_HI_SERROR)
3653                 CSR_WRITE_4(sc, BWI_STATE_HI, 0);
3654
3655         imstate = CSR_READ_4(sc, BWI_IMSTATE);
3656         if (imstate & (BWI_IMSTATE_INBAND_ERR | BWI_IMSTATE_TIMEOUT)) {
3657                 imstate &= ~(BWI_IMSTATE_INBAND_ERR | BWI_IMSTATE_TIMEOUT);
3658                 CSR_WRITE_4(sc, BWI_IMSTATE, imstate);
3659         }
3660
3661         /* Enable regwin with gated clock */
3662         state_lo = BWI_STATE_LO_CLOCK |
3663                    BWI_STATE_LO_GATED_CLOCK |
3664                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3665         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3666
3667         /* Flush pending bus write */
3668         CSR_READ_4(sc, BWI_STATE_LO);
3669         DELAY(1);
3670
3671         /* Enable regwin with normal clock */
3672         state_lo = BWI_STATE_LO_CLOCK |
3673                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3674         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3675
3676         /* Flush pending bus write */
3677         CSR_READ_4(sc, BWI_STATE_LO);
3678         DELAY(1);
3679 }
3680
3681 static void
3682 bwi_set_bssid(struct bwi_softc *sc, const uint8_t *bssid)
3683 {
3684         struct bwi_mac *mac;
3685         struct bwi_myaddr_bssid buf;
3686         const uint8_t *p;
3687         uint32_t val;
3688         int n, i;
3689
3690         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
3691             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
3692         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3693
3694         bwi_set_addr_filter(sc, BWI_ADDR_FILTER_BSSID, bssid);
3695
3696         bcopy(sc->sc_ic.ic_macaddr, buf.myaddr, sizeof(buf.myaddr));
3697         bcopy(bssid, buf.bssid, sizeof(buf.bssid));
3698
3699         n = sizeof(buf) / sizeof(val);
3700         p = (const uint8_t *)&buf;
3701         for (i = 0; i < n; ++i) {
3702                 int j;
3703
3704                 val = 0;
3705                 for (j = 0; j < sizeof(val); ++j)
3706                         val |= ((uint32_t)(*p++)) << (j * 8);
3707
3708                 TMPLT_WRITE_4(mac, 0x20 + (i * sizeof(val)), val);
3709         }
3710 }
3711
3712 static void
3713 bwi_updateslot(struct ieee80211com *ic)
3714 {
3715         struct bwi_softc *sc = ic->ic_softc;
3716         struct bwi_mac *mac;
3717
3718         BWI_LOCK(sc);
3719         if (sc->sc_flags & BWI_F_RUNNING) {
3720                 DPRINTF(sc, BWI_DBG_80211, "%s\n", __func__);
3721
3722                 KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
3723                     ("current regwin type %d", sc->sc_cur_regwin->rw_type));
3724                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
3725
3726                 bwi_mac_updateslot(mac, (ic->ic_flags & IEEE80211_F_SHSLOT));
3727         }
3728         BWI_UNLOCK(sc);
3729 }
3730
3731 static void
3732 bwi_calibrate(void *xsc)
3733 {
3734         struct bwi_softc *sc = xsc;
3735         struct bwi_mac *mac;
3736
3737         BWI_ASSERT_LOCKED(sc);
3738
3739         KASSERT(sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR,
3740             ("opmode %d", sc->sc_ic.ic_opmode));
3741
3742         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
3743             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
3744         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3745
3746         bwi_mac_calibrate_txpower(mac, sc->sc_txpwrcb_type);
3747         sc->sc_txpwrcb_type = BWI_TXPWR_CALIB;
3748
3749         /* XXX 15 seconds */
3750         callout_reset(&sc->sc_calib_ch, hz * 15, bwi_calibrate, sc);
3751 }
3752
3753 static int
3754 bwi_calc_rssi(struct bwi_softc *sc, const struct bwi_rxbuf_hdr *hdr)
3755 {
3756         struct bwi_mac *mac;
3757
3758         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
3759             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
3760         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3761
3762         return bwi_rf_calc_rssi(mac, hdr);
3763 }
3764
3765 static int
3766 bwi_calc_noise(struct bwi_softc *sc)
3767 {
3768         struct bwi_mac *mac;
3769
3770         KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC,
3771             ("current regwin type %d", sc->sc_cur_regwin->rw_type));
3772         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3773
3774         return bwi_rf_calc_noise(mac);
3775 }
3776
3777 static __inline uint8_t
3778 bwi_plcp2rate(const uint32_t plcp0, enum ieee80211_phytype type)
3779 {
3780         uint32_t plcp = le32toh(plcp0) & IEEE80211_OFDM_PLCP_RATE_MASK;
3781         return (ieee80211_plcp2rate(plcp, type));
3782 }
3783
3784 static void
3785 bwi_rx_radiotap(struct bwi_softc *sc, struct mbuf *m,
3786     struct bwi_rxbuf_hdr *hdr, const void *plcp, int rate, int rssi, int noise)
3787 {
3788         const struct ieee80211_frame_min *wh;
3789
3790         sc->sc_rx_th.wr_flags = IEEE80211_RADIOTAP_F_FCS;
3791         if (htole16(hdr->rxh_flags1) & BWI_RXH_F1_SHPREAMBLE)
3792                 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3793
3794         wh = mtod(m, const struct ieee80211_frame_min *);
3795         if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
3796                 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_WEP;
3797
3798         sc->sc_rx_th.wr_tsf = hdr->rxh_tsf; /* No endian conversion */
3799         sc->sc_rx_th.wr_rate = rate;
3800         sc->sc_rx_th.wr_antsignal = rssi;
3801         sc->sc_rx_th.wr_antnoise = noise;
3802 }
3803
3804 static void
3805 bwi_led_attach(struct bwi_softc *sc)
3806 {
3807         const uint8_t *led_act = NULL;
3808         uint16_t gpio, val[BWI_LED_MAX];
3809         int i;
3810
3811         for (i = 0; i < nitems(bwi_vendor_led_act); ++i) {
3812                 if (sc->sc_pci_subvid == bwi_vendor_led_act[i].vid) {
3813                         led_act = bwi_vendor_led_act[i].led_act;
3814                         break;
3815                 }
3816         }
3817         if (led_act == NULL)
3818                 led_act = bwi_default_led_act;
3819
3820         gpio = bwi_read_sprom(sc, BWI_SPROM_GPIO01);
3821         val[0] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_0);
3822         val[1] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_1);
3823
3824         gpio = bwi_read_sprom(sc, BWI_SPROM_GPIO23);
3825         val[2] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_2);
3826         val[3] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_3);
3827
3828         for (i = 0; i < BWI_LED_MAX; ++i) {
3829                 struct bwi_led *led = &sc->sc_leds[i];
3830
3831                 if (val[i] == 0xff) {
3832                         led->l_act = led_act[i];
3833                 } else {
3834                         if (val[i] & BWI_LED_ACT_LOW)
3835                                 led->l_flags |= BWI_LED_F_ACTLOW;
3836                         led->l_act = __SHIFTOUT(val[i], BWI_LED_ACT_MASK);
3837                 }
3838                 led->l_mask = (1 << i);
3839
3840                 if (led->l_act == BWI_LED_ACT_BLINK_SLOW ||
3841                     led->l_act == BWI_LED_ACT_BLINK_POLL ||
3842                     led->l_act == BWI_LED_ACT_BLINK) {
3843                         led->l_flags |= BWI_LED_F_BLINK;
3844                         if (led->l_act == BWI_LED_ACT_BLINK_POLL)
3845                                 led->l_flags |= BWI_LED_F_POLLABLE;
3846                         else if (led->l_act == BWI_LED_ACT_BLINK_SLOW)
3847                                 led->l_flags |= BWI_LED_F_SLOW;
3848
3849                         if (sc->sc_blink_led == NULL) {
3850                                 sc->sc_blink_led = led;
3851                                 if (led->l_flags & BWI_LED_F_SLOW)
3852                                         BWI_LED_SLOWDOWN(sc->sc_led_idle);
3853                         }
3854                 }
3855
3856                 DPRINTF(sc, BWI_DBG_LED | BWI_DBG_ATTACH,
3857                         "%dth led, act %d, lowact %d\n", i,
3858                         led->l_act, led->l_flags & BWI_LED_F_ACTLOW);
3859         }
3860         callout_init_mtx(&sc->sc_led_blink_ch, &sc->sc_mtx, 0);
3861 }
3862
3863 static __inline uint16_t
3864 bwi_led_onoff(const struct bwi_led *led, uint16_t val, int on)
3865 {
3866         if (led->l_flags & BWI_LED_F_ACTLOW)
3867                 on = !on;
3868         if (on)
3869                 val |= led->l_mask;
3870         else
3871                 val &= ~led->l_mask;
3872         return val;
3873 }
3874
3875 static void
3876 bwi_led_newstate(struct bwi_softc *sc, enum ieee80211_state nstate)
3877 {
3878         struct ieee80211com *ic = &sc->sc_ic;
3879         uint16_t val;
3880         int i;
3881
3882         if (nstate == IEEE80211_S_INIT) {
3883                 callout_stop(&sc->sc_led_blink_ch);
3884                 sc->sc_led_blinking = 0;
3885         }
3886
3887         if ((sc->sc_flags & BWI_F_RUNNING) == 0)
3888                 return;
3889
3890         val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
3891         for (i = 0; i < BWI_LED_MAX; ++i) {
3892                 struct bwi_led *led = &sc->sc_leds[i];
3893                 int on;
3894
3895                 if (led->l_act == BWI_LED_ACT_UNKN ||
3896                     led->l_act == BWI_LED_ACT_NULL)
3897                         continue;
3898
3899                 if ((led->l_flags & BWI_LED_F_BLINK) &&
3900                     nstate != IEEE80211_S_INIT)
3901                         continue;
3902
3903                 switch (led->l_act) {
3904                 case BWI_LED_ACT_ON:    /* Always on */
3905                         on = 1;
3906                         break;
3907                 case BWI_LED_ACT_OFF:   /* Always off */
3908                 case BWI_LED_ACT_5GHZ:  /* TODO: 11A */
3909                         on = 0;
3910                         break;
3911                 default:
3912                         on = 1;
3913                         switch (nstate) {
3914                         case IEEE80211_S_INIT:
3915                                 on = 0;
3916                                 break;
3917                         case IEEE80211_S_RUN:
3918                                 if (led->l_act == BWI_LED_ACT_11G &&
3919                                     ic->ic_curmode != IEEE80211_MODE_11G)
3920                                         on = 0;
3921                                 break;
3922                         default:
3923                                 if (led->l_act == BWI_LED_ACT_ASSOC)
3924                                         on = 0;
3925                                 break;
3926                         }
3927                         break;
3928                 }
3929
3930                 val = bwi_led_onoff(led, val, on);
3931         }
3932         CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
3933 }
3934 static void
3935 bwi_led_event(struct bwi_softc *sc, int event)
3936 {
3937         struct bwi_led *led = sc->sc_blink_led;
3938         int rate;
3939
3940         if (event == BWI_LED_EVENT_POLL) {
3941                 if ((led->l_flags & BWI_LED_F_POLLABLE) == 0)
3942                         return;
3943                 if (ticks - sc->sc_led_ticks < sc->sc_led_idle)
3944                         return;
3945         }
3946
3947         sc->sc_led_ticks = ticks;
3948         if (sc->sc_led_blinking)
3949                 return;
3950
3951         switch (event) {
3952         case BWI_LED_EVENT_RX:
3953                 rate = sc->sc_rx_rate;
3954                 break;
3955         case BWI_LED_EVENT_TX:
3956                 rate = sc->sc_tx_rate;
3957                 break;
3958         case BWI_LED_EVENT_POLL:
3959                 rate = 0;
3960                 break;
3961         default:
3962                 panic("unknown LED event %d\n", event);
3963                 break;
3964         }
3965         bwi_led_blink_start(sc, bwi_led_duration[rate].on_dur,
3966             bwi_led_duration[rate].off_dur);
3967 }
3968
3969 static void
3970 bwi_led_blink_start(struct bwi_softc *sc, int on_dur, int off_dur)
3971 {
3972         struct bwi_led *led = sc->sc_blink_led;
3973         uint16_t val;
3974
3975         val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
3976         val = bwi_led_onoff(led, val, 1);
3977         CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
3978
3979         if (led->l_flags & BWI_LED_F_SLOW) {
3980                 BWI_LED_SLOWDOWN(on_dur);
3981                 BWI_LED_SLOWDOWN(off_dur);
3982         }
3983
3984         sc->sc_led_blinking = 1;
3985         sc->sc_led_blink_offdur = off_dur;
3986
3987         callout_reset(&sc->sc_led_blink_ch, on_dur, bwi_led_blink_next, sc);
3988 }
3989
3990 static void
3991 bwi_led_blink_next(void *xsc)
3992 {
3993         struct bwi_softc *sc = xsc;
3994         uint16_t val;
3995
3996         val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
3997         val = bwi_led_onoff(sc->sc_blink_led, val, 0);
3998         CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
3999
4000         callout_reset(&sc->sc_led_blink_ch, sc->sc_led_blink_offdur,
4001             bwi_led_blink_end, sc);
4002 }
4003
4004 static void
4005 bwi_led_blink_end(void *xsc)
4006 {
4007         struct bwi_softc *sc = xsc;
4008         sc->sc_led_blinking = 0;
4009 }
4010
4011 static void
4012 bwi_restart(void *xsc, int pending)
4013 {
4014         struct bwi_softc *sc = xsc;
4015
4016         device_printf(sc->sc_dev, "%s begin, help!\n", __func__);
4017         BWI_LOCK(sc);
4018         bwi_init_statechg(sc, 0);
4019 #if 0
4020         bwi_start_locked(sc);
4021 #endif
4022         BWI_UNLOCK(sc);
4023 }