2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
6 * This code is derived from software contributed to The DragonFly Project
7 * by Sepherosa Ziehau <sepherosa@gmail.com>
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
19 * 3. Neither the name of The DragonFly Project nor the names of its
20 * contributors may be used to endorse or promote products derived
21 * from this software without specific, prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
26 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
27 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
29 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
31 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * $DragonFly: src/sys/dev/netif/bwi/if_bwivar.h,v 1.14 2008/02/15 11:15:38 sephe Exp $
43 #define BWI_ALIGN 0x1000
44 #define BWI_RING_ALIGN BWI_ALIGN
45 #define BWI_BUS_SPACE_MAXADDR 0x3fffffff
47 #define BWI_TX_NRING 6
48 #define BWI_TXRX_NRING 6
49 #define BWI_TX_NDESC 128
50 #define BWI_RX_NDESC 64
51 #define BWI_TXSTATS_NDESC 64
52 #define BWI_TX_NSPRDESC 2
53 #define BWI_TX_DATA_RING 1
55 /* XXX Onoe/Sample/AMRR probably need different configuration */
58 #define BWI_SHRETRY_FB 3
59 #define BWI_LGRETRY_FB 2
61 #define BWI_LED_EVENT_NONE -1
62 #define BWI_LED_EVENT_POLL 0
63 #define BWI_LED_EVENT_TX 1
64 #define BWI_LED_EVENT_RX 2
65 #define BWI_LED_SLOWDOWN(dur) (dur) = (((dur) * 3) / 2)
67 enum bwi_txpwrcb_type {
73 #define BWI_NOISE_FLOOR -95 /* TODO: noise floor calc */
74 #define BWI_FRAME_MIN_LEN(hdr) \
75 ((hdr) + sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN)
77 #define CSR_READ_4(sc, reg) \
78 bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
79 #define CSR_READ_2(sc, reg) \
80 bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
82 #define CSR_WRITE_4(sc, reg, val) \
83 bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
84 #define CSR_WRITE_2(sc, reg, val) \
85 bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
87 #define CSR_SETBITS_4(sc, reg, bits) \
88 CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
89 #define CSR_SETBITS_2(sc, reg, bits) \
90 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))
92 #define CSR_FILT_SETBITS_4(sc, reg, filt, bits) \
93 CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
94 #define CSR_FILT_SETBITS_2(sc, reg, filt, bits) \
95 CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))
97 #define CSR_CLRBITS_4(sc, reg, bits) \
98 CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
99 #define CSR_CLRBITS_2(sc, reg, bits) \
100 CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
104 #define DPRINTF(sc, dbg, fmt, ...) \
106 if ((sc)->sc_debug & (dbg)) \
107 device_printf((sc)->sc_dev, fmt, __VA_ARGS__); \
110 #define _DPRINTF(sc, dbg, fmt, ...) \
112 if ((sc)->sc_debug & (dbg)) \
113 printf(fmt, __VA_ARGS__); \
116 #else /* !BWI_DEBUG */
118 #define DPRINTF(sc, dbg, fmt, ...) ((void)0)
119 #define _DPRINTF(sc, dbg, fmt, ...) ((void)0)
121 #endif /* BWI_DEBUG */
126 uint32_t addr; /* BWI_DESC32_A_ */
129 #define BWI_DESC32_A_FUNC_TXRX 0x1
130 #define BWI_DESC32_A_FUNC_MASK __BITS(31, 30)
131 #define BWI_DESC32_A_ADDR_MASK __BITS(29, 0)
133 #define BWI_DESC32_C_BUFLEN_MASK __BITS(12, 0)
134 #define BWI_DESC32_C_ADDRHI_MASK __BITS(17, 16)
135 #define BWI_DESC32_C_EOR __BIT(28)
136 #define BWI_DESC32_C_INTR __BIT(29)
137 #define BWI_DESC32_C_FRAME_END __BIT(30)
138 #define BWI_DESC32_C_FRAME_START __BIT(31)
148 struct bwi_rxbuf_hdr {
150 uint16_t rxh_buflen; /* exclude bwi_rxbuf_hdr */
152 uint16_t rxh_flags1; /* BWI_RXH_F1_ */
155 uint16_t rxh_phyinfo; /* BWI_RXH_PHYINFO_ */
156 uint16_t rxh_flags3; /* BWI_RXH_F3_ */
157 uint16_t rxh_flags2; /* BWI_RXH_F2_ */
159 uint8_t rxh_pad3[14]; /* Padded to 30bytes */
162 #define BWI_RXH_F1_BCM2053_RSSI __BIT(14)
163 #define BWI_RXH_F1_SHPREAMBLE __BIT(7)
164 #define BWI_RXH_F1_OFDM __BIT(0)
166 #define BWI_RXH_F2_TYPE2FRAME __BIT(2)
168 #define BWI_RXH_F3_BCM2050_RSSI __BIT(10)
170 #define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14)
172 struct bwi_txbuf_hdr {
174 uint32_t txh_mac_ctrl; /* BWI_TXH_MAC_C_ */
176 uint16_t txh_unknown1;
177 uint16_t txh_phy_ctrl; /* BWI_TXH_PHY_C_ */
179 uint8_t txh_addr1[IEEE80211_ADDR_LEN];
180 uint16_t txh_unknown2;
181 uint8_t txh_rts_fb_plcp[4];
182 uint16_t txh_rts_fb_duration;
183 uint8_t txh_fb_plcp[4];
184 uint16_t txh_fb_duration;
186 uint16_t txh_id; /* BWI_TXH_ID_ */
187 uint16_t txh_unknown3;
188 uint8_t txh_rts_plcp[6];
189 uint8_t txh_rts_fc[2];
190 uint16_t txh_rts_duration;
191 uint8_t txh_rts_ra[IEEE80211_ADDR_LEN];
192 uint8_t txh_rts_ta[IEEE80211_ADDR_LEN];
197 #define BWI_TXH_ID_RING_MASK __BITS(15, 13)
198 #define BWI_TXH_ID_IDX_MASK __BITS(12, 0)
200 #define BWI_TXH_PHY_C_OFDM __BIT(0)
201 #define BWI_TXH_PHY_C_SHPREAMBLE __BIT(4)
202 #define BWI_TXH_PHY_C_ANTMODE_MASK __BITS(9, 8)
204 #define BWI_TXH_MAC_C_ACK __BIT(0)
205 #define BWI_TXH_MAC_C_FIRST_FRAG __BIT(3)
206 #define BWI_TXH_MAC_C_HWSEQ __BIT(4)
207 #define BWI_TXH_MAC_C_FB_OFDM __BIT(8)
213 uint8_t txs_flags; /* BWI_TXS_F_ */
214 uint8_t txs_txcnt; /* BWI_TXS_TXCNT_ */
217 uint16_t txs_unknown;
218 uint8_t txs_pad3[2]; /* Padded to 16bytes */
221 #define BWI_TXS_TXCNT_DATA __BITS(7, 4)
223 #define BWI_TXS_F_ACKED __BIT(0)
224 #define BWI_TXS_F_PENDING __BIT(5)
226 struct bwi_ring_data {
227 uint32_t rdata_txrx_ctrl;
228 bus_dmamap_t rdata_dmap;
229 bus_addr_t rdata_paddr;
234 struct mbuf *tb_mbuf;
235 bus_dmamap_t tb_dmap;
237 struct ieee80211_node *tb_ni;
241 struct bwi_txbuf_data {
242 struct bwi_txbuf tbd_buf[BWI_TX_NDESC];
248 struct mbuf *rb_mbuf;
250 bus_dmamap_t rb_dmap;
253 struct bwi_rxbuf_data {
254 struct bwi_rxbuf rbd_buf[BWI_RX_NDESC];
255 bus_dmamap_t rbd_tmp_dmap;
259 struct bwi_txstats_data {
260 bus_dma_tag_t stats_ring_dtag;
261 bus_dmamap_t stats_ring_dmap;
262 bus_addr_t stats_ring_paddr;
265 bus_dma_tag_t stats_dtag;
266 bus_dmamap_t stats_dmap;
267 bus_addr_t stats_paddr;
268 struct bwi_txstats *stats;
270 uint32_t stats_ctrl_base;
276 uint8_t fw_type; /* BWI_FW_T_ */
277 uint8_t fw_gen; /* BWI_FW_GEN */
280 #define fw_iv_cnt fw_size
283 #define BWI_FWHDR_SZ sizeof(struct bwi_fwhdr)
285 #define BWI_FW_T_UCODE 'u'
286 #define BWI_FW_T_PCM 'p'
287 #define BWI_FW_T_IV 'i'
289 #define BWI_FW_GEN_1 1
291 #define BWI_FW_VERSION3 3
292 #define BWI_FW_VERSION4 4
293 #define BWI_FW_VERSION3_REVMAX 0x128
295 #define BWI_FW_PATH "bwi_v%d_"
296 #define BWI_FW_STUB_PATH BWI_FW_PATH "ucode"
297 #define BWI_FW_UCODE_PATH BWI_FW_PATH "ucode%d"
298 #define BWI_FW_PCM_PATH BWI_FW_PATH "pcm%d"
299 #define BWI_FW_IV_PATH BWI_FW_PATH "b0g0initvals%d"
300 #define BWI_FW_IV_EXT_PATH BWI_FW_PATH "b0g0bsinitvals%d"
311 #define BWI_FW_IV_OFS_MASK __BITS(14, 0)
312 #define BWI_FW_IV_IS_32BIT __BIT(15)
315 uint8_t l_flags; /* BWI_LED_F_ */
316 uint8_t l_act; /* BWI_LED_ACT_ */
320 #define BWI_LED_F_ACTLOW 0x1
321 #define BWI_LED_F_BLINK 0x2
322 #define BWI_LED_F_POLLABLE 0x4
323 #define BWI_LED_F_SLOW 0x8
325 enum bwi_clock_mode {
332 uint32_t rw_flags; /* BWI_REGWIN_F_ */
333 uint16_t rw_type; /* BWI_REGWIN_T_ */
338 #define BWI_REGWIN_F_EXIST 0x1
340 #define BWI_CREATE_REGWIN(rw, id, type, rev) \
342 (rw)->rw_flags = BWI_REGWIN_F_EXIST; \
343 (rw)->rw_type = (type); \
344 (rw)->rw_id = (id); \
345 (rw)->rw_rev = (rev); \
348 #define BWI_REGWIN_EXIST(rw) ((rw)->rw_flags & BWI_REGWIN_F_EXIST)
349 #define BWI_GPIO_REGWIN(sc) \
350 (BWI_REGWIN_EXIST(&(sc)->sc_com_regwin) ? \
351 &(sc)->sc_com_regwin : &(sc)->sc_bus_regwin)
356 enum ieee80211_phymode phy_mode;
360 uint32_t phy_flags; /* BWI_PHY_F_ */
361 uint16_t phy_tbl_ctrl;
362 uint16_t phy_tbl_data_lo;
363 uint16_t phy_tbl_data_hi;
365 void (*phy_init)(struct bwi_mac *);
368 #define BWI_PHY_F_CALIBRATED 0x1
369 #define BWI_PHY_F_LINKED 0x2
370 #define BWI_CLEAR_PHY_FLAGS (BWI_PHY_F_CALIBRATED)
372 /* TX power control */
374 uint16_t bbp_atten; /* BBP attenuation: 4bits */
375 uint16_t rf_atten; /* RF attenuation */
376 uint16_t tp_ctrl1; /* ??: 3bits */
377 uint16_t tp_ctrl2; /* ??: 4bits */
380 #define BWI_RF_ATTEN_FACTOR 4
381 #define BWI_RF_ATTEN_MAX0 9
382 #define BWI_RF_ATTEN_MAX1 31
383 #define BWI_BBP_ATTEN_MAX 11
384 #define BWI_TPCTL1_MAX 7
392 uint16_t rf_type; /* BWI_RF_T_ */
396 uint32_t rf_flags; /* BWI_RF_F_ */
398 #define BWI_RFLO_MAX 56
399 struct bwi_rf_lo rf_lo[BWI_RFLO_MAX];
400 uint8_t rf_lo_used[8];
402 #define BWI_INVALID_NRSSI -1000
403 int16_t rf_nrssi[2]; /* Narrow RSSI */
404 int32_t rf_nrssi_slope;
406 #define BWI_NRSSI_TBLSZ 64
407 int8_t rf_nrssi_table[BWI_NRSSI_TBLSZ];
409 uint16_t rf_lo_gain; /* loopback gain */
410 uint16_t rf_rx_gain; /* TRSW RX gain */
412 uint16_t rf_calib; /* RF calibration value */
413 u_int rf_curchan; /* current channel */
417 void (*rf_off)(struct bwi_mac *);
418 void (*rf_on)(struct bwi_mac *);
420 void (*rf_set_nrssi_thr)(struct bwi_mac *);
421 void (*rf_calc_nrssi_slope)(struct bwi_mac *);
424 const struct bwi_rxbuf_hdr *);
425 int (*rf_calc_noise)(struct bwi_mac *);
427 void (*rf_lo_update)(struct bwi_mac *);
429 #define BWI_TSSI_MAX 64
430 int8_t rf_txpower_map0[BWI_TSSI_MAX];
431 /* Indexed by TSSI */
434 int8_t rf_txpower_map[BWI_TSSI_MAX];
439 int rf_txpower_max; /* dBm */
441 int rf_ant_mode; /* BWI_ANT_MODE_ */
444 #define BWI_RF_F_INITED 0x1
445 #define BWI_RF_F_ON 0x2
446 #define BWI_RF_CLEAR_FLAGS (BWI_RF_F_INITED)
448 #define BWI_ANT_MODE_0 0
449 #define BWI_ANT_MODE_1 1
450 #define BWI_ANT_MODE_UNKN 2
451 #define BWI_ANT_MODE_AUTO 3
457 struct bwi_regwin mac_regwin; /* MUST be first field */
458 #define mac_rw_flags mac_regwin.rw_flags
459 #define mac_type mac_regwin.rw_type
460 #define mac_id mac_regwin.rw_id
461 #define mac_rev mac_regwin.rw_rev
463 struct bwi_softc *mac_sc;
465 struct bwi_phy mac_phy; /* PHY I/F */
466 struct bwi_rf mac_rf; /* RF I/F */
468 struct bwi_tpctl mac_tpctl; /* TX power control */
469 uint32_t mac_flags; /* BWI_MAC_F_ */
471 const struct firmware *mac_stub;
472 const struct firmware *mac_ucode;
473 const struct firmware *mac_pcm;
474 const struct firmware *mac_iv;
475 const struct firmware *mac_iv_ext;
478 #define BWI_MAC_F_BSWAP 0x1
479 #define BWI_MAC_F_TPCTL_INITED 0x2
480 #define BWI_MAC_F_HAS_TXSTATS 0x4
481 #define BWI_MAC_F_INITED 0x8
482 #define BWI_MAC_F_ENABLED 0x10
483 #define BWI_MAC_F_LOCKED 0x20 /* for debug */
484 #define BWI_MAC_F_TPCTL_ERROR 0x40
485 #define BWI_MAC_F_PHYE_RESET 0x80
487 #define BWI_CREATE_MAC(mac, sc, id, rev) \
489 BWI_CREATE_REGWIN(&(mac)->mac_regwin, \
493 (mac)->mac_sc = (sc); \
496 #define BWI_MAC_MAX 2
497 #define BWI_LED_MAX 4
500 BWI_BUS_SPACE_30BIT = 1,
505 #define BWI_TX_RADIOTAP_PRESENT \
506 ((1 << IEEE80211_RADIOTAP_FLAGS) | \
507 (1 << IEEE80211_RADIOTAP_RATE) | \
508 (1 << IEEE80211_RADIOTAP_CHANNEL))
510 struct bwi_tx_radiotap_hdr {
511 struct ieee80211_radiotap_header wt_ihdr;
514 uint16_t wt_chan_freq;
515 uint16_t wt_chan_flags;
518 #define BWI_RX_RADIOTAP_PRESENT \
519 ((1 << IEEE80211_RADIOTAP_TSFT) | \
520 (1 << IEEE80211_RADIOTAP_FLAGS) | \
521 (1 << IEEE80211_RADIOTAP_RATE) | \
522 (1 << IEEE80211_RADIOTAP_CHANNEL) | \
523 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
524 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
526 struct bwi_rx_radiotap_hdr {
527 struct ieee80211_radiotap_header wr_ihdr;
531 uint16_t wr_chan_freq;
532 uint16_t wr_chan_flags;
536 } __packed __aligned(8);
539 struct ieee80211vap bv_vap;
540 int (*bv_newstate)(struct ieee80211vap *,
541 enum ieee80211_state, int);
543 #define BWI_VAP(vap) ((struct bwi_vap *)(vap))
546 uint32_t sc_flags; /* BWI_F_ */
549 struct ieee80211com sc_ic;
553 uint32_t sc_cap; /* BWI_CAP_ */
554 uint16_t sc_bbp_id; /* BWI_BBPID_ */
558 uint8_t sc_pci_revid;
560 uint16_t sc_pci_subvid;
561 uint16_t sc_pci_subdid;
563 uint16_t sc_card_flags; /* BWI_CARD_F_ */
564 uint16_t sc_pwron_delay;
568 struct resource *sc_irq_res;
572 struct resource *sc_mem_res;
573 bus_space_tag_t sc_mem_bt;
574 bus_space_handle_t sc_mem_bh;
576 struct callout sc_calib_ch;
577 struct callout sc_watchdog_timer;
579 struct bwi_regwin *sc_cur_regwin;
580 struct bwi_regwin sc_com_regwin;
581 struct bwi_regwin sc_bus_regwin;
584 struct bwi_mac sc_mac[BWI_MAC_MAX];
588 enum bwi_txpwrcb_type sc_txpwrcb_type;
592 struct bwi_led *sc_blink_led;
593 struct callout sc_led_blink_ch;
594 int sc_led_blink_offdur;
595 struct bwi_led sc_leds[BWI_LED_MAX];
597 enum bwi_bus_space sc_bus_space;
598 bus_dma_tag_t sc_parent_dtag;
600 bus_dma_tag_t sc_buf_dtag;
601 struct bwi_txbuf_data sc_tx_bdata[BWI_TX_NRING];
602 struct bwi_rxbuf_data sc_rx_bdata;
604 bus_dma_tag_t sc_txring_dtag;
605 struct bwi_ring_data sc_tx_rdata[BWI_TX_NRING];
606 bus_dma_tag_t sc_rxring_dtag;
607 struct bwi_ring_data sc_rx_rdata;
609 struct bwi_txstats_data *sc_txstats;
612 const struct ieee80211_rate_table *sc_rates;
614 struct bwi_tx_radiotap_hdr sc_tx_th;
615 struct bwi_rx_radiotap_hdr sc_rx_th;
617 struct taskqueue *sc_tq;
618 struct task sc_restart_task;
620 int (*sc_init_tx_ring)(struct bwi_softc *, int);
621 void (*sc_free_tx_ring)(struct bwi_softc *, int);
623 int (*sc_init_rx_ring)(struct bwi_softc *);
624 void (*sc_free_rx_ring)(struct bwi_softc *);
626 int (*sc_init_txstats)(struct bwi_softc *);
627 void (*sc_free_txstats)(struct bwi_softc *);
629 void (*sc_setup_rxdesc)
630 (struct bwi_softc *, int, bus_addr_t, int);
631 int (*sc_rxeof)(struct bwi_softc *);
633 void (*sc_setup_txdesc)
634 (struct bwi_softc *, struct bwi_ring_data *,
635 int, bus_addr_t, int);
637 (struct bwi_softc *, uint32_t, int);
639 void (*sc_txeof_status)(struct bwi_softc *);
641 /* Sysctl variables */
642 int sc_fw_version; /* BWI_FW_VERSION[34] */
643 int sc_dwell_time; /* milliseconds */
647 uint32_t sc_debug; /* BWI_DBG_ */
650 #define BWI_F_BUS_INITED 0x1
651 #define BWI_F_PROMISC 0x2
652 #define BWI_F_STOP 0x4
653 #define BWI_F_RUNNING 0x8
655 #define BWI_DBG_MAC 0x00000001
656 #define BWI_DBG_RF 0x00000002
657 #define BWI_DBG_PHY 0x00000004
658 #define BWI_DBG_MISC 0x00000008
660 #define BWI_DBG_ATTACH 0x00000010
661 #define BWI_DBG_INIT 0x00000020
662 #define BWI_DBG_FIRMWARE 0x00000040
663 #define BWI_DBG_80211 0x00000080
664 #define BWI_DBG_TXPOWER 0x00000100
665 #define BWI_DBG_INTR 0x00000200
666 #define BWI_DBG_RX 0x00000400
667 #define BWI_DBG_TX 0x00000800
668 #define BWI_DBG_TXEOF 0x00001000
669 #define BWI_DBG_LED 0x00002000
671 #define BWI_LOCK_INIT(sc) \
672 mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \
673 MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE)
674 #define BWI_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx)
675 #define BWI_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
676 #define BWI_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
677 #define BWI_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
679 int bwi_attach(struct bwi_softc *);
680 int bwi_detach(struct bwi_softc *);
681 void bwi_suspend(struct bwi_softc *);
682 void bwi_resume(struct bwi_softc *);
683 int bwi_shutdown(struct bwi_softc *);
684 void bwi_intr(void *);
686 int bwi_bus_init(struct bwi_softc *, struct bwi_mac *mac);
688 uint16_t bwi_read_sprom(struct bwi_softc *, uint16_t);
689 int bwi_regwin_switch(struct bwi_softc *, struct bwi_regwin *,
690 struct bwi_regwin **);
691 int bwi_regwin_is_enabled(struct bwi_softc *, struct bwi_regwin *);
692 void bwi_regwin_enable(struct bwi_softc *, struct bwi_regwin *,
694 void bwi_regwin_disable(struct bwi_softc *, struct bwi_regwin *,
697 #define abs(a) __builtin_abs(a)
699 /* XXX does not belong here */
700 struct ieee80211_ds_plcp_hdr {
707 #endif /* !_IF_BWIVAR_H */