2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2007, 2008 Rui Paulo <rpaulo@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
30 * Device driver for Intel's On Die thermal sensor via MSR.
31 * First introduced in Intel's Core line of processors.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
40 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/mutex.h>
44 #include <sys/proc.h> /* for curthread */
45 #include <sys/sched.h>
46 #include <sys/sysctl.h>
47 #include <sys/systm.h>
49 #include <machine/specialreg.h>
50 #include <machine/cpufunc.h>
51 #include <machine/cputypes.h>
52 #include <machine/md_var.h>
56 #define THERM_STATUS_LOG 0x02
57 #define THERM_STATUS 0x01
58 #define THERM_STATUS_TEMP_SHIFT 16
59 #define THERM_STATUS_TEMP_MASK 0x7f
60 #define THERM_STATUS_RES_SHIFT 27
61 #define THERM_STATUS_RES_MASK 0x0f
62 #define THERM_STATUS_VALID_SHIFT 31
63 #define THERM_STATUS_VALID_MASK 0x01
65 struct coretemp_softc {
68 unsigned int sc_throttle_log;
74 static void coretemp_identify(driver_t *driver, device_t parent);
75 static int coretemp_probe(device_t dev);
76 static int coretemp_attach(device_t dev);
77 static int coretemp_detach(device_t dev);
79 static uint64_t coretemp_get_thermal_msr(int cpu);
80 static void coretemp_clear_thermal_msr(int cpu);
81 static int coretemp_get_val_sysctl(SYSCTL_HANDLER_ARGS);
82 static int coretemp_throttle_log_sysctl(SYSCTL_HANDLER_ARGS);
84 static device_method_t coretemp_methods[] = {
85 /* Device interface */
86 DEVMETHOD(device_identify, coretemp_identify),
87 DEVMETHOD(device_probe, coretemp_probe),
88 DEVMETHOD(device_attach, coretemp_attach),
89 DEVMETHOD(device_detach, coretemp_detach),
94 static driver_t coretemp_driver = {
97 sizeof(struct coretemp_softc),
107 static devclass_t coretemp_devclass;
108 DRIVER_MODULE(coretemp, cpu, coretemp_driver, coretemp_devclass, NULL,
112 coretemp_identify(driver_t *driver, device_t parent)
117 /* Make sure we're not being doubly invoked. */
118 if (device_find_child(parent, "coretemp", -1) != NULL)
121 /* Check that CPUID 0x06 is supported and the vendor is Intel.*/
122 if (cpu_high < 6 || cpu_vendor_id != CPU_VENDOR_INTEL)
125 * CPUID 0x06 returns 1 if the processor has on-die thermal
126 * sensors. EBX[0:3] contains the number of sensors.
128 do_cpuid(0x06, regs);
129 if ((regs[0] & 0x1) != 1)
133 * We add a child for each CPU since settings must be performed
134 * on each CPU in the SMP case.
136 child = device_add_child(parent, "coretemp", -1);
138 device_printf(parent, "add coretemp child failed\n");
142 coretemp_probe(device_t dev)
144 if (resource_disabled("coretemp", 0))
147 device_set_desc(dev, "CPU On-Die Thermal Sensors");
149 if (!bootverbose && device_get_unit(dev) != 0)
152 return (BUS_PROBE_GENERIC);
156 coretemp_attach(device_t dev)
158 struct coretemp_softc *sc = device_get_softc(dev);
161 int cpu_model, cpu_stepping;
163 struct sysctl_oid *oid;
164 struct sysctl_ctx_list *ctx;
167 pdev = device_get_parent(dev);
168 cpu_model = CPUID_TO_MODEL(cpu_id);
169 cpu_stepping = cpu_id & CPUID_STEPPING;
172 * Some CPUs, namely the PIII, don't have thermal sensors, but
173 * report them when the CPUID check is performed in
174 * coretemp_identify(). This leads to a later GPF when the sensor
175 * is queried via a MSR, so we stop here.
181 * XXXrpaulo: I have this CPU model and when it returns from C3
182 * coretemp continues to function properly.
186 * Check for errata AE18.
187 * "Processor Digital Thermal Sensor (DTS) Readout stops
188 * updating upon returning from C3/C4 state."
190 * Adapted from the Linux coretemp driver.
192 if (cpu_model == 0xe && cpu_stepping < 0xc) {
193 msr = rdmsr(MSR_BIOS_SIGN);
196 device_printf(dev, "not supported (Intel errata "
197 "AE18), try updating your BIOS\n");
204 * Use 100C as the initial value.
208 if ((cpu_model == 0xf && cpu_stepping >= 2) || cpu_model == 0xe) {
210 * On some Core 2 CPUs, there's an undocumented MSR that
211 * can tell us if Tj(max) is 100 or 85.
213 * The if-clause for CPUs having the MSR_IA32_EXT_CONFIG was adapted
214 * from the Linux coretemp driver.
216 msr = rdmsr(MSR_IA32_EXT_CONFIG);
219 } else if (cpu_model == 0x17) {
220 switch (cpu_stepping) {
221 case 0x6: /* Mobile Core 2 Duo */
224 default: /* Unknown stepping */
227 } else if (cpu_model == 0x1c) {
228 switch (cpu_stepping) {
229 case 0xa: /* 45nm Atom D400, N400 and D500 series */
238 * Attempt to get Tj(max) from MSR IA32_TEMPERATURE_TARGET.
240 * This method is described in Intel white paper "CPU
241 * Monitoring With DTS/PECI". (#322683)
243 ret = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &msr);
245 tjtarget = (msr >> 16) & 0xff;
248 * On earlier generation of processors, the value
249 * obtained from IA32_TEMPERATURE_TARGET register is
250 * an offset that needs to be summed with a model
251 * specific base. It is however not clear what
252 * these numbers are, with the publicly available
253 * documents from Intel.
255 * For now, we consider [70, 110]C range, as
256 * described in #322683, as "reasonable" and accept
257 * these values whenever the MSR is available for
258 * read, regardless the CPU model.
260 if (tjtarget >= 70 && tjtarget <= 110)
261 sc->sc_tjmax = tjtarget;
263 device_printf(dev, "Tj(target) value %d "
264 "does not seem right.\n", tjtarget);
266 device_printf(dev, "Can not get Tj(target) "
267 "from your CPU, using 100C.\n");
271 device_printf(dev, "Setting TjMax=%d\n", sc->sc_tjmax);
273 ctx = device_get_sysctl_ctx(dev);
275 oid = SYSCTL_ADD_NODE(ctx,
276 SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)), OID_AUTO,
277 "coretemp", CTLFLAG_RD, NULL, "Per-CPU thermal information");
280 * Add the MIBs to dev.cpu.N and dev.cpu.N.coretemp.
282 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)),
283 OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE,
284 dev, CORETEMP_TEMP, coretemp_get_val_sysctl, "IK",
285 "Current temperature");
286 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, "delta",
287 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, dev, CORETEMP_DELTA,
288 coretemp_get_val_sysctl, "I",
289 "Delta between TCC activation and current temperature");
290 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, "resolution",
291 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, dev, CORETEMP_RESOLUTION,
292 coretemp_get_val_sysctl, "I",
293 "Resolution of CPU thermal sensor");
294 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, "tjmax",
295 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, dev, CORETEMP_TJMAX,
296 coretemp_get_val_sysctl, "IK",
297 "TCC activation temperature");
298 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO,
299 "throttle_log", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, 0,
300 coretemp_throttle_log_sysctl, "I",
301 "Set to 1 if the thermal sensor has tripped");
307 coretemp_detach(device_t dev)
313 coretemp_get_thermal_msr(int cpu)
317 thread_lock(curthread);
318 sched_bind(curthread, cpu);
319 thread_unlock(curthread);
322 * The digital temperature reading is located at bit 16
323 * of MSR_THERM_STATUS.
325 * There is a bit on that MSR that indicates whether the
326 * temperature is valid or not.
328 * The temperature is computed by subtracting the temperature
329 * reading by Tj(max).
331 msr = rdmsr(MSR_THERM_STATUS);
333 thread_lock(curthread);
334 sched_unbind(curthread);
335 thread_unlock(curthread);
341 coretemp_clear_thermal_msr(int cpu)
343 thread_lock(curthread);
344 sched_bind(curthread, cpu);
345 thread_unlock(curthread);
347 wrmsr(MSR_THERM_STATUS, 0);
349 thread_lock(curthread);
350 sched_unbind(curthread);
351 thread_unlock(curthread);
355 coretemp_get_val_sysctl(SYSCTL_HANDLER_ARGS)
360 struct coretemp_softc *sc;
361 enum therm_info type;
364 dev = (device_t) arg1;
365 msr = coretemp_get_thermal_msr(device_get_unit(dev));
366 sc = device_get_softc(dev);
369 if (((msr >> THERM_STATUS_VALID_SHIFT) & THERM_STATUS_VALID_MASK) != 1) {
374 tmp = (msr >> THERM_STATUS_TEMP_SHIFT) &
375 THERM_STATUS_TEMP_MASK;
376 val = (sc->sc_tjmax - tmp) * 10 + TZ_ZEROC;
379 val = (msr >> THERM_STATUS_TEMP_SHIFT) &
380 THERM_STATUS_TEMP_MASK;
382 case CORETEMP_RESOLUTION:
383 val = (msr >> THERM_STATUS_RES_SHIFT) &
384 THERM_STATUS_RES_MASK;
387 val = sc->sc_tjmax * 10 + TZ_ZEROC;
392 if (msr & THERM_STATUS_LOG) {
393 coretemp_clear_thermal_msr(device_get_unit(dev));
394 sc->sc_throttle_log = 1;
397 * Check for Critical Temperature Status and Critical
398 * Temperature Log. It doesn't really matter if the
399 * current temperature is invalid because the "Critical
400 * Temperature Log" bit will tell us if the Critical
401 * Temperature has * been reached in past. It's not
402 * directly related to the current temperature.
404 * If we reach a critical level, allow devctl(4)
405 * to catch this and shutdown the system.
407 if (msr & THERM_STATUS) {
408 tmp = (msr >> THERM_STATUS_TEMP_SHIFT) &
409 THERM_STATUS_TEMP_MASK;
410 tmp = (sc->sc_tjmax - tmp) * 10 + TZ_ZEROC;
411 device_printf(dev, "critical temperature detected, "
412 "suggest system shutdown\n");
413 snprintf(stemp, sizeof(stemp), "%d", tmp);
414 devctl_notify("coretemp", "Thermal", stemp,
419 return (sysctl_handle_int(oidp, &val, 0, req));
423 coretemp_throttle_log_sysctl(SYSCTL_HANDLER_ARGS)
428 struct coretemp_softc *sc;
430 dev = (device_t) arg1;
431 msr = coretemp_get_thermal_msr(device_get_unit(dev));
432 sc = device_get_softc(dev);
434 if (msr & THERM_STATUS_LOG) {
435 coretemp_clear_thermal_msr(device_get_unit(dev));
436 sc->sc_throttle_log = 1;
439 val = sc->sc_throttle_log;
441 error = sysctl_handle_int(oidp, &val, 0, req);
443 if (error || !req->newptr)
448 coretemp_clear_thermal_msr(device_get_unit(dev));
449 sc->sc_throttle_log = 0;