2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/fcntl.h>
35 #include <sys/ioccom.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
41 #include <sys/queue.h>
42 #include <sys/sched.h>
43 #include <sys/kernel.h>
44 #include <sys/sysctl.h>
48 #include <sys/pmckern.h>
49 #include <sys/cpuctl.h>
51 #include <machine/cpufunc.h>
52 #include <machine/md_var.h>
53 #include <machine/specialreg.h>
55 static d_open_t cpuctl_open;
56 static d_ioctl_t cpuctl_ioctl;
58 #define CPUCTL_VERSION 1
61 # define DPRINTF(format,...) printf(format, __VA_ARGS__);
66 #define UCODE_SIZE_MAX (16 * 1024)
68 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd,
70 static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
72 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
74 static int update_intel(int cpu, cpuctl_update_args_t *args,
76 static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td);
77 static int update_via(int cpu, cpuctl_update_args_t *args,
80 static struct cdev **cpuctl_devs;
81 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
83 static struct cdevsw cpuctl_cdevsw = {
84 .d_version = D_VERSION,
85 .d_open = cpuctl_open,
86 .d_ioctl = cpuctl_ioctl,
91 * This function checks if specified cpu enabled or not.
97 return (pmc_cpu_is_disabled(cpu) == 0);
101 * Check if the current thread is bound to a specific cpu.
104 cpu_sched_is_bound(struct thread *td)
109 ret = sched_is_bound(td);
115 * Switch to target cpu to run.
118 set_cpu(int cpu, struct thread *td)
121 KASSERT(cpu >= 0 && cpu < mp_ncpus && cpu_enabled(cpu),
122 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
126 KASSERT(td->td_oncpu == cpu,
127 ("[cpuctl,%d]: cannot bind to target cpu %d", __LINE__, cpu));
131 restore_cpu(int oldcpu, int is_bound, struct thread *td)
134 KASSERT(oldcpu >= 0 && oldcpu < mp_ncpus && cpu_enabled(oldcpu),
135 ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu));
140 sched_bind(td, oldcpu);
145 cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
146 int flags, struct thread *td)
149 int cpu = dev2unit(dev);
151 if (cpu >= mp_ncpus || !cpu_enabled(cpu)) {
152 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
155 /* Require write flag for "write" requests. */
156 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE) &&
157 ((flags & FWRITE) == 0))
161 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
166 ret = priv_check(td, PRIV_CPUCTL_WRMSR);
169 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
172 ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td);
175 ret = priv_check(td, PRIV_CPUCTL_UPDATE);
178 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td);
189 * Actually perform cpuid operation.
192 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td)
197 KASSERT(cpu >= 0 && cpu < mp_ncpus,
198 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
200 /* Explicitly clear cpuid data to avoid returning stale info. */
201 bzero(data->data, sizeof(data->data));
202 DPRINTF("[cpuctl,%d]: retriving cpuid level %#0x for %d cpu\n",
203 __LINE__, data->level, cpu);
204 oldcpu = td->td_oncpu;
205 is_bound = cpu_sched_is_bound(td);
207 cpuid_count(data->level, 0, data->data);
208 restore_cpu(oldcpu, is_bound, td);
213 * Actually perform MSR operations.
216 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td)
223 KASSERT(cpu >= 0 && cpu < mp_ncpus,
224 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
227 * Explicitly clear cpuid data to avoid returning stale
230 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
232 oldcpu = td->td_oncpu;
233 is_bound = cpu_sched_is_bound(td);
235 if (cmd == CPUCTL_RDMSR) {
237 ret = rdmsr_safe(data->msr, &data->data);
238 } else if (cmd == CPUCTL_WRMSR) {
239 ret = wrmsr_safe(data->msr, data->data);
240 } else if (cmd == CPUCTL_MSRSBIT) {
242 ret = rdmsr_safe(data->msr, ®);
244 ret = wrmsr_safe(data->msr, reg | data->data);
246 } else if (cmd == CPUCTL_MSRCBIT) {
248 ret = rdmsr_safe(data->msr, ®);
250 ret = wrmsr_safe(data->msr, reg & ~data->data);
253 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd);
254 restore_cpu(oldcpu, is_bound, td);
259 * Actually perform microcode update.
262 cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td)
264 cpuctl_cpuid_args_t args = {
270 KASSERT(cpu >= 0 && cpu < mp_ncpus,
271 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
272 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
274 ret = cpuctl_do_cpuid(cpu, &args, td);
276 DPRINTF("[cpuctl,%d]: cannot retrive cpuid info for cpu %d",
280 ((uint32_t *)vendor)[0] = args.data[1];
281 ((uint32_t *)vendor)[1] = args.data[3];
282 ((uint32_t *)vendor)[2] = args.data[2];
284 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
285 ret = update_intel(cpu, data, td);
286 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
287 ret = update_amd(cpu, data, td);
288 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0)
289 ret = update_via(cpu, data, td);
296 update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td)
305 if (args->size == 0 || args->data == NULL) {
306 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
309 if (args->size > UCODE_SIZE_MAX) {
310 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
315 * 16 byte alignment required. Rely on the fact that
316 * malloc(9) always returns the pointer aligned at least on
317 * the size of the allocation.
319 ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK);
320 if (copyin(args->data, ptr, args->size) != 0) {
321 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
322 __LINE__, args->data, ptr, args->size);
326 oldcpu = td->td_oncpu;
327 is_bound = cpu_sched_is_bound(td);
330 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
335 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
336 wrmsr_safe(MSR_BIOS_SIGN, 0);
339 * Serialize instruction flow.
343 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
344 restore_cpu(oldcpu, is_bound, td);
355 update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td)
363 if (args->size == 0 || args->data == NULL) {
364 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
367 if (args->size > UCODE_SIZE_MAX) {
368 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
372 * XXX Might not require contignous address space - needs check
374 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0);
376 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory",
377 __LINE__, args->size);
380 if (copyin(args->data, ptr, args->size) != 0) {
381 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
382 __LINE__, args->data, ptr, args->size);
386 oldcpu = td->td_oncpu;
387 is_bound = cpu_sched_is_bound(td);
394 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr);
397 * Serialize instruction flow.
401 restore_cpu(oldcpu, is_bound, td);
405 contigfree(ptr, args->size, M_CPUCTL);
410 update_via(int cpu, cpuctl_update_args_t *args, struct thread *td)
413 uint64_t rev0, rev1, res;
419 if (args->size == 0 || args->data == NULL) {
420 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
423 if (args->size > UCODE_SIZE_MAX) {
424 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
429 * 4 byte alignment required.
431 ptr = malloc(args->size, M_CPUCTL, M_WAITOK);
432 if (copyin(args->data, ptr, args->size) != 0) {
433 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
434 __LINE__, args->data, ptr, args->size);
438 oldcpu = td->td_oncpu;
439 is_bound = cpu_sched_is_bound(td);
442 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
447 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
451 * Result are in low byte of MSR FCR5:
452 * 0x00: No update has been attempted since RESET.
453 * 0x01: The last attempted update was successful.
454 * 0x02: The last attempted update was unsuccessful due to a bad
455 * environment. No update was loaded and any preexisting
456 * patches are still active.
457 * 0x03: The last attempted update was not applicable to this processor.
458 * No update was loaded and any preexisting patches are still
460 * 0x04: The last attempted update was not successful due to an invalid
461 * update data block. No update was loaded and any preexisting
462 * patches are still active
464 rdmsr_safe(0x1205, &res);
467 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
468 restore_cpu(oldcpu, is_bound, td);
470 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
471 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
483 cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
489 if (cpu >= mp_ncpus || !cpu_enabled(cpu)) {
490 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__,
495 ret = securelevel_gt(td->td_ucred, 0);
500 cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
506 if ((cpu_feature & CPUID_MSR) == 0) {
508 printf("cpuctl: not available.\n");
512 printf("cpuctl: access to MSR registers/cpuid info.\n");
513 cpuctl_devs = (struct cdev **)malloc(sizeof(void *) * mp_ncpus,
514 M_CPUCTL, M_WAITOK | M_ZERO);
515 if (cpuctl_devs == NULL) {
516 DPRINTF("[cpuctl,%d]: cannot allocate memory\n",
520 for (cpu = 0; cpu < mp_ncpus; cpu++)
521 if (cpu_enabled(cpu))
522 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
523 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
526 for (cpu = 0; cpu < mp_ncpus; cpu++) {
527 if (cpuctl_devs[cpu] != NULL)
528 destroy_dev(cpuctl_devs[cpu]);
530 free(cpuctl_devs, M_CPUCTL);
540 DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
541 MODULE_VERSION(cpuctl, CPUCTL_VERSION);