2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/fcntl.h>
35 #include <sys/ioccom.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/mutex.h>
41 #include <sys/queue.h>
42 #include <sys/sched.h>
43 #include <sys/kernel.h>
44 #include <sys/sysctl.h>
48 #include <sys/pmckern.h>
49 #include <sys/cpuctl.h>
51 #include <machine/cpufunc.h>
52 #include <machine/md_var.h>
53 #include <machine/specialreg.h>
55 static d_open_t cpuctl_open;
56 static d_ioctl_t cpuctl_ioctl;
58 #define CPUCTL_VERSION 1
61 # define DPRINTF(format,...) printf(format, __VA_ARGS__);
66 #define UCODE_SIZE_MAX (4 * 1024 * 1024)
68 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd,
70 static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
72 static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
74 static int cpuctl_do_eval_cpu_features(int cpu, struct thread *td);
75 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
77 static int update_intel(int cpu, cpuctl_update_args_t *args,
79 static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td);
80 static int update_via(int cpu, cpuctl_update_args_t *args,
83 static struct cdev **cpuctl_devs;
84 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
86 static struct cdevsw cpuctl_cdevsw = {
87 .d_version = D_VERSION,
88 .d_open = cpuctl_open,
89 .d_ioctl = cpuctl_ioctl,
94 * This function checks if specified cpu enabled or not.
100 return (pmc_cpu_is_disabled(cpu) == 0);
104 * Check if the current thread is bound to a specific cpu.
107 cpu_sched_is_bound(struct thread *td)
112 ret = sched_is_bound(td);
118 * Switch to target cpu to run.
121 set_cpu(int cpu, struct thread *td)
124 KASSERT(cpu >= 0 && cpu <= mp_maxid && cpu_enabled(cpu),
125 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
129 KASSERT(td->td_oncpu == cpu,
130 ("[cpuctl,%d]: cannot bind to target cpu %d on cpu %d", __LINE__,
135 restore_cpu(int oldcpu, int is_bound, struct thread *td)
138 KASSERT(oldcpu >= 0 && oldcpu <= mp_maxid && cpu_enabled(oldcpu),
139 ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu));
144 sched_bind(td, oldcpu);
149 cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
150 int flags, struct thread *td)
155 if (cpu > mp_maxid || !cpu_enabled(cpu)) {
156 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
159 /* Require write flag for "write" requests. */
160 if ((cmd == CPUCTL_MSRCBIT || cmd == CPUCTL_MSRSBIT ||
161 cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR ||
162 cmd == CPUCTL_EVAL_CPU_FEATURES) &&
163 (flags & FWRITE) == 0)
167 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
172 ret = priv_check(td, PRIV_CPUCTL_WRMSR);
175 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
178 ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td);
181 ret = priv_check(td, PRIV_CPUCTL_UPDATE);
184 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td);
186 case CPUCTL_CPUID_COUNT:
187 ret = cpuctl_do_cpuid_count(cpu,
188 (cpuctl_cpuid_count_args_t *)data, td);
190 case CPUCTL_EVAL_CPU_FEATURES:
191 ret = cpuctl_do_eval_cpu_features(cpu, td);
202 * Actually perform cpuid operation.
205 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
211 KASSERT(cpu >= 0 && cpu <= mp_maxid,
212 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
214 /* Explicitly clear cpuid data to avoid returning stale info. */
215 bzero(data->data, sizeof(data->data));
216 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n",
217 __LINE__, data->level, data->level_type, cpu);
222 oldcpu = td->td_oncpu;
223 is_bound = cpu_sched_is_bound(td);
225 cpuid_count(data->level, data->level_type, data->data);
226 restore_cpu(oldcpu, is_bound, td);
231 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td)
233 cpuctl_cpuid_count_args_t cdata;
236 cdata.level = data->level;
237 /* Override the level type. */
238 cdata.level_type = 0;
239 error = cpuctl_do_cpuid_count(cpu, &cdata, td);
240 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */
245 * Actually perform MSR operations.
248 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td)
255 KASSERT(cpu >= 0 && cpu <= mp_maxid,
256 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
259 * Explicitly clear cpuid data to avoid returning stale
262 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
265 if ((cpu_feature & CPUID_MSR) == 0)
268 oldcpu = td->td_oncpu;
269 is_bound = cpu_sched_is_bound(td);
271 if (cmd == CPUCTL_RDMSR) {
273 ret = rdmsr_safe(data->msr, &data->data);
274 } else if (cmd == CPUCTL_WRMSR) {
275 ret = wrmsr_safe(data->msr, data->data);
276 } else if (cmd == CPUCTL_MSRSBIT) {
278 ret = rdmsr_safe(data->msr, ®);
280 ret = wrmsr_safe(data->msr, reg | data->data);
282 } else if (cmd == CPUCTL_MSRCBIT) {
284 ret = rdmsr_safe(data->msr, ®);
286 ret = wrmsr_safe(data->msr, reg & ~data->data);
289 panic("[cpuctl,%d]: unknown operation requested: %lu",
291 restore_cpu(oldcpu, is_bound, td);
296 * Actually perform microcode update.
299 cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td)
301 cpuctl_cpuid_args_t args = {
307 KASSERT(cpu >= 0 && cpu <= mp_maxid,
308 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
309 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
311 ret = cpuctl_do_cpuid(cpu, &args, td);
314 ((uint32_t *)vendor)[0] = args.data[1];
315 ((uint32_t *)vendor)[1] = args.data[3];
316 ((uint32_t *)vendor)[2] = args.data[2];
318 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
319 ret = update_intel(cpu, data, td);
320 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
321 ret = update_amd(cpu, data, td);
322 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID))
324 ret = update_via(cpu, data, td);
331 update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td)
340 if (args->size == 0 || args->data == NULL) {
341 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
344 if (args->size > UCODE_SIZE_MAX) {
345 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
350 * 16 byte alignment required. Rely on the fact that
351 * malloc(9) always returns the pointer aligned at least on
352 * the size of the allocation.
354 ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK);
355 if (copyin(args->data, ptr, args->size) != 0) {
356 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
357 __LINE__, args->data, ptr, args->size);
361 oldcpu = td->td_oncpu;
362 is_bound = cpu_sched_is_bound(td);
365 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
370 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
371 wrmsr_safe(MSR_BIOS_SIGN, 0);
374 * Serialize instruction flow.
378 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
379 restore_cpu(oldcpu, is_bound, td);
390 * NB: MSR 0xc0010020, MSR_K8_UCODE_UPDATE, is not documented by AMD.
391 * Coreboot, illumos and Linux source code was used to understand
395 amd_ucode_wrmsr(void *ucode_ptr)
399 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ucode_ptr);
404 update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td)
409 if (args->size == 0 || args->data == NULL) {
410 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
413 if (args->size > UCODE_SIZE_MAX) {
414 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
419 * 16 byte alignment required. Rely on the fact that
420 * malloc(9) always returns the pointer aligned at least on
421 * the size of the allocation.
423 ptr = malloc(args->size + 16, M_CPUCTL, M_ZERO | M_WAITOK);
424 if (copyin(args->data, ptr, args->size) != 0) {
425 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
426 __LINE__, args->data, ptr, args->size);
430 smp_rendezvous(NULL, amd_ucode_wrmsr, NULL, ptr);
438 update_via(int cpu, cpuctl_update_args_t *args, struct thread *td)
441 uint64_t rev0, rev1, res;
447 if (args->size == 0 || args->data == NULL) {
448 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
451 if (args->size > UCODE_SIZE_MAX) {
452 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
457 * 4 byte alignment required.
459 ptr = malloc(args->size, M_CPUCTL, M_WAITOK);
460 if (copyin(args->data, ptr, args->size) != 0) {
461 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
462 __LINE__, args->data, ptr, args->size);
466 oldcpu = td->td_oncpu;
467 is_bound = cpu_sched_is_bound(td);
470 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
475 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
479 * Result are in low byte of MSR FCR5:
480 * 0x00: No update has been attempted since RESET.
481 * 0x01: The last attempted update was successful.
482 * 0x02: The last attempted update was unsuccessful due to a bad
483 * environment. No update was loaded and any preexisting
484 * patches are still active.
485 * 0x03: The last attempted update was not applicable to this processor.
486 * No update was loaded and any preexisting patches are still
488 * 0x04: The last attempted update was not successful due to an invalid
489 * update data block. No update was loaded and any preexisting
490 * patches are still active
492 rdmsr_safe(0x1205, &res);
495 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
496 restore_cpu(oldcpu, is_bound, td);
498 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
499 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
511 cpuctl_do_eval_cpu_features(int cpu, struct thread *td)
516 KASSERT(cpu >= 0 && cpu <= mp_maxid,
517 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
523 oldcpu = td->td_oncpu;
524 is_bound = cpu_sched_is_bound(td);
528 restore_cpu(oldcpu, is_bound, td);
534 cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
540 if (cpu > mp_maxid || !cpu_enabled(cpu)) {
541 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__,
546 ret = securelevel_gt(td->td_ucred, 0);
551 cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
558 printf("cpuctl: access to MSR registers/cpuid info.\n");
559 cpuctl_devs = malloc(sizeof(*cpuctl_devs) * (mp_maxid + 1), M_CPUCTL,
562 if (cpu_enabled(cpu))
563 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
564 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
568 if (cpuctl_devs[cpu] != NULL)
569 destroy_dev(cpuctl_devs[cpu]);
571 free(cpuctl_devs, M_CPUCTL);
581 DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
582 MODULE_VERSION(cpuctl, CPUCTL_VERSION);