2 * Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
34 * Device driver for Crystal Semiconductor CS8920 based ethernet
35 * adapters. By Maxim Bolotin and Oleg Sharoiko, 27-April-1997
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/malloc.h>
46 #include <sys/socket.h>
47 #include <sys/sockio.h>
48 #include <sys/kernel.h>
49 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
52 #include <sys/module.h>
54 #include <machine/bus.h>
56 #include <machine/resource.h>
59 #include <net/if_var.h>
60 #include <net/if_arp.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
63 #include <net/if_types.h>
64 #include <net/ethernet.h>
67 #include <dev/cs/if_csvar.h>
68 #include <dev/cs/if_csreg.h>
71 #define CS_DMA_BUFFER_SIZE 65536
73 #define CS_DMA_BUFFER_SIZE 16384
76 static void cs_init(void *);
77 static void cs_init_locked(struct cs_softc *);
78 static int cs_ioctl(struct ifnet *, u_long, caddr_t);
79 static void cs_start(struct ifnet *);
80 static void cs_start_locked(struct ifnet *);
81 static void cs_stop(struct cs_softc *);
82 static void cs_reset(struct cs_softc *);
83 static void cs_watchdog(void *);
85 static int cs_mediachange(struct ifnet *);
86 static void cs_mediastatus(struct ifnet *, struct ifmediareq *);
87 static int cs_mediaset(struct cs_softc *, int);
89 static void cs_write_mbufs(struct cs_softc*, struct mbuf*);
90 static void cs_xmit_buf(struct cs_softc*);
91 static int cs_get_packet(struct cs_softc*);
92 static void cs_setmode(struct cs_softc*);
94 static int get_eeprom_data(struct cs_softc *sc, int, int, uint16_t *);
95 static int get_eeprom_cksum(int, int, uint16_t *);
96 static int wait_eeprom_ready( struct cs_softc *);
97 static void control_dc_dc( struct cs_softc *, int );
98 static int enable_tp(struct cs_softc *);
99 static int enable_aui(struct cs_softc *);
100 static int enable_bnc(struct cs_softc *);
101 static int cs_duplex_auto(struct cs_softc *);
103 devclass_t cs_devclass;
104 driver_intr_t csintr;
107 static SYSCTL_NODE(_hw, OID_AUTO, cs, CTLFLAG_RD, 0, "cs device parameters");
109 int cs_ignore_cksum_failure = 0;
110 TUNABLE_INT("hw.cs.ignore_checksum_failure", &cs_ignore_cksum_failure);
111 SYSCTL_INT(_hw_cs, OID_AUTO, ignore_checksum_failure, CTLFLAG_RW,
112 &cs_ignore_cksum_failure, 0,
113 "ignore checksum errors in cs card EEPROM");
115 static int cs_recv_delay = 570;
116 TUNABLE_INT("hw.cs.recv_delay", &cs_recv_delay);
117 SYSCTL_INT(_hw_cs, OID_AUTO, recv_delay, CTLFLAG_RW, &cs_recv_delay, 570, "");
119 static int cs8900_eeint2irq[16] = {
120 10, 11, 12, 5, 255, 255, 255, 255,
121 255, 255, 255, 255, 255, 255, 255, 255
124 static int cs8900_irq2eeint[16] = {
125 255, 255, 255, 255, 255, 3, 255, 255,
126 255, 0, 1, 2, 255, 255, 255, 255
130 get_eeprom_data(struct cs_softc *sc, int off, int len, uint16_t *buffer)
135 device_printf(sc->dev, "EEPROM data from %x for %x:\n", off, len);
137 for (i=0; i < len; i++) {
138 if (wait_eeprom_ready(sc) < 0)
140 /* Send command to EEPROM to read */
141 cs_writereg(sc, PP_EECMD, (off + i) | EEPROM_READ_CMD);
142 if (wait_eeprom_ready(sc) < 0)
144 buffer[i] = cs_readreg(sc, PP_EEData);
147 printf("%04x ",buffer[i]);
158 get_eeprom_cksum(int off, int len, uint16_t *buffer)
163 for (i = 0; i < len; i++)
166 if (cksum == 0 || cs_ignore_cksum_failure)
172 wait_eeprom_ready(struct cs_softc *sc)
177 * From the CS8900A datasheet, section 3.5.2:
178 * "Before issuing any command to the EEPROM, the host must wait
179 * for the SIBUSY bit (Register 16, SelfST, bit 8) to clear. After
180 * each command has been issued, the host must wait again for SIBUSY
183 * Before we issue the command, we should be !busy, so that will
184 * be fast. The datasheet suggests that clock out from the part
185 * per word will be on the order of 25us, which is consistant with
186 * the 1MHz serial clock and 16bits... We should never hit 100,
187 * let alone 15,000 here. The original code did an unconditional
188 * 30ms DELAY here. Bad Kharma. cs_readreg takes ~2us.
190 for (i = 0; i < 15000; i++) /* 30ms max */
191 if (!(cs_readreg(sc, PP_SelfST) & SI_BUSY))
197 control_dc_dc(struct cs_softc *sc, int on_not_off)
199 unsigned int self_control = HCB1_ENBL;
201 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0) ^ on_not_off)
202 self_control |= HCB1;
204 self_control &= ~HCB1;
205 cs_writereg(sc, PP_SelfCTL, self_control);
206 DELAY(500000); /* Bad! */
211 cs_duplex_auto(struct cs_softc *sc)
215 cs_writereg(sc, PP_AutoNegCTL,
216 RE_NEG_NOW | ALLOW_FDX | AUTO_NEG_ENABLE);
217 for (i=0; cs_readreg(sc, PP_AutoNegST) & AUTO_NEG_BUSY; i++) {
219 device_printf(sc->dev,
220 "full/half duplex auto negotiation timeout\n");
230 enable_tp(struct cs_softc *sc)
233 cs_writereg(sc, PP_LineCTL, sc->line_ctl & ~AUI_ONLY);
234 control_dc_dc(sc, 0);
239 enable_aui(struct cs_softc *sc)
242 cs_writereg(sc, PP_LineCTL,
243 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY);
244 control_dc_dc(sc, 0);
249 enable_bnc(struct cs_softc *sc)
252 cs_writereg(sc, PP_LineCTL,
253 (sc->line_ctl & ~AUTO_AUI_10BASET) | AUI_ONLY);
254 control_dc_dc(sc, 1);
259 cs_cs89x0_probe(device_t dev)
264 struct cs_softc *sc = device_get_softc(dev);
265 unsigned rev_type = 0;
268 uint16_t eeprom_buff[CHKSUM_LEN];
269 int chip_type, pp_isaint, pp_isadma;
272 error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS);
276 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG) {
277 /* Chip not detected. Let's try to reset it */
279 device_printf(dev, "trying to reset the chip.\n");
280 cs_outw(sc, ADD_PORT, PP_SelfCTL);
281 i = cs_inw(sc, DATA_PORT);
282 cs_outw(sc, ADD_PORT, PP_SelfCTL);
283 cs_outw(sc, DATA_PORT, i | POWER_ON_RESET);
284 if ((cs_inw(sc, ADD_PORT) & ADD_MASK) != ADD_SIG)
288 for (i = 0; i < 10000; i++) {
289 id = cs_readreg(sc, PP_ChipID);
290 if (id == CHIP_EISA_ID_SIG)
296 rev_type = cs_readreg(sc, PRODUCT_ID_ADD);
297 chip_type = rev_type & ~REVISON_BITS;
298 chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A';
300 sc->chip_type = chip_type;
302 if (chip_type == CS8900) {
303 pp_isaint = PP_CS8900_ISAINT;
304 pp_isadma = PP_CS8900_ISADMA;
305 sc->send_cmd = TX_CS8900_AFTER_ALL;
307 pp_isaint = PP_CS8920_ISAINT;
308 pp_isadma = PP_CS8920_ISADMA;
309 sc->send_cmd = TX_CS8920_AFTER_ALL;
313 * Clear some fields so that fail of EEPROM will left them clean
315 sc->auto_neg_cnf = 0;
320 * If no interrupt specified, use what the board tells us.
322 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, &junk);
325 * Get data from EEPROM
327 if((cs_readreg(sc, PP_SelfST) & EEPROM_PRESENT) == 0) {
328 device_printf(dev, "No EEPROM, assuming defaults.\n");
329 } else if (get_eeprom_data(sc,START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) {
330 device_printf(dev, "EEPROM read failed, assuming defaults.\n");
331 } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN, eeprom_buff)<0) {
332 device_printf(dev, "EEPROM cheksum bad, assuming defaults.\n");
334 sc->auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET];
335 sc->adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET];
336 sc->isa_config = eeprom_buff[ISA_CNF_OFFSET];
337 for (i=0; i<ETHER_ADDR_LEN/2; i++) {
338 sc->enaddr[i*2] = eeprom_buff[i];
339 sc->enaddr[i*2+1] = eeprom_buff[i] >> 8;
342 * If no interrupt specified, use what the
346 irq = sc->isa_config & INT_NO_MASK;
348 if (chip_type == CS8900) {
349 irq = cs8900_eeint2irq[irq];
351 if (irq > CS8920_NO_INTS)
355 device_printf(dev, "invalid irq in EEPROM.\n");
359 bus_set_resource(dev, SYS_RES_IRQ, 0,
364 if (!error && !(sc->flags & CS_NO_IRQ)) {
365 if (chip_type == CS8900) {
367 irq = cs8900_irq2eeint[irq];
371 if (irq > CS8920_NO_INTS)
379 device_printf(dev, "Unknown or invalid irq\n");
383 if (!(sc->flags & CS_NO_IRQ))
384 cs_writereg(sc, pp_isaint, irq);
390 cs_writereg(sc, pp_isadma, drq);
392 device_printf(dev, "incorrect drq\n",);
398 device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n",
399 chip_type == CS8900 ? '0' : '2',
400 chip_type == CS8920M ? "M" : "",
402 (sc->adapter_cnf & A_CNF_10B_T) ? " TP" : "",
403 (sc->adapter_cnf & A_CNF_AUI) ? " AUI" : "",
404 (sc->adapter_cnf & A_CNF_10B_2) ? " BNC" : "");
406 if ((sc->adapter_cnf & A_CNF_EXTND_10B_2) &&
407 (sc->adapter_cnf & A_CNF_LOW_RX_SQUELCH))
408 sc->line_ctl = LOW_RX_SQUELCH;
416 * Allocate a port resource with the given resource id.
419 cs_alloc_port(device_t dev, int rid, int size)
421 struct cs_softc *sc = device_get_softc(dev);
422 struct resource *res;
424 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
425 0ul, ~0ul, size, RF_ACTIVE);
434 * Allocate an irq resource with the given resource id.
437 cs_alloc_irq(device_t dev, int rid)
439 struct cs_softc *sc = device_get_softc(dev);
440 struct resource *res;
442 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
451 * Release all resources
454 cs_release_resources(device_t dev)
456 struct cs_softc *sc = device_get_softc(dev);
459 bus_release_resource(dev, SYS_RES_IOPORT,
460 sc->port_rid, sc->port_res);
464 bus_release_resource(dev, SYS_RES_IRQ,
465 sc->irq_rid, sc->irq_res);
471 * Install the interface into kernel networking data structures
474 cs_attach(device_t dev)
477 struct cs_softc *sc = device_get_softc(dev);
482 ifp = sc->ifp = if_alloc(IFT_ETHER);
484 device_printf(dev, "can not if_alloc()\n");
485 cs_release_resources(dev);
489 mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
491 callout_init_mtx(&sc->timer, &sc->lock, 0);
498 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
499 ifp->if_start=cs_start;
500 ifp->if_ioctl=cs_ioctl;
501 ifp->if_init=cs_init;
502 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
504 ifp->if_flags=(IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
507 * this code still in progress (DMA support)
510 sc->recv_ring=malloc(CS_DMA_BUFFER_SIZE<<1, M_DEVBUF, M_NOWAIT);
511 if (sc->recv_ring == NULL) {
513 "%s: Couldn't allocate memory for NIC\n", ifp->if_xname);
516 if ((sc->recv_ring-(sc->recv_ring & 0x1FFFF))
517 < (128*1024-CS_DMA_BUFFER_SIZE))
518 sc->recv_ring+=16*1024;
522 sc->buffer=malloc(ETHER_MAX_LEN-ETHER_CRC_LEN,M_DEVBUF,M_NOWAIT);
523 if (sc->buffer == NULL) {
524 device_printf(sc->dev, "Couldn't allocate memory for NIC\n");
526 mtx_destroy(&sc->lock);
527 cs_release_resources(dev);
532 * Initialize the media structures.
534 ifmedia_init(&sc->media, 0, cs_mediachange, cs_mediastatus);
536 if (sc->adapter_cnf & A_CNF_10B_T) {
537 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL);
538 if (sc->chip_type != CS8900) {
539 ifmedia_add(&sc->media,
540 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
541 ifmedia_add(&sc->media,
542 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
546 if (sc->adapter_cnf & A_CNF_10B_2)
547 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_2, 0, NULL);
549 if (sc->adapter_cnf & A_CNF_AUI)
550 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_5, 0, NULL);
552 if (sc->adapter_cnf & A_CNF_MEDIA)
553 ifmedia_add(&sc->media, IFM_ETHER|IFM_AUTO, 0, NULL);
555 /* Set default media from EEPROM */
556 switch (sc->adapter_cnf & A_CNF_MEDIA_TYPE) {
557 case A_CNF_MEDIA_AUTO: media = IFM_ETHER|IFM_AUTO; break;
558 case A_CNF_MEDIA_10B_T: media = IFM_ETHER|IFM_10_T; break;
559 case A_CNF_MEDIA_10B_2: media = IFM_ETHER|IFM_10_2; break;
560 case A_CNF_MEDIA_AUI: media = IFM_ETHER|IFM_10_5; break;
562 device_printf(sc->dev, "no media, assuming 10baseT\n");
563 sc->adapter_cnf |= A_CNF_10B_T;
564 ifmedia_add(&sc->media, IFM_ETHER|IFM_10_T, 0, NULL);
565 if (sc->chip_type != CS8900) {
566 ifmedia_add(&sc->media,
567 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
568 ifmedia_add(&sc->media,
569 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
571 media = IFM_ETHER | IFM_10_T;
574 ifmedia_set(&sc->media, media);
575 cs_mediaset(sc, media);
577 ether_ifattach(ifp, sc->enaddr);
579 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
580 NULL, csintr, sc, &sc->irq_handle);
583 free(sc->buffer, M_DEVBUF);
585 mtx_destroy(&sc->lock);
586 cs_release_resources(dev);
594 cs_detach(device_t dev)
599 sc = device_get_softc(dev);
605 callout_drain(&sc->timer);
607 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
608 cs_release_resources(dev);
609 free(sc->buffer, M_DEVBUF);
611 mtx_destroy(&sc->lock);
616 * Initialize the board
621 struct cs_softc *sc=(struct cs_softc *)xsc;
629 cs_init_locked(struct cs_softc *sc)
631 struct ifnet *ifp = sc->ifp;
635 * reset watchdog timer
641 * Hardware initialization of cs
644 /* Enable receiver and transmitter */
645 cs_writereg(sc, PP_LineCTL,
646 cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON);
648 /* Configure the receiver mode */
652 * This defines what type of frames will cause interrupts
653 * Bad frames should generate interrupts so that the driver
654 * could track statistics of discarded packets
656 rx_cfg = RX_OK_ENBL | RX_CRC_ERROR_ENBL | RX_RUNT_ENBL |
658 if (sc->isa_config & STREAM_TRANSFER)
659 rx_cfg |= RX_STREAM_ENBL;
660 cs_writereg(sc, PP_RxCFG, rx_cfg);
661 cs_writereg(sc, PP_TxCFG, TX_LOST_CRS_ENBL |
662 TX_SQE_ERROR_ENBL | TX_OK_ENBL | TX_LATE_COL_ENBL |
663 TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL);
664 cs_writereg(sc, PP_BufCFG, READY_FOR_TX_ENBL |
665 RX_MISS_COUNT_OVRFLOW_ENBL | TX_COL_COUNT_OVRFLOW_ENBL |
666 TX_UNDERRUN_ENBL /*| RX_DMA_ENBL*/);
668 /* Write MAC address into IA filter */
669 for (i=0; i<ETHER_ADDR_LEN/2; i++)
670 cs_writereg(sc, PP_IA + i * 2,
672 (sc->enaddr[i * 2 + 1] << 8) );
675 * Now enable everything
678 #ifdef CS_USE_64K_DMA
679 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ | RX_DMA_SIZE_64K);
681 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ);
684 cs_writereg(sc, PP_BusCTL, ENABLE_IRQ);
687 * Set running and clear output active flags
689 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
690 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
691 callout_reset(&sc->timer, hz, cs_watchdog, sc);
694 * Start sending process
696 cs_start_locked(ifp);
700 * Get the packet from the board and send it to the upper layer.
703 cs_get_packet(struct cs_softc *sc)
705 struct ifnet *ifp = sc->ifp;
707 struct ether_header *eh;
714 status = cs_inw(sc, RX_FRAME_PORT);
715 length = cs_inw(sc, RX_FRAME_PORT);
718 device_printf(sc->dev, "rcvd: stat %x, len %d\n",
722 if (!(status & RX_OK)) {
724 device_printf(sc->dev, "bad pkt stat %x\n", status);
730 MGETHDR(m, M_NOWAIT, MT_DATA);
734 if (length > MHLEN) {
736 if (!(m->m_flags & M_EXT)) {
742 /* Initialize packet's header info */
743 m->m_pkthdr.rcvif = ifp;
744 m->m_pkthdr.len = length;
748 bus_read_multi_2(sc->port_res, RX_FRAME_PORT, mtod(m, uint16_t *),
751 eh = mtod(m, struct ether_header *);
754 for (i=0;i<length;i++)
755 printf(" %02x",(unsigned char)*((char *)(m->m_data+i)));
759 if (status & (RX_IA | RX_BROADCAST) ||
760 (ifp->if_flags & IFF_MULTICAST && status & RX_HASHED)) {
761 /* Feed the packet to the upper layer */
762 (*ifp->if_input)(ifp, m);
764 if (length == ETHER_MAX_LEN-ETHER_CRC_LEN)
765 DELAY(cs_recv_delay);
779 struct cs_softc *sc = (struct cs_softc*) arg;
780 struct ifnet *ifp = sc->ifp;
784 device_printf(sc->dev, "Interrupt.\n");
788 while ((status=cs_inw(sc, ISQ_PORT))) {
791 device_printf(sc->dev, "from ISQ: %04x\n", status);
794 switch (status & ISQ_EVENT_MASK) {
795 case ISQ_RECEIVER_EVENT:
799 case ISQ_TRANSMITTER_EVENT:
804 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
808 case ISQ_BUFFER_EVENT:
809 if (status & READY_FOR_TX) {
810 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
814 if (status & TX_UNDERRUN) {
815 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
821 case ISQ_RX_MISS_EVENT:
822 ifp->if_ierrors+=(status>>6);
825 case ISQ_TX_COL_EVENT:
826 ifp->if_collisions+=(status>>6);
831 if (!(ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
832 cs_start_locked(ifp);
838 * Save the data in buffer
842 cs_write_mbufs( struct cs_softc *sc, struct mbuf *m )
846 unsigned char *data, *buf;
848 for (mp=m, buf=sc->buffer, sc->buf_len=0; mp != NULL; mp=mp->m_next) {
858 * Find actual data address
860 data = mtod(mp, caddr_t);
862 bcopy((caddr_t) data, (caddr_t) buf, len);
870 cs_xmit_buf( struct cs_softc *sc )
872 bus_write_multi_2(sc->port_res, TX_FRAME_PORT, (uint16_t *)sc->buffer,
873 (sc->buf_len + 1) >> 1);
878 cs_start(struct ifnet *ifp)
880 struct cs_softc *sc = ifp->if_softc;
883 cs_start_locked(ifp);
888 cs_start_locked(struct ifnet *ifp)
892 struct cs_softc *sc = ifp->if_softc;
896 length = sc->buf_len;
898 IF_DEQUEUE( &ifp->if_snd, m );
904 for (length=0, mp=m; mp != NULL; mp=mp->m_next)
907 /* Skip zero-length packets */
913 cs_write_mbufs(sc, m);
921 * Issue a SEND command
923 cs_outw(sc, TX_CMD_PORT, sc->send_cmd);
924 cs_outw(sc, TX_LEN_PORT, length );
927 * If there's no free space in the buffer then leave
928 * this packet for the next time: indicate output active
931 if (!(cs_readreg(sc, PP_BusST) & READY_FOR_TX_NOW)) {
932 sc->tx_timeout = sc->buf_len;
933 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
940 * Set the watchdog timer in case we never hear
941 * from board again. (I don't know about correct
942 * value for this timeout)
944 sc->tx_timeout = length;
946 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
952 * Stop everything on the interface
955 cs_stop(struct cs_softc *sc)
958 CS_ASSERT_LOCKED(sc);
959 cs_writereg(sc, PP_RxCFG, 0);
960 cs_writereg(sc, PP_TxCFG, 0);
961 cs_writereg(sc, PP_BufCFG, 0);
962 cs_writereg(sc, PP_BusCTL, 0);
964 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
966 callout_stop(&sc->timer);
970 * Reset the interface
973 cs_reset(struct cs_softc *sc)
976 CS_ASSERT_LOCKED(sc);
982 cs_hash_index(struct sockaddr_dl *addr)
989 crc = ether_crc32_le(lla, ETHER_ADDR_LEN);
996 cs_setmode(struct cs_softc *sc)
1000 uint16_t port, mask, index;
1001 struct ifnet *ifp = sc->ifp;
1002 struct ifmultiaddr *ifma;
1004 /* Stop the receiver while changing filters */
1005 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) & ~SERIAL_RX_ON);
1007 if (ifp->if_flags & IFF_PROMISC) {
1008 /* Turn on promiscuous mode. */
1009 rx_ctl = RX_OK_ACCEPT | RX_PROM_ACCEPT;
1010 } else if (ifp->if_flags & IFF_MULTICAST) {
1011 /* Allow receiving frames with multicast addresses */
1012 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT |
1013 RX_OK_ACCEPT | RX_MULTCAST_ACCEPT;
1015 /* Start with an empty filter */
1016 af[0] = af[1] = af[2] = af[3] = 0x0000;
1018 if (ifp->if_flags & IFF_ALLMULTI) {
1019 /* Accept all multicast frames */
1020 af[0] = af[1] = af[2] = af[3] = 0xffff;
1023 * Set up the filter to only accept multicast
1024 * frames we're interested in.
1026 if_maddr_rlock(ifp);
1027 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1028 struct sockaddr_dl *dl =
1029 (struct sockaddr_dl *)ifma->ifma_addr;
1031 index = cs_hash_index(dl);
1032 port = (u_int16_t) (index >> 4);
1033 mask = (u_int16_t) (1 << (index & 0xf));
1036 if_maddr_runlock(ifp);
1039 cs_writereg(sc, PP_LAF + 0, af[0]);
1040 cs_writereg(sc, PP_LAF + 2, af[1]);
1041 cs_writereg(sc, PP_LAF + 4, af[2]);
1042 cs_writereg(sc, PP_LAF + 6, af[3]);
1045 * Receive only good frames addressed for us and
1048 rx_ctl = RX_IA_ACCEPT | RX_BROADCAST_ACCEPT |
1052 /* Set up the filter */
1053 cs_writereg(sc, PP_RxCTL, RX_DEF_ACCEPT | rx_ctl);
1055 /* Turn on receiver */
1056 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) | SERIAL_RX_ON);
1060 cs_ioctl(register struct ifnet *ifp, u_long command, caddr_t data)
1062 struct cs_softc *sc=ifp->if_softc;
1063 struct ifreq *ifr = (struct ifreq *)data;
1067 if_printf(ifp, "%s command=%lx\n", __func__, command);
1073 * Switch interface state between "running" and
1074 * "stopped", reflecting the UP flag.
1077 if (sc->ifp->if_flags & IFF_UP) {
1078 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)==0) {
1082 if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING)!=0) {
1087 * Promiscuous and/or multicast flags may have changed,
1088 * so reprogram the multicast filter and/or receive mode.
1090 * See note about multicasts in cs_setmode
1099 * Multicast list has changed; set the hardware filter
1102 * See note about multicasts in cs_setmode
1112 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
1116 error = ether_ioctl(ifp, command, data);
1124 * Device timeout/watchdog routine. Entered if the device neglects to
1125 * generate an interrupt after a transmit has been started on it.
1128 cs_watchdog(void *arg)
1130 struct cs_softc *sc = arg;
1131 struct ifnet *ifp = sc->ifp;
1133 CS_ASSERT_LOCKED(sc);
1134 if (sc->tx_timeout && --sc->tx_timeout == 0) {
1136 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
1138 /* Reset the interface */
1139 if (ifp->if_flags & IFF_UP)
1144 callout_reset(&sc->timer, hz, cs_watchdog, sc);
1148 cs_mediachange(struct ifnet *ifp)
1150 struct cs_softc *sc = ifp->if_softc;
1151 struct ifmedia *ifm = &sc->media;
1154 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1158 error = cs_mediaset(sc, ifm->ifm_media);
1164 cs_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
1167 struct cs_softc *sc = ifp->if_softc;
1170 ifmr->ifm_active = IFM_ETHER;
1171 line_status = cs_readreg(sc, PP_LineST);
1172 if (line_status & TENBASET_ON) {
1173 ifmr->ifm_active |= IFM_10_T;
1174 if (sc->chip_type != CS8900) {
1175 if (cs_readreg(sc, PP_AutoNegST) & FDX_ACTIVE)
1176 ifmr->ifm_active |= IFM_FDX;
1177 if (cs_readreg(sc, PP_AutoNegST) & HDX_ACTIVE)
1178 ifmr->ifm_active |= IFM_HDX;
1180 ifmr->ifm_status = IFM_AVALID;
1181 if (line_status & LINK_OK)
1182 ifmr->ifm_status |= IFM_ACTIVE;
1184 if (line_status & AUI_ON) {
1185 cs_writereg(sc, PP_SelfCTL, cs_readreg(sc, PP_SelfCTL) |
1187 if (((sc->adapter_cnf & A_CNF_DC_DC_POLARITY)!=0)^
1188 (cs_readreg(sc, PP_SelfCTL) & HCB1))
1189 ifmr->ifm_active |= IFM_10_2;
1191 ifmr->ifm_active |= IFM_10_5;
1198 cs_mediaset(struct cs_softc *sc, int media)
1202 /* Stop the receiver & transmitter */
1203 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) &
1204 ~(SERIAL_RX_ON | SERIAL_TX_ON));
1207 device_printf(sc->dev, "%s media=%x\n", __func__, media);
1210 switch (IFM_SUBTYPE(media)) {
1214 * This chip makes it a little hard to support this, so treat
1215 * it as IFM_10_T, auto duplex.
1222 if (media & IFM_FDX)
1224 else if (media & IFM_HDX)
1227 error = cs_duplex_auto(sc);
1238 * Turn the transmitter & receiver back on
1240 cs_writereg(sc, PP_LineCTL, cs_readreg(sc, PP_LineCTL) |
1241 SERIAL_RX_ON | SERIAL_TX_ON);