1 /**************************************************************************
3 Copyright (c) 2007-2009, Chelsio Inc.
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Neither the name of the Chelsio Corporation nor the names of its
13 contributors may be used to endorse or promote products derived from
14 this software without specific prior written permission.
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
30 ***************************************************************************/
33 #ifndef _CXGB_ADAPTER_H_
34 #define _CXGB_ADAPTER_H_
37 #include <sys/mutex.h>
40 #include <sys/socket.h>
41 #include <sys/sockio.h>
42 #include <sys/condvar.h>
43 #include <sys/buf_ring.h>
44 #include <sys/taskqueue.h>
46 #include <net/ethernet.h>
48 #include <net/if_var.h>
49 #include <net/if_media.h>
50 #include <net/if_dl.h>
51 #include <netinet/in.h>
52 #include <netinet/tcp_lro.h>
54 #include <machine/bus.h>
55 #include <machine/resource.h>
57 #include <dev/pci/pcireg.h>
58 #include <dev/pci/pcivar.h>
60 #include <cxgb_osdep.h>
64 extern int cxgb_debug;
67 #define MTX_INIT(lock, lockname, class, flags) \
69 printf("initializing %s at %s:%d\n", lockname, __FILE__, __LINE__); \
70 mtx_init((lock), lockname, class, flags); \
73 #define MTX_DESTROY(lock) \
75 printf("destroying %s at %s:%d\n", (lock)->lock_object.lo_name, __FILE__, __LINE__); \
76 mtx_destroy((lock)); \
80 #define MTX_INIT mtx_init
81 #define MTX_DESTROY mtx_destroy
91 struct adapter *adapter;
95 const struct port_type_info *port_type;
98 struct timeval last_refreshed;
99 struct link_config link_config;
100 struct ifmedia media;
109 uint8_t hw_addr[ETHER_ADDR_LEN];
110 struct callout link_check_ch;
111 struct task link_check_task;
112 struct task timer_reclaim_task;
113 struct cdev *port_cdev;
115 #define PORT_LOCK_NAME_LEN 32
116 #define PORT_NAME_LEN 32
117 char lockbuf[PORT_LOCK_NAME_LEN];
118 char namebuf[PORT_NAME_LEN];
119 } __aligned(L1_CACHE_BYTES);
123 FULL_INIT_DONE = (1 << 0),
124 USING_MSI = (1 << 1),
125 USING_MSIX = (1 << 2),
126 QUEUES_BOUND = (1 << 3),
127 FW_UPTODATE = (1 << 4),
128 TPS_UPTODATE = (1 << 5),
129 CXGB_SHUTDOWN = (1 << 6),
130 CXGB_OFLD_INIT = (1 << 7),
131 TP_PARITY_INIT = (1 << 8),
132 CXGB_BUSY = (1 << 9),
133 TOM_INIT_DONE = (1 << 10),
138 #define IS_DOOMED(p) (p->flags & DOOMED)
139 #define SET_DOOMED(p) do {p->flags |= DOOMED;} while (0)
140 #define IS_BUSY(sc) (sc->flags & CXGB_BUSY)
141 #define SET_BUSY(sc) do {sc->flags |= CXGB_BUSY;} while (0)
142 #define CLR_BUSY(sc) do {sc->flags &= ~CXGB_BUSY;} while (0)
144 #define FL_Q_SIZE 4096
145 #define JUMBO_Q_SIZE 1024
146 #define RSPQ_Q_SIZE 2048
147 #define TX_ETH_Q_SIZE 1024
148 #define TX_OFLD_Q_SIZE 1024
149 #define TX_CTRL_Q_SIZE 256
157 * work request size in bytes
159 #define WR_LEN (WR_FLITS * 8)
160 #define PIO_LEN (WR_LEN - sizeof(struct cpl_tx_pkt_lso))
163 unsigned short enabled;
164 struct lro_ctrl ctrl;
167 #define RX_BUNDLE_SIZE 8
177 uint32_t holdoff_tmr;
178 uint32_t next_holdoff;
180 uint32_t async_notif;
182 uint32_t offload_pkts;
184 uint32_t unhandled_irqs;
187 bus_addr_t phys_addr;
188 bus_dma_tag_t desc_tag;
189 bus_dmamap_t desc_map;
191 struct t3_mbuf_hdr rspq_mh;
192 struct rsp_desc *desc;
194 #define RSPQ_NAME_LEN 32
195 char lockbuf[RSPQ_NAME_LEN];
196 uint32_t rspq_dump_start;
197 uint32_t rspq_dump_count;
211 bus_addr_t phys_addr;
214 bus_dma_tag_t desc_tag;
215 bus_dmamap_t desc_map;
216 bus_dma_tag_t entry_tag;
218 struct rx_desc *desc;
219 struct rx_sw_desc *sdesc;
226 #define TXQ_TRANSMITTING 0x1
240 struct tx_desc *desc;
241 struct tx_sw_desc *sdesc;
243 bus_addr_t phys_addr;
244 struct task qresume_task;
245 struct task qreclaim_task;
249 bus_dma_tag_t desc_tag;
250 bus_dmamap_t desc_map;
251 bus_dma_tag_t entry_tag;
254 struct buf_ring *txq_mr;
255 struct ifaltq *txq_ifq;
256 struct callout txq_timer;
257 struct callout txq_watchdog;
258 uint64_t txq_coalesced;
259 uint32_t txq_skipped;
260 uint32_t txq_enqueued;
261 uint32_t txq_dump_start;
262 uint32_t txq_dump_count;
263 uint64_t txq_direct_packets;
264 uint64_t txq_direct_bytes;
266 struct sg_ent txq_sgl[TX_MAX_SEGS / 2 + 1];
269 #define SGE_PSTAT_MAX (SGE_PSTAT_VLANINS+1)
271 #define QS_EXITING 0x1
272 #define QS_RUNNING 0x2
274 #define QS_FLUSHING 0x8
275 #define QS_TIMEOUT 0x10
278 struct sge_rspq rspq;
279 struct sge_fl fl[SGE_RXQ_PER_SET];
280 struct lro_state lro;
281 struct sge_txq txq[SGE_TXQ_PER_SET];
282 uint32_t txq_stopped; /* which Tx queues are stopped */
283 struct port_info *port;
284 struct adapter *adap;
285 int idx; /* qset # */
290 #define QS_NAME_LEN 32
291 char namebuf[QS_NAME_LEN];
295 struct sge_qset qs[SGE_QSETS];
301 typedef int (*cpl_handler_t)(struct sge_qset *, struct rsp_desc *,
305 SLIST_ENTRY(adapter) link;
309 /* PCI register resources */
311 struct resource *regs_res;
313 struct resource *udbs_res;
314 bus_space_handle_t bh;
320 bus_dma_tag_t parent_dmat;
321 bus_dma_tag_t rx_dmat;
322 bus_dma_tag_t rx_jumbo_dmat;
323 bus_dma_tag_t tx_dmat;
325 /* Interrupt resources */
326 struct resource *irq_res;
330 uint32_t msix_regs_rid;
331 struct resource *msix_regs_res;
333 struct resource *msix_irq_res[SGE_QSETS];
334 int msix_irq_rid[SGE_QSETS];
335 void *msix_intr_tag[SGE_QSETS];
336 uint8_t rxpkt_map[8]; /* maps RX_PKT interface values to port ids */
337 uint8_t rrss_map[SGE_QSETS]; /* revers RSS map table */
338 uint16_t rspq_map[RSS_TABLE_SIZE]; /* maps 7-bit cookie to qidx */
340 uint8_t fill[SGE_QSETS];
344 #define tunq_fill u.fill
345 #define tunq_coalesce u.coalesce
347 struct filter_info *filters;
350 struct task slow_intr_task;
351 struct task tick_task;
352 struct taskqueue *tq;
353 struct callout cxgb_tick_ch;
354 struct callout sge_timer_ch;
356 /* Register lock for use by the hardware layer */
357 struct mtx mdio_lock;
358 struct mtx elmer_lock;
360 /* Bookkeeping for the hardware layer */
361 struct adapter_params params;
362 unsigned int slow_intr_mask;
363 unsigned long irq_stats[IRQ_NUM_STATS];
371 struct port_info port[MAX_NPORTS];
372 device_t portdev[MAX_NPORTS];
378 char port_types[MAX_NPORTS + 1];
379 uint32_t open_device_map;
384 driver_intr_t *cxgb_intr;
387 #define ADAPTER_LOCK_NAME_LEN 32
388 char lockbuf[ADAPTER_LOCK_NAME_LEN];
389 char reglockbuf[ADAPTER_LOCK_NAME_LEN];
390 char mdiolockbuf[ADAPTER_LOCK_NAME_LEN];
391 char elmerlockbuf[ADAPTER_LOCK_NAME_LEN];
396 #define NUM_CPL_HANDLERS 0xa7
397 cpl_handler_t cpl_handler[NUM_CPL_HANDLERS] __aligned(CACHE_LINE_SIZE);
404 struct port_info *port;
407 #define MDIO_LOCK(adapter) mtx_lock(&(adapter)->mdio_lock)
408 #define MDIO_UNLOCK(adapter) mtx_unlock(&(adapter)->mdio_lock)
409 #define ELMR_LOCK(adapter) mtx_lock(&(adapter)->elmer_lock)
410 #define ELMR_UNLOCK(adapter) mtx_unlock(&(adapter)->elmer_lock)
413 #define PORT_LOCK(port) mtx_lock(&(port)->lock);
414 #define PORT_UNLOCK(port) mtx_unlock(&(port)->lock);
415 #define PORT_LOCK_INIT(port, name) mtx_init(&(port)->lock, name, 0, MTX_DEF)
416 #define PORT_LOCK_DEINIT(port) mtx_destroy(&(port)->lock)
417 #define PORT_LOCK_ASSERT_NOTOWNED(port) mtx_assert(&(port)->lock, MA_NOTOWNED)
418 #define PORT_LOCK_ASSERT_OWNED(port) mtx_assert(&(port)->lock, MA_OWNED)
420 #define ADAPTER_LOCK(adap) mtx_lock(&(adap)->lock);
421 #define ADAPTER_UNLOCK(adap) mtx_unlock(&(adap)->lock);
422 #define ADAPTER_LOCK_INIT(adap, name) mtx_init(&(adap)->lock, name, 0, MTX_DEF)
423 #define ADAPTER_LOCK_DEINIT(adap) mtx_destroy(&(adap)->lock)
424 #define ADAPTER_LOCK_ASSERT_NOTOWNED(adap) mtx_assert(&(adap)->lock, MA_NOTOWNED)
425 #define ADAPTER_LOCK_ASSERT_OWNED(adap) mtx_assert(&(adap)->lock, MA_OWNED)
428 static __inline uint32_t
429 t3_read_reg(adapter_t *adapter, uint32_t reg_addr)
431 return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr));
435 t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val)
437 bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val);
441 t3_os_pci_read_config_4(adapter_t *adapter, int reg, uint32_t *val)
443 *val = pci_read_config(adapter->dev, reg, 4);
447 t3_os_pci_write_config_4(adapter_t *adapter, int reg, uint32_t val)
449 pci_write_config(adapter->dev, reg, val, 4);
453 t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val)
455 *val = pci_read_config(adapter->dev, reg, 2);
459 t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val)
461 pci_write_config(adapter->dev, reg, val, 2);
464 static __inline uint8_t *
465 t3_get_next_mcaddr(struct t3_rx_mode *rm)
467 uint8_t *macaddr = NULL;
468 struct ifnet *ifp = rm->port->ifp;
469 struct ifmultiaddr *ifma;
473 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
474 if (ifma->ifma_addr->sa_family != AF_LINK)
477 macaddr = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
482 if_maddr_runlock(ifp);
489 t3_init_rx_mode(struct t3_rx_mode *rm, struct port_info *port)
495 static __inline struct port_info *
496 adap2pinfo(struct adapter *adap, int idx)
498 return &adap->port[idx];
501 int t3_os_find_pci_capability(adapter_t *adapter, int cap);
502 int t3_os_pci_save_state(struct adapter *adapter);
503 int t3_os_pci_restore_state(struct adapter *adapter);
504 void t3_os_link_intr(struct port_info *);
505 void t3_os_link_changed(adapter_t *adapter, int port_id, int link_status,
506 int speed, int duplex, int fc, int mac_was_reset);
507 void t3_os_phymod_changed(struct adapter *adap, int port_id);
508 void t3_sge_err_intr_handler(adapter_t *adapter);
510 int t3_offload_tx(struct adapter *, struct mbuf *);
512 void t3_os_set_hw_addr(adapter_t *adapter, int port_idx, u8 hw_addr[]);
513 int t3_mgmt_tx(adapter_t *adap, struct mbuf *m);
514 int t3_register_cpl_handler(struct adapter *, int, cpl_handler_t);
516 int t3_sge_alloc(struct adapter *);
517 int t3_sge_free(struct adapter *);
518 int t3_sge_alloc_qset(adapter_t *, uint32_t, int, int, const struct qset_params *,
519 int, struct port_info *);
520 void t3_free_sge_resources(adapter_t *, int);
521 void t3_sge_start(adapter_t *);
522 void t3_sge_stop(adapter_t *);
523 void t3b_intr(void *data);
524 void t3_intr_msi(void *data);
525 void t3_intr_msix(void *data);
527 int t3_sge_init_adapter(adapter_t *);
528 int t3_sge_reset_adapter(adapter_t *);
529 int t3_sge_init_port(struct port_info *);
530 void t3_free_tx_desc(struct sge_qset *qs, int n, int qid);
532 void t3_rx_eth(struct adapter *adap, struct mbuf *m, int ethpad);
534 void t3_add_attach_sysctls(adapter_t *sc);
535 void t3_add_configured_sysctls(adapter_t *sc);
536 int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
537 unsigned char *data);
538 void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
541 * XXX figure out how we can return this to being private to sge
543 #define desc_reclaimable(q) ((int)((q)->processed - (q)->cleaned - TX_MAX_DESC))
545 #define container_of(p, stype, field) ((stype *)(((uint8_t *)(p)) - offsetof(stype, field)))
547 static __inline struct sge_qset *
548 fl_to_qset(struct sge_fl *q, int qidx)
550 return container_of(q, struct sge_qset, fl[qidx]);
553 static __inline struct sge_qset *
554 rspq_to_qset(struct sge_rspq *q)
556 return container_of(q, struct sge_qset, rspq);
559 static __inline struct sge_qset *
560 txq_to_qset(struct sge_txq *q, int qidx)
562 return container_of(q, struct sge_qset, txq[qidx]);
567 #define OFFLOAD_DEVMAP_BIT (1 << MAX_NPORTS)
568 static inline int offload_running(adapter_t *adapter)
570 return isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT);
573 void cxgb_tx_watchdog(void *arg);
574 int cxgb_transmit(struct ifnet *ifp, struct mbuf *m);
575 void cxgb_qflush(struct ifnet *ifp);
576 void t3_iterate(void (*)(struct adapter *, void *), void *);
577 void cxgb_refresh_stats(struct port_info *);