1 /**************************************************************************
2 SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 Copyright (c) 2007, Chelsio Inc.
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
13 2. Neither the name of the Chelsio Corporation nor the names of its
14 contributors may be used to endorse or promote products derived from
15 this software without specific prior written permission.
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 POSSIBILITY OF SUCH DAMAGE.
32 ***************************************************************************/
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/ctype.h>
37 #include <sys/endian.h>
41 #include <sys/mutex.h>
45 #include <dev/mii/mii.h>
47 #ifndef _CXGB_OSDEP_H_
48 #define _CXGB_OSDEP_H_
50 typedef struct adapter adapter_t;
51 typedef struct port_info pinfo_t;
55 TP_TMR_RES = 200, /* TP timer resolution in usec */
56 MAX_NPORTS = 4, /* max # of ports */
57 TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */
58 TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */
67 #define PANIC_IF(exp) do { \
69 panic("BUG: %s", #exp); \
74 * Workaround for weird Chelsio issue
76 #define PRIV_SUPPORTED
78 #define CXGB_TX_CLEANUP_THRESHOLD 32
80 #define TX_MAX_SIZE (1 << 16) /* 64KB */
81 #define TX_MAX_SEGS 36 /* maximum supported by card */
83 #define TX_MAX_DESC 4 /* max descriptors per packet */
86 #define TX_START_MAX_DESC (TX_MAX_DESC << 2) /* maximum number of descriptors
87 * call to start used per */
89 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors
90 * to clean per iteration */
91 #define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single
94 #define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be
95 * aggregated into a single TX WR
97 #if defined(__i386__) || defined(__amd64__)
100 void prefetch(void *x)
102 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
105 #define smp_mb() mb()
107 #define L1_CACHE_BYTES 128
108 #define WARN_ON(condition) do { \
109 if (__predict_false((condition)!=0)) { \
110 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
118 #define L1_CACHE_BYTES 32
121 #define DBG_RX (1 << 0)
122 static const int debug_flags = DBG_RX;
125 #define DBG(flag, msg) do { \
126 if ((flag & debug_flags)) \
133 #include <sys/syslog.h>
135 #define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC)
136 #define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
138 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
139 #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
140 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
142 #define t3_os_sleep(x) DELAY((x) * 1000)
144 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
146 #define max_t(type, a, b) (type)max((a), (b))
147 #define cpu_to_be32(x) htobe32(x)
149 /* Standard PHY definitions */
150 #define BMCR_LOOPBACK BMCR_LOOP
151 #define BMCR_ISOLATE BMCR_ISO
152 #define BMCR_ANENABLE BMCR_AUTOEN
153 #define BMCR_SPEED1000 BMCR_SPEED1
154 #define BMCR_SPEED100 BMCR_SPEED0
155 #define BMCR_ANRESTART BMCR_STARTNEG
156 #define BMCR_FULLDPLX BMCR_FDX
157 #define BMSR_LSTATUS BMSR_LINK
158 #define BMSR_ANEGCOMPLETE BMSR_ACOMP
160 #define MII_LPA MII_ANLPAR
161 #define MII_ADVERTISE MII_ANAR
162 #define MII_CTRL1000 MII_100T2CR
164 #define ADVERTISE_PAUSE_CAP ANAR_FC
165 #define ADVERTISE_PAUSE_ASYM 0x800
166 #define ADVERTISE_PAUSE ANAR_FC
167 #define ADVERTISE_1000HALF 0x100
168 #define ADVERTISE_1000FULL 0x200
169 #define ADVERTISE_10FULL ANAR_10_FD
170 #define ADVERTISE_10HALF ANAR_10
171 #define ADVERTISE_100FULL ANAR_TX_FD
172 #define ADVERTISE_100HALF ANAR_TX
175 #define ADVERTISE_1000XHALF ANAR_X_HD
176 #define ADVERTISE_1000XFULL ANAR_X_FD
177 #define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM
178 #define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM
180 #define ADVERTISE_CSMA ANAR_CSMA
181 #define ADVERTISE_NPAGE ANAR_NP
184 /* Standard PCI Extended Capabilities definitions */
185 #define PCI_CAP_ID_VPD PCIY_VPD
186 #define PCI_VPD_ADDR PCIR_VPD_ADDR
187 #define PCI_VPD_ADDR_F 0x8000
188 #define PCI_VPD_DATA PCIR_VPD_DATA
190 #define PCI_CAP_ID_EXP PCIY_EXPRESS
191 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL
192 #define PCI_EXP_DEVCTL_PAYLOAD PCIEM_CTL_MAX_PAYLOAD
193 #define PCI_EXP_DEVCTL_READRQ PCIEM_CTL_MAX_READ_REQUEST
194 #define PCI_EXP_LNKCTL PCIER_LINK_CTL
195 #define PCI_EXP_LNKSTA PCIER_LINK_STA
198 * Linux compatibility macros
201 /* Some simple translations */
203 #define udelay(x) DELAY(x)
204 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
205 #define le32_to_cpu(x) le32toh(x)
206 #define le16_to_cpu(x) le16toh(x)
207 #define cpu_to_le32(x) htole32(x)
208 #define swab32(x) bswap32(x)
209 #ifndef simple_strtoul
210 #define simple_strtoul(...) strtoul(__VA_ARGS__)
214 #ifndef LINUX_TYPES_DEFINED
216 typedef uint16_t u16;
217 typedef uint32_t u32;
218 typedef uint64_t u64;
220 typedef uint8_t __u8;
221 typedef uint16_t __u16;
222 typedef uint32_t __u32;
223 typedef uint8_t __be8;
224 typedef uint16_t __be16;
225 typedef uint32_t __be32;
226 typedef uint64_t __be64;
230 #if BYTE_ORDER == BIG_ENDIAN
231 #define __BIG_ENDIAN_BITFIELD
232 #elif BYTE_ORDER == LITTLE_ENDIAN
233 #define __LITTLE_ENDIAN_BITFIELD
235 #error "Must set BYTE_ORDER"
238 /* Indicates what features are supported by the interface. */
239 #define SUPPORTED_10baseT_Half (1 << 0)
240 #define SUPPORTED_10baseT_Full (1 << 1)
241 #define SUPPORTED_100baseT_Half (1 << 2)
242 #define SUPPORTED_100baseT_Full (1 << 3)
243 #define SUPPORTED_1000baseT_Half (1 << 4)
244 #define SUPPORTED_1000baseT_Full (1 << 5)
245 #define SUPPORTED_Autoneg (1 << 6)
246 #define SUPPORTED_TP (1 << 7)
247 #define SUPPORTED_AUI (1 << 8)
248 #define SUPPORTED_MII (1 << 9)
249 #define SUPPORTED_FIBRE (1 << 10)
250 #define SUPPORTED_BNC (1 << 11)
251 #define SUPPORTED_10000baseT_Full (1 << 12)
252 #define SUPPORTED_Pause (1 << 13)
253 #define SUPPORTED_Asym_Pause (1 << 14)
255 /* Indicates what features are advertised by the interface. */
256 #define ADVERTISED_10baseT_Half (1 << 0)
257 #define ADVERTISED_10baseT_Full (1 << 1)
258 #define ADVERTISED_100baseT_Half (1 << 2)
259 #define ADVERTISED_100baseT_Full (1 << 3)
260 #define ADVERTISED_1000baseT_Half (1 << 4)
261 #define ADVERTISED_1000baseT_Full (1 << 5)
262 #define ADVERTISED_Autoneg (1 << 6)
263 #define ADVERTISED_TP (1 << 7)
264 #define ADVERTISED_AUI (1 << 8)
265 #define ADVERTISED_MII (1 << 9)
266 #define ADVERTISED_FIBRE (1 << 10)
267 #define ADVERTISED_BNC (1 << 11)
268 #define ADVERTISED_10000baseT_Full (1 << 12)
269 #define ADVERTISED_Pause (1 << 13)
270 #define ADVERTISED_Asym_Pause (1 << 14)
272 /* Enable or disable autonegotiation. If this is set to enable,
273 * the forced link modes above are completely ignored.
275 #define AUTONEG_DISABLE 0x00
276 #define AUTONEG_ENABLE 0x01
279 #define SPEED_100 100
280 #define SPEED_1000 1000
281 #define SPEED_10000 10000
282 #define DUPLEX_HALF 0
283 #define DUPLEX_FULL 1