2 * Copyright (c) 2011 Chelsio Communications, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #ifndef __CHELSIO_COMMON_H
31 #define __CHELSIO_COMMON_H
37 MAX_NPORTS = 4, /* max # of ports */
38 SERNUM_LEN = 24, /* Serial # length */
39 EC_LEN = 16, /* E/C length */
40 ID_LEN = 16, /* ID length */
41 PN_LEN = 16, /* Part Number length */
42 MACADDR_LEN = 12, /* MAC Address length */
45 enum { MEM_EDC0, MEM_EDC1, MEM_MC };
48 MEMWIN0_APERTURE = 2048,
49 MEMWIN0_BASE = 0x1b800,
50 MEMWIN1_APERTURE = 32768,
51 MEMWIN1_BASE = 0x28000,
52 MEMWIN2_APERTURE = 65536,
53 MEMWIN2_BASE = 0x30000,
56 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
58 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR };
63 PAUSE_AUTONEG = 1 << 2
66 #define FW_VERSION_MAJOR 1
67 #define FW_VERSION_MINOR 8
68 #define FW_VERSION_MICRO 4
69 #define FW_VERSION_BUILD 0
72 u64 tx_octets; /* total # of octets in good frames */
73 u64 tx_frames; /* all good frames */
74 u64 tx_bcast_frames; /* all broadcast frames */
75 u64 tx_mcast_frames; /* all multicast frames */
76 u64 tx_ucast_frames; /* all unicast frames */
77 u64 tx_error_frames; /* all error frames */
79 u64 tx_frames_64; /* # of Tx frames in a particular range */
81 u64 tx_frames_128_255;
82 u64 tx_frames_256_511;
83 u64 tx_frames_512_1023;
84 u64 tx_frames_1024_1518;
85 u64 tx_frames_1519_max;
87 u64 tx_drop; /* # of dropped Tx frames */
88 u64 tx_pause; /* # of transmitted pause frames */
89 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */
90 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */
91 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */
92 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */
93 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */
94 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */
95 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */
96 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */
98 u64 rx_octets; /* total # of octets in good frames */
99 u64 rx_frames; /* all good frames */
100 u64 rx_bcast_frames; /* all broadcast frames */
101 u64 rx_mcast_frames; /* all multicast frames */
102 u64 rx_ucast_frames; /* all unicast frames */
103 u64 rx_too_long; /* # of frames exceeding MTU */
104 u64 rx_jabber; /* # of jabber frames */
105 u64 rx_fcs_err; /* # of received frames with bad FCS */
106 u64 rx_len_err; /* # of received frames with length error */
107 u64 rx_symbol_err; /* symbol errors */
108 u64 rx_runt; /* # of short frames */
110 u64 rx_frames_64; /* # of Rx frames in a particular range */
111 u64 rx_frames_65_127;
112 u64 rx_frames_128_255;
113 u64 rx_frames_256_511;
114 u64 rx_frames_512_1023;
115 u64 rx_frames_1024_1518;
116 u64 rx_frames_1519_max;
118 u64 rx_pause; /* # of received pause frames */
119 u64 rx_ppp0; /* # of received PPP prio 0 frames */
120 u64 rx_ppp1; /* # of received PPP prio 1 frames */
121 u64 rx_ppp2; /* # of received PPP prio 2 frames */
122 u64 rx_ppp3; /* # of received PPP prio 3 frames */
123 u64 rx_ppp4; /* # of received PPP prio 4 frames */
124 u64 rx_ppp5; /* # of received PPP prio 5 frames */
125 u64 rx_ppp6; /* # of received PPP prio 6 frames */
126 u64 rx_ppp7; /* # of received PPP prio 7 frames */
128 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
129 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
130 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
131 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
132 u64 rx_trunc0; /* buffer-group 0 truncated packets */
133 u64 rx_trunc1; /* buffer-group 1 truncated packets */
134 u64 rx_trunc2; /* buffer-group 2 truncated packets */
135 u64 rx_trunc3; /* buffer-group 3 truncated packets */
138 struct lb_port_stats {
151 u64 frames_1024_1518;
166 struct tp_tcp_stats {
173 struct tp_usm_stats {
179 struct tp_fcoe_stats {
185 struct tp_err_stats {
190 u32 ofldChanDrops[4];
192 u32 ofldVlanDrops[4];
198 struct tp_proxy_stats {
202 struct tp_cpl_stats {
207 struct tp_rdma_stats {
213 unsigned int ntxchan; /* # of Tx channels */
214 unsigned int tre; /* log2 of core clocks per TP tick */
215 unsigned int dack_re; /* DACK timer resolution */
216 unsigned int la_mask; /* what events are recorded by TP LA */
217 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */
223 u8 sn[SERNUM_LEN + 1];
226 u8 na[MACADDR_LEN + 1];
230 unsigned int vpd_cap_addr;
231 unsigned short speed;
232 unsigned short width;
236 * Firmware device log.
238 struct devlog_params {
239 u32 memtype; /* which memory (EDC0, EDC1, MC) */
240 u32 start; /* start of log in firmware memory */
241 u32 size; /* size of log */
244 struct adapter_params {
246 struct vpd_params vpd;
247 struct pci_params pci;
248 struct devlog_params devlog;
250 unsigned int sf_size; /* serial flash size in bytes */
251 unsigned int sf_nsec; /* # of flash sectors */
253 unsigned int fw_vers;
254 unsigned int tp_vers;
256 unsigned short mtus[NMTUS];
257 unsigned short a_wnd[NCCTRL_WIN];
258 unsigned short b_wnd[NCCTRL_WIN];
260 unsigned int mc_size; /* MC memory size */
261 unsigned int nfilters; /* size of filter region */
263 unsigned int cim_la_size;
265 /* Used as int in sysctls, do not reduce size */
266 unsigned int nports; /* # of ethernet ports */
267 unsigned int portvec;
268 unsigned int rev; /* chip revision */
269 unsigned int offload;
271 unsigned int ofldq_wr_cred;
274 enum { /* chip revisions */
278 struct trace_params {
279 u32 data[TRACE_LEN / 4];
280 u32 mask[TRACE_LEN / 4];
281 unsigned short snap_len;
282 unsigned short min_len;
283 unsigned char skip_ofst;
284 unsigned char skip_len;
285 unsigned char invert;
290 unsigned short supported; /* link capabilities */
291 unsigned short advertising; /* advertised capabilities */
292 unsigned short requested_speed; /* speed user has requested */
293 unsigned short speed; /* actual link speed */
294 unsigned char requested_fc; /* flow control user has requested */
295 unsigned char fc; /* actual link flow control */
296 unsigned char autoneg; /* autonegotiating? */
297 unsigned char link_ok; /* link up? */
302 #ifndef PCI_VENDOR_ID_CHELSIO
303 # define PCI_VENDOR_ID_CHELSIO 0x1425
306 #define for_each_port(adapter, iter) \
307 for (iter = 0; iter < (adapter)->params.nports; ++iter)
309 static inline int is_offload(const struct adapter *adap)
311 return adap->params.offload;
314 static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
316 return adap->params.vpd.cclk / 1000;
319 static inline unsigned int us_to_core_ticks(const struct adapter *adap,
322 return (us * adap->params.vpd.cclk) / 1000;
325 static inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
328 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
331 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
332 int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, int polarity,
333 int attempts, int delay, u32 *valp);
335 static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask,
336 int polarity, int attempts, int delay)
338 return t4_wait_op_done_val(adapter, reg, mask, polarity, attempts,
342 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
343 void *rpl, bool sleep_ok);
345 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
348 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
351 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
354 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
357 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
358 unsigned int data_reg, u32 *vals, unsigned int nregs,
359 unsigned int start_idx);
360 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
361 unsigned int data_reg, const u32 *vals,
362 unsigned int nregs, unsigned int start_idx);
364 u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg);
368 void t4_intr_enable(struct adapter *adapter);
369 void t4_intr_disable(struct adapter *adapter);
370 void t4_intr_clear(struct adapter *adapter);
371 int t4_slow_intr_handler(struct adapter *adapter);
373 int t4_hash_mac_addr(const u8 *addr);
374 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
375 struct link_config *lc);
376 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
377 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
378 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
379 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz);
380 int t4_seeprom_wp(struct adapter *adapter, int enable);
381 int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords,
382 u32 *data, int byte_oriented);
383 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
384 int t4_load_boot(struct adapter *adap, u8 *boot_data,
385 unsigned int boot_addr, unsigned int size);
386 unsigned int t4_flash_cfg_addr(struct adapter *adapter);
387 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
388 int t4_get_fw_version(struct adapter *adapter, u32 *vers);
389 int t4_get_tp_version(struct adapter *adapter, u32 *vers);
390 int t4_check_fw_version(struct adapter *adapter);
391 int t4_init_hw(struct adapter *adapter, u32 fw_params);
392 int t4_prep_adapter(struct adapter *adapter);
393 int t4_port_init(struct port_info *p, int mbox, int pf, int vf);
394 int t4_reinit_adapter(struct adapter *adap);
395 void t4_fatal_err(struct adapter *adapter);
396 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
397 int filter_index, int enable);
398 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
399 int filter_index, int *enabled);
400 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
401 int start, int n, const u16 *rspq, unsigned int nrspq);
402 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
404 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
405 unsigned int flags, unsigned int defq);
406 int t4_read_rss(struct adapter *adapter, u16 *entries);
407 void t4_read_rss_key(struct adapter *adapter, u32 *key);
408 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx);
409 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp);
410 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val);
411 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
413 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index,
415 u32 t4_read_rss_pf_map(struct adapter *adapter);
416 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap);
417 u32 t4_read_rss_pf_mask(struct adapter *adapter);
418 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask);
419 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
420 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
421 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
422 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres);
423 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
424 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
425 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n,
427 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n,
428 const unsigned int *valp);
429 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n,
431 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);
432 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
433 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr);
434 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
435 int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
436 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity);
437 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
440 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
441 void t4_get_port_stats_offset(struct adapter *adap, int idx,
442 struct port_stats *stats,
443 struct port_stats *offset);
444 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
445 void t4_clr_port_stats(struct adapter *adap, int idx);
447 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
448 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]);
449 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
450 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps,
452 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
453 unsigned int mask, unsigned int val);
454 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
455 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st);
456 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st);
457 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st);
458 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st);
459 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st);
460 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
461 struct tp_tcp_stats *v6);
462 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
463 struct tp_fcoe_stats *st);
464 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
465 const unsigned short *alpha, const unsigned short *beta);
467 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
469 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps);
470 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg);
471 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals,
472 unsigned int start, unsigned int n);
473 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate);
474 int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map);
475 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid);
477 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr);
478 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
479 u64 mask0, u64 mask1, unsigned int crc, bool enable);
481 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
482 enum dev_master master, enum dev_state *state);
483 int t4_fw_bye(struct adapter *adap, unsigned int mbox);
484 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
485 int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force);
486 int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset);
487 int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
488 const u8 *fw_data, unsigned int size, int force);
489 int t4_fw_initialize(struct adapter *adap, unsigned int mbox);
490 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
491 unsigned int vf, unsigned int nparams, const u32 *params,
493 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
494 unsigned int vf, unsigned int nparams, const u32 *params,
496 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
497 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
498 unsigned int rxqi, unsigned int rxq, unsigned int tc,
499 unsigned int vi, unsigned int cmask, unsigned int pmask,
500 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps);
501 int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,
502 unsigned int port, unsigned int pf, unsigned int vf,
503 unsigned int nmac, u8 *mac, unsigned int *rss_size,
504 unsigned int portfunc, unsigned int idstype);
505 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
506 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
507 unsigned int *rss_size);
508 int t4_free_vi(struct adapter *adap, unsigned int mbox,
509 unsigned int pf, unsigned int vf,
511 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
512 int mtu, int promisc, int all_multi, int bcast, int vlanex,
514 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid,
515 bool free, unsigned int naddr, const u8 **addr, u16 *idx,
516 u64 *hash, bool sleep_ok);
517 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
518 int idx, const u8 *addr, bool persist, bool add_smt);
519 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
520 bool ucast, u64 vec, bool sleep_ok);
521 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
522 bool rx_en, bool tx_en);
523 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
524 unsigned int nblinks);
525 int t4_i2c_rd(struct adapter *adap, unsigned int mbox, unsigned int port_id,
526 u8 dev_addr, u8 offset, u8 *valp);
527 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
528 unsigned int mmd, unsigned int reg, unsigned int *valp);
529 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
530 unsigned int mmd, unsigned int reg, unsigned int val);
531 int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start,
532 unsigned int pf, unsigned int vf, unsigned int iqid,
533 unsigned int fl0id, unsigned int fl1id);
534 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
535 unsigned int vf, unsigned int iqtype, unsigned int iqid,
536 unsigned int fl0id, unsigned int fl1id);
537 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
538 unsigned int vf, unsigned int eqid);
539 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
540 unsigned int vf, unsigned int eqid);
541 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
542 unsigned int vf, unsigned int eqid);
543 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
544 enum ctxt_type ctype, u32 *data);
545 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype,
547 int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox);
548 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
549 int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);
550 #endif /* __CHELSIO_COMMON_H */