2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011, 2016 Chelsio Communications, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 CPL_PASS_OPEN_REQ = 0x1,
37 CPL_PASS_ACCEPT_RPL = 0x2,
38 CPL_ACT_OPEN_REQ = 0x3,
40 CPL_SET_TCB_FIELD = 0x5,
42 CPL_CLOSE_CON_REQ = 0x8,
43 CPL_CLOSE_LISTSRV_REQ = 0x9,
47 CPL_RX_DATA_ACK = 0xD,
49 CPL_RTE_DELETE_REQ = 0xF,
50 CPL_RTE_WRITE_REQ = 0x10,
51 CPL_RTE_READ_REQ = 0x11,
52 CPL_L2T_WRITE_REQ = 0x12,
53 CPL_L2T_READ_REQ = 0x13,
54 CPL_SMT_WRITE_REQ = 0x14,
55 CPL_SMT_READ_REQ = 0x15,
56 CPL_TAG_WRITE_REQ = 0x16,
58 CPL_TID_RELEASE = 0x1A,
59 CPL_TAG_READ_REQ = 0x1B,
60 CPL_SRQ_TABLE_REQ = 0x1C,
61 CPL_TX_PKT_FSO = 0x1E,
62 CPL_TX_DATA_ISO = 0x1F,
64 CPL_CLOSE_LISTSRV_RPL = 0x20,
66 CPL_GET_TCB_RPL = 0x22,
67 CPL_L2T_WRITE_RPL = 0x23,
68 CPL_PASS_OPEN_RPL = 0x24,
69 CPL_ACT_OPEN_RPL = 0x25,
70 CPL_PEER_CLOSE = 0x26,
71 CPL_RTE_DELETE_RPL = 0x27,
72 CPL_RTE_WRITE_RPL = 0x28,
73 CPL_RX_URG_PKT = 0x29,
74 CPL_TAG_WRITE_RPL = 0x2A,
75 CPL_ABORT_REQ_RSS = 0x2B,
76 CPL_RX_URG_NOTIFY = 0x2C,
77 CPL_ABORT_RPL_RSS = 0x2D,
78 CPL_SMT_WRITE_RPL = 0x2E,
79 CPL_TX_DATA_ACK = 0x2F,
81 CPL_RX_PHYS_ADDR = 0x30,
82 CPL_PCMD_READ_RPL = 0x31,
83 CPL_CLOSE_CON_RPL = 0x32,
85 CPL_L2T_READ_RPL = 0x34,
87 CPL_RDMA_CQE_READ_RSP = 0x36,
88 CPL_RDMA_CQE_ERR = 0x37,
89 CPL_RTE_READ_RPL = 0x38,
91 CPL_SET_TCB_RPL = 0x3A,
93 CPL_TAG_READ_RPL = 0x3C,
94 CPL_HIT_NOTIFY = 0x3D,
95 CPL_PKT_NOTIFY = 0x3E,
96 CPL_RX_DDP_COMPLETE = 0x3F,
98 CPL_ACT_ESTABLISH = 0x40,
99 CPL_PASS_ESTABLISH = 0x41,
100 CPL_RX_DATA_DDP = 0x42,
101 CPL_SMT_READ_RPL = 0x43,
102 CPL_PASS_ACCEPT_REQ = 0x44,
103 CPL_RX_ISCSI_CMP = 0x45,
104 CPL_RX_FCOE_DDP = 0x46,
106 CPL_T5_TRACE_PKT = 0x48,
107 CPL_RX_ISCSI_DDP = 0x49,
108 CPL_RX_FCOE_DIF = 0x4A,
109 CPL_RX_DATA_DIF = 0x4B,
110 CPL_ERR_NOTIFY = 0x4D,
111 CPL_RX_TLS_CMP = 0x4E,
113 CPL_RDMA_READ_REQ = 0x60,
114 CPL_RX_ISCSI_DIF = 0x60,
116 CPL_SET_LE_REQ = 0x80,
117 CPL_PASS_OPEN_REQ6 = 0x81,
118 CPL_ACT_OPEN_REQ6 = 0x83,
119 CPL_TX_TLS_PDU = 0x88,
120 CPL_TX_TLS_SFO = 0x89,
122 CPL_TX_SEC_PDU = 0x8A,
123 CPL_TX_TLS_ACK = 0x8B,
125 CPL_RDMA_TERMINATE = 0xA2,
126 CPL_RDMA_WRITE = 0xA4,
127 CPL_SGE_EGR_UPDATE = 0xA5,
128 CPL_SET_LE_RPL = 0xA6,
131 CPL_T5_RDMA_READ_REQ = 0xA9,
132 CPL_RDMA_ATOMIC_REQ = 0xAA,
133 CPL_RDMA_ATOMIC_RPL = 0xAB,
134 CPL_RDMA_IMM_DATA = 0xAC,
135 CPL_RDMA_IMM_DATA_SE = 0xAD,
136 CPL_RX_MPS_PKT = 0xAF,
138 CPL_TRACE_PKT = 0xB0,
139 CPL_RX2TX_DATA = 0xB1,
141 CPL_ISCSI_DATA = 0xB2,
142 CPL_FCOE_DATA = 0xB3,
147 CPL_SRQ_TABLE_RPL = 0xCC,
148 CPL_RX_PHYS_DSGL = 0xD0,
152 CPL_TX_TNL_LSO = 0xEC,
153 CPL_TX_PKT_LSO = 0xED,
154 CPL_TX_PKT_XT = 0xEE,
156 NUM_CPL_CMDS /* must be last and previous entries must be sorted */
161 CPL_ERR_TCAM_PARITY = 1,
162 CPL_ERR_TCAM_MISS = 2,
163 CPL_ERR_TCAM_FULL = 3,
164 CPL_ERR_BAD_LENGTH = 15,
165 CPL_ERR_BAD_ROUTE = 18,
166 CPL_ERR_CONN_RESET = 20,
167 CPL_ERR_CONN_EXIST_SYNRECV = 21,
168 CPL_ERR_CONN_EXIST = 22,
169 CPL_ERR_ARP_MISS = 23,
170 CPL_ERR_BAD_SYN = 24,
171 CPL_ERR_CONN_TIMEDOUT = 30,
172 CPL_ERR_XMIT_TIMEDOUT = 31,
173 CPL_ERR_PERSIST_TIMEDOUT = 32,
174 CPL_ERR_FINWAIT2_TIMEDOUT = 33,
175 CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
176 CPL_ERR_RTX_NEG_ADVICE = 35,
177 CPL_ERR_PERSIST_NEG_ADVICE = 36,
178 CPL_ERR_KEEPALV_NEG_ADVICE = 37,
179 CPL_ERR_WAIT_ARP_RPL = 41,
180 CPL_ERR_ABORT_FAILED = 42,
181 CPL_ERR_IWARP_FLM = 50,
182 CPL_CONTAINS_READ_RPL = 60,
183 CPL_CONTAINS_WRITE_RPL = 61,
187 * Some of the error codes above implicitly indicate that there is no TID
188 * allocated with the result of an ACT_OPEN. We use this predicate to make
191 static inline int act_open_has_tid(int status)
193 return (status != CPL_ERR_TCAM_PARITY &&
194 status != CPL_ERR_TCAM_MISS &&
195 status != CPL_ERR_TCAM_FULL &&
196 status != CPL_ERR_CONN_EXIST_SYNRECV &&
197 status != CPL_ERR_CONN_EXIST);
201 * Convert an ACT_OPEN_RPL status to an errno.
204 act_open_rpl_status_to_errno(int status)
208 case CPL_ERR_CONN_RESET:
209 return (ECONNREFUSED);
210 case CPL_ERR_ARP_MISS:
211 return (EHOSTUNREACH);
212 case CPL_ERR_CONN_TIMEDOUT:
214 case CPL_ERR_TCAM_FULL:
216 case CPL_ERR_CONN_EXIST:
225 CPL_CONN_POLICY_AUTO = 0,
226 CPL_CONN_POLICY_ASK = 1,
227 CPL_CONN_POLICY_FILTER = 2,
228 CPL_CONN_POLICY_DENY = 3
241 ULP_CRC_HEADER = 1 << 0,
242 ULP_CRC_DATA = 1 << 1
246 CPL_PASS_OPEN_ACCEPT,
247 CPL_PASS_OPEN_REJECT,
248 CPL_PASS_OPEN_ACCEPT_TNL
252 CPL_ABORT_SEND_RST = 0,
256 enum { /* TX_PKT_XT checksum types */
270 enum { /* packet type in CPL_RX_PKT */
271 PKTYPE_XACT_UCAST = 0,
272 PKTYPE_HASH_UCAST = 1,
273 PKTYPE_XACT_MCAST = 2,
274 PKTYPE_HASH_MCAST = 3,
280 enum { /* DMAC type in CPL_RX_PKT */
286 enum { /* TCP congestion control algorithms */
293 enum { /* RSS hash type */
294 RSS_HASH_NONE = 0, /* no hash computed */
295 RSS_HASH_IP = 1, /* IP or IPv6 2-tuple hash */
296 RSS_HASH_TCP = 2, /* TCP 4-tuple hash */
297 RSS_HASH_UDP = 3 /* UDP 4-tuple hash */
300 enum { /* LE commands */
305 enum { /* LE request size */
319 #define S_CPL_OPCODE 24
320 #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE)
321 #define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & 0xFF)
322 #define G_TID(x) ((x) & 0xFFFFFF)
324 /* tid is assumed to be 24-bits */
325 #define MK_OPCODE_TID(opcode, tid) (V_CPL_OPCODE(opcode) | (tid))
327 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
329 /* extract the TID from a CPL command */
330 #define GET_TID(cmd) (G_TID(ntohl(OPCODE_TID(cmd))))
331 #define GET_OPCODE(cmd) ((cmd)->ot.opcode)
333 /* partitioning of TID fields that also carry a queue id */
335 #define M_TID_TID 0x7ff
336 #define V_TID_TID(x) ((x) << S_TID_TID)
337 #define G_TID_TID(x) (((x) >> S_TID_TID) & M_TID_TID)
339 #define S_TID_COOKIE 11
340 #define M_TID_COOKIE 0x7
341 #define V_TID_COOKIE(x) ((x) << S_TID_COOKIE)
342 #define G_TID_COOKIE(x) (((x) >> S_TID_COOKIE) & M_TID_COOKIE)
345 #define M_TID_QID 0x3ff
346 #define V_TID_QID(x) ((x) << S_TID_QID)
347 #define G_TID_QID(x) (((x) >> S_TID_QID) & M_TID_QID)
357 #if defined(__LITTLE_ENDIAN_BITFIELD)
374 #if defined(__LITTLE_ENDIAN_BITFIELD)
393 #define S_HASHTYPE 20
394 #define M_HASHTYPE 0x3
395 #define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE)
398 #define M_QNUM 0xFFFF
399 #define G_QNUM(x) (((x) >> S_QNUM) & M_QNUM)
401 #if defined(RSS_HDR_VLD) || defined(CHELSIO_FW)
402 # define RSS_HDR struct rss_header rss_hdr;
408 struct work_request_hdr {
416 #define M_WR_LEN16 0xFF
417 #define V_WR_LEN16(x) ((x) << S_WR_LEN16)
418 #define G_WR_LEN16(x) (((x) >> S_WR_LEN16) & M_WR_LEN16)
423 #define V_WR_OP(x) ((__u64)(x) << S_WR_OP)
424 #define G_WR_OP(x) (((x) >> S_WR_OP) & M_WR_OP)
426 # define WR_HDR struct work_request_hdr wr
427 # define WR_HDR_SIZE sizeof(struct work_request_hdr)
430 # define WR_HDR_SIZE 0
433 /* option 0 fields */
434 #define S_ACCEPT_MODE 0
435 #define M_ACCEPT_MODE 0x3
436 #define V_ACCEPT_MODE(x) ((x) << S_ACCEPT_MODE)
437 #define G_ACCEPT_MODE(x) (((x) >> S_ACCEPT_MODE) & M_ACCEPT_MODE)
440 #define M_TX_CHAN 0x3
441 #define V_TX_CHAN(x) ((x) << S_TX_CHAN)
442 #define G_TX_CHAN(x) (((x) >> S_TX_CHAN) & M_TX_CHAN)
445 #define V_NO_CONG(x) ((x) << S_NO_CONG)
446 #define F_NO_CONG V_NO_CONG(1U)
449 #define V_DELACK(x) ((x) << S_DELACK)
450 #define F_DELACK V_DELACK(1U)
452 #define S_INJECT_TIMER 6
453 #define V_INJECT_TIMER(x) ((x) << S_INJECT_TIMER)
454 #define F_INJECT_TIMER V_INJECT_TIMER(1U)
456 #define S_NON_OFFLOAD 7
457 #define V_NON_OFFLOAD(x) ((x) << S_NON_OFFLOAD)
458 #define F_NON_OFFLOAD V_NON_OFFLOAD(1U)
461 #define M_ULP_MODE 0xF
462 #define V_ULP_MODE(x) ((x) << S_ULP_MODE)
463 #define G_ULP_MODE(x) (((x) >> S_ULP_MODE) & M_ULP_MODE)
465 #define S_RCV_BUFSIZ 12
466 #define M_RCV_BUFSIZ 0x3FFU
467 #define V_RCV_BUFSIZ(x) ((x) << S_RCV_BUFSIZ)
468 #define G_RCV_BUFSIZ(x) (((x) >> S_RCV_BUFSIZ) & M_RCV_BUFSIZ)
472 #define V_DSCP(x) ((x) << S_DSCP)
473 #define G_DSCP(x) (((x) >> S_DSCP) & M_DSCP)
475 #define S_SMAC_SEL 28
476 #define M_SMAC_SEL 0xFF
477 #define V_SMAC_SEL(x) ((__u64)(x) << S_SMAC_SEL)
478 #define G_SMAC_SEL(x) (((x) >> S_SMAC_SEL) & M_SMAC_SEL)
481 #define M_L2T_IDX 0xFFF
482 #define V_L2T_IDX(x) ((__u64)(x) << S_L2T_IDX)
483 #define G_L2T_IDX(x) (((x) >> S_L2T_IDX) & M_L2T_IDX)
485 #define S_TCAM_BYPASS 48
486 #define V_TCAM_BYPASS(x) ((__u64)(x) << S_TCAM_BYPASS)
487 #define F_TCAM_BYPASS V_TCAM_BYPASS(1ULL)
490 #define V_NAGLE(x) ((__u64)(x) << S_NAGLE)
491 #define F_NAGLE V_NAGLE(1ULL)
493 #define S_WND_SCALE 50
494 #define M_WND_SCALE 0xF
495 #define V_WND_SCALE(x) ((__u64)(x) << S_WND_SCALE)
496 #define G_WND_SCALE(x) (((x) >> S_WND_SCALE) & M_WND_SCALE)
498 #define S_KEEP_ALIVE 54
499 #define V_KEEP_ALIVE(x) ((__u64)(x) << S_KEEP_ALIVE)
500 #define F_KEEP_ALIVE V_KEEP_ALIVE(1ULL)
504 #define V_MAX_RT(x) ((__u64)(x) << S_MAX_RT)
505 #define G_MAX_RT(x) (((x) >> S_MAX_RT) & M_MAX_RT)
507 #define S_MAX_RT_OVERRIDE 59
508 #define V_MAX_RT_OVERRIDE(x) ((__u64)(x) << S_MAX_RT_OVERRIDE)
509 #define F_MAX_RT_OVERRIDE V_MAX_RT_OVERRIDE(1ULL)
512 #define M_MSS_IDX 0xF
513 #define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX)
514 #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX)
516 /* option 1 fields */
517 #define S_SYN_RSS_ENABLE 0
518 #define V_SYN_RSS_ENABLE(x) ((x) << S_SYN_RSS_ENABLE)
519 #define F_SYN_RSS_ENABLE V_SYN_RSS_ENABLE(1U)
521 #define S_SYN_RSS_USE_HASH 1
522 #define V_SYN_RSS_USE_HASH(x) ((x) << S_SYN_RSS_USE_HASH)
523 #define F_SYN_RSS_USE_HASH V_SYN_RSS_USE_HASH(1U)
525 #define S_SYN_RSS_QUEUE 2
526 #define M_SYN_RSS_QUEUE 0x3FF
527 #define V_SYN_RSS_QUEUE(x) ((x) << S_SYN_RSS_QUEUE)
528 #define G_SYN_RSS_QUEUE(x) (((x) >> S_SYN_RSS_QUEUE) & M_SYN_RSS_QUEUE)
530 #define S_LISTEN_INTF 12
531 #define M_LISTEN_INTF 0xFF
532 #define V_LISTEN_INTF(x) ((x) << S_LISTEN_INTF)
533 #define G_LISTEN_INTF(x) (((x) >> S_LISTEN_INTF) & M_LISTEN_INTF)
535 #define S_LISTEN_FILTER 20
536 #define V_LISTEN_FILTER(x) ((x) << S_LISTEN_FILTER)
537 #define F_LISTEN_FILTER V_LISTEN_FILTER(1U)
539 #define S_SYN_DEFENSE 21
540 #define V_SYN_DEFENSE(x) ((x) << S_SYN_DEFENSE)
541 #define F_SYN_DEFENSE V_SYN_DEFENSE(1U)
543 #define S_CONN_POLICY 22
544 #define M_CONN_POLICY 0x3
545 #define V_CONN_POLICY(x) ((x) << S_CONN_POLICY)
546 #define G_CONN_POLICY(x) (((x) >> S_CONN_POLICY) & M_CONN_POLICY)
548 #define S_T5_FILT_INFO 24
549 #define M_T5_FILT_INFO 0xffffffffffULL
550 #define V_T5_FILT_INFO(x) ((x) << S_T5_FILT_INFO)
551 #define G_T5_FILT_INFO(x) (((x) >> S_T5_FILT_INFO) & M_T5_FILT_INFO)
553 #define S_FILT_INFO 28
554 #define M_FILT_INFO 0xfffffffffULL
555 #define V_FILT_INFO(x) ((x) << S_FILT_INFO)
556 #define G_FILT_INFO(x) (((x) >> S_FILT_INFO) & M_FILT_INFO)
558 /* option 2 fields */
559 #define S_RSS_QUEUE 0
560 #define M_RSS_QUEUE 0x3FF
561 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE)
562 #define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE)
564 #define S_RSS_QUEUE_VALID 10
565 #define V_RSS_QUEUE_VALID(x) ((x) << S_RSS_QUEUE_VALID)
566 #define F_RSS_QUEUE_VALID V_RSS_QUEUE_VALID(1U)
568 #define S_RX_COALESCE_VALID 11
569 #define V_RX_COALESCE_VALID(x) ((x) << S_RX_COALESCE_VALID)
570 #define F_RX_COALESCE_VALID V_RX_COALESCE_VALID(1U)
572 #define S_RX_COALESCE 12
573 #define M_RX_COALESCE 0x3
574 #define V_RX_COALESCE(x) ((x) << S_RX_COALESCE)
575 #define G_RX_COALESCE(x) (((x) >> S_RX_COALESCE) & M_RX_COALESCE)
577 #define S_CONG_CNTRL 14
578 #define M_CONG_CNTRL 0x3
579 #define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL)
580 #define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL)
584 #define V_PACE(x) ((x) << S_PACE)
585 #define G_PACE(x) (((x) >> S_PACE) & M_PACE)
587 #define S_CONG_CNTRL_VALID 18
588 #define V_CONG_CNTRL_VALID(x) ((x) << S_CONG_CNTRL_VALID)
589 #define F_CONG_CNTRL_VALID V_CONG_CNTRL_VALID(1U)
592 #define V_T5_ISS(x) ((x) << S_T5_ISS)
593 #define F_T5_ISS V_T5_ISS(1U)
595 #define S_PACE_VALID 19
596 #define V_PACE_VALID(x) ((x) << S_PACE_VALID)
597 #define F_PACE_VALID V_PACE_VALID(1U)
599 #define S_RX_FC_DISABLE 20
600 #define V_RX_FC_DISABLE(x) ((x) << S_RX_FC_DISABLE)
601 #define F_RX_FC_DISABLE V_RX_FC_DISABLE(1U)
603 #define S_RX_FC_DDP 21
604 #define V_RX_FC_DDP(x) ((x) << S_RX_FC_DDP)
605 #define F_RX_FC_DDP V_RX_FC_DDP(1U)
607 #define S_RX_FC_VALID 22
608 #define V_RX_FC_VALID(x) ((x) << S_RX_FC_VALID)
609 #define F_RX_FC_VALID V_RX_FC_VALID(1U)
611 #define S_TX_QUEUE 23
612 #define M_TX_QUEUE 0x7
613 #define V_TX_QUEUE(x) ((x) << S_TX_QUEUE)
614 #define G_TX_QUEUE(x) (((x) >> S_TX_QUEUE) & M_TX_QUEUE)
616 #define S_RX_CHANNEL 26
617 #define V_RX_CHANNEL(x) ((x) << S_RX_CHANNEL)
618 #define F_RX_CHANNEL V_RX_CHANNEL(1U)
620 #define S_CCTRL_ECN 27
621 #define V_CCTRL_ECN(x) ((x) << S_CCTRL_ECN)
622 #define F_CCTRL_ECN V_CCTRL_ECN(1U)
624 #define S_WND_SCALE_EN 28
625 #define V_WND_SCALE_EN(x) ((x) << S_WND_SCALE_EN)
626 #define F_WND_SCALE_EN V_WND_SCALE_EN(1U)
628 #define S_TSTAMPS_EN 29
629 #define V_TSTAMPS_EN(x) ((x) << S_TSTAMPS_EN)
630 #define F_TSTAMPS_EN V_TSTAMPS_EN(1U)
633 #define V_SACK_EN(x) ((x) << S_SACK_EN)
634 #define F_SACK_EN V_SACK_EN(1U)
636 #define S_T5_OPT_2_VALID 31
637 #define V_T5_OPT_2_VALID(x) ((x) << S_T5_OPT_2_VALID)
638 #define F_T5_OPT_2_VALID V_T5_OPT_2_VALID(1U)
640 struct cpl_pass_open_req {
651 struct cpl_pass_open_req6 {
664 struct cpl_pass_open_rpl {
671 struct cpl_pass_establish {
682 /* cpl_pass_establish.tos_stid fields */
683 #define S_PASS_OPEN_TID 0
684 #define M_PASS_OPEN_TID 0xFFFFFF
685 #define V_PASS_OPEN_TID(x) ((x) << S_PASS_OPEN_TID)
686 #define G_PASS_OPEN_TID(x) (((x) >> S_PASS_OPEN_TID) & M_PASS_OPEN_TID)
688 #define S_PASS_OPEN_TOS 24
689 #define M_PASS_OPEN_TOS 0xFF
690 #define V_PASS_OPEN_TOS(x) ((x) << S_PASS_OPEN_TOS)
691 #define G_PASS_OPEN_TOS(x) (((x) >> S_PASS_OPEN_TOS) & M_PASS_OPEN_TOS)
693 /* cpl_pass_establish.tcp_opt fields (also applies to act_open_establish) */
694 #define S_TCPOPT_WSCALE_OK 5
695 #define M_TCPOPT_WSCALE_OK 0x1
696 #define V_TCPOPT_WSCALE_OK(x) ((x) << S_TCPOPT_WSCALE_OK)
697 #define G_TCPOPT_WSCALE_OK(x) (((x) >> S_TCPOPT_WSCALE_OK) & M_TCPOPT_WSCALE_OK)
699 #define S_TCPOPT_SACK 6
700 #define M_TCPOPT_SACK 0x1
701 #define V_TCPOPT_SACK(x) ((x) << S_TCPOPT_SACK)
702 #define G_TCPOPT_SACK(x) (((x) >> S_TCPOPT_SACK) & M_TCPOPT_SACK)
704 #define S_TCPOPT_TSTAMP 7
705 #define M_TCPOPT_TSTAMP 0x1
706 #define V_TCPOPT_TSTAMP(x) ((x) << S_TCPOPT_TSTAMP)
707 #define G_TCPOPT_TSTAMP(x) (((x) >> S_TCPOPT_TSTAMP) & M_TCPOPT_TSTAMP)
709 #define S_TCPOPT_SND_WSCALE 8
710 #define M_TCPOPT_SND_WSCALE 0xF
711 #define V_TCPOPT_SND_WSCALE(x) ((x) << S_TCPOPT_SND_WSCALE)
712 #define G_TCPOPT_SND_WSCALE(x) (((x) >> S_TCPOPT_SND_WSCALE) & M_TCPOPT_SND_WSCALE)
714 #define S_TCPOPT_MSS 12
715 #define M_TCPOPT_MSS 0xF
716 #define V_TCPOPT_MSS(x) ((x) << S_TCPOPT_MSS)
717 #define G_TCPOPT_MSS(x) (((x) >> S_TCPOPT_MSS) & M_TCPOPT_MSS)
719 struct cpl_pass_accept_req {
728 struct tcp_options tcpopt;
731 /* cpl_pass_accept_req.hdr_len fields */
732 #define S_SYN_RX_CHAN 0
733 #define M_SYN_RX_CHAN 0xF
734 #define V_SYN_RX_CHAN(x) ((x) << S_SYN_RX_CHAN)
735 #define G_SYN_RX_CHAN(x) (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN)
737 #define S_TCP_HDR_LEN 10
738 #define M_TCP_HDR_LEN 0x3F
739 #define V_TCP_HDR_LEN(x) ((x) << S_TCP_HDR_LEN)
740 #define G_TCP_HDR_LEN(x) (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN)
742 #define S_T6_TCP_HDR_LEN 8
743 #define V_T6_TCP_HDR_LEN(x) ((x) << S_T6_TCP_HDR_LEN)
744 #define G_T6_TCP_HDR_LEN(x) (((x) >> S_T6_TCP_HDR_LEN) & M_TCP_HDR_LEN)
746 #define S_IP_HDR_LEN 16
747 #define M_IP_HDR_LEN 0x3FF
748 #define V_IP_HDR_LEN(x) ((x) << S_IP_HDR_LEN)
749 #define G_IP_HDR_LEN(x) (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN)
751 #define S_T6_IP_HDR_LEN 14
752 #define V_T6_IP_HDR_LEN(x) ((x) << S_T6_IP_HDR_LEN)
753 #define G_T6_IP_HDR_LEN(x) (((x) >> S_T6_IP_HDR_LEN) & M_IP_HDR_LEN)
755 #define S_ETH_HDR_LEN 26
756 #define M_ETH_HDR_LEN 0x3F
757 #define V_ETH_HDR_LEN(x) ((x) << S_ETH_HDR_LEN)
758 #define G_ETH_HDR_LEN(x) (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN)
760 #define S_T6_ETH_HDR_LEN 24
761 #define M_T6_ETH_HDR_LEN 0xFF
762 #define V_T6_ETH_HDR_LEN(x) ((x) << S_T6_ETH_HDR_LEN)
763 #define G_T6_ETH_HDR_LEN(x) (((x) >> S_T6_ETH_HDR_LEN) & M_T6_ETH_HDR_LEN)
765 /* cpl_pass_accept_req.l2info fields */
766 #define S_SYN_MAC_IDX 0
767 #define M_SYN_MAC_IDX 0x1FF
768 #define V_SYN_MAC_IDX(x) ((x) << S_SYN_MAC_IDX)
769 #define G_SYN_MAC_IDX(x) (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX)
771 #define S_SYN_XACT_MATCH 9
772 #define V_SYN_XACT_MATCH(x) ((x) << S_SYN_XACT_MATCH)
773 #define F_SYN_XACT_MATCH V_SYN_XACT_MATCH(1U)
775 #define S_SYN_INTF 12
776 #define M_SYN_INTF 0xF
777 #define V_SYN_INTF(x) ((x) << S_SYN_INTF)
778 #define G_SYN_INTF(x) (((x) >> S_SYN_INTF) & M_SYN_INTF)
780 struct cpl_pass_accept_rpl {
787 struct cpl_t5_pass_accept_rpl {
794 __be32 rsvd; /* T5 */
795 __be32 opt3; /* T6 */
799 struct cpl_act_open_req {
811 #define S_FILTER_TUPLE 24
812 #define M_FILTER_TUPLE 0xFFFFFFFFFF
813 #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE)
814 #define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE)
815 struct cpl_t5_act_open_req {
828 struct cpl_t6_act_open_req {
843 /* cpl_{t5,t6}_act_open_req.params field */
844 #define S_AOPEN_FCOEMASK 0
845 #define V_AOPEN_FCOEMASK(x) ((x) << S_AOPEN_FCOEMASK)
846 #define F_AOPEN_FCOEMASK V_AOPEN_FCOEMASK(1U)
848 struct cpl_act_open_req6 {
862 struct cpl_t5_act_open_req6 {
877 struct cpl_t6_act_open_req6 {
894 struct cpl_act_open_rpl {
900 /* cpl_act_open_rpl.atid_status fields */
901 #define S_AOPEN_STATUS 0
902 #define M_AOPEN_STATUS 0xFF
903 #define V_AOPEN_STATUS(x) ((x) << S_AOPEN_STATUS)
904 #define G_AOPEN_STATUS(x) (((x) >> S_AOPEN_STATUS) & M_AOPEN_STATUS)
906 #define S_AOPEN_ATID 8
907 #define M_AOPEN_ATID 0xFFFFFF
908 #define V_AOPEN_ATID(x) ((x) << S_AOPEN_ATID)
909 #define G_AOPEN_ATID(x) (((x) >> S_AOPEN_ATID) & M_AOPEN_ATID)
911 struct cpl_act_establish {
930 /* cpl_get_tcb.reply_ctrl fields */
932 #define M_QUEUENO 0x3FF
933 #define V_QUEUENO(x) ((x) << S_QUEUENO)
934 #define G_QUEUENO(x) (((x) >> S_QUEUENO) & M_QUEUENO)
936 #define S_REPLY_CHAN 14
937 #define V_REPLY_CHAN(x) ((x) << S_REPLY_CHAN)
938 #define F_REPLY_CHAN V_REPLY_CHAN(1U)
940 #define S_NO_REPLY 15
941 #define V_NO_REPLY(x) ((x) << S_NO_REPLY)
942 #define F_NO_REPLY V_NO_REPLY(1U)
944 struct cpl_get_tcb_rpl {
959 struct cpl_set_tcb_field {
968 struct cpl_set_tcb_field_core {
976 /* cpl_set_tcb_field.word_cookie fields */
979 #define V_WORD(x) ((x) << S_WORD)
980 #define G_WORD(x) (((x) >> S_WORD) & M_WORD)
984 #define V_COOKIE(x) ((x) << S_COOKIE)
985 #define G_COOKIE(x) (((x) >> S_COOKIE) & M_COOKIE)
987 struct cpl_set_tcb_rpl {
996 struct cpl_close_con_req {
1002 struct cpl_close_con_rpl {
1004 union opcode_tid ot;
1011 struct cpl_close_listsvr_req {
1013 union opcode_tid ot;
1018 /* additional cpl_close_listsvr_req.reply_ctrl field */
1019 #define S_LISTSVR_IPV6 14
1020 #define V_LISTSVR_IPV6(x) ((x) << S_LISTSVR_IPV6)
1021 #define F_LISTSVR_IPV6 V_LISTSVR_IPV6(1U)
1023 struct cpl_close_listsvr_rpl {
1025 union opcode_tid ot;
1030 struct cpl_abort_req_rss {
1032 union opcode_tid ot;
1037 struct cpl_abort_req_rss6 {
1039 union opcode_tid ot;
1040 __u32 srqidx_status;
1043 #define S_ABORT_RSS_STATUS 0
1044 #define M_ABORT_RSS_STATUS 0xff
1045 #define V_ABORT_RSS_STATUS(x) ((x) << S_ABORT_RSS_STATUS)
1046 #define G_ABORT_RSS_STATUS(x) (((x) >> S_ABORT_RSS_STATUS) & M_ABORT_RSS_STATUS)
1048 #define S_ABORT_RSS_SRQIDX 8
1049 #define M_ABORT_RSS_SRQIDX 0xffffff
1050 #define V_ABORT_RSS_SRQIDX(x) ((x) << S_ABORT_RSS_SRQIDX)
1051 #define G_ABORT_RSS_SRQIDX(x) (((x) >> S_ABORT_RSS_SRQIDX) & M_ABORT_RSS_SRQIDX)
1054 /* cpl_abort_req status command code in case of T6,
1055 * bit[0] specifies whether to send RST (0) to remote peer or suppress it (1)
1056 * bit[1] indicates ABORT_REQ was sent after a CLOSE_CON_REQ
1057 * bit[2] specifies whether to disable the mmgr (1) or not (0)
1059 struct cpl_abort_req {
1061 union opcode_tid ot;
1068 struct cpl_abort_req_core {
1069 union opcode_tid ot;
1076 struct cpl_abort_rpl_rss {
1078 union opcode_tid ot;
1083 struct cpl_abort_rpl_rss6 {
1085 union opcode_tid ot;
1086 __u32 srqidx_status;
1089 struct cpl_abort_rpl {
1091 union opcode_tid ot;
1098 struct cpl_abort_rpl_core {
1099 union opcode_tid ot;
1106 struct cpl_peer_close {
1108 union opcode_tid ot;
1112 struct cpl_tid_release {
1114 union opcode_tid ot;
1127 /* tx_data_wr.flags fields */
1128 #define S_TX_ACK_PAGES 21
1129 #define M_TX_ACK_PAGES 0x7
1130 #define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES)
1131 #define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES)
1133 /* tx_data_wr.param fields */
1135 #define M_TX_PORT 0x7
1136 #define V_TX_PORT(x) ((x) << S_TX_PORT)
1137 #define G_TX_PORT(x) (((x) >> S_TX_PORT) & M_TX_PORT)
1140 #define M_TX_MSS 0xF
1141 #define V_TX_MSS(x) ((x) << S_TX_MSS)
1142 #define G_TX_MSS(x) (((x) >> S_TX_MSS) & M_TX_MSS)
1145 #define M_TX_QOS 0xFF
1146 #define V_TX_QOS(x) ((x) << S_TX_QOS)
1147 #define G_TX_QOS(x) (((x) >> S_TX_QOS) & M_TX_QOS)
1149 #define S_TX_SNDBUF 16
1150 #define M_TX_SNDBUF 0xFFFF
1151 #define V_TX_SNDBUF(x) ((x) << S_TX_SNDBUF)
1152 #define G_TX_SNDBUF(x) (((x) >> S_TX_SNDBUF) & M_TX_SNDBUF)
1154 struct cpl_tx_data {
1155 union opcode_tid ot;
1161 /* cpl_tx_data.len fields */
1162 #define S_TX_DATA_MSS 16
1163 #define M_TX_DATA_MSS 0xFFFF
1164 #define V_TX_DATA_MSS(x) ((x) << S_TX_DATA_MSS)
1165 #define G_TX_DATA_MSS(x) (((x) >> S_TX_DATA_MSS) & M_TX_DATA_MSS)
1167 #define S_TX_LENGTH 0
1168 #define M_TX_LENGTH 0xFFFF
1169 #define V_TX_LENGTH(x) ((x) << S_TX_LENGTH)
1170 #define G_TX_LENGTH(x) (((x) >> S_TX_LENGTH) & M_TX_LENGTH)
1172 /* cpl_tx_data.flags fields */
1173 #define S_TX_PROXY 5
1174 #define V_TX_PROXY(x) ((x) << S_TX_PROXY)
1175 #define F_TX_PROXY V_TX_PROXY(1U)
1177 #define S_TX_ULP_SUBMODE 6
1178 #define M_TX_ULP_SUBMODE 0xF
1179 #define V_TX_ULP_SUBMODE(x) ((x) << S_TX_ULP_SUBMODE)
1180 #define G_TX_ULP_SUBMODE(x) (((x) >> S_TX_ULP_SUBMODE) & M_TX_ULP_SUBMODE)
1182 #define S_TX_ULP_MODE 10
1183 #define M_TX_ULP_MODE 0x7
1184 #define V_TX_ULP_MODE(x) ((x) << S_TX_ULP_MODE)
1185 #define G_TX_ULP_MODE(x) (((x) >> S_TX_ULP_MODE) & M_TX_ULP_MODE)
1187 #define S_TX_FORCE 13
1188 #define V_TX_FORCE(x) ((x) << S_TX_FORCE)
1189 #define F_TX_FORCE V_TX_FORCE(1U)
1191 #define S_TX_SHOVE 14
1192 #define V_TX_SHOVE(x) ((x) << S_TX_SHOVE)
1193 #define F_TX_SHOVE V_TX_SHOVE(1U)
1195 #define S_TX_MORE 15
1196 #define V_TX_MORE(x) ((x) << S_TX_MORE)
1197 #define F_TX_MORE V_TX_MORE(1U)
1200 #define V_TX_URG(x) ((x) << S_TX_URG)
1201 #define F_TX_URG V_TX_URG(1U)
1203 #define S_TX_FLUSH 17
1204 #define V_TX_FLUSH(x) ((x) << S_TX_FLUSH)
1205 #define F_TX_FLUSH V_TX_FLUSH(1U)
1207 #define S_TX_SAVE 18
1208 #define V_TX_SAVE(x) ((x) << S_TX_SAVE)
1209 #define F_TX_SAVE V_TX_SAVE(1U)
1212 #define V_TX_TNL(x) ((x) << S_TX_TNL)
1213 #define F_TX_TNL V_TX_TNL(1U)
1215 #define S_T6_TX_FORCE 20
1216 #define V_T6_TX_FORCE(x) ((x) << S_T6_TX_FORCE)
1217 #define F_T6_TX_FORCE V_T6_TX_FORCE(1U)
1219 #define S_TX_BYPASS 21
1220 #define V_TX_BYPASS(x) ((x) << S_TX_BYPASS)
1221 #define F_TX_BYPASS V_TX_BYPASS(1U)
1223 #define S_TX_PUSH 22
1224 #define V_TX_PUSH(x) ((x) << S_TX_PUSH)
1225 #define F_TX_PUSH V_TX_PUSH(1U)
1227 /* additional tx_data_wr.flags fields */
1228 #define S_TX_CPU_IDX 0
1229 #define M_TX_CPU_IDX 0x3F
1230 #define V_TX_CPU_IDX(x) ((x) << S_TX_CPU_IDX)
1231 #define G_TX_CPU_IDX(x) (((x) >> S_TX_CPU_IDX) & M_TX_CPU_IDX)
1233 #define S_TX_CLOSE 17
1234 #define V_TX_CLOSE(x) ((x) << S_TX_CLOSE)
1235 #define F_TX_CLOSE V_TX_CLOSE(1U)
1237 #define S_TX_INIT 18
1238 #define V_TX_INIT(x) ((x) << S_TX_INIT)
1239 #define F_TX_INIT V_TX_INIT(1U)
1241 #define S_TX_IMM_ACK 19
1242 #define V_TX_IMM_ACK(x) ((x) << S_TX_IMM_ACK)
1243 #define F_TX_IMM_ACK V_TX_IMM_ACK(1U)
1245 #define S_TX_IMM_DMA 20
1246 #define V_TX_IMM_DMA(x) ((x) << S_TX_IMM_DMA)
1247 #define F_TX_IMM_DMA V_TX_IMM_DMA(1U)
1249 struct cpl_tx_data_ack {
1251 union opcode_tid ot;
1255 struct cpl_wr_ack { /* XXX */
1257 union opcode_tid ot;
1264 struct cpl_tx_pkt_core {
1273 struct cpl_tx_pkt_core c;
1276 #define cpl_tx_pkt_xt cpl_tx_pkt
1278 /* cpl_tx_pkt_core.ctrl0 fields */
1279 #define S_TXPKT_VF 0
1280 #define M_TXPKT_VF 0xFF
1281 #define V_TXPKT_VF(x) ((x) << S_TXPKT_VF)
1282 #define G_TXPKT_VF(x) (((x) >> S_TXPKT_VF) & M_TXPKT_VF)
1284 #define S_TXPKT_PF 8
1285 #define M_TXPKT_PF 0x7
1286 #define V_TXPKT_PF(x) ((x) << S_TXPKT_PF)
1287 #define G_TXPKT_PF(x) (((x) >> S_TXPKT_PF) & M_TXPKT_PF)
1289 #define S_TXPKT_VF_VLD 11
1290 #define V_TXPKT_VF_VLD(x) ((x) << S_TXPKT_VF_VLD)
1291 #define F_TXPKT_VF_VLD V_TXPKT_VF_VLD(1U)
1293 #define S_TXPKT_OVLAN_IDX 12
1294 #define M_TXPKT_OVLAN_IDX 0xF
1295 #define V_TXPKT_OVLAN_IDX(x) ((x) << S_TXPKT_OVLAN_IDX)
1296 #define G_TXPKT_OVLAN_IDX(x) (((x) >> S_TXPKT_OVLAN_IDX) & M_TXPKT_OVLAN_IDX)
1298 #define S_TXPKT_T5_OVLAN_IDX 12
1299 #define M_TXPKT_T5_OVLAN_IDX 0x7
1300 #define V_TXPKT_T5_OVLAN_IDX(x) ((x) << S_TXPKT_T5_OVLAN_IDX)
1301 #define G_TXPKT_T5_OVLAN_IDX(x) (((x) >> S_TXPKT_T5_OVLAN_IDX) & \
1302 M_TXPKT_T5_OVLAN_IDX)
1304 #define S_TXPKT_INTF 16
1305 #define M_TXPKT_INTF 0xF
1306 #define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF)
1307 #define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF)
1309 #define S_TXPKT_SPECIAL_STAT 20
1310 #define V_TXPKT_SPECIAL_STAT(x) ((x) << S_TXPKT_SPECIAL_STAT)
1311 #define F_TXPKT_SPECIAL_STAT V_TXPKT_SPECIAL_STAT(1U)
1313 #define S_TXPKT_T5_FCS_DIS 21
1314 #define V_TXPKT_T5_FCS_DIS(x) ((x) << S_TXPKT_T5_FCS_DIS)
1315 #define F_TXPKT_T5_FCS_DIS V_TXPKT_T5_FCS_DIS(1U)
1317 #define S_TXPKT_INS_OVLAN 21
1318 #define V_TXPKT_INS_OVLAN(x) ((x) << S_TXPKT_INS_OVLAN)
1319 #define F_TXPKT_INS_OVLAN V_TXPKT_INS_OVLAN(1U)
1321 #define S_TXPKT_T5_INS_OVLAN 15
1322 #define V_TXPKT_T5_INS_OVLAN(x) ((x) << S_TXPKT_T5_INS_OVLAN)
1323 #define F_TXPKT_T5_INS_OVLAN V_TXPKT_T5_INS_OVLAN(1U)
1325 #define S_TXPKT_STAT_DIS 22
1326 #define V_TXPKT_STAT_DIS(x) ((x) << S_TXPKT_STAT_DIS)
1327 #define F_TXPKT_STAT_DIS V_TXPKT_STAT_DIS(1U)
1329 #define S_TXPKT_LOOPBACK 23
1330 #define V_TXPKT_LOOPBACK(x) ((x) << S_TXPKT_LOOPBACK)
1331 #define F_TXPKT_LOOPBACK V_TXPKT_LOOPBACK(1U)
1333 #define S_TXPKT_TSTAMP 23
1334 #define V_TXPKT_TSTAMP(x) ((x) << S_TXPKT_TSTAMP)
1335 #define F_TXPKT_TSTAMP V_TXPKT_TSTAMP(1U)
1337 #define S_TXPKT_OPCODE 24
1338 #define M_TXPKT_OPCODE 0xFF
1339 #define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE)
1340 #define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE)
1342 /* cpl_tx_pkt_core.ctrl1 fields */
1343 #define S_TXPKT_SA_IDX 0
1344 #define M_TXPKT_SA_IDX 0xFFF
1345 #define V_TXPKT_SA_IDX(x) ((x) << S_TXPKT_SA_IDX)
1346 #define G_TXPKT_SA_IDX(x) (((x) >> S_TXPKT_SA_IDX) & M_TXPKT_SA_IDX)
1348 #define S_TXPKT_CSUM_END 12
1349 #define M_TXPKT_CSUM_END 0xFF
1350 #define V_TXPKT_CSUM_END(x) ((x) << S_TXPKT_CSUM_END)
1351 #define G_TXPKT_CSUM_END(x) (((x) >> S_TXPKT_CSUM_END) & M_TXPKT_CSUM_END)
1353 #define S_TXPKT_CSUM_START 20
1354 #define M_TXPKT_CSUM_START 0x3FF
1355 #define V_TXPKT_CSUM_START(x) ((x) << S_TXPKT_CSUM_START)
1356 #define G_TXPKT_CSUM_START(x) (((x) >> S_TXPKT_CSUM_START) & M_TXPKT_CSUM_START)
1358 #define S_TXPKT_IPHDR_LEN 20
1359 #define M_TXPKT_IPHDR_LEN 0x3FFF
1360 #define V_TXPKT_IPHDR_LEN(x) ((__u64)(x) << S_TXPKT_IPHDR_LEN)
1361 #define G_TXPKT_IPHDR_LEN(x) (((x) >> S_TXPKT_IPHDR_LEN) & M_TXPKT_IPHDR_LEN)
1363 #define M_T6_TXPKT_IPHDR_LEN 0xFFF
1364 #define G_T6_TXPKT_IPHDR_LEN(x) \
1365 (((x) >> S_TXPKT_IPHDR_LEN) & M_T6_TXPKT_IPHDR_LEN)
1367 #define S_TXPKT_CSUM_LOC 30
1368 #define M_TXPKT_CSUM_LOC 0x3FF
1369 #define V_TXPKT_CSUM_LOC(x) ((__u64)(x) << S_TXPKT_CSUM_LOC)
1370 #define G_TXPKT_CSUM_LOC(x) (((x) >> S_TXPKT_CSUM_LOC) & M_TXPKT_CSUM_LOC)
1372 #define S_TXPKT_ETHHDR_LEN 34
1373 #define M_TXPKT_ETHHDR_LEN 0x3F
1374 #define V_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_TXPKT_ETHHDR_LEN)
1375 #define G_TXPKT_ETHHDR_LEN(x) (((x) >> S_TXPKT_ETHHDR_LEN) & M_TXPKT_ETHHDR_LEN)
1377 #define S_T6_TXPKT_ETHHDR_LEN 32
1378 #define M_T6_TXPKT_ETHHDR_LEN 0xFF
1379 #define V_T6_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_T6_TXPKT_ETHHDR_LEN)
1380 #define G_T6_TXPKT_ETHHDR_LEN(x) \
1381 (((x) >> S_T6_TXPKT_ETHHDR_LEN) & M_T6_TXPKT_ETHHDR_LEN)
1383 #define S_TXPKT_CSUM_TYPE 40
1384 #define M_TXPKT_CSUM_TYPE 0xF
1385 #define V_TXPKT_CSUM_TYPE(x) ((__u64)(x) << S_TXPKT_CSUM_TYPE)
1386 #define G_TXPKT_CSUM_TYPE(x) (((x) >> S_TXPKT_CSUM_TYPE) & M_TXPKT_CSUM_TYPE)
1388 #define S_TXPKT_VLAN 44
1389 #define M_TXPKT_VLAN 0xFFFF
1390 #define V_TXPKT_VLAN(x) ((__u64)(x) << S_TXPKT_VLAN)
1391 #define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN)
1393 #define S_TXPKT_VLAN_VLD 60
1394 #define V_TXPKT_VLAN_VLD(x) ((__u64)(x) << S_TXPKT_VLAN_VLD)
1395 #define F_TXPKT_VLAN_VLD V_TXPKT_VLAN_VLD(1ULL)
1397 #define S_TXPKT_IPSEC 61
1398 #define V_TXPKT_IPSEC(x) ((__u64)(x) << S_TXPKT_IPSEC)
1399 #define F_TXPKT_IPSEC V_TXPKT_IPSEC(1ULL)
1401 #define S_TXPKT_IPCSUM_DIS 62
1402 #define V_TXPKT_IPCSUM_DIS(x) ((__u64)(x) << S_TXPKT_IPCSUM_DIS)
1403 #define F_TXPKT_IPCSUM_DIS V_TXPKT_IPCSUM_DIS(1ULL)
1405 #define S_TXPKT_L4CSUM_DIS 63
1406 #define V_TXPKT_L4CSUM_DIS(x) ((__u64)(x) << S_TXPKT_L4CSUM_DIS)
1407 #define F_TXPKT_L4CSUM_DIS V_TXPKT_L4CSUM_DIS(1ULL)
1409 struct cpl_tx_pkt_lso_core {
1413 __be32 seqno_offset;
1415 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1418 struct cpl_tx_pkt_lso {
1420 struct cpl_tx_pkt_lso_core c;
1421 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1424 struct cpl_tx_pkt_ufo_core {
1431 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1434 struct cpl_tx_pkt_ufo {
1436 struct cpl_tx_pkt_ufo_core c;
1437 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1440 /* cpl_tx_pkt_lso_core.lso_ctrl fields */
1441 #define S_LSO_TCPHDR_LEN 0
1442 #define M_LSO_TCPHDR_LEN 0xF
1443 #define V_LSO_TCPHDR_LEN(x) ((x) << S_LSO_TCPHDR_LEN)
1444 #define G_LSO_TCPHDR_LEN(x) (((x) >> S_LSO_TCPHDR_LEN) & M_LSO_TCPHDR_LEN)
1446 #define S_LSO_IPHDR_LEN 4
1447 #define M_LSO_IPHDR_LEN 0xFFF
1448 #define V_LSO_IPHDR_LEN(x) ((x) << S_LSO_IPHDR_LEN)
1449 #define G_LSO_IPHDR_LEN(x) (((x) >> S_LSO_IPHDR_LEN) & M_LSO_IPHDR_LEN)
1451 #define S_LSO_ETHHDR_LEN 16
1452 #define M_LSO_ETHHDR_LEN 0xF
1453 #define V_LSO_ETHHDR_LEN(x) ((x) << S_LSO_ETHHDR_LEN)
1454 #define G_LSO_ETHHDR_LEN(x) (((x) >> S_LSO_ETHHDR_LEN) & M_LSO_ETHHDR_LEN)
1456 #define S_LSO_IPV6 20
1457 #define V_LSO_IPV6(x) ((x) << S_LSO_IPV6)
1458 #define F_LSO_IPV6 V_LSO_IPV6(1U)
1460 #define S_LSO_OFLD_ENCAP 21
1461 #define V_LSO_OFLD_ENCAP(x) ((x) << S_LSO_OFLD_ENCAP)
1462 #define F_LSO_OFLD_ENCAP V_LSO_OFLD_ENCAP(1U)
1464 #define S_LSO_LAST_SLICE 22
1465 #define V_LSO_LAST_SLICE(x) ((x) << S_LSO_LAST_SLICE)
1466 #define F_LSO_LAST_SLICE V_LSO_LAST_SLICE(1U)
1468 #define S_LSO_FIRST_SLICE 23
1469 #define V_LSO_FIRST_SLICE(x) ((x) << S_LSO_FIRST_SLICE)
1470 #define F_LSO_FIRST_SLICE V_LSO_FIRST_SLICE(1U)
1472 #define S_LSO_OPCODE 24
1473 #define M_LSO_OPCODE 0xFF
1474 #define V_LSO_OPCODE(x) ((x) << S_LSO_OPCODE)
1475 #define G_LSO_OPCODE(x) (((x) >> S_LSO_OPCODE) & M_LSO_OPCODE)
1477 #define S_LSO_T5_XFER_SIZE 0
1478 #define M_LSO_T5_XFER_SIZE 0xFFFFFFF
1479 #define V_LSO_T5_XFER_SIZE(x) ((x) << S_LSO_T5_XFER_SIZE)
1480 #define G_LSO_T5_XFER_SIZE(x) (((x) >> S_LSO_T5_XFER_SIZE) & M_LSO_T5_XFER_SIZE)
1482 /* cpl_tx_pkt_lso_core.mss fields */
1484 #define M_LSO_MSS 0x3FFF
1485 #define V_LSO_MSS(x) ((x) << S_LSO_MSS)
1486 #define G_LSO_MSS(x) (((x) >> S_LSO_MSS) & M_LSO_MSS)
1488 #define S_LSO_IPID_SPLIT 15
1489 #define V_LSO_IPID_SPLIT(x) ((x) << S_LSO_IPID_SPLIT)
1490 #define F_LSO_IPID_SPLIT V_LSO_IPID_SPLIT(1U)
1492 struct cpl_tx_pkt_fso {
1497 __be32 param_offset;
1499 /* encapsulated CPL (TX_PKT or TX_PKT_XT) follows here */
1502 /* cpl_tx_pkt_fso.fso_ctrl fields different from cpl_tx_pkt_lso.lso_ctrl */
1503 #define S_FSO_XCHG_CLASS 21
1504 #define V_FSO_XCHG_CLASS(x) ((x) << S_FSO_XCHG_CLASS)
1505 #define F_FSO_XCHG_CLASS V_FSO_XCHG_CLASS(1U)
1507 #define S_FSO_INITIATOR 20
1508 #define V_FSO_INITIATOR(x) ((x) << S_FSO_INITIATOR)
1509 #define F_FSO_INITIATOR V_FSO_INITIATOR(1U)
1511 #define S_FSO_FCHDR_LEN 12
1512 #define M_FSO_FCHDR_LEN 0xF
1513 #define V_FSO_FCHDR_LEN(x) ((x) << S_FSO_FCHDR_LEN)
1514 #define G_FSO_FCHDR_LEN(x) (((x) >> S_FSO_FCHDR_LEN) & M_FSO_FCHDR_LEN)
1516 struct cpl_iscsi_hdr_no_rss {
1517 union opcode_tid ot;
1526 struct cpl_tx_data_iso {
1533 __be32 reserved2_seglen_offset;
1534 __be32 datasn_offset;
1535 __be32 buffer_offset;
1538 /* encapsulated CPL_TX_DATA follows here */
1541 /* cpl_tx_data_iso.op_to_scsi fields */
1542 #define S_CPL_TX_DATA_ISO_OP 24
1543 #define M_CPL_TX_DATA_ISO_OP 0xff
1544 #define V_CPL_TX_DATA_ISO_OP(x) ((x) << S_CPL_TX_DATA_ISO_OP)
1545 #define G_CPL_TX_DATA_ISO_OP(x) \
1546 (((x) >> S_CPL_TX_DATA_ISO_OP) & M_CPL_TX_DATA_ISO_OP)
1548 #define S_CPL_TX_DATA_ISO_FIRST 23
1549 #define M_CPL_TX_DATA_ISO_FIRST 0x1
1550 #define V_CPL_TX_DATA_ISO_FIRST(x) ((x) << S_CPL_TX_DATA_ISO_FIRST)
1551 #define G_CPL_TX_DATA_ISO_FIRST(x) \
1552 (((x) >> S_CPL_TX_DATA_ISO_FIRST) & M_CPL_TX_DATA_ISO_FIRST)
1553 #define F_CPL_TX_DATA_ISO_FIRST V_CPL_TX_DATA_ISO_FIRST(1U)
1555 #define S_CPL_TX_DATA_ISO_LAST 22
1556 #define M_CPL_TX_DATA_ISO_LAST 0x1
1557 #define V_CPL_TX_DATA_ISO_LAST(x) ((x) << S_CPL_TX_DATA_ISO_LAST)
1558 #define G_CPL_TX_DATA_ISO_LAST(x) \
1559 (((x) >> S_CPL_TX_DATA_ISO_LAST) & M_CPL_TX_DATA_ISO_LAST)
1560 #define F_CPL_TX_DATA_ISO_LAST V_CPL_TX_DATA_ISO_LAST(1U)
1562 #define S_CPL_TX_DATA_ISO_CPLHDRLEN 21
1563 #define M_CPL_TX_DATA_ISO_CPLHDRLEN 0x1
1564 #define V_CPL_TX_DATA_ISO_CPLHDRLEN(x) ((x) << S_CPL_TX_DATA_ISO_CPLHDRLEN)
1565 #define G_CPL_TX_DATA_ISO_CPLHDRLEN(x) \
1566 (((x) >> S_CPL_TX_DATA_ISO_CPLHDRLEN) & M_CPL_TX_DATA_ISO_CPLHDRLEN)
1567 #define F_CPL_TX_DATA_ISO_CPLHDRLEN V_CPL_TX_DATA_ISO_CPLHDRLEN(1U)
1569 #define S_CPL_TX_DATA_ISO_HDRCRC 20
1570 #define M_CPL_TX_DATA_ISO_HDRCRC 0x1
1571 #define V_CPL_TX_DATA_ISO_HDRCRC(x) ((x) << S_CPL_TX_DATA_ISO_HDRCRC)
1572 #define G_CPL_TX_DATA_ISO_HDRCRC(x) \
1573 (((x) >> S_CPL_TX_DATA_ISO_HDRCRC) & M_CPL_TX_DATA_ISO_HDRCRC)
1574 #define F_CPL_TX_DATA_ISO_HDRCRC V_CPL_TX_DATA_ISO_HDRCRC(1U)
1576 #define S_CPL_TX_DATA_ISO_PLDCRC 19
1577 #define M_CPL_TX_DATA_ISO_PLDCRC 0x1
1578 #define V_CPL_TX_DATA_ISO_PLDCRC(x) ((x) << S_CPL_TX_DATA_ISO_PLDCRC)
1579 #define G_CPL_TX_DATA_ISO_PLDCRC(x) \
1580 (((x) >> S_CPL_TX_DATA_ISO_PLDCRC) & M_CPL_TX_DATA_ISO_PLDCRC)
1581 #define F_CPL_TX_DATA_ISO_PLDCRC V_CPL_TX_DATA_ISO_PLDCRC(1U)
1583 #define S_CPL_TX_DATA_ISO_IMMEDIATE 18
1584 #define M_CPL_TX_DATA_ISO_IMMEDIATE 0x1
1585 #define V_CPL_TX_DATA_ISO_IMMEDIATE(x) ((x) << S_CPL_TX_DATA_ISO_IMMEDIATE)
1586 #define G_CPL_TX_DATA_ISO_IMMEDIATE(x) \
1587 (((x) >> S_CPL_TX_DATA_ISO_IMMEDIATE) & M_CPL_TX_DATA_ISO_IMMEDIATE)
1588 #define F_CPL_TX_DATA_ISO_IMMEDIATE V_CPL_TX_DATA_ISO_IMMEDIATE(1U)
1590 #define S_CPL_TX_DATA_ISO_SCSI 16
1591 #define M_CPL_TX_DATA_ISO_SCSI 0x3
1592 #define V_CPL_TX_DATA_ISO_SCSI(x) ((x) << S_CPL_TX_DATA_ISO_SCSI)
1593 #define G_CPL_TX_DATA_ISO_SCSI(x) \
1594 (((x) >> S_CPL_TX_DATA_ISO_SCSI) & M_CPL_TX_DATA_ISO_SCSI)
1596 /* cpl_tx_data_iso.reserved2_seglen_offset fields */
1597 #define S_CPL_TX_DATA_ISO_SEGLEN_OFFSET 0
1598 #define M_CPL_TX_DATA_ISO_SEGLEN_OFFSET 0xffffff
1599 #define V_CPL_TX_DATA_ISO_SEGLEN_OFFSET(x) \
1600 ((x) << S_CPL_TX_DATA_ISO_SEGLEN_OFFSET)
1601 #define G_CPL_TX_DATA_ISO_SEGLEN_OFFSET(x) \
1602 (((x) >> S_CPL_TX_DATA_ISO_SEGLEN_OFFSET) & \
1603 M_CPL_TX_DATA_ISO_SEGLEN_OFFSET)
1605 struct cpl_iscsi_hdr {
1607 union opcode_tid ot;
1616 /* cpl_iscsi_hdr.pdu_len_ddp fields */
1617 #define S_ISCSI_PDU_LEN 0
1618 #define M_ISCSI_PDU_LEN 0x7FFF
1619 #define V_ISCSI_PDU_LEN(x) ((x) << S_ISCSI_PDU_LEN)
1620 #define G_ISCSI_PDU_LEN(x) (((x) >> S_ISCSI_PDU_LEN) & M_ISCSI_PDU_LEN)
1622 #define S_ISCSI_DDP 15
1623 #define V_ISCSI_DDP(x) ((x) << S_ISCSI_DDP)
1624 #define F_ISCSI_DDP V_ISCSI_DDP(1U)
1626 struct cpl_iscsi_data {
1628 union opcode_tid ot;
1637 struct cpl_rx_data {
1639 union opcode_tid ot;
1644 #if defined(__LITTLE_ENDIAN_BITFIELD)
1660 struct cpl_fcoe_hdr {
1662 union opcode_tid ot;
1676 /* cpl_fcoe_hdr.rctl_fctl fields */
1677 #define S_FCOE_FCHDR_RCTL 24
1678 #define M_FCOE_FCHDR_RCTL 0xff
1679 #define V_FCOE_FCHDR_RCTL(x) ((x) << S_FCOE_FCHDR_RCTL)
1680 #define G_FCOE_FCHDR_RCTL(x) \
1681 (((x) >> S_FCOE_FCHDR_RCTL) & M_FCOE_FCHDR_RCTL)
1683 #define S_FCOE_FCHDR_FCTL 0
1684 #define M_FCOE_FCHDR_FCTL 0xffffff
1685 #define V_FCOE_FCHDR_FCTL(x) ((x) << S_FCOE_FCHDR_FCTL)
1686 #define G_FCOE_FCHDR_FCTL(x) \
1687 (((x) >> S_FCOE_FCHDR_FCTL) & M_FCOE_FCHDR_FCTL)
1689 struct cpl_fcoe_data {
1691 union opcode_tid ot;
1699 struct cpl_rx_urg_notify {
1701 union opcode_tid ot;
1705 struct cpl_rx_urg_pkt {
1707 union opcode_tid ot;
1712 struct cpl_rx_data_ack {
1714 union opcode_tid ot;
1718 struct cpl_rx_data_ack_core {
1719 union opcode_tid ot;
1723 /* cpl_rx_data_ack.ack_seq fields */
1724 #define S_RX_CREDITS 0
1725 #define M_RX_CREDITS 0x3FFFFFF
1726 #define V_RX_CREDITS(x) ((x) << S_RX_CREDITS)
1727 #define G_RX_CREDITS(x) (((x) >> S_RX_CREDITS) & M_RX_CREDITS)
1729 #define S_RX_MODULATE_TX 26
1730 #define V_RX_MODULATE_TX(x) ((x) << S_RX_MODULATE_TX)
1731 #define F_RX_MODULATE_TX V_RX_MODULATE_TX(1U)
1733 #define S_RX_MODULATE_RX 27
1734 #define V_RX_MODULATE_RX(x) ((x) << S_RX_MODULATE_RX)
1735 #define F_RX_MODULATE_RX V_RX_MODULATE_RX(1U)
1737 #define S_RX_FORCE_ACK 28
1738 #define V_RX_FORCE_ACK(x) ((x) << S_RX_FORCE_ACK)
1739 #define F_RX_FORCE_ACK V_RX_FORCE_ACK(1U)
1741 #define S_RX_DACK_MODE 29
1742 #define M_RX_DACK_MODE 0x3
1743 #define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE)
1744 #define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE)
1746 #define S_RX_DACK_CHANGE 31
1747 #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE)
1748 #define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U)
1750 struct cpl_rx_ddp_complete {
1752 union opcode_tid ot;
1758 struct cpl_rx_data_ddp {
1760 union opcode_tid ot;
1772 #define cpl_rx_iscsi_ddp cpl_rx_data_ddp
1774 struct cpl_rx_fcoe_ddp {
1776 union opcode_tid ot;
1785 struct cpl_rx_data_dif {
1787 union opcode_tid ot;
1799 struct cpl_rx_iscsi_dif {
1801 union opcode_tid ot;
1816 struct cpl_rx_iscsi_cmp {
1818 union opcode_tid ot;
1829 struct cpl_rx_fcoe_dif {
1831 union opcode_tid ot;
1840 /* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddpvld fields */
1841 #define S_DDP_VALID 15
1842 #define M_DDP_VALID 0x1FFFF
1843 #define V_DDP_VALID(x) ((x) << S_DDP_VALID)
1844 #define G_DDP_VALID(x) (((x) >> S_DDP_VALID) & M_DDP_VALID)
1846 #define S_DDP_PPOD_MISMATCH 15
1847 #define V_DDP_PPOD_MISMATCH(x) ((x) << S_DDP_PPOD_MISMATCH)
1848 #define F_DDP_PPOD_MISMATCH V_DDP_PPOD_MISMATCH(1U)
1850 #define S_DDP_PDU 16
1851 #define V_DDP_PDU(x) ((x) << S_DDP_PDU)
1852 #define F_DDP_PDU V_DDP_PDU(1U)
1854 #define S_DDP_LLIMIT_ERR 17
1855 #define V_DDP_LLIMIT_ERR(x) ((x) << S_DDP_LLIMIT_ERR)
1856 #define F_DDP_LLIMIT_ERR V_DDP_LLIMIT_ERR(1U)
1858 #define S_DDP_PPOD_PARITY_ERR 18
1859 #define V_DDP_PPOD_PARITY_ERR(x) ((x) << S_DDP_PPOD_PARITY_ERR)
1860 #define F_DDP_PPOD_PARITY_ERR V_DDP_PPOD_PARITY_ERR(1U)
1862 #define S_DDP_PADDING_ERR 19
1863 #define V_DDP_PADDING_ERR(x) ((x) << S_DDP_PADDING_ERR)
1864 #define F_DDP_PADDING_ERR V_DDP_PADDING_ERR(1U)
1866 #define S_DDP_HDRCRC_ERR 20
1867 #define V_DDP_HDRCRC_ERR(x) ((x) << S_DDP_HDRCRC_ERR)
1868 #define F_DDP_HDRCRC_ERR V_DDP_HDRCRC_ERR(1U)
1870 #define S_DDP_DATACRC_ERR 21
1871 #define V_DDP_DATACRC_ERR(x) ((x) << S_DDP_DATACRC_ERR)
1872 #define F_DDP_DATACRC_ERR V_DDP_DATACRC_ERR(1U)
1874 #define S_DDP_INVALID_TAG 22
1875 #define V_DDP_INVALID_TAG(x) ((x) << S_DDP_INVALID_TAG)
1876 #define F_DDP_INVALID_TAG V_DDP_INVALID_TAG(1U)
1878 #define S_DDP_ULIMIT_ERR 23
1879 #define V_DDP_ULIMIT_ERR(x) ((x) << S_DDP_ULIMIT_ERR)
1880 #define F_DDP_ULIMIT_ERR V_DDP_ULIMIT_ERR(1U)
1882 #define S_DDP_OFFSET_ERR 24
1883 #define V_DDP_OFFSET_ERR(x) ((x) << S_DDP_OFFSET_ERR)
1884 #define F_DDP_OFFSET_ERR V_DDP_OFFSET_ERR(1U)
1886 #define S_DDP_COLOR_ERR 25
1887 #define V_DDP_COLOR_ERR(x) ((x) << S_DDP_COLOR_ERR)
1888 #define F_DDP_COLOR_ERR V_DDP_COLOR_ERR(1U)
1890 #define S_DDP_TID_MISMATCH 26
1891 #define V_DDP_TID_MISMATCH(x) ((x) << S_DDP_TID_MISMATCH)
1892 #define F_DDP_TID_MISMATCH V_DDP_TID_MISMATCH(1U)
1894 #define S_DDP_INVALID_PPOD 27
1895 #define V_DDP_INVALID_PPOD(x) ((x) << S_DDP_INVALID_PPOD)
1896 #define F_DDP_INVALID_PPOD V_DDP_INVALID_PPOD(1U)
1898 #define S_DDP_ULP_MODE 28
1899 #define M_DDP_ULP_MODE 0xF
1900 #define V_DDP_ULP_MODE(x) ((x) << S_DDP_ULP_MODE)
1901 #define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE)
1903 /* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddp_report fields */
1904 #define S_DDP_OFFSET 0
1905 #define M_DDP_OFFSET 0xFFFFFF
1906 #define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET)
1907 #define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET)
1909 #define S_DDP_DACK_MODE 24
1910 #define M_DDP_DACK_MODE 0x3
1911 #define V_DDP_DACK_MODE(x) ((x) << S_DDP_DACK_MODE)
1912 #define G_DDP_DACK_MODE(x) (((x) >> S_DDP_DACK_MODE) & M_DDP_DACK_MODE)
1914 #define S_DDP_BUF_IDX 26
1915 #define V_DDP_BUF_IDX(x) ((x) << S_DDP_BUF_IDX)
1916 #define F_DDP_BUF_IDX V_DDP_BUF_IDX(1U)
1918 #define S_DDP_URG 27
1919 #define V_DDP_URG(x) ((x) << S_DDP_URG)
1920 #define F_DDP_URG V_DDP_URG(1U)
1922 #define S_DDP_PSH 28
1923 #define V_DDP_PSH(x) ((x) << S_DDP_PSH)
1924 #define F_DDP_PSH V_DDP_PSH(1U)
1926 #define S_DDP_BUF_COMPLETE 29
1927 #define V_DDP_BUF_COMPLETE(x) ((x) << S_DDP_BUF_COMPLETE)
1928 #define F_DDP_BUF_COMPLETE V_DDP_BUF_COMPLETE(1U)
1930 #define S_DDP_BUF_TIMED_OUT 30
1931 #define V_DDP_BUF_TIMED_OUT(x) ((x) << S_DDP_BUF_TIMED_OUT)
1932 #define F_DDP_BUF_TIMED_OUT V_DDP_BUF_TIMED_OUT(1U)
1934 #define S_DDP_INV 31
1935 #define V_DDP_INV(x) ((x) << S_DDP_INV)
1936 #define F_DDP_INV V_DDP_INV(1U)
1941 #if defined(__LITTLE_ENDIAN_BITFIELD)
1962 /* rx_pkt.l2info fields */
1963 #define S_RX_ETHHDR_LEN 0
1964 #define M_RX_ETHHDR_LEN 0x1F
1965 #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN)
1966 #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN)
1968 #define S_RX_T5_ETHHDR_LEN 0
1969 #define M_RX_T5_ETHHDR_LEN 0x3F
1970 #define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN)
1971 #define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN)
1973 #define M_RX_T6_ETHHDR_LEN 0xFF
1974 #define G_RX_T6_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_T6_ETHHDR_LEN)
1976 #define S_RX_PKTYPE 5
1977 #define M_RX_PKTYPE 0x7
1978 #define V_RX_PKTYPE(x) ((x) << S_RX_PKTYPE)
1979 #define G_RX_PKTYPE(x) (((x) >> S_RX_PKTYPE) & M_RX_PKTYPE)
1981 #define S_RX_T5_DATYPE 6
1982 #define M_RX_T5_DATYPE 0x3
1983 #define V_RX_T5_DATYPE(x) ((x) << S_RX_T5_DATYPE)
1984 #define G_RX_T5_DATYPE(x) (((x) >> S_RX_T5_DATYPE) & M_RX_T5_DATYPE)
1986 #define S_RX_MACIDX 8
1987 #define M_RX_MACIDX 0x1FF
1988 #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX)
1989 #define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX)
1991 #define S_RX_T5_PKTYPE 17
1992 #define M_RX_T5_PKTYPE 0x7
1993 #define V_RX_T5_PKTYPE(x) ((x) << S_RX_T5_PKTYPE)
1994 #define G_RX_T5_PKTYPE(x) (((x) >> S_RX_T5_PKTYPE) & M_RX_T5_PKTYPE)
1996 #define S_RX_DATYPE 18
1997 #define M_RX_DATYPE 0x3
1998 #define V_RX_DATYPE(x) ((x) << S_RX_DATYPE)
1999 #define G_RX_DATYPE(x) (((x) >> S_RX_DATYPE) & M_RX_DATYPE)
2001 #define S_RXF_PSH 20
2002 #define V_RXF_PSH(x) ((x) << S_RXF_PSH)
2003 #define F_RXF_PSH V_RXF_PSH(1U)
2005 #define S_RXF_SYN 21
2006 #define V_RXF_SYN(x) ((x) << S_RXF_SYN)
2007 #define F_RXF_SYN V_RXF_SYN(1U)
2009 #define S_RXF_UDP 22
2010 #define V_RXF_UDP(x) ((x) << S_RXF_UDP)
2011 #define F_RXF_UDP V_RXF_UDP(1U)
2013 #define S_RXF_TCP 23
2014 #define V_RXF_TCP(x) ((x) << S_RXF_TCP)
2015 #define F_RXF_TCP V_RXF_TCP(1U)
2018 #define V_RXF_IP(x) ((x) << S_RXF_IP)
2019 #define F_RXF_IP V_RXF_IP(1U)
2021 #define S_RXF_IP6 25
2022 #define V_RXF_IP6(x) ((x) << S_RXF_IP6)
2023 #define F_RXF_IP6 V_RXF_IP6(1U)
2025 #define S_RXF_SYN_COOKIE 26
2026 #define V_RXF_SYN_COOKIE(x) ((x) << S_RXF_SYN_COOKIE)
2027 #define F_RXF_SYN_COOKIE V_RXF_SYN_COOKIE(1U)
2029 #define S_RXF_FCOE 26
2030 #define V_RXF_FCOE(x) ((x) << S_RXF_FCOE)
2031 #define F_RXF_FCOE V_RXF_FCOE(1U)
2033 #define S_RXF_LRO 27
2034 #define V_RXF_LRO(x) ((x) << S_RXF_LRO)
2035 #define F_RXF_LRO V_RXF_LRO(1U)
2037 #define S_RX_CHAN 28
2038 #define M_RX_CHAN 0xF
2039 #define V_RX_CHAN(x) ((x) << S_RX_CHAN)
2040 #define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN)
2042 /* rx_pkt.hdr_len fields */
2043 #define S_RX_TCPHDR_LEN 0
2044 #define M_RX_TCPHDR_LEN 0x3F
2045 #define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN)
2046 #define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN)
2048 #define S_RX_IPHDR_LEN 6
2049 #define M_RX_IPHDR_LEN 0x3FF
2050 #define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN)
2051 #define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN)
2053 /* rx_pkt.err_vec fields */
2054 #define S_RXERR_OR 0
2055 #define V_RXERR_OR(x) ((x) << S_RXERR_OR)
2056 #define F_RXERR_OR V_RXERR_OR(1U)
2058 #define S_RXERR_MAC 1
2059 #define V_RXERR_MAC(x) ((x) << S_RXERR_MAC)
2060 #define F_RXERR_MAC V_RXERR_MAC(1U)
2062 #define S_RXERR_IPVERS 2
2063 #define V_RXERR_IPVERS(x) ((x) << S_RXERR_IPVERS)
2064 #define F_RXERR_IPVERS V_RXERR_IPVERS(1U)
2066 #define S_RXERR_FRAG 3
2067 #define V_RXERR_FRAG(x) ((x) << S_RXERR_FRAG)
2068 #define F_RXERR_FRAG V_RXERR_FRAG(1U)
2070 #define S_RXERR_ATTACK 4
2071 #define V_RXERR_ATTACK(x) ((x) << S_RXERR_ATTACK)
2072 #define F_RXERR_ATTACK V_RXERR_ATTACK(1U)
2074 #define S_RXERR_ETHHDR_LEN 5
2075 #define V_RXERR_ETHHDR_LEN(x) ((x) << S_RXERR_ETHHDR_LEN)
2076 #define F_RXERR_ETHHDR_LEN V_RXERR_ETHHDR_LEN(1U)
2078 #define S_RXERR_IPHDR_LEN 6
2079 #define V_RXERR_IPHDR_LEN(x) ((x) << S_RXERR_IPHDR_LEN)
2080 #define F_RXERR_IPHDR_LEN V_RXERR_IPHDR_LEN(1U)
2082 #define S_RXERR_TCPHDR_LEN 7
2083 #define V_RXERR_TCPHDR_LEN(x) ((x) << S_RXERR_TCPHDR_LEN)
2084 #define F_RXERR_TCPHDR_LEN V_RXERR_TCPHDR_LEN(1U)
2086 #define S_RXERR_PKT_LEN 8
2087 #define V_RXERR_PKT_LEN(x) ((x) << S_RXERR_PKT_LEN)
2088 #define F_RXERR_PKT_LEN V_RXERR_PKT_LEN(1U)
2090 #define S_RXERR_TCP_OPT 9
2091 #define V_RXERR_TCP_OPT(x) ((x) << S_RXERR_TCP_OPT)
2092 #define F_RXERR_TCP_OPT V_RXERR_TCP_OPT(1U)
2094 #define S_RXERR_IPCSUM 12
2095 #define V_RXERR_IPCSUM(x) ((x) << S_RXERR_IPCSUM)
2096 #define F_RXERR_IPCSUM V_RXERR_IPCSUM(1U)
2098 #define S_RXERR_CSUM 13
2099 #define V_RXERR_CSUM(x) ((x) << S_RXERR_CSUM)
2100 #define F_RXERR_CSUM V_RXERR_CSUM(1U)
2102 #define S_RXERR_PING 14
2103 #define V_RXERR_PING(x) ((x) << S_RXERR_PING)
2104 #define F_RXERR_PING V_RXERR_PING(1U)
2106 /* In T6, rx_pkt.err_vec indicates
2107 * RxError Error vector (16b) or
2108 * Encapsulating header length (8b),
2109 * Outer encapsulation type (2b) and
2110 * compressed error vector (6b) if CRxPktEnc is
2111 * enabled in TP_OUT_CONFIG
2114 #define S_T6_COMPR_RXERR_VEC 0
2115 #define M_T6_COMPR_RXERR_VEC 0x3F
2116 #define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_VEC)
2117 #define G_T6_COMPR_RXERR_VEC(x) \
2118 (((x) >> S_T6_COMPR_RXERR_VEC) & M_T6_COMPR_RXERR_VEC)
2120 #define S_T6_COMPR_RXERR_MAC 0
2121 #define V_T6_COMPR_RXERR_MAC(x) ((x) << S_T6_COMPR_RXERR_MAC)
2122 #define F_T6_COMPR_RXERR_MAC V_T6_COMPR_RXERR_MAC(1U)
2124 /* Logical OR of RX_ERROR_PKT_LEN, RX_ERROR_TCP_HDR_LEN
2125 * RX_ERROR_IP_HDR_LEN, RX_ERROR_ETH_HDR_LEN
2127 #define S_T6_COMPR_RXERR_LEN 1
2128 #define V_T6_COMPR_RXERR_LEN(x) ((x) << S_T6_COMPR_RXERR_LEN)
2129 #define F_T6_COMPR_RXERR_LEN V_COMPR_T6_RXERR_LEN(1U)
2131 #define S_T6_COMPR_RXERR_TCP_OPT 2
2132 #define V_T6_COMPR_RXERR_TCP_OPT(x) ((x) << S_T6_COMPR_RXERR_TCP_OPT)
2133 #define F_T6_COMPR_RXERR_TCP_OPT V_T6_COMPR_RXERR_TCP_OPT(1U)
2135 #define S_T6_COMPR_RXERR_IPV6_EXT 3
2136 #define V_T6_COMPR_RXERR_IPV6_EXT(x) ((x) << S_T6_COMPR_RXERR_IPV6_EXT)
2137 #define F_T6_COMPR_RXERR_IPV6_EXT V_T6_COMPR_RXERR_IPV6_EXT(1U)
2139 /* Logical OR of RX_ERROR_CSUM, RX_ERROR_CSIP */
2140 #define S_T6_COMPR_RXERR_SUM 4
2141 #define V_T6_COMPR_RXERR_SUM(x) ((x) << S_T6_COMPR_RXERR_SUM)
2142 #define F_T6_COMPR_RXERR_SUM V_T6_COMPR_RXERR_SUM(1U)
2144 /* Logical OR of RX_ERROR_FPMA, RX_ERROR_PING_DROP,
2145 * RX_ERROR_ATTACK, RX_ERROR_FRAG,RX_ERROR_IPVERSION
2147 #define S_T6_COMPR_RXERR_MISC 5
2148 #define V_T6_COMPR_RXERR_MISC(x) ((x) << S_T6_COMPR_RXERR_MISC)
2149 #define F_T6_COMPR_RXERR_MISC V_T6_COMPR_RXERR_MISC(1U)
2151 #define S_T6_RX_TNL_TYPE 6
2152 #define M_T6_RX_TNL_TYPE 0x3
2153 #define V_T6_RX_TNL_TYPE(x) ((x) << S_T6_RX_TNL_TYPE)
2154 #define G_T6_RX_TNL_TYPE(x) (((x) >> S_T6_RX_TNL_TYPE) & M_T6_RX_TNL_TYPE)
2156 #define RX_PKT_TNL_TYPE_NVGRE 1
2157 #define RX_PKT_TNL_TYPE_VXLAN 2
2158 #define RX_PKT_TNL_TYPE_GENEVE 3
2160 #define S_T6_RX_TNLHDR_LEN 8
2161 #define M_T6_RX_TNLHDR_LEN 0xFF
2162 #define V_T6_RX_TNLHDR_LEN(x) ((x) << S_T6_RX_TNLHDR_LEN)
2163 #define G_T6_RX_TNLHDR_LEN(x) (((x) >> S_T6_RX_TNLHDR_LEN) & M_T6_RX_TNLHDR_LEN)
2165 struct cpl_trace_pkt {
2169 #if defined(__LITTLE_ENDIAN_BITFIELD)
2187 struct cpl_t5_trace_pkt {
2191 #if defined(__LITTLE_ENDIAN_BITFIELD)
2210 struct cpl_rte_delete_req {
2212 union opcode_tid ot;
2216 /* {cpl_rte_delete_req, cpl_rte_read_req}.params fields */
2217 #define S_RTE_REQ_LUT_IX 8
2218 #define M_RTE_REQ_LUT_IX 0x7FF
2219 #define V_RTE_REQ_LUT_IX(x) ((x) << S_RTE_REQ_LUT_IX)
2220 #define G_RTE_REQ_LUT_IX(x) (((x) >> S_RTE_REQ_LUT_IX) & M_RTE_REQ_LUT_IX)
2222 #define S_RTE_REQ_LUT_BASE 19
2223 #define M_RTE_REQ_LUT_BASE 0x7FF
2224 #define V_RTE_REQ_LUT_BASE(x) ((x) << S_RTE_REQ_LUT_BASE)
2225 #define G_RTE_REQ_LUT_BASE(x) (((x) >> S_RTE_REQ_LUT_BASE) & M_RTE_REQ_LUT_BASE)
2227 #define S_RTE_READ_REQ_SELECT 31
2228 #define V_RTE_READ_REQ_SELECT(x) ((x) << S_RTE_READ_REQ_SELECT)
2229 #define F_RTE_READ_REQ_SELECT V_RTE_READ_REQ_SELECT(1U)
2231 struct cpl_rte_delete_rpl {
2233 union opcode_tid ot;
2238 struct cpl_rte_write_req {
2240 union opcode_tid ot;
2248 /* cpl_rte_write_req.write_sel fields */
2249 #define S_RTE_WR_L2TIDX 31
2250 #define V_RTE_WR_L2TIDX(x) ((x) << S_RTE_WR_L2TIDX)
2251 #define F_RTE_WR_L2TIDX V_RTE_WR_L2TIDX(1U)
2253 #define S_RTE_WR_FADDR 30
2254 #define V_RTE_WR_FADDR(x) ((x) << S_RTE_WR_FADDR)
2255 #define F_RTE_WR_FADDR V_RTE_WR_FADDR(1U)
2257 /* cpl_rte_write_req.lut_params fields */
2258 #define S_RTE_WR_LUT_IX 10
2259 #define M_RTE_WR_LUT_IX 0x7FF
2260 #define V_RTE_WR_LUT_IX(x) ((x) << S_RTE_WR_LUT_IX)
2261 #define G_RTE_WR_LUT_IX(x) (((x) >> S_RTE_WR_LUT_IX) & M_RTE_WR_LUT_IX)
2263 #define S_RTE_WR_LUT_BASE 21
2264 #define M_RTE_WR_LUT_BASE 0x7FF
2265 #define V_RTE_WR_LUT_BASE(x) ((x) << S_RTE_WR_LUT_BASE)
2266 #define G_RTE_WR_LUT_BASE(x) (((x) >> S_RTE_WR_LUT_BASE) & M_RTE_WR_LUT_BASE)
2268 struct cpl_rte_write_rpl {
2270 union opcode_tid ot;
2275 struct cpl_rte_read_req {
2277 union opcode_tid ot;
2281 struct cpl_rte_read_rpl {
2283 union opcode_tid ot;
2287 #if defined(__LITTLE_ENDIAN_BITFIELD)
2297 struct cpl_l2t_write_req {
2299 union opcode_tid ot;
2306 /* cpl_l2t_write_req.params fields */
2307 #define S_L2T_W_INFO 2
2308 #define M_L2T_W_INFO 0x3F
2309 #define V_L2T_W_INFO(x) ((x) << S_L2T_W_INFO)
2310 #define G_L2T_W_INFO(x) (((x) >> S_L2T_W_INFO) & M_L2T_W_INFO)
2312 #define S_L2T_W_PORT 8
2313 #define M_L2T_W_PORT 0x3
2314 #define V_L2T_W_PORT(x) ((x) << S_L2T_W_PORT)
2315 #define G_L2T_W_PORT(x) (((x) >> S_L2T_W_PORT) & M_L2T_W_PORT)
2317 #define S_L2T_W_LPBK 10
2318 #define V_L2T_W_LPBK(x) ((x) << S_L2T_W_LPBK)
2319 #define F_L2T_W_PKBK V_L2T_W_LPBK(1U)
2321 #define S_L2T_W_ARPMISS 11
2322 #define V_L2T_W_ARPMISS(x) ((x) << S_L2T_W_ARPMISS)
2323 #define F_L2T_W_ARPMISS V_L2T_W_ARPMISS(1U)
2325 #define S_L2T_W_NOREPLY 15
2326 #define V_L2T_W_NOREPLY(x) ((x) << S_L2T_W_NOREPLY)
2327 #define F_L2T_W_NOREPLY V_L2T_W_NOREPLY(1U)
2329 #define CPL_L2T_VLAN_NONE 0xfff
2331 struct cpl_l2t_write_rpl {
2333 union opcode_tid ot;
2338 struct cpl_l2t_read_req {
2340 union opcode_tid ot;
2344 struct cpl_l2t_read_rpl {
2346 union opcode_tid ot;
2348 #if defined(__LITTLE_ENDIAN_BITFIELD)
2360 struct cpl_srq_table_req {
2362 union opcode_tid ot;
2372 struct cpl_srq_table_rpl {
2374 union opcode_tid ot;
2384 /* cpl_srq_table_{req,rpl}.params fields */
2385 #define S_SRQT_QLEN 28
2386 #define M_SRQT_QLEN 0xF
2387 #define V_SRQT_QLEN(x) ((x) << S_SRQT_QLEN)
2388 #define G_SRQT_QLEN(x) (((x) >> S_SRQT_QLEN) & M_SRQT_QLEN)
2390 #define S_SRQT_QBASE 0
2391 #define M_SRQT_QBASE 0x3FFFFFF
2392 #define V_SRQT_QBASE(x) ((x) << S_SRQT_QBASE)
2393 #define G_SRQT_QBASE(x) (((x) >> S_SRQT_QBASE) & M_SRQT_QBASE)
2395 #define S_SRQT_PDID 0
2396 #define M_SRQT_PDID 0xFF
2397 #define V_SRQT_PDID(x) ((x) << S_SRQT_PDID)
2398 #define G_SRQT_PDID(x) (((x) >> S_SRQT_PDID) & M_SRQT_PDID)
2400 #define S_SRQT_IDX 0
2401 #define M_SRQT_IDX 0xF
2402 #define V_SRQT_IDX(x) ((x) << S_SRQT_IDX)
2403 #define G_SRQT_IDX(x) (((x) >> S_SRQT_IDX) & M_SRQT_IDX)
2405 struct cpl_smt_write_req {
2407 union opcode_tid ot;
2415 struct cpl_t6_smt_write_req {
2417 union opcode_tid ot;
2426 struct cpl_smt_write_rpl {
2428 union opcode_tid ot;
2433 struct cpl_smt_read_req {
2435 union opcode_tid ot;
2439 struct cpl_smt_read_rpl {
2441 union opcode_tid ot;
2451 /* cpl_smt_{read,write}_req.params fields */
2452 #define S_SMTW_OVLAN_IDX 16
2453 #define M_SMTW_OVLAN_IDX 0xF
2454 #define V_SMTW_OVLAN_IDX(x) ((x) << S_SMTW_OVLAN_IDX)
2455 #define G_SMTW_OVLAN_IDX(x) (((x) >> S_SMTW_OVLAN_IDX) & M_SMTW_OVLAN_IDX)
2457 #define S_SMTW_IDX 20
2458 #define M_SMTW_IDX 0x7F
2459 #define V_SMTW_IDX(x) ((x) << S_SMTW_IDX)
2460 #define G_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_SMTW_IDX)
2462 #define M_T6_SMTW_IDX 0xFF
2463 #define G_T6_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_T6_SMTW_IDX)
2465 #define S_SMTW_NORPL 31
2466 #define V_SMTW_NORPL(x) ((x) << S_SMTW_NORPL)
2467 #define F_SMTW_NORPL V_SMTW_NORPL(1U)
2469 /* cpl_smt_{read,write}_req.pfvf? fields */
2471 #define M_SMTW_VF 0xFF
2472 #define V_SMTW_VF(x) ((x) << S_SMTW_VF)
2473 #define G_SMTW_VF(x) (((x) >> S_SMTW_VF) & M_SMTW_VF)
2476 #define M_SMTW_PF 0x7
2477 #define V_SMTW_PF(x) ((x) << S_SMTW_PF)
2478 #define G_SMTW_PF(x) (((x) >> S_SMTW_PF) & M_SMTW_PF)
2480 #define S_SMTW_VF_VLD 11
2481 #define V_SMTW_VF_VLD(x) ((x) << S_SMTW_VF_VLD)
2482 #define F_SMTW_VF_VLD V_SMTW_VF_VLD(1U)
2484 struct cpl_tag_write_req {
2486 union opcode_tid ot;
2491 struct cpl_tag_write_rpl {
2493 union opcode_tid ot;
2499 struct cpl_tag_read_req {
2501 union opcode_tid ot;
2505 struct cpl_tag_read_rpl {
2507 union opcode_tid ot;
2509 #if defined(__LITTLE_ENDIAN_BITFIELD)
2525 /* cpl_tag{read,write}_req.params fields */
2526 #define S_TAGW_IDX 0
2527 #define M_TAGW_IDX 0x7F
2528 #define V_TAGW_IDX(x) ((x) << S_TAGW_IDX)
2529 #define G_TAGW_IDX(x) (((x) >> S_TAGW_IDX) & M_TAGW_IDX)
2531 #define S_TAGW_LEN 20
2532 #define V_TAGW_LEN(x) ((x) << S_TAGW_LEN)
2533 #define F_TAGW_LEN V_TAGW_LEN(1U)
2535 #define S_TAGW_INS_ENABLE 23
2536 #define V_TAGW_INS_ENABLE(x) ((x) << S_TAGW_INS_ENABLE)
2537 #define F_TAGW_INS_ENABLE V_TAGW_INS_ENABLE(1U)
2539 #define S_TAGW_NORPL 31
2540 #define V_TAGW_NORPL(x) ((x) << S_TAGW_NORPL)
2541 #define F_TAGW_NORPL V_TAGW_NORPL(1U)
2543 struct cpl_barrier {
2551 /* cpl_barrier.chan_map fields */
2552 #define S_CHAN_MAP 4
2553 #define M_CHAN_MAP 0xF
2554 #define V_CHAN_MAP(x) ((x) << S_CHAN_MAP)
2555 #define G_CHAN_MAP(x) (((x) >> S_CHAN_MAP) & M_CHAN_MAP)
2559 union opcode_tid ot;
2563 struct cpl_hit_notify {
2565 union opcode_tid ot;
2571 struct cpl_pkt_notify {
2573 union opcode_tid ot;
2580 /* cpl_{hit,pkt}_notify.info fields */
2581 #define S_NTFY_MAC_IDX 0
2582 #define M_NTFY_MAC_IDX 0x1FF
2583 #define V_NTFY_MAC_IDX(x) ((x) << S_NTFY_MAC_IDX)
2584 #define G_NTFY_MAC_IDX(x) (((x) >> S_NTFY_MAC_IDX) & M_NTFY_MAC_IDX)
2586 #define S_NTFY_INTF 10
2587 #define M_NTFY_INTF 0xF
2588 #define V_NTFY_INTF(x) ((x) << S_NTFY_INTF)
2589 #define G_NTFY_INTF(x) (((x) >> S_NTFY_INTF) & M_NTFY_INTF)
2591 #define S_NTFY_TCPHDR_LEN 14
2592 #define M_NTFY_TCPHDR_LEN 0xF
2593 #define V_NTFY_TCPHDR_LEN(x) ((x) << S_NTFY_TCPHDR_LEN)
2594 #define G_NTFY_TCPHDR_LEN(x) (((x) >> S_NTFY_TCPHDR_LEN) & M_NTFY_TCPHDR_LEN)
2596 #define S_NTFY_IPHDR_LEN 18
2597 #define M_NTFY_IPHDR_LEN 0x1FF
2598 #define V_NTFY_IPHDR_LEN(x) ((x) << S_NTFY_IPHDR_LEN)
2599 #define G_NTFY_IPHDR_LEN(x) (((x) >> S_NTFY_IPHDR_LEN) & M_NTFY_IPHDR_LEN)
2601 #define S_NTFY_ETHHDR_LEN 27
2602 #define M_NTFY_ETHHDR_LEN 0x1F
2603 #define V_NTFY_ETHHDR_LEN(x) ((x) << S_NTFY_ETHHDR_LEN)
2604 #define G_NTFY_ETHHDR_LEN(x) (((x) >> S_NTFY_ETHHDR_LEN) & M_NTFY_ETHHDR_LEN)
2606 #define S_NTFY_T5_IPHDR_LEN 18
2607 #define M_NTFY_T5_IPHDR_LEN 0xFF
2608 #define V_NTFY_T5_IPHDR_LEN(x) ((x) << S_NTFY_T5_IPHDR_LEN)
2609 #define G_NTFY_T5_IPHDR_LEN(x) (((x) >> S_NTFY_T5_IPHDR_LEN) & M_NTFY_T5_IPHDR_LEN)
2611 #define S_NTFY_T5_ETHHDR_LEN 26
2612 #define M_NTFY_T5_ETHHDR_LEN 0x3F
2613 #define V_NTFY_T5_ETHHDR_LEN(x) ((x) << S_NTFY_T5_ETHHDR_LEN)
2614 #define G_NTFY_T5_ETHHDR_LEN(x) (((x) >> S_NTFY_T5_ETHHDR_LEN) & M_NTFY_T5_ETHHDR_LEN)
2616 struct cpl_rdma_terminate {
2618 union opcode_tid ot;
2623 struct cpl_set_le_req {
2625 union opcode_tid ot;
2634 /* cpl_set_le_req.reply_ctrl additional fields */
2635 #define S_LE_REQ_IP6 13
2636 #define V_LE_REQ_IP6(x) ((x) << S_LE_REQ_IP6)
2637 #define F_LE_REQ_IP6 V_LE_REQ_IP6(1U)
2639 /* cpl_set_le_req.params fields */
2641 #define M_LE_CHAN 0x3
2642 #define V_LE_CHAN(x) ((x) << S_LE_CHAN)
2643 #define G_LE_CHAN(x) (((x) >> S_LE_CHAN) & M_LE_CHAN)
2645 #define S_LE_OFFSET 5
2646 #define M_LE_OFFSET 0x7
2647 #define V_LE_OFFSET(x) ((x) << S_LE_OFFSET)
2648 #define G_LE_OFFSET(x) (((x) >> S_LE_OFFSET) & M_LE_OFFSET)
2651 #define V_LE_MORE(x) ((x) << S_LE_MORE)
2652 #define F_LE_MORE V_LE_MORE(1U)
2654 #define S_LE_REQSIZE 9
2655 #define M_LE_REQSIZE 0x7
2656 #define V_LE_REQSIZE(x) ((x) << S_LE_REQSIZE)
2657 #define G_LE_REQSIZE(x) (((x) >> S_LE_REQSIZE) & M_LE_REQSIZE)
2659 #define S_LE_REQCMD 12
2660 #define M_LE_REQCMD 0xF
2661 #define V_LE_REQCMD(x) ((x) << S_LE_REQCMD)
2662 #define G_LE_REQCMD(x) (((x) >> S_LE_REQCMD) & M_LE_REQCMD)
2664 struct cpl_set_le_rpl {
2666 union opcode_tid ot;
2672 /* cpl_set_le_rpl.info fields */
2673 #define S_LE_RSPCMD 0
2674 #define M_LE_RSPCMD 0xF
2675 #define V_LE_RSPCMD(x) ((x) << S_LE_RSPCMD)
2676 #define G_LE_RSPCMD(x) (((x) >> S_LE_RSPCMD) & M_LE_RSPCMD)
2678 #define S_LE_RSPSIZE 4
2679 #define M_LE_RSPSIZE 0x7
2680 #define V_LE_RSPSIZE(x) ((x) << S_LE_RSPSIZE)
2681 #define G_LE_RSPSIZE(x) (((x) >> S_LE_RSPSIZE) & M_LE_RSPSIZE)
2683 #define S_LE_RSPTYPE 7
2684 #define V_LE_RSPTYPE(x) ((x) << S_LE_RSPTYPE)
2685 #define F_LE_RSPTYPE V_LE_RSPTYPE(1U)
2687 struct cpl_sge_egr_update {
2694 /* cpl_sge_egr_update.ot fields */
2695 #define S_AUTOEQU 22
2696 #define M_AUTOEQU 0x1
2697 #define V_AUTOEQU(x) ((x) << S_AUTOEQU)
2698 #define G_AUTOEQU(x) (((x) >> S_AUTOEQU) & M_AUTOEQU)
2701 #define M_EGR_QID 0x1FFFF
2702 #define V_EGR_QID(x) ((x) << S_EGR_QID)
2703 #define G_EGR_QID(x) (((x) >> S_EGR_QID) & M_EGR_QID)
2705 /* cpl_fw*.type values */
2707 FW_TYPE_CMD_RPL = 0,
2710 FW_TYPE_OFLD_CONNECTION_WR_RPL = 3,
2712 FW_TYPE_WRERR_RPL = 5,
2714 FW_TYPE_TLS_KEY = 7,
2717 struct cpl_fw2_pld {
2724 struct cpl_fw4_pld {
2735 struct cpl_fw6_pld {
2743 struct cpl_fw2_msg {
2745 union opcode_info oi;
2748 struct cpl_fw4_msg {
2757 struct cpl_fw4_ack {
2759 union opcode_tid ot;
2769 CPL_FW4_ACK_FLAGS_SEQVAL = 0x1, /* seqn valid */
2770 CPL_FW4_ACK_FLAGS_CH = 0x2, /* channel change complete */
2771 CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */
2774 #define S_CPL_FW4_ACK_OPCODE 24
2775 #define M_CPL_FW4_ACK_OPCODE 0xff
2776 #define V_CPL_FW4_ACK_OPCODE(x) ((x) << S_CPL_FW4_ACK_OPCODE)
2777 #define G_CPL_FW4_ACK_OPCODE(x) \
2778 (((x) >> S_CPL_FW4_ACK_OPCODE) & M_CPL_FW4_ACK_OPCODE)
2780 #define S_CPL_FW4_ACK_FLOWID 0
2781 #define M_CPL_FW4_ACK_FLOWID 0xffffff
2782 #define V_CPL_FW4_ACK_FLOWID(x) ((x) << S_CPL_FW4_ACK_FLOWID)
2783 #define G_CPL_FW4_ACK_FLOWID(x) \
2784 (((x) >> S_CPL_FW4_ACK_FLOWID) & M_CPL_FW4_ACK_FLOWID)
2786 #define S_CPL_FW4_ACK_CR 24
2787 #define M_CPL_FW4_ACK_CR 0xff
2788 #define V_CPL_FW4_ACK_CR(x) ((x) << S_CPL_FW4_ACK_CR)
2789 #define G_CPL_FW4_ACK_CR(x) (((x) >> S_CPL_FW4_ACK_CR) & M_CPL_FW4_ACK_CR)
2791 #define S_CPL_FW4_ACK_SEQVAL 0
2792 #define M_CPL_FW4_ACK_SEQVAL 0x1
2793 #define V_CPL_FW4_ACK_SEQVAL(x) ((x) << S_CPL_FW4_ACK_SEQVAL)
2794 #define G_CPL_FW4_ACK_SEQVAL(x) \
2795 (((x) >> S_CPL_FW4_ACK_SEQVAL) & M_CPL_FW4_ACK_SEQVAL)
2796 #define F_CPL_FW4_ACK_SEQVAL V_CPL_FW4_ACK_SEQVAL(1U)
2798 struct cpl_fw6_msg {
2807 /* cpl_fw6_msg.type values */
2809 FW6_TYPE_CMD_RPL = FW_TYPE_CMD_RPL,
2810 FW6_TYPE_WR_RPL = FW_TYPE_WR_RPL,
2811 FW6_TYPE_CQE = FW_TYPE_CQE,
2812 FW6_TYPE_OFLD_CONNECTION_WR_RPL = FW_TYPE_OFLD_CONNECTION_WR_RPL,
2813 FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL,
2814 FW6_TYPE_WRERR_RPL = FW_TYPE_WRERR_RPL,
2815 FW6_TYPE_PI_ERR = FW_TYPE_PI_ERR,
2819 struct cpl_fw6_msg_ofld_connection_wr_rpl {
2821 __be32 tid; /* or atid in case of active failure */
2827 /* ULP_TX opcodes */
2829 ULP_TX_MEM_READ = 2,
2830 ULP_TX_MEM_WRITE = 3,
2835 ULP_TX_SC_NOOP = 0x80,
2836 ULP_TX_SC_IMM = 0x81,
2837 ULP_TX_SC_DSGL = 0x82,
2838 ULP_TX_SC_ISGL = 0x83,
2839 ULP_TX_SC_PICTRL = 0x84,
2840 ULP_TX_SC_MEMRD = 0x86
2843 #define S_ULPTX_CMD 24
2844 #define M_ULPTX_CMD 0xFF
2845 #define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD)
2847 #define S_ULPTX_LEN16 0
2848 #define M_ULPTX_LEN16 0xFF
2849 #define V_ULPTX_LEN16(x) ((x) << S_ULPTX_LEN16)
2851 #define S_ULP_TX_SC_MORE 23
2852 #define V_ULP_TX_SC_MORE(x) ((x) << S_ULP_TX_SC_MORE)
2853 #define F_ULP_TX_SC_MORE V_ULP_TX_SC_MORE(1U)
2855 struct ulptx_sge_pair {
2864 #if !(defined C99_NOT_SUPPORTED)
2865 struct ulptx_sge_pair sge[0];
2878 #if !(defined C99_NOT_SUPPORTED)
2879 struct ulptx_isge sge[0];
2883 struct ulptx_idata {
2888 #define S_ULPTX_NSGE 0
2889 #define M_ULPTX_NSGE 0xFFFF
2890 #define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE)
2891 #define G_ULPTX_NSGE(x) (((x) >> S_ULPTX_NSGE) & M_ULPTX_NSGE)
2893 struct ulptx_sc_memrd {
2901 __be32 len16; /* command length */
2902 __be32 dlen; /* data length in 32-byte units */
2906 /* additional ulp_mem_io.cmd fields */
2907 #define S_ULP_MEMIO_ORDER 23
2908 #define V_ULP_MEMIO_ORDER(x) ((x) << S_ULP_MEMIO_ORDER)
2909 #define F_ULP_MEMIO_ORDER V_ULP_MEMIO_ORDER(1U)
2911 #define S_T5_ULP_MEMIO_IMM 23
2912 #define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM)
2913 #define F_T5_ULP_MEMIO_IMM V_T5_ULP_MEMIO_IMM(1U)
2915 #define S_T5_ULP_MEMIO_ORDER 22
2916 #define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER)
2917 #define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U)
2919 #define S_T5_ULP_MEMIO_FID 4
2920 #define M_T5_ULP_MEMIO_FID 0x7ff
2921 #define V_T5_ULP_MEMIO_FID(x) ((x) << S_T5_ULP_MEMIO_FID)
2923 /* ulp_mem_io.lock_addr fields */
2924 #define S_ULP_MEMIO_ADDR 0
2925 #define M_ULP_MEMIO_ADDR 0x7FFFFFF
2926 #define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR)
2928 #define S_ULP_MEMIO_LOCK 31
2929 #define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK)
2930 #define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U)
2932 /* ulp_mem_io.dlen fields */
2933 #define S_ULP_MEMIO_DATA_LEN 0
2934 #define M_ULP_MEMIO_DATA_LEN 0x1F
2935 #define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN)
2937 /* ULP_TXPKT field values */
2939 ULP_TXPKT_DEST_TP = 0,
2942 ULP_TXPKT_DEST_DEVNULL,
2950 /* ulp_txpkt.cmd_dest fields */
2951 #define S_ULP_TXPKT_DATAMODIFY 23
2952 #define M_ULP_TXPKT_DATAMODIFY 0x1
2953 #define V_ULP_TXPKT_DATAMODIFY(x) ((x) << S_ULP_TXPKT_DATAMODIFY)
2954 #define G_ULP_TXPKT_DATAMODIFY(x) \
2955 (((x) >> S_ULP_TXPKT_DATAMODIFY) & M_ULP_TXPKT_DATAMODIFY_)
2956 #define F_ULP_TXPKT_DATAMODIFY V_ULP_TXPKT_DATAMODIFY(1U)
2958 #define S_ULP_TXPKT_CHANNELID 22
2959 #define M_ULP_TXPKT_CHANNELID 0x1
2960 #define V_ULP_TXPKT_CHANNELID(x) ((x) << S_ULP_TXPKT_CHANNELID)
2961 #define G_ULP_TXPKT_CHANNELID(x) \
2962 (((x) >> S_ULP_TXPKT_CHANNELID) & M_ULP_TXPKT_CHANNELID)
2963 #define F_ULP_TXPKT_CHANNELID V_ULP_TXPKT_CHANNELID(1U)
2965 /* ulp_txpkt.cmd_dest fields */
2966 #define S_ULP_TXPKT_DEST 16
2967 #define M_ULP_TXPKT_DEST 0x3
2968 #define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST)
2970 #define S_ULP_TXPKT_FID 4
2971 #define M_ULP_TXPKT_FID 0x7ff
2972 #define V_ULP_TXPKT_FID(x) ((x) << S_ULP_TXPKT_FID)
2974 #define S_ULP_TXPKT_RO 3
2975 #define V_ULP_TXPKT_RO(x) ((x) << S_ULP_TXPKT_RO)
2976 #define F_ULP_TXPKT_RO V_ULP_TXPKT_RO(1U)
2978 enum cpl_tx_tnl_lso_type {
2985 struct cpl_tx_tnl_lso {
2986 __be32 op_to_IpIdSplitOut;
2987 __be16 IpIdOffsetOut;
2988 __be16 UdpLenSetOut_to_TnlHdrLen;
2990 __be32 Flow_to_TcpHdrLen;
2992 __be16 IpIdSplit_to_Mss;
2993 __be32 TCPSeqOffset;
2994 __be32 EthLenOffset_Size;
2995 /* encapsulated CPL (TX_PKT_XT) follows here */
2998 #define S_CPL_TX_TNL_LSO_OPCODE 24
2999 #define M_CPL_TX_TNL_LSO_OPCODE 0xff
3000 #define V_CPL_TX_TNL_LSO_OPCODE(x) ((x) << S_CPL_TX_TNL_LSO_OPCODE)
3001 #define G_CPL_TX_TNL_LSO_OPCODE(x) \
3002 (((x) >> S_CPL_TX_TNL_LSO_OPCODE) & M_CPL_TX_TNL_LSO_OPCODE)
3004 #define S_CPL_TX_TNL_LSO_FIRST 23
3005 #define M_CPL_TX_TNL_LSO_FIRST 0x1
3006 #define V_CPL_TX_TNL_LSO_FIRST(x) ((x) << S_CPL_TX_TNL_LSO_FIRST)
3007 #define G_CPL_TX_TNL_LSO_FIRST(x) \
3008 (((x) >> S_CPL_TX_TNL_LSO_FIRST) & M_CPL_TX_TNL_LSO_FIRST)
3009 #define F_CPL_TX_TNL_LSO_FIRST V_CPL_TX_TNL_LSO_FIRST(1U)
3011 #define S_CPL_TX_TNL_LSO_LAST 22
3012 #define M_CPL_TX_TNL_LSO_LAST 0x1
3013 #define V_CPL_TX_TNL_LSO_LAST(x) ((x) << S_CPL_TX_TNL_LSO_LAST)
3014 #define G_CPL_TX_TNL_LSO_LAST(x) \
3015 (((x) >> S_CPL_TX_TNL_LSO_LAST) & M_CPL_TX_TNL_LSO_LAST)
3016 #define F_CPL_TX_TNL_LSO_LAST V_CPL_TX_TNL_LSO_LAST(1U)
3018 #define S_CPL_TX_TNL_LSO_ETHHDRLENXOUT 21
3019 #define M_CPL_TX_TNL_LSO_ETHHDRLENXOUT 0x1
3020 #define V_CPL_TX_TNL_LSO_ETHHDRLENXOUT(x) \
3021 ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENXOUT)
3022 #define G_CPL_TX_TNL_LSO_ETHHDRLENXOUT(x) \
3023 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENXOUT) & M_CPL_TX_TNL_LSO_ETHHDRLENXOUT)
3024 #define F_CPL_TX_TNL_LSO_ETHHDRLENXOUT V_CPL_TX_TNL_LSO_ETHHDRLENXOUT(1U)
3026 #define S_CPL_TX_TNL_LSO_IPV6OUT 20
3027 #define M_CPL_TX_TNL_LSO_IPV6OUT 0x1
3028 #define V_CPL_TX_TNL_LSO_IPV6OUT(x) ((x) << S_CPL_TX_TNL_LSO_IPV6OUT)
3029 #define G_CPL_TX_TNL_LSO_IPV6OUT(x) \
3030 (((x) >> S_CPL_TX_TNL_LSO_IPV6OUT) & M_CPL_TX_TNL_LSO_IPV6OUT)
3031 #define F_CPL_TX_TNL_LSO_IPV6OUT V_CPL_TX_TNL_LSO_IPV6OUT(1U)
3033 #define S_CPL_TX_TNL_LSO_ETHHDRLENOUT 16
3034 #define M_CPL_TX_TNL_LSO_ETHHDRLENOUT 0xf
3035 #define V_CPL_TX_TNL_LSO_ETHHDRLENOUT(x) \
3036 ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENOUT)
3037 #define G_CPL_TX_TNL_LSO_ETHHDRLENOUT(x) \
3038 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENOUT) & M_CPL_TX_TNL_LSO_ETHHDRLENOUT)
3040 #define S_CPL_TX_TNL_LSO_IPHDRLENOUT 4
3041 #define M_CPL_TX_TNL_LSO_IPHDRLENOUT 0xfff
3042 #define V_CPL_TX_TNL_LSO_IPHDRLENOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRLENOUT)
3043 #define G_CPL_TX_TNL_LSO_IPHDRLENOUT(x) \
3044 (((x) >> S_CPL_TX_TNL_LSO_IPHDRLENOUT) & M_CPL_TX_TNL_LSO_IPHDRLENOUT)
3046 #define S_CPL_TX_TNL_LSO_IPHDRCHKOUT 3
3047 #define M_CPL_TX_TNL_LSO_IPHDRCHKOUT 0x1
3048 #define V_CPL_TX_TNL_LSO_IPHDRCHKOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRCHKOUT)
3049 #define G_CPL_TX_TNL_LSO_IPHDRCHKOUT(x) \
3050 (((x) >> S_CPL_TX_TNL_LSO_IPHDRCHKOUT) & M_CPL_TX_TNL_LSO_IPHDRCHKOUT)
3051 #define F_CPL_TX_TNL_LSO_IPHDRCHKOUT V_CPL_TX_TNL_LSO_IPHDRCHKOUT(1U)
3053 #define S_CPL_TX_TNL_LSO_IPLENSETOUT 2
3054 #define M_CPL_TX_TNL_LSO_IPLENSETOUT 0x1
3055 #define V_CPL_TX_TNL_LSO_IPLENSETOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPLENSETOUT)
3056 #define G_CPL_TX_TNL_LSO_IPLENSETOUT(x) \
3057 (((x) >> S_CPL_TX_TNL_LSO_IPLENSETOUT) & M_CPL_TX_TNL_LSO_IPLENSETOUT)
3058 #define F_CPL_TX_TNL_LSO_IPLENSETOUT V_CPL_TX_TNL_LSO_IPLENSETOUT(1U)
3060 #define S_CPL_TX_TNL_LSO_IPIDINCOUT 1
3061 #define M_CPL_TX_TNL_LSO_IPIDINCOUT 0x1
3062 #define V_CPL_TX_TNL_LSO_IPIDINCOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPIDINCOUT)
3063 #define G_CPL_TX_TNL_LSO_IPIDINCOUT(x) \
3064 (((x) >> S_CPL_TX_TNL_LSO_IPIDINCOUT) & M_CPL_TX_TNL_LSO_IPIDINCOUT)
3065 #define F_CPL_TX_TNL_LSO_IPIDINCOUT V_CPL_TX_TNL_LSO_IPIDINCOUT(1U)
3067 #define S_CPL_TX_TNL_LSO_IPIDSPLITOUT 0
3068 #define M_CPL_TX_TNL_LSO_IPIDSPLITOUT 0x1
3069 #define V_CPL_TX_TNL_LSO_IPIDSPLITOUT(x) \
3070 ((x) << S_CPL_TX_TNL_LSO_IPIDSPLITOUT)
3071 #define G_CPL_TX_TNL_LSO_IPIDSPLITOUT(x) \
3072 (((x) >> S_CPL_TX_TNL_LSO_IPIDSPLITOUT) & M_CPL_TX_TNL_LSO_IPIDSPLITOUT)
3073 #define F_CPL_TX_TNL_LSO_IPIDSPLITOUT V_CPL_TX_TNL_LSO_IPIDSPLITOUT(1U)
3075 #define S_CPL_TX_TNL_LSO_UDPLENSETOUT 15
3076 #define M_CPL_TX_TNL_LSO_UDPLENSETOUT 0x1
3077 #define V_CPL_TX_TNL_LSO_UDPLENSETOUT(x) \
3078 ((x) << S_CPL_TX_TNL_LSO_UDPLENSETOUT)
3079 #define G_CPL_TX_TNL_LSO_UDPLENSETOUT(x) \
3080 (((x) >> S_CPL_TX_TNL_LSO_UDPLENSETOUT) & M_CPL_TX_TNL_LSO_UDPLENSETOUT)
3081 #define F_CPL_TX_TNL_LSO_UDPLENSETOUT V_CPL_TX_TNL_LSO_UDPLENSETOUT(1U)
3083 #define S_CPL_TX_TNL_LSO_UDPCHKCLROUT 14
3084 #define M_CPL_TX_TNL_LSO_UDPCHKCLROUT 0x1
3085 #define V_CPL_TX_TNL_LSO_UDPCHKCLROUT(x) \
3086 ((x) << S_CPL_TX_TNL_LSO_UDPCHKCLROUT)
3087 #define G_CPL_TX_TNL_LSO_UDPCHKCLROUT(x) \
3088 (((x) >> S_CPL_TX_TNL_LSO_UDPCHKCLROUT) & M_CPL_TX_TNL_LSO_UDPCHKCLROUT)
3089 #define F_CPL_TX_TNL_LSO_UDPCHKCLROUT V_CPL_TX_TNL_LSO_UDPCHKCLROUT(1U)
3091 #define S_CPL_TX_TNL_LSO_TNLTYPE 12
3092 #define M_CPL_TX_TNL_LSO_TNLTYPE 0x3
3093 #define V_CPL_TX_TNL_LSO_TNLTYPE(x) ((x) << S_CPL_TX_TNL_LSO_TNLTYPE)
3094 #define G_CPL_TX_TNL_LSO_TNLTYPE(x) \
3095 (((x) >> S_CPL_TX_TNL_LSO_TNLTYPE) & M_CPL_TX_TNL_LSO_TNLTYPE)
3097 #define S_CPL_TX_TNL_LSO_TNLHDRLEN 0
3098 #define M_CPL_TX_TNL_LSO_TNLHDRLEN 0xfff
3099 #define V_CPL_TX_TNL_LSO_TNLHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_TNLHDRLEN)
3100 #define G_CPL_TX_TNL_LSO_TNLHDRLEN(x) \
3101 (((x) >> S_CPL_TX_TNL_LSO_TNLHDRLEN) & M_CPL_TX_TNL_LSO_TNLHDRLEN)
3103 #define S_CPL_TX_TNL_LSO_FLOW 21
3104 #define M_CPL_TX_TNL_LSO_FLOW 0x1
3105 #define V_CPL_TX_TNL_LSO_FLOW(x) ((x) << S_CPL_TX_TNL_LSO_FLOW)
3106 #define G_CPL_TX_TNL_LSO_FLOW(x) \
3107 (((x) >> S_CPL_TX_TNL_LSO_FLOW) & M_CPL_TX_TNL_LSO_FLOW)
3108 #define F_CPL_TX_TNL_LSO_FLOW V_CPL_TX_TNL_LSO_FLOW(1U)
3110 #define S_CPL_TX_TNL_LSO_IPV6 20
3111 #define M_CPL_TX_TNL_LSO_IPV6 0x1
3112 #define V_CPL_TX_TNL_LSO_IPV6(x) ((x) << S_CPL_TX_TNL_LSO_IPV6)
3113 #define G_CPL_TX_TNL_LSO_IPV6(x) \
3114 (((x) >> S_CPL_TX_TNL_LSO_IPV6) & M_CPL_TX_TNL_LSO_IPV6)
3115 #define F_CPL_TX_TNL_LSO_IPV6 V_CPL_TX_TNL_LSO_IPV6(1U)
3117 #define S_CPL_TX_TNL_LSO_ETHHDRLEN 16
3118 #define M_CPL_TX_TNL_LSO_ETHHDRLEN 0xf
3119 #define V_CPL_TX_TNL_LSO_ETHHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLEN)
3120 #define G_CPL_TX_TNL_LSO_ETHHDRLEN(x) \
3121 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLEN) & M_CPL_TX_TNL_LSO_ETHHDRLEN)
3123 #define S_CPL_TX_TNL_LSO_IPHDRLEN 4
3124 #define M_CPL_TX_TNL_LSO_IPHDRLEN 0xfff
3125 #define V_CPL_TX_TNL_LSO_IPHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRLEN)
3126 #define G_CPL_TX_TNL_LSO_IPHDRLEN(x) \
3127 (((x) >> S_CPL_TX_TNL_LSO_IPHDRLEN) & M_CPL_TX_TNL_LSO_IPHDRLEN)
3129 #define S_CPL_TX_TNL_LSO_TCPHDRLEN 0
3130 #define M_CPL_TX_TNL_LSO_TCPHDRLEN 0xf
3131 #define V_CPL_TX_TNL_LSO_TCPHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_TCPHDRLEN)
3132 #define G_CPL_TX_TNL_LSO_TCPHDRLEN(x) \
3133 (((x) >> S_CPL_TX_TNL_LSO_TCPHDRLEN) & M_CPL_TX_TNL_LSO_TCPHDRLEN)
3135 #define S_CPL_TX_TNL_LSO_IPIDSPLIT 15
3136 #define M_CPL_TX_TNL_LSO_IPIDSPLIT 0x1
3137 #define V_CPL_TX_TNL_LSO_IPIDSPLIT(x) ((x) << S_CPL_TX_TNL_LSO_IPIDSPLIT)
3138 #define G_CPL_TX_TNL_LSO_IPIDSPLIT(x) \
3139 (((x) >> S_CPL_TX_TNL_LSO_IPIDSPLIT) & M_CPL_TX_TNL_LSO_IPIDSPLIT)
3140 #define F_CPL_TX_TNL_LSO_IPIDSPLIT V_CPL_TX_TNL_LSO_IPIDSPLIT(1U)
3142 #define S_CPL_TX_TNL_LSO_ETHHDRLENX 14
3143 #define M_CPL_TX_TNL_LSO_ETHHDRLENX 0x1
3144 #define V_CPL_TX_TNL_LSO_ETHHDRLENX(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENX)
3145 #define G_CPL_TX_TNL_LSO_ETHHDRLENX(x) \
3146 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENX) & M_CPL_TX_TNL_LSO_ETHHDRLENX)
3147 #define F_CPL_TX_TNL_LSO_ETHHDRLENX V_CPL_TX_TNL_LSO_ETHHDRLENX(1U)
3149 #define S_CPL_TX_TNL_LSO_MSS 0
3150 #define M_CPL_TX_TNL_LSO_MSS 0x3fff
3151 #define V_CPL_TX_TNL_LSO_MSS(x) ((x) << S_CPL_TX_TNL_LSO_MSS)
3152 #define G_CPL_TX_TNL_LSO_MSS(x) \
3153 (((x) >> S_CPL_TX_TNL_LSO_MSS) & M_CPL_TX_TNL_LSO_MSS)
3155 #define S_CPL_TX_TNL_LSO_ETHLENOFFSET 28
3156 #define M_CPL_TX_TNL_LSO_ETHLENOFFSET 0xf
3157 #define V_CPL_TX_TNL_LSO_ETHLENOFFSET(x) \
3158 ((x) << S_CPL_TX_TNL_LSO_ETHLENOFFSET)
3159 #define G_CPL_TX_TNL_LSO_ETHLENOFFSET(x) \
3160 (((x) >> S_CPL_TX_TNL_LSO_ETHLENOFFSET) & M_CPL_TX_TNL_LSO_ETHLENOFFSET)
3162 #define S_CPL_TX_TNL_LSO_SIZE 0
3163 #define M_CPL_TX_TNL_LSO_SIZE 0xfffffff
3164 #define V_CPL_TX_TNL_LSO_SIZE(x) ((x) << S_CPL_TX_TNL_LSO_SIZE)
3165 #define G_CPL_TX_TNL_LSO_SIZE(x) \
3166 (((x) >> S_CPL_TX_TNL_LSO_SIZE) & M_CPL_TX_TNL_LSO_SIZE)
3168 struct cpl_rx_mps_pkt {
3170 __be32 r1_lo_length;
3173 #define S_CPL_RX_MPS_PKT_OP 24
3174 #define M_CPL_RX_MPS_PKT_OP 0xff
3175 #define V_CPL_RX_MPS_PKT_OP(x) ((x) << S_CPL_RX_MPS_PKT_OP)
3176 #define G_CPL_RX_MPS_PKT_OP(x) \
3177 (((x) >> S_CPL_RX_MPS_PKT_OP) & M_CPL_RX_MPS_PKT_OP)
3179 #define S_CPL_RX_MPS_PKT_TYPE 20
3180 #define M_CPL_RX_MPS_PKT_TYPE 0xf
3181 #define V_CPL_RX_MPS_PKT_TYPE(x) ((x) << S_CPL_RX_MPS_PKT_TYPE)
3182 #define G_CPL_RX_MPS_PKT_TYPE(x) \
3183 (((x) >> S_CPL_RX_MPS_PKT_TYPE) & M_CPL_RX_MPS_PKT_TYPE)
3186 * Values for CPL_RX_MPS_PKT_TYPE, a bit-wise orthogonal field.
3188 #define X_CPL_RX_MPS_PKT_TYPE_PAUSE (1 << 0)
3189 #define X_CPL_RX_MPS_PKT_TYPE_PPP (1 << 1)
3190 #define X_CPL_RX_MPS_PKT_TYPE_QFC (1 << 2)
3191 #define X_CPL_RX_MPS_PKT_TYPE_PTP (1 << 3)
3193 struct cpl_tx_tls_sfo {
3194 __be32 op_to_seg_len;
3196 __be32 type_protover;
3198 __be32 seqno_numivs;
3199 __be32 ivgen_hdrlen;
3203 /* cpl_tx_tls_sfo macros */
3204 #define S_CPL_TX_TLS_SFO_OPCODE 24
3205 #define M_CPL_TX_TLS_SFO_OPCODE 0xff
3206 #define V_CPL_TX_TLS_SFO_OPCODE(x) ((x) << S_CPL_TX_TLS_SFO_OPCODE)
3207 #define G_CPL_TX_TLS_SFO_OPCODE(x) \
3208 (((x) >> S_CPL_TX_TLS_SFO_OPCODE) & M_CPL_TX_TLS_SFO_OPCODE)
3210 #define S_CPL_TX_TLS_SFO_DATA_TYPE 20
3211 #define M_CPL_TX_TLS_SFO_DATA_TYPE 0xf
3212 #define V_CPL_TX_TLS_SFO_DATA_TYPE(x) ((x) << S_CPL_TX_TLS_SFO_DATA_TYPE)
3213 #define G_CPL_TX_TLS_SFO_DATA_TYPE(x) \
3214 (((x) >> S_CPL_TX_TLS_SFO_DATA_TYPE) & M_CPL_TX_TLS_SFO_DATA_TYPE)
3216 #define S_CPL_TX_TLS_SFO_CPL_LEN 16
3217 #define M_CPL_TX_TLS_SFO_CPL_LEN 0xf
3218 #define V_CPL_TX_TLS_SFO_CPL_LEN(x) ((x) << S_CPL_TX_TLS_SFO_CPL_LEN)
3219 #define G_CPL_TX_TLS_SFO_CPL_LEN(x) \
3220 (((x) >> S_CPL_TX_TLS_SFO_CPL_LEN) & M_CPL_TX_TLS_SFO_CPL_LEN)
3222 #define S_CPL_TX_TLS_SFO_SEG_LEN 0
3223 #define M_CPL_TX_TLS_SFO_SEG_LEN 0xffff
3224 #define V_CPL_TX_TLS_SFO_SEG_LEN(x) ((x) << S_CPL_TX_TLS_SFO_SEG_LEN)
3225 #define G_CPL_TX_TLS_SFO_SEG_LEN(x) \
3226 (((x) >> S_CPL_TX_TLS_SFO_SEG_LEN) & M_CPL_TX_TLS_SFO_SEG_LEN)
3228 #define S_CPL_TX_TLS_SFO_TYPE 24
3229 #define M_CPL_TX_TLS_SFO_TYPE 0xff
3230 #define V_CPL_TX_TLS_SFO_TYPE(x) ((x) << S_CPL_TX_TLS_SFO_TYPE)
3231 #define G_CPL_TX_TLS_SFO_TYPE(x) \
3232 (((x) >> S_CPL_TX_TLS_SFO_TYPE) & M_CPL_TX_TLS_SFO_TYPE)
3234 #define S_CPL_TX_TLS_SFO_PROTOVER 8
3235 #define M_CPL_TX_TLS_SFO_PROTOVER 0xffff
3236 #define V_CPL_TX_TLS_SFO_PROTOVER(x) ((x) << S_CPL_TX_TLS_SFO_PROTOVER)
3237 #define G_CPL_TX_TLS_SFO_PROTOVER(x) \
3238 (((x) >> S_CPL_TX_TLS_SFO_PROTOVER) & M_CPL_TX_TLS_SFO_PROTOVER)
3240 struct cpl_tls_data {
3242 union opcode_tid ot;
3248 #define S_CPL_TLS_DATA_OPCODE 24
3249 #define M_CPL_TLS_DATA_OPCODE 0xff
3250 #define V_CPL_TLS_DATA_OPCODE(x) ((x) << S_CPL_TLS_DATA_OPCODE)
3251 #define G_CPL_TLS_DATA_OPCODE(x) \
3252 (((x) >> S_CPL_TLS_DATA_OPCODE) & M_CPL_TLS_DATA_OPCODE)
3254 #define S_CPL_TLS_DATA_TID 0
3255 #define M_CPL_TLS_DATA_TID 0xffffff
3256 #define V_CPL_TLS_DATA_TID(x) ((x) << S_CPL_TLS_DATA_TID)
3257 #define G_CPL_TLS_DATA_TID(x) \
3258 (((x) >> S_CPL_TLS_DATA_TID) & M_CPL_TLS_DATA_TID)
3260 #define S_CPL_TLS_DATA_LENGTH 0
3261 #define M_CPL_TLS_DATA_LENGTH 0xffff
3262 #define V_CPL_TLS_DATA_LENGTH(x) ((x) << S_CPL_TLS_DATA_LENGTH)
3263 #define G_CPL_TLS_DATA_LENGTH(x) \
3264 (((x) >> S_CPL_TLS_DATA_LENGTH) & M_CPL_TLS_DATA_LENGTH)
3266 struct cpl_rx_tls_cmp {
3268 union opcode_tid ot;
3269 __be32 pdulength_length;
3276 #define S_CPL_RX_TLS_CMP_OPCODE 24
3277 #define M_CPL_RX_TLS_CMP_OPCODE 0xff
3278 #define V_CPL_RX_TLS_CMP_OPCODE(x) ((x) << S_CPL_RX_TLS_CMP_OPCODE)
3279 #define G_CPL_RX_TLS_CMP_OPCODE(x) \
3280 (((x) >> S_CPL_RX_TLS_CMP_OPCODE) & M_CPL_RX_TLS_CMP_OPCODE)
3282 #define S_CPL_RX_TLS_CMP_TID 0
3283 #define M_CPL_RX_TLS_CMP_TID 0xffffff
3284 #define V_CPL_RX_TLS_CMP_TID(x) ((x) << S_CPL_RX_TLS_CMP_TID)
3285 #define G_CPL_RX_TLS_CMP_TID(x) \
3286 (((x) >> S_CPL_RX_TLS_CMP_TID) & M_CPL_RX_TLS_CMP_TID)
3288 #define S_CPL_RX_TLS_CMP_PDULENGTH 16
3289 #define M_CPL_RX_TLS_CMP_PDULENGTH 0xffff
3290 #define V_CPL_RX_TLS_CMP_PDULENGTH(x) ((x) << S_CPL_RX_TLS_CMP_PDULENGTH)
3291 #define G_CPL_RX_TLS_CMP_PDULENGTH(x) \
3292 (((x) >> S_CPL_RX_TLS_CMP_PDULENGTH) & M_CPL_RX_TLS_CMP_PDULENGTH)
3294 #define S_CPL_RX_TLS_CMP_LENGTH 0
3295 #define M_CPL_RX_TLS_CMP_LENGTH 0xffff
3296 #define V_CPL_RX_TLS_CMP_LENGTH(x) ((x) << S_CPL_RX_TLS_CMP_LENGTH)
3297 #define G_CPL_RX_TLS_CMP_LENGTH(x) \
3298 (((x) >> S_CPL_RX_TLS_CMP_LENGTH) & M_CPL_RX_TLS_CMP_LENGTH)
3300 #define S_SCMD_SEQ_NO_CTRL 29
3301 #define M_SCMD_SEQ_NO_CTRL 0x3
3302 #define V_SCMD_SEQ_NO_CTRL(x) ((x) << S_SCMD_SEQ_NO_CTRL)
3303 #define G_SCMD_SEQ_NO_CTRL(x) \
3304 (((x) >> S_SCMD_SEQ_NO_CTRL) & M_SCMD_SEQ_NO_CTRL)
3306 /* StsFieldPrsnt- Status field at the end of the TLS PDU */
3307 #define S_SCMD_STATUS_PRESENT 28
3308 #define M_SCMD_STATUS_PRESENT 0x1
3309 #define V_SCMD_STATUS_PRESENT(x) ((x) << S_SCMD_STATUS_PRESENT)
3310 #define G_SCMD_STATUS_PRESENT(x) \
3311 (((x) >> S_SCMD_STATUS_PRESENT) & M_SCMD_STATUS_PRESENT)
3312 #define F_SCMD_STATUS_PRESENT V_SCMD_STATUS_PRESENT(1U)
3314 /* ProtoVersion - Protocol Version 0: 1.2, 1:1.1, 2:DTLS, 3:Generic,
3315 * 3-15: Reserved. */
3316 #define S_SCMD_PROTO_VERSION 24
3317 #define M_SCMD_PROTO_VERSION 0xf
3318 #define V_SCMD_PROTO_VERSION(x) ((x) << S_SCMD_PROTO_VERSION)
3319 #define G_SCMD_PROTO_VERSION(x) \
3320 (((x) >> S_SCMD_PROTO_VERSION) & M_SCMD_PROTO_VERSION)
3322 /* EncDecCtrl - Encryption/Decryption Control. 0: Encrypt, 1: Decrypt */
3323 #define S_SCMD_ENC_DEC_CTRL 23
3324 #define M_SCMD_ENC_DEC_CTRL 0x1
3325 #define V_SCMD_ENC_DEC_CTRL(x) ((x) << S_SCMD_ENC_DEC_CTRL)
3326 #define G_SCMD_ENC_DEC_CTRL(x) \
3327 (((x) >> S_SCMD_ENC_DEC_CTRL) & M_SCMD_ENC_DEC_CTRL)
3328 #define F_SCMD_ENC_DEC_CTRL V_SCMD_ENC_DEC_CTRL(1U)
3330 /* CipherAuthSeqCtrl - Cipher Authentication Sequence Control. */
3331 #define S_SCMD_CIPH_AUTH_SEQ_CTRL 22
3332 #define M_SCMD_CIPH_AUTH_SEQ_CTRL 0x1
3333 #define V_SCMD_CIPH_AUTH_SEQ_CTRL(x) \
3334 ((x) << S_SCMD_CIPH_AUTH_SEQ_CTRL)
3335 #define G_SCMD_CIPH_AUTH_SEQ_CTRL(x) \
3336 (((x) >> S_SCMD_CIPH_AUTH_SEQ_CTRL) & M_SCMD_CIPH_AUTH_SEQ_CTRL)
3337 #define F_SCMD_CIPH_AUTH_SEQ_CTRL V_SCMD_CIPH_AUTH_SEQ_CTRL(1U)
3339 /* CiphMode - Cipher Mode. 0: NOP, 1:AES-CBC, 2:AES-GCM, 3:AES-CTR,
3340 * 4:Generic-AES, 5-15: Reserved. */
3341 #define S_SCMD_CIPH_MODE 18
3342 #define M_SCMD_CIPH_MODE 0xf
3343 #define V_SCMD_CIPH_MODE(x) ((x) << S_SCMD_CIPH_MODE)
3344 #define G_SCMD_CIPH_MODE(x) \
3345 (((x) >> S_SCMD_CIPH_MODE) & M_SCMD_CIPH_MODE)
3347 /* AuthMode - Auth Mode. 0: NOP, 1:SHA1, 2:SHA2-224, 3:SHA2-256
3349 #define S_SCMD_AUTH_MODE 14
3350 #define M_SCMD_AUTH_MODE 0xf
3351 #define V_SCMD_AUTH_MODE(x) ((x) << S_SCMD_AUTH_MODE)
3352 #define G_SCMD_AUTH_MODE(x) \
3353 (((x) >> S_SCMD_AUTH_MODE) & M_SCMD_AUTH_MODE)
3355 /* HmacCtrl - HMAC Control. 0:NOP, 1:No truncation, 2:Support HMAC Truncation
3356 * per RFC 4366, 3:IPSec 96 bits, 4-7:Reserved
3358 #define S_SCMD_HMAC_CTRL 11
3359 #define M_SCMD_HMAC_CTRL 0x7
3360 #define V_SCMD_HMAC_CTRL(x) ((x) << S_SCMD_HMAC_CTRL)
3361 #define G_SCMD_HMAC_CTRL(x) \
3362 (((x) >> S_SCMD_HMAC_CTRL) & M_SCMD_HMAC_CTRL)
3364 /* IvSize - IV size in units of 2 bytes */
3365 #define S_SCMD_IV_SIZE 7
3366 #define M_SCMD_IV_SIZE 0xf
3367 #define V_SCMD_IV_SIZE(x) ((x) << S_SCMD_IV_SIZE)
3368 #define G_SCMD_IV_SIZE(x) \
3369 (((x) >> S_SCMD_IV_SIZE) & M_SCMD_IV_SIZE)
3371 /* NumIVs - Number of IVs */
3372 #define S_SCMD_NUM_IVS 0
3373 #define M_SCMD_NUM_IVS 0x7f
3374 #define V_SCMD_NUM_IVS(x) ((x) << S_SCMD_NUM_IVS)
3375 #define G_SCMD_NUM_IVS(x) \
3376 (((x) >> S_SCMD_NUM_IVS) & M_SCMD_NUM_IVS)
3378 /* EnbDbgId - If this is enabled upper 20 (63:44) bits if SeqNumber
3379 * (below) are used as Cid (connection id for debug status), these
3380 * bits are padded to zero for forming the 64 bit
3381 * sequence number for TLS
3383 #define S_SCMD_ENB_DBGID 31
3384 #define M_SCMD_ENB_DBGID 0x1
3385 #define V_SCMD_ENB_DBGID(x) ((x) << S_SCMD_ENB_DBGID)
3386 #define G_SCMD_ENB_DBGID(x) \
3387 (((x) >> S_SCMD_ENB_DBGID) & M_SCMD_ENB_DBGID)
3389 /* IV generation in SW. */
3390 #define S_SCMD_IV_GEN_CTRL 30
3391 #define M_SCMD_IV_GEN_CTRL 0x1
3392 #define V_SCMD_IV_GEN_CTRL(x) ((x) << S_SCMD_IV_GEN_CTRL)
3393 #define G_SCMD_IV_GEN_CTRL(x) \
3394 (((x) >> S_SCMD_IV_GEN_CTRL) & M_SCMD_IV_GEN_CTRL)
3395 #define F_SCMD_IV_GEN_CTRL V_SCMD_IV_GEN_CTRL(1U)
3398 #define S_SCMD_MORE_FRAGS 20
3399 #define M_SCMD_MORE_FRAGS 0x1
3400 #define V_SCMD_MORE_FRAGS(x) ((x) << S_SCMD_MORE_FRAGS)
3401 #define G_SCMD_MORE_FRAGS(x) (((x) >> S_SCMD_MORE_FRAGS) & M_SCMD_MORE_FRAGS)
3404 #define S_SCMD_LAST_FRAG 19
3405 #define M_SCMD_LAST_FRAG 0x1
3406 #define V_SCMD_LAST_FRAG(x) ((x) << S_SCMD_LAST_FRAG)
3407 #define G_SCMD_LAST_FRAG(x) (((x) >> S_SCMD_LAST_FRAG) & M_SCMD_LAST_FRAG)
3410 #define S_SCMD_TLS_COMPPDU 18
3411 #define M_SCMD_TLS_COMPPDU 0x1
3412 #define V_SCMD_TLS_COMPPDU(x) ((x) << S_SCMD_TLS_COMPPDU)
3413 #define G_SCMD_TLS_COMPPDU(x) (((x) >> S_SCMD_TLS_COMPPDU) & M_SCMD_TLS_COMPPDU)
3415 /* KeyCntxtInline - Key context inline after the scmd OR PayloadOnly*/
3416 #define S_SCMD_KEY_CTX_INLINE 17
3417 #define M_SCMD_KEY_CTX_INLINE 0x1
3418 #define V_SCMD_KEY_CTX_INLINE(x) ((x) << S_SCMD_KEY_CTX_INLINE)
3419 #define G_SCMD_KEY_CTX_INLINE(x) \
3420 (((x) >> S_SCMD_KEY_CTX_INLINE) & M_SCMD_KEY_CTX_INLINE)
3421 #define F_SCMD_KEY_CTX_INLINE V_SCMD_KEY_CTX_INLINE(1U)
3423 /* TLSFragEnable - 0: Host created TLS PDUs, 1: TLS Framgmentation in ASIC */
3424 #define S_SCMD_TLS_FRAG_ENABLE 16
3425 #define M_SCMD_TLS_FRAG_ENABLE 0x1
3426 #define V_SCMD_TLS_FRAG_ENABLE(x) ((x) << S_SCMD_TLS_FRAG_ENABLE)
3427 #define G_SCMD_TLS_FRAG_ENABLE(x) \
3428 (((x) >> S_SCMD_TLS_FRAG_ENABLE) & M_SCMD_TLS_FRAG_ENABLE)
3429 #define F_SCMD_TLS_FRAG_ENABLE V_SCMD_TLS_FRAG_ENABLE(1U)
3431 /* MacOnly - Only send the MAC and discard PDU. This is valid for hash only
3432 * modes, in this case TLS_TX will drop the PDU and only
3433 * send back the MAC bytes. */
3434 #define S_SCMD_MAC_ONLY 15
3435 #define M_SCMD_MAC_ONLY 0x1
3436 #define V_SCMD_MAC_ONLY(x) ((x) << S_SCMD_MAC_ONLY)
3437 #define G_SCMD_MAC_ONLY(x) \
3438 (((x) >> S_SCMD_MAC_ONLY) & M_SCMD_MAC_ONLY)
3439 #define F_SCMD_MAC_ONLY V_SCMD_MAC_ONLY(1U)
3441 /* AadIVDrop - Drop the AAD and IV fields. Useful in protocols
3442 * which have complex AAD and IV formations Eg:AES-CCM
3444 #define S_SCMD_AADIVDROP 14
3445 #define M_SCMD_AADIVDROP 0x1
3446 #define V_SCMD_AADIVDROP(x) ((x) << S_SCMD_AADIVDROP)
3447 #define G_SCMD_AADIVDROP(x) \
3448 (((x) >> S_SCMD_AADIVDROP) & M_SCMD_AADIVDROP)
3449 #define F_SCMD_AADIVDROP V_SCMD_AADIVDROP(1U)
3451 /* HdrLength - Length of all headers excluding TLS header
3452 * present before start of crypto PDU/payload. */
3453 #define S_SCMD_HDR_LEN 0
3454 #define M_SCMD_HDR_LEN 0x3fff
3455 #define V_SCMD_HDR_LEN(x) ((x) << S_SCMD_HDR_LEN)
3456 #define G_SCMD_HDR_LEN(x) \
3457 (((x) >> S_SCMD_HDR_LEN) & M_SCMD_HDR_LEN)
3459 struct cpl_tx_sec_pdu {
3460 __be32 op_ivinsrtofst;
3462 __be32 aadstart_cipherstop_hi;
3463 __be32 cipherstop_lo_authinsert;
3464 __be32 seqno_numivs;
3465 __be32 ivgen_hdrlen;
3469 #define S_CPL_TX_SEC_PDU_OPCODE 24
3470 #define M_CPL_TX_SEC_PDU_OPCODE 0xff
3471 #define V_CPL_TX_SEC_PDU_OPCODE(x) ((x) << S_CPL_TX_SEC_PDU_OPCODE)
3472 #define G_CPL_TX_SEC_PDU_OPCODE(x) \
3473 (((x) >> S_CPL_TX_SEC_PDU_OPCODE) & M_CPL_TX_SEC_PDU_OPCODE)
3476 #define S_CPL_TX_SEC_PDU_RXCHID 22
3477 #define M_CPL_TX_SEC_PDU_RXCHID 0x1
3478 #define V_CPL_TX_SEC_PDU_RXCHID(x) ((x) << S_CPL_TX_SEC_PDU_RXCHID)
3479 #define G_CPL_TX_SEC_PDU_RXCHID(x) \
3480 (((x) >> S_CPL_TX_SEC_PDU_RXCHID) & M_CPL_TX_SEC_PDU_RXCHID)
3481 #define F_CPL_TX_SEC_PDU_RXCHID V_CPL_TX_SEC_PDU_RXCHID(1U)
3484 #define S_CPL_TX_SEC_PDU_ACKFOLLOWS 21
3485 #define M_CPL_TX_SEC_PDU_ACKFOLLOWS 0x1
3486 #define V_CPL_TX_SEC_PDU_ACKFOLLOWS(x) ((x) << S_CPL_TX_SEC_PDU_ACKFOLLOWS)
3487 #define G_CPL_TX_SEC_PDU_ACKFOLLOWS(x) \
3488 (((x) >> S_CPL_TX_SEC_PDU_ACKFOLLOWS) & M_CPL_TX_SEC_PDU_ACKFOLLOWS)
3489 #define F_CPL_TX_SEC_PDU_ACKFOLLOWS V_CPL_TX_SEC_PDU_ACKFOLLOWS(1U)
3491 /* Loopback bit in cpl_tx_sec_pdu */
3492 #define S_CPL_TX_SEC_PDU_ULPTXLPBK 20
3493 #define M_CPL_TX_SEC_PDU_ULPTXLPBK 0x1
3494 #define V_CPL_TX_SEC_PDU_ULPTXLPBK(x) ((x) << S_CPL_TX_SEC_PDU_ULPTXLPBK)
3495 #define G_CPL_TX_SEC_PDU_ULPTXLPBK(x) \
3496 (((x) >> S_CPL_TX_SEC_PDU_ULPTXLPBK) & M_CPL_TX_SEC_PDU_ULPTXLPBK)
3497 #define F_CPL_TX_SEC_PDU_ULPTXLPBK V_CPL_TX_SEC_PDU_ULPTXLPBK(1U)
3499 /* Length of cpl header encapsulated */
3500 #define S_CPL_TX_SEC_PDU_CPLLEN 16
3501 #define M_CPL_TX_SEC_PDU_CPLLEN 0xf
3502 #define V_CPL_TX_SEC_PDU_CPLLEN(x) ((x) << S_CPL_TX_SEC_PDU_CPLLEN)
3503 #define G_CPL_TX_SEC_PDU_CPLLEN(x) \
3504 (((x) >> S_CPL_TX_SEC_PDU_CPLLEN) & M_CPL_TX_SEC_PDU_CPLLEN)
3507 #define S_CPL_TX_SEC_PDU_PLACEHOLDER 10
3508 #define M_CPL_TX_SEC_PDU_PLACEHOLDER 0x1
3509 #define V_CPL_TX_SEC_PDU_PLACEHOLDER(x) ((x) << S_CPL_TX_SEC_PDU_PLACEHOLDER)
3510 #define G_CPL_TX_SEC_PDU_PLACEHOLDER(x) \
3511 (((x) >> S_CPL_TX_SEC_PDU_PLACEHOLDER) & \
3512 M_CPL_TX_SEC_PDU_PLACEHOLDER)
3514 /* IvInsrtOffset: Insertion location for IV */
3515 #define S_CPL_TX_SEC_PDU_IVINSRTOFST 0
3516 #define M_CPL_TX_SEC_PDU_IVINSRTOFST 0x3ff
3517 #define V_CPL_TX_SEC_PDU_IVINSRTOFST(x) ((x) << S_CPL_TX_SEC_PDU_IVINSRTOFST)
3518 #define G_CPL_TX_SEC_PDU_IVINSRTOFST(x) \
3519 (((x) >> S_CPL_TX_SEC_PDU_IVINSRTOFST) & \
3520 M_CPL_TX_SEC_PDU_IVINSRTOFST)
3522 /* AadStartOffset: Offset in bytes for AAD start from
3523 * the first byte following
3524 * the pkt headers (0-255
3526 #define S_CPL_TX_SEC_PDU_AADSTART 24
3527 #define M_CPL_TX_SEC_PDU_AADSTART 0xff
3528 #define V_CPL_TX_SEC_PDU_AADSTART(x) ((x) << S_CPL_TX_SEC_PDU_AADSTART)
3529 #define G_CPL_TX_SEC_PDU_AADSTART(x) \
3530 (((x) >> S_CPL_TX_SEC_PDU_AADSTART) & \
3531 M_CPL_TX_SEC_PDU_AADSTART)
3533 /* AadStopOffset: offset in bytes for AAD stop/end from the first byte following
3534 * the pkt headers (0-511 bytes) */
3535 #define S_CPL_TX_SEC_PDU_AADSTOP 15
3536 #define M_CPL_TX_SEC_PDU_AADSTOP 0x1ff
3537 #define V_CPL_TX_SEC_PDU_AADSTOP(x) ((x) << S_CPL_TX_SEC_PDU_AADSTOP)
3538 #define G_CPL_TX_SEC_PDU_AADSTOP(x) \
3539 (((x) >> S_CPL_TX_SEC_PDU_AADSTOP) & M_CPL_TX_SEC_PDU_AADSTOP)
3541 /* CipherStartOffset: offset in bytes for encryption/decryption start from the
3542 * first byte following the pkt headers (0-1023
3544 #define S_CPL_TX_SEC_PDU_CIPHERSTART 5
3545 #define M_CPL_TX_SEC_PDU_CIPHERSTART 0x3ff
3546 #define V_CPL_TX_SEC_PDU_CIPHERSTART(x) ((x) << S_CPL_TX_SEC_PDU_CIPHERSTART)
3547 #define G_CPL_TX_SEC_PDU_CIPHERSTART(x) \
3548 (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTART) & \
3549 M_CPL_TX_SEC_PDU_CIPHERSTART)
3551 /* CipherStopOffset: offset in bytes for encryption/decryption end
3552 * from end of the payload of this command (0-511 bytes) */
3553 #define S_CPL_TX_SEC_PDU_CIPHERSTOP_HI 0
3554 #define M_CPL_TX_SEC_PDU_CIPHERSTOP_HI 0x1f
3555 #define V_CPL_TX_SEC_PDU_CIPHERSTOP_HI(x) \
3556 ((x) << S_CPL_TX_SEC_PDU_CIPHERSTOP_HI)
3557 #define G_CPL_TX_SEC_PDU_CIPHERSTOP_HI(x) \
3558 (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTOP_HI) & \
3559 M_CPL_TX_SEC_PDU_CIPHERSTOP_HI)
3561 #define S_CPL_TX_SEC_PDU_CIPHERSTOP_LO 28
3562 #define M_CPL_TX_SEC_PDU_CIPHERSTOP_LO 0xf
3563 #define V_CPL_TX_SEC_PDU_CIPHERSTOP_LO(x) \
3564 ((x) << S_CPL_TX_SEC_PDU_CIPHERSTOP_LO)
3565 #define G_CPL_TX_SEC_PDU_CIPHERSTOP_LO(x) \
3566 (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTOP_LO) & \
3567 M_CPL_TX_SEC_PDU_CIPHERSTOP_LO)
3569 /* AuthStartOffset: offset in bytes for authentication start from
3570 * the first byte following the pkt headers (0-1023)
3572 #define S_CPL_TX_SEC_PDU_AUTHSTART 18
3573 #define M_CPL_TX_SEC_PDU_AUTHSTART 0x3ff
3574 #define V_CPL_TX_SEC_PDU_AUTHSTART(x) ((x) << S_CPL_TX_SEC_PDU_AUTHSTART)
3575 #define G_CPL_TX_SEC_PDU_AUTHSTART(x) \
3576 (((x) >> S_CPL_TX_SEC_PDU_AUTHSTART) & \
3577 M_CPL_TX_SEC_PDU_AUTHSTART)
3579 /* AuthStopOffset: offset in bytes for authentication
3580 * end from end of the payload of this command (0-511 Bytes) */
3581 #define S_CPL_TX_SEC_PDU_AUTHSTOP 9
3582 #define M_CPL_TX_SEC_PDU_AUTHSTOP 0x1ff
3583 #define V_CPL_TX_SEC_PDU_AUTHSTOP(x) ((x) << S_CPL_TX_SEC_PDU_AUTHSTOP)
3584 #define G_CPL_TX_SEC_PDU_AUTHSTOP(x) \
3585 (((x) >> S_CPL_TX_SEC_PDU_AUTHSTOP) & \
3586 M_CPL_TX_SEC_PDU_AUTHSTOP)
3588 /* AuthInsrtOffset: offset in bytes for authentication insertion
3589 * from end of the payload of this command (0-511 bytes) */
3590 #define S_CPL_TX_SEC_PDU_AUTHINSERT 0
3591 #define M_CPL_TX_SEC_PDU_AUTHINSERT 0x1ff
3592 #define V_CPL_TX_SEC_PDU_AUTHINSERT(x) ((x) << S_CPL_TX_SEC_PDU_AUTHINSERT)
3593 #define G_CPL_TX_SEC_PDU_AUTHINSERT(x) \
3594 (((x) >> S_CPL_TX_SEC_PDU_AUTHINSERT) & \
3595 M_CPL_TX_SEC_PDU_AUTHINSERT)
3597 struct cpl_rx_phys_dsgl {
3599 __be32 pcirlxorder_to_noofsgentr;
3600 struct rss_header rss_hdr_int;
3603 #define S_CPL_RX_PHYS_DSGL_OPCODE 24
3604 #define M_CPL_RX_PHYS_DSGL_OPCODE 0xff
3605 #define V_CPL_RX_PHYS_DSGL_OPCODE(x) ((x) << S_CPL_RX_PHYS_DSGL_OPCODE)
3606 #define G_CPL_RX_PHYS_DSGL_OPCODE(x) \
3607 (((x) >> S_CPL_RX_PHYS_DSGL_OPCODE) & M_CPL_RX_PHYS_DSGL_OPCODE)
3609 #define S_CPL_RX_PHYS_DSGL_ISRDMA 23
3610 #define M_CPL_RX_PHYS_DSGL_ISRDMA 0x1
3611 #define V_CPL_RX_PHYS_DSGL_ISRDMA(x) ((x) << S_CPL_RX_PHYS_DSGL_ISRDMA)
3612 #define G_CPL_RX_PHYS_DSGL_ISRDMA(x) \
3613 (((x) >> S_CPL_RX_PHYS_DSGL_ISRDMA) & M_CPL_RX_PHYS_DSGL_ISRDMA)
3614 #define F_CPL_RX_PHYS_DSGL_ISRDMA V_CPL_RX_PHYS_DSGL_ISRDMA(1U)
3616 #define S_CPL_RX_PHYS_DSGL_RSVD1 20
3617 #define M_CPL_RX_PHYS_DSGL_RSVD1 0x7
3618 #define V_CPL_RX_PHYS_DSGL_RSVD1(x) ((x) << S_CPL_RX_PHYS_DSGL_RSVD1)
3619 #define G_CPL_RX_PHYS_DSGL_RSVD1(x) \
3620 (((x) >> S_CPL_RX_PHYS_DSGL_RSVD1) & M_CPL_RX_PHYS_DSGL_RSVD1)
3622 #define S_CPL_RX_PHYS_DSGL_PCIRLXORDER 31
3623 #define M_CPL_RX_PHYS_DSGL_PCIRLXORDER 0x1
3624 #define V_CPL_RX_PHYS_DSGL_PCIRLXORDER(x) \
3625 ((x) << S_CPL_RX_PHYS_DSGL_PCIRLXORDER)
3626 #define G_CPL_RX_PHYS_DSGL_PCIRLXORDER(x) \
3627 (((x) >> S_CPL_RX_PHYS_DSGL_PCIRLXORDER) & \
3628 M_CPL_RX_PHYS_DSGL_PCIRLXORDER)
3629 #define F_CPL_RX_PHYS_DSGL_PCIRLXORDER V_CPL_RX_PHYS_DSGL_PCIRLXORDER(1U)
3631 #define S_CPL_RX_PHYS_DSGL_PCINOSNOOP 30
3632 #define M_CPL_RX_PHYS_DSGL_PCINOSNOOP 0x1
3633 #define V_CPL_RX_PHYS_DSGL_PCINOSNOOP(x) \
3634 ((x) << S_CPL_RX_PHYS_DSGL_PCINOSNOOP)
3635 #define G_CPL_RX_PHYS_DSGL_PCINOSNOOP(x) \
3636 (((x) >> S_CPL_RX_PHYS_DSGL_PCINOSNOOP) & \
3637 M_CPL_RX_PHYS_DSGL_PCINOSNOOP)
3638 #define F_CPL_RX_PHYS_DSGL_PCINOSNOOP V_CPL_RX_PHYS_DSGL_PCINOSNOOP(1U)
3640 #define S_CPL_RX_PHYS_DSGL_PCITPHNTENB 29
3641 #define M_CPL_RX_PHYS_DSGL_PCITPHNTENB 0x1
3642 #define V_CPL_RX_PHYS_DSGL_PCITPHNTENB(x) \
3643 ((x) << S_CPL_RX_PHYS_DSGL_PCITPHNTENB)
3644 #define G_CPL_RX_PHYS_DSGL_PCITPHNTENB(x) \
3645 (((x) >> S_CPL_RX_PHYS_DSGL_PCITPHNTENB) & \
3646 M_CPL_RX_PHYS_DSGL_PCITPHNTENB)
3647 #define F_CPL_RX_PHYS_DSGL_PCITPHNTENB V_CPL_RX_PHYS_DSGL_PCITPHNTENB(1U)
3649 #define S_CPL_RX_PHYS_DSGL_PCITPHNT 27
3650 #define M_CPL_RX_PHYS_DSGL_PCITPHNT 0x3
3651 #define V_CPL_RX_PHYS_DSGL_PCITPHNT(x) ((x) << S_CPL_RX_PHYS_DSGL_PCITPHNT)
3652 #define G_CPL_RX_PHYS_DSGL_PCITPHNT(x) \
3653 (((x) >> S_CPL_RX_PHYS_DSGL_PCITPHNT) & \
3654 M_CPL_RX_PHYS_DSGL_PCITPHNT)
3656 #define S_CPL_RX_PHYS_DSGL_DCAID 16
3657 #define M_CPL_RX_PHYS_DSGL_DCAID 0x7ff
3658 #define V_CPL_RX_PHYS_DSGL_DCAID(x) ((x) << S_CPL_RX_PHYS_DSGL_DCAID)
3659 #define G_CPL_RX_PHYS_DSGL_DCAID(x) \
3660 (((x) >> S_CPL_RX_PHYS_DSGL_DCAID) & \
3661 M_CPL_RX_PHYS_DSGL_DCAID)
3663 #define S_CPL_RX_PHYS_DSGL_NOOFSGENTR 0
3664 #define M_CPL_RX_PHYS_DSGL_NOOFSGENTR 0xffff
3665 #define V_CPL_RX_PHYS_DSGL_NOOFSGENTR(x) \
3666 ((x) << S_CPL_RX_PHYS_DSGL_NOOFSGENTR)
3667 #define G_CPL_RX_PHYS_DSGL_NOOFSGENTR(x) \
3668 (((x) >> S_CPL_RX_PHYS_DSGL_NOOFSGENTR) & \
3669 M_CPL_RX_PHYS_DSGL_NOOFSGENTR)
3671 /* CPL_TX_TLS_ACK */
3672 struct cpl_tx_tls_ack {
3678 #define S_CPL_TX_TLS_ACK_OPCODE 24
3679 #define M_CPL_TX_TLS_ACK_OPCODE 0xff
3680 #define V_CPL_TX_TLS_ACK_OPCODE(x) ((x) << S_CPL_TX_TLS_ACK_OPCODE)
3681 #define G_CPL_TX_TLS_ACK_OPCODE(x) \
3682 (((x) >> S_CPL_TX_TLS_ACK_OPCODE) & M_CPL_TX_TLS_ACK_OPCODE)
3684 #define S_CPL_TX_TLS_ACK_RSVD1 23
3685 #define M_CPL_TX_TLS_ACK_RSVD1 0x1
3686 #define V_CPL_TX_TLS_ACK_RSVD1(x) ((x) << S_CPL_TX_TLS_ACK_RSVD1)
3687 #define G_CPL_TX_TLS_ACK_RSVD1(x) \
3688 (((x) >> S_CPL_TX_TLS_ACK_RSVD1) & M_CPL_TX_TLS_ACK_RSVD1)
3689 #define F_CPL_TX_TLS_ACK_RSVD1 V_CPL_TX_TLS_ACK_RSVD1(1U)
3691 #define S_CPL_TX_TLS_ACK_RXCHID 22
3692 #define M_CPL_TX_TLS_ACK_RXCHID 0x1
3693 #define V_CPL_TX_TLS_ACK_RXCHID(x) ((x) << S_CPL_TX_TLS_ACK_RXCHID)
3694 #define G_CPL_TX_TLS_ACK_RXCHID(x) \
3695 (((x) >> S_CPL_TX_TLS_ACK_RXCHID) & M_CPL_TX_TLS_ACK_RXCHID)
3696 #define F_CPL_TX_TLS_ACK_RXCHID V_CPL_TX_TLS_ACK_RXCHID(1U)
3698 #define S_CPL_TX_TLS_ACK_FWMSG 21
3699 #define M_CPL_TX_TLS_ACK_FWMSG 0x1
3700 #define V_CPL_TX_TLS_ACK_FWMSG(x) ((x) << S_CPL_TX_TLS_ACK_FWMSG)
3701 #define G_CPL_TX_TLS_ACK_FWMSG(x) \
3702 (((x) >> S_CPL_TX_TLS_ACK_FWMSG) & M_CPL_TX_TLS_ACK_FWMSG)
3703 #define F_CPL_TX_TLS_ACK_FWMSG V_CPL_TX_TLS_ACK_FWMSG(1U)
3705 #define S_CPL_TX_TLS_ACK_ULPTXLPBK 20
3706 #define M_CPL_TX_TLS_ACK_ULPTXLPBK 0x1
3707 #define V_CPL_TX_TLS_ACK_ULPTXLPBK(x) ((x) << S_CPL_TX_TLS_ACK_ULPTXLPBK)
3708 #define G_CPL_TX_TLS_ACK_ULPTXLPBK(x) \
3709 (((x) >> S_CPL_TX_TLS_ACK_ULPTXLPBK) & M_CPL_TX_TLS_ACK_ULPTXLPBK)
3710 #define F_CPL_TX_TLS_ACK_ULPTXLPBK V_CPL_TX_TLS_ACK_ULPTXLPBK(1U)
3712 #define S_CPL_TX_TLS_ACK_CPLLEN 16
3713 #define M_CPL_TX_TLS_ACK_CPLLEN 0xf
3714 #define V_CPL_TX_TLS_ACK_CPLLEN(x) ((x) << S_CPL_TX_TLS_ACK_CPLLEN)
3715 #define G_CPL_TX_TLS_ACK_CPLLEN(x) \
3716 (((x) >> S_CPL_TX_TLS_ACK_CPLLEN) & M_CPL_TX_TLS_ACK_CPLLEN)
3718 #define S_CPL_TX_TLS_ACK_COMPLONERR 15
3719 #define M_CPL_TX_TLS_ACK_COMPLONERR 0x1
3720 #define V_CPL_TX_TLS_ACK_COMPLONERR(x) ((x) << S_CPL_TX_TLS_ACK_COMPLONERR)
3721 #define G_CPL_TX_TLS_ACK_COMPLONERR(x) \
3722 (((x) >> S_CPL_TX_TLS_ACK_COMPLONERR) & M_CPL_TX_TLS_ACK_COMPLONERR)
3723 #define F_CPL_TX_TLS_ACK_COMPLONERR V_CPL_TX_TLS_ACK_COMPLONERR(1U)
3725 #define S_CPL_TX_TLS_ACK_LCB 14
3726 #define M_CPL_TX_TLS_ACK_LCB 0x1
3727 #define V_CPL_TX_TLS_ACK_LCB(x) ((x) << S_CPL_TX_TLS_ACK_LCB)
3728 #define G_CPL_TX_TLS_ACK_LCB(x) \
3729 (((x) >> S_CPL_TX_TLS_ACK_LCB) & M_CPL_TX_TLS_ACK_LCB)
3730 #define F_CPL_TX_TLS_ACK_LCB V_CPL_TX_TLS_ACK_LCB(1U)
3732 #define S_CPL_TX_TLS_ACK_PHASH 13
3733 #define M_CPL_TX_TLS_ACK_PHASH 0x1
3734 #define V_CPL_TX_TLS_ACK_PHASH(x) ((x) << S_CPL_TX_TLS_ACK_PHASH)
3735 #define G_CPL_TX_TLS_ACK_PHASH(x) \
3736 (((x) >> S_CPL_TX_TLS_ACK_PHASH) & M_CPL_TX_TLS_ACK_PHASH)
3737 #define F_CPL_TX_TLS_ACK_PHASH V_CPL_TX_TLS_ACK_PHASH(1U)
3739 #define S_CPL_TX_TLS_ACK_RSVD2 0
3740 #define M_CPL_TX_TLS_ACK_RSVD2 0x1fff
3741 #define V_CPL_TX_TLS_ACK_RSVD2(x) ((x) << S_CPL_TX_TLS_ACK_RSVD2)
3742 #define G_CPL_TX_TLS_ACK_RSVD2(x) \
3743 (((x) >> S_CPL_TX_TLS_ACK_RSVD2) & M_CPL_TX_TLS_ACK_RSVD2)
3745 #endif /* T4_MSG_H */