2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011, 2016 Chelsio Communications, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 CPL_PASS_OPEN_REQ = 0x1,
37 CPL_PASS_ACCEPT_RPL = 0x2,
38 CPL_ACT_OPEN_REQ = 0x3,
40 CPL_SET_TCB_FIELD = 0x5,
42 CPL_CLOSE_CON_REQ = 0x8,
43 CPL_CLOSE_LISTSRV_REQ = 0x9,
47 CPL_RX_DATA_ACK = 0xD,
49 CPL_RTE_DELETE_REQ = 0xF,
50 CPL_RTE_WRITE_REQ = 0x10,
51 CPL_RTE_READ_REQ = 0x11,
52 CPL_L2T_WRITE_REQ = 0x12,
53 CPL_L2T_READ_REQ = 0x13,
54 CPL_SMT_WRITE_REQ = 0x14,
55 CPL_SMT_READ_REQ = 0x15,
56 CPL_TAG_WRITE_REQ = 0x16,
58 CPL_TID_RELEASE = 0x1A,
59 CPL_TAG_READ_REQ = 0x1B,
60 CPL_SRQ_TABLE_REQ = 0x1C,
61 CPL_TX_PKT_FSO = 0x1E,
62 CPL_TX_DATA_ISO = 0x1F,
64 CPL_CLOSE_LISTSRV_RPL = 0x20,
66 CPL_GET_TCB_RPL = 0x22,
67 CPL_L2T_WRITE_RPL = 0x23,
68 CPL_PASS_OPEN_RPL = 0x24,
69 CPL_ACT_OPEN_RPL = 0x25,
70 CPL_PEER_CLOSE = 0x26,
71 CPL_RTE_DELETE_RPL = 0x27,
72 CPL_RTE_WRITE_RPL = 0x28,
73 CPL_RX_URG_PKT = 0x29,
74 CPL_TAG_WRITE_RPL = 0x2A,
75 CPL_ABORT_REQ_RSS = 0x2B,
76 CPL_RX_URG_NOTIFY = 0x2C,
77 CPL_ABORT_RPL_RSS = 0x2D,
78 CPL_SMT_WRITE_RPL = 0x2E,
79 CPL_TX_DATA_ACK = 0x2F,
81 CPL_RX_PHYS_ADDR = 0x30,
82 CPL_PCMD_READ_RPL = 0x31,
83 CPL_CLOSE_CON_RPL = 0x32,
85 CPL_L2T_READ_RPL = 0x34,
87 CPL_RDMA_CQE_READ_RSP = 0x36,
88 CPL_RDMA_CQE_ERR = 0x37,
89 CPL_RTE_READ_RPL = 0x38,
91 CPL_SET_TCB_RPL = 0x3A,
93 CPL_TAG_READ_RPL = 0x3C,
94 CPL_HIT_NOTIFY = 0x3D,
95 CPL_PKT_NOTIFY = 0x3E,
96 CPL_RX_DDP_COMPLETE = 0x3F,
98 CPL_ACT_ESTABLISH = 0x40,
99 CPL_PASS_ESTABLISH = 0x41,
100 CPL_RX_DATA_DDP = 0x42,
101 CPL_SMT_READ_RPL = 0x43,
102 CPL_PASS_ACCEPT_REQ = 0x44,
103 CPL_RX_ISCSI_CMP = 0x45,
104 CPL_RX_FCOE_DDP = 0x46,
106 CPL_T5_TRACE_PKT = 0x48,
107 CPL_RX_ISCSI_DDP = 0x49,
108 CPL_RX_FCOE_DIF = 0x4A,
109 CPL_RX_DATA_DIF = 0x4B,
110 CPL_ERR_NOTIFY = 0x4D,
111 CPL_RX_TLS_CMP = 0x4E,
113 CPL_RDMA_READ_REQ = 0x60,
114 CPL_RX_ISCSI_DIF = 0x60,
116 CPL_SET_LE_REQ = 0x80,
117 CPL_PASS_OPEN_REQ6 = 0x81,
118 CPL_ACT_OPEN_REQ6 = 0x83,
119 CPL_TX_TLS_PDU = 0x88,
120 CPL_TX_TLS_SFO = 0x89,
122 CPL_TX_SEC_PDU = 0x8A,
123 CPL_TX_TLS_ACK = 0x8B,
125 CPL_RDMA_TERMINATE = 0xA2,
126 CPL_RDMA_WRITE = 0xA4,
127 CPL_SGE_EGR_UPDATE = 0xA5,
128 CPL_SET_LE_RPL = 0xA6,
131 CPL_T5_RDMA_READ_REQ = 0xA9,
132 CPL_RDMA_ATOMIC_REQ = 0xAA,
133 CPL_RDMA_ATOMIC_RPL = 0xAB,
134 CPL_RDMA_IMM_DATA = 0xAC,
135 CPL_RDMA_IMM_DATA_SE = 0xAD,
136 CPL_RX_MPS_PKT = 0xAF,
138 CPL_TRACE_PKT = 0xB0,
139 CPL_RX2TX_DATA = 0xB1,
141 CPL_ISCSI_DATA = 0xB2,
142 CPL_FCOE_DATA = 0xB3,
147 CPL_SRQ_TABLE_RPL = 0xCC,
148 CPL_RX_PHYS_DSGL = 0xD0,
152 CPL_TX_TNL_LSO = 0xEC,
153 CPL_TX_PKT_LSO = 0xED,
154 CPL_TX_PKT_XT = 0xEE,
156 NUM_CPL_CMDS /* must be last and previous entries must be sorted */
161 CPL_ERR_TCAM_PARITY = 1,
162 CPL_ERR_TCAM_MISS = 2,
163 CPL_ERR_TCAM_FULL = 3,
164 CPL_ERR_BAD_LENGTH = 15,
165 CPL_ERR_BAD_ROUTE = 18,
166 CPL_ERR_CONN_RESET = 20,
167 CPL_ERR_CONN_EXIST_SYNRECV = 21,
168 CPL_ERR_CONN_EXIST = 22,
169 CPL_ERR_ARP_MISS = 23,
170 CPL_ERR_BAD_SYN = 24,
171 CPL_ERR_CONN_TIMEDOUT = 30,
172 CPL_ERR_XMIT_TIMEDOUT = 31,
173 CPL_ERR_PERSIST_TIMEDOUT = 32,
174 CPL_ERR_FINWAIT2_TIMEDOUT = 33,
175 CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
176 CPL_ERR_RTX_NEG_ADVICE = 35,
177 CPL_ERR_PERSIST_NEG_ADVICE = 36,
178 CPL_ERR_KEEPALV_NEG_ADVICE = 37,
179 CPL_ERR_WAIT_ARP_RPL = 41,
180 CPL_ERR_ABORT_FAILED = 42,
181 CPL_ERR_IWARP_FLM = 50,
182 CPL_CONTAINS_READ_RPL = 60,
183 CPL_CONTAINS_WRITE_RPL = 61,
187 * Some of the error codes above implicitly indicate that there is no TID
188 * allocated with the result of an ACT_OPEN. We use this predicate to make
191 static inline int act_open_has_tid(int status)
193 return (status != CPL_ERR_TCAM_PARITY &&
194 status != CPL_ERR_TCAM_MISS &&
195 status != CPL_ERR_TCAM_FULL &&
196 status != CPL_ERR_CONN_EXIST_SYNRECV &&
197 status != CPL_ERR_CONN_EXIST);
201 CPL_CONN_POLICY_AUTO = 0,
202 CPL_CONN_POLICY_ASK = 1,
203 CPL_CONN_POLICY_FILTER = 2,
204 CPL_CONN_POLICY_DENY = 3
217 ULP_CRC_HEADER = 1 << 0,
218 ULP_CRC_DATA = 1 << 1
222 CPL_PASS_OPEN_ACCEPT,
223 CPL_PASS_OPEN_REJECT,
224 CPL_PASS_OPEN_ACCEPT_TNL
228 CPL_ABORT_SEND_RST = 0,
232 enum { /* TX_PKT_XT checksum types */
246 enum { /* packet type in CPL_RX_PKT */
247 PKTYPE_XACT_UCAST = 0,
248 PKTYPE_HASH_UCAST = 1,
249 PKTYPE_XACT_MCAST = 2,
250 PKTYPE_HASH_MCAST = 3,
256 enum { /* DMAC type in CPL_RX_PKT */
262 enum { /* TCP congestion control algorithms */
269 enum { /* RSS hash type */
270 RSS_HASH_NONE = 0, /* no hash computed */
271 RSS_HASH_IP = 1, /* IP or IPv6 2-tuple hash */
272 RSS_HASH_TCP = 2, /* TCP 4-tuple hash */
273 RSS_HASH_UDP = 3 /* UDP 4-tuple hash */
276 enum { /* LE commands */
281 enum { /* LE request size */
295 #define S_CPL_OPCODE 24
296 #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE)
297 #define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & 0xFF)
298 #define G_TID(x) ((x) & 0xFFFFFF)
300 /* tid is assumed to be 24-bits */
301 #define MK_OPCODE_TID(opcode, tid) (V_CPL_OPCODE(opcode) | (tid))
303 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
305 /* extract the TID from a CPL command */
306 #define GET_TID(cmd) (G_TID(ntohl(OPCODE_TID(cmd))))
307 #define GET_OPCODE(cmd) ((cmd)->ot.opcode)
309 /* partitioning of TID fields that also carry a queue id */
311 #define M_TID_TID 0x3fff
312 #define V_TID_TID(x) ((x) << S_TID_TID)
313 #define G_TID_TID(x) (((x) >> S_TID_TID) & M_TID_TID)
316 #define M_TID_QID 0x3ff
317 #define V_TID_QID(x) ((x) << S_TID_QID)
318 #define G_TID_QID(x) (((x) >> S_TID_QID) & M_TID_QID)
328 #if defined(__LITTLE_ENDIAN_BITFIELD)
345 #if defined(__LITTLE_ENDIAN_BITFIELD)
364 #define S_HASHTYPE 20
365 #define M_HASHTYPE 0x3
366 #define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE)
369 #define M_QNUM 0xFFFF
370 #define G_QNUM(x) (((x) >> S_QNUM) & M_QNUM)
372 #if defined(RSS_HDR_VLD) || defined(CHELSIO_FW)
373 # define RSS_HDR struct rss_header rss_hdr;
379 struct work_request_hdr {
387 #define M_WR_LEN16 0xFF
388 #define V_WR_LEN16(x) ((x) << S_WR_LEN16)
389 #define G_WR_LEN16(x) (((x) >> S_WR_LEN16) & M_WR_LEN16)
394 #define V_WR_OP(x) ((__u64)(x) << S_WR_OP)
395 #define G_WR_OP(x) (((x) >> S_WR_OP) & M_WR_OP)
397 # define WR_HDR struct work_request_hdr wr
398 # define WR_HDR_SIZE sizeof(struct work_request_hdr)
401 # define WR_HDR_SIZE 0
404 /* option 0 fields */
405 #define S_ACCEPT_MODE 0
406 #define M_ACCEPT_MODE 0x3
407 #define V_ACCEPT_MODE(x) ((x) << S_ACCEPT_MODE)
408 #define G_ACCEPT_MODE(x) (((x) >> S_ACCEPT_MODE) & M_ACCEPT_MODE)
411 #define M_TX_CHAN 0x3
412 #define V_TX_CHAN(x) ((x) << S_TX_CHAN)
413 #define G_TX_CHAN(x) (((x) >> S_TX_CHAN) & M_TX_CHAN)
416 #define V_NO_CONG(x) ((x) << S_NO_CONG)
417 #define F_NO_CONG V_NO_CONG(1U)
420 #define V_DELACK(x) ((x) << S_DELACK)
421 #define F_DELACK V_DELACK(1U)
423 #define S_INJECT_TIMER 6
424 #define V_INJECT_TIMER(x) ((x) << S_INJECT_TIMER)
425 #define F_INJECT_TIMER V_INJECT_TIMER(1U)
427 #define S_NON_OFFLOAD 7
428 #define V_NON_OFFLOAD(x) ((x) << S_NON_OFFLOAD)
429 #define F_NON_OFFLOAD V_NON_OFFLOAD(1U)
432 #define M_ULP_MODE 0xF
433 #define V_ULP_MODE(x) ((x) << S_ULP_MODE)
434 #define G_ULP_MODE(x) (((x) >> S_ULP_MODE) & M_ULP_MODE)
436 #define S_RCV_BUFSIZ 12
437 #define M_RCV_BUFSIZ 0x3FFU
438 #define V_RCV_BUFSIZ(x) ((x) << S_RCV_BUFSIZ)
439 #define G_RCV_BUFSIZ(x) (((x) >> S_RCV_BUFSIZ) & M_RCV_BUFSIZ)
443 #define V_DSCP(x) ((x) << S_DSCP)
444 #define G_DSCP(x) (((x) >> S_DSCP) & M_DSCP)
446 #define S_SMAC_SEL 28
447 #define M_SMAC_SEL 0xFF
448 #define V_SMAC_SEL(x) ((__u64)(x) << S_SMAC_SEL)
449 #define G_SMAC_SEL(x) (((x) >> S_SMAC_SEL) & M_SMAC_SEL)
452 #define M_L2T_IDX 0xFFF
453 #define V_L2T_IDX(x) ((__u64)(x) << S_L2T_IDX)
454 #define G_L2T_IDX(x) (((x) >> S_L2T_IDX) & M_L2T_IDX)
456 #define S_TCAM_BYPASS 48
457 #define V_TCAM_BYPASS(x) ((__u64)(x) << S_TCAM_BYPASS)
458 #define F_TCAM_BYPASS V_TCAM_BYPASS(1ULL)
461 #define V_NAGLE(x) ((__u64)(x) << S_NAGLE)
462 #define F_NAGLE V_NAGLE(1ULL)
464 #define S_WND_SCALE 50
465 #define M_WND_SCALE 0xF
466 #define V_WND_SCALE(x) ((__u64)(x) << S_WND_SCALE)
467 #define G_WND_SCALE(x) (((x) >> S_WND_SCALE) & M_WND_SCALE)
469 #define S_KEEP_ALIVE 54
470 #define V_KEEP_ALIVE(x) ((__u64)(x) << S_KEEP_ALIVE)
471 #define F_KEEP_ALIVE V_KEEP_ALIVE(1ULL)
475 #define V_MAX_RT(x) ((__u64)(x) << S_MAX_RT)
476 #define G_MAX_RT(x) (((x) >> S_MAX_RT) & M_MAX_RT)
478 #define S_MAX_RT_OVERRIDE 59
479 #define V_MAX_RT_OVERRIDE(x) ((__u64)(x) << S_MAX_RT_OVERRIDE)
480 #define F_MAX_RT_OVERRIDE V_MAX_RT_OVERRIDE(1ULL)
483 #define M_MSS_IDX 0xF
484 #define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX)
485 #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX)
487 /* option 1 fields */
488 #define S_SYN_RSS_ENABLE 0
489 #define V_SYN_RSS_ENABLE(x) ((x) << S_SYN_RSS_ENABLE)
490 #define F_SYN_RSS_ENABLE V_SYN_RSS_ENABLE(1U)
492 #define S_SYN_RSS_USE_HASH 1
493 #define V_SYN_RSS_USE_HASH(x) ((x) << S_SYN_RSS_USE_HASH)
494 #define F_SYN_RSS_USE_HASH V_SYN_RSS_USE_HASH(1U)
496 #define S_SYN_RSS_QUEUE 2
497 #define M_SYN_RSS_QUEUE 0x3FF
498 #define V_SYN_RSS_QUEUE(x) ((x) << S_SYN_RSS_QUEUE)
499 #define G_SYN_RSS_QUEUE(x) (((x) >> S_SYN_RSS_QUEUE) & M_SYN_RSS_QUEUE)
501 #define S_LISTEN_INTF 12
502 #define M_LISTEN_INTF 0xFF
503 #define V_LISTEN_INTF(x) ((x) << S_LISTEN_INTF)
504 #define G_LISTEN_INTF(x) (((x) >> S_LISTEN_INTF) & M_LISTEN_INTF)
506 #define S_LISTEN_FILTER 20
507 #define V_LISTEN_FILTER(x) ((x) << S_LISTEN_FILTER)
508 #define F_LISTEN_FILTER V_LISTEN_FILTER(1U)
510 #define S_SYN_DEFENSE 21
511 #define V_SYN_DEFENSE(x) ((x) << S_SYN_DEFENSE)
512 #define F_SYN_DEFENSE V_SYN_DEFENSE(1U)
514 #define S_CONN_POLICY 22
515 #define M_CONN_POLICY 0x3
516 #define V_CONN_POLICY(x) ((x) << S_CONN_POLICY)
517 #define G_CONN_POLICY(x) (((x) >> S_CONN_POLICY) & M_CONN_POLICY)
519 #define S_T5_FILT_INFO 24
520 #define M_T5_FILT_INFO 0xffffffffffULL
521 #define V_T5_FILT_INFO(x) ((x) << S_T5_FILT_INFO)
522 #define G_T5_FILT_INFO(x) (((x) >> S_T5_FILT_INFO) & M_T5_FILT_INFO)
524 #define S_FILT_INFO 28
525 #define M_FILT_INFO 0xfffffffffULL
526 #define V_FILT_INFO(x) ((x) << S_FILT_INFO)
527 #define G_FILT_INFO(x) (((x) >> S_FILT_INFO) & M_FILT_INFO)
529 /* option 2 fields */
530 #define S_RSS_QUEUE 0
531 #define M_RSS_QUEUE 0x3FF
532 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE)
533 #define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE)
535 #define S_RSS_QUEUE_VALID 10
536 #define V_RSS_QUEUE_VALID(x) ((x) << S_RSS_QUEUE_VALID)
537 #define F_RSS_QUEUE_VALID V_RSS_QUEUE_VALID(1U)
539 #define S_RX_COALESCE_VALID 11
540 #define V_RX_COALESCE_VALID(x) ((x) << S_RX_COALESCE_VALID)
541 #define F_RX_COALESCE_VALID V_RX_COALESCE_VALID(1U)
543 #define S_RX_COALESCE 12
544 #define M_RX_COALESCE 0x3
545 #define V_RX_COALESCE(x) ((x) << S_RX_COALESCE)
546 #define G_RX_COALESCE(x) (((x) >> S_RX_COALESCE) & M_RX_COALESCE)
548 #define S_CONG_CNTRL 14
549 #define M_CONG_CNTRL 0x3
550 #define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL)
551 #define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL)
555 #define V_PACE(x) ((x) << S_PACE)
556 #define G_PACE(x) (((x) >> S_PACE) & M_PACE)
558 #define S_CONG_CNTRL_VALID 18
559 #define V_CONG_CNTRL_VALID(x) ((x) << S_CONG_CNTRL_VALID)
560 #define F_CONG_CNTRL_VALID V_CONG_CNTRL_VALID(1U)
563 #define V_T5_ISS(x) ((x) << S_T5_ISS)
564 #define F_T5_ISS V_T5_ISS(1U)
566 #define S_PACE_VALID 19
567 #define V_PACE_VALID(x) ((x) << S_PACE_VALID)
568 #define F_PACE_VALID V_PACE_VALID(1U)
570 #define S_RX_FC_DISABLE 20
571 #define V_RX_FC_DISABLE(x) ((x) << S_RX_FC_DISABLE)
572 #define F_RX_FC_DISABLE V_RX_FC_DISABLE(1U)
574 #define S_RX_FC_DDP 21
575 #define V_RX_FC_DDP(x) ((x) << S_RX_FC_DDP)
576 #define F_RX_FC_DDP V_RX_FC_DDP(1U)
578 #define S_RX_FC_VALID 22
579 #define V_RX_FC_VALID(x) ((x) << S_RX_FC_VALID)
580 #define F_RX_FC_VALID V_RX_FC_VALID(1U)
582 #define S_TX_QUEUE 23
583 #define M_TX_QUEUE 0x7
584 #define V_TX_QUEUE(x) ((x) << S_TX_QUEUE)
585 #define G_TX_QUEUE(x) (((x) >> S_TX_QUEUE) & M_TX_QUEUE)
587 #define S_RX_CHANNEL 26
588 #define V_RX_CHANNEL(x) ((x) << S_RX_CHANNEL)
589 #define F_RX_CHANNEL V_RX_CHANNEL(1U)
591 #define S_CCTRL_ECN 27
592 #define V_CCTRL_ECN(x) ((x) << S_CCTRL_ECN)
593 #define F_CCTRL_ECN V_CCTRL_ECN(1U)
595 #define S_WND_SCALE_EN 28
596 #define V_WND_SCALE_EN(x) ((x) << S_WND_SCALE_EN)
597 #define F_WND_SCALE_EN V_WND_SCALE_EN(1U)
599 #define S_TSTAMPS_EN 29
600 #define V_TSTAMPS_EN(x) ((x) << S_TSTAMPS_EN)
601 #define F_TSTAMPS_EN V_TSTAMPS_EN(1U)
604 #define V_SACK_EN(x) ((x) << S_SACK_EN)
605 #define F_SACK_EN V_SACK_EN(1U)
607 #define S_T5_OPT_2_VALID 31
608 #define V_T5_OPT_2_VALID(x) ((x) << S_T5_OPT_2_VALID)
609 #define F_T5_OPT_2_VALID V_T5_OPT_2_VALID(1U)
611 struct cpl_pass_open_req {
622 struct cpl_pass_open_req6 {
635 struct cpl_pass_open_rpl {
642 struct cpl_pass_establish {
653 /* cpl_pass_establish.tos_stid fields */
654 #define S_PASS_OPEN_TID 0
655 #define M_PASS_OPEN_TID 0xFFFFFF
656 #define V_PASS_OPEN_TID(x) ((x) << S_PASS_OPEN_TID)
657 #define G_PASS_OPEN_TID(x) (((x) >> S_PASS_OPEN_TID) & M_PASS_OPEN_TID)
659 #define S_PASS_OPEN_TOS 24
660 #define M_PASS_OPEN_TOS 0xFF
661 #define V_PASS_OPEN_TOS(x) ((x) << S_PASS_OPEN_TOS)
662 #define G_PASS_OPEN_TOS(x) (((x) >> S_PASS_OPEN_TOS) & M_PASS_OPEN_TOS)
664 /* cpl_pass_establish.tcp_opt fields (also applies to act_open_establish) */
665 #define S_TCPOPT_WSCALE_OK 5
666 #define M_TCPOPT_WSCALE_OK 0x1
667 #define V_TCPOPT_WSCALE_OK(x) ((x) << S_TCPOPT_WSCALE_OK)
668 #define G_TCPOPT_WSCALE_OK(x) (((x) >> S_TCPOPT_WSCALE_OK) & M_TCPOPT_WSCALE_OK)
670 #define S_TCPOPT_SACK 6
671 #define M_TCPOPT_SACK 0x1
672 #define V_TCPOPT_SACK(x) ((x) << S_TCPOPT_SACK)
673 #define G_TCPOPT_SACK(x) (((x) >> S_TCPOPT_SACK) & M_TCPOPT_SACK)
675 #define S_TCPOPT_TSTAMP 7
676 #define M_TCPOPT_TSTAMP 0x1
677 #define V_TCPOPT_TSTAMP(x) ((x) << S_TCPOPT_TSTAMP)
678 #define G_TCPOPT_TSTAMP(x) (((x) >> S_TCPOPT_TSTAMP) & M_TCPOPT_TSTAMP)
680 #define S_TCPOPT_SND_WSCALE 8
681 #define M_TCPOPT_SND_WSCALE 0xF
682 #define V_TCPOPT_SND_WSCALE(x) ((x) << S_TCPOPT_SND_WSCALE)
683 #define G_TCPOPT_SND_WSCALE(x) (((x) >> S_TCPOPT_SND_WSCALE) & M_TCPOPT_SND_WSCALE)
685 #define S_TCPOPT_MSS 12
686 #define M_TCPOPT_MSS 0xF
687 #define V_TCPOPT_MSS(x) ((x) << S_TCPOPT_MSS)
688 #define G_TCPOPT_MSS(x) (((x) >> S_TCPOPT_MSS) & M_TCPOPT_MSS)
690 struct cpl_pass_accept_req {
699 struct tcp_options tcpopt;
702 /* cpl_pass_accept_req.hdr_len fields */
703 #define S_SYN_RX_CHAN 0
704 #define M_SYN_RX_CHAN 0xF
705 #define V_SYN_RX_CHAN(x) ((x) << S_SYN_RX_CHAN)
706 #define G_SYN_RX_CHAN(x) (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN)
708 #define S_TCP_HDR_LEN 10
709 #define M_TCP_HDR_LEN 0x3F
710 #define V_TCP_HDR_LEN(x) ((x) << S_TCP_HDR_LEN)
711 #define G_TCP_HDR_LEN(x) (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN)
713 #define S_T6_TCP_HDR_LEN 8
714 #define V_T6_TCP_HDR_LEN(x) ((x) << S_T6_TCP_HDR_LEN)
715 #define G_T6_TCP_HDR_LEN(x) (((x) >> S_T6_TCP_HDR_LEN) & M_TCP_HDR_LEN)
717 #define S_IP_HDR_LEN 16
718 #define M_IP_HDR_LEN 0x3FF
719 #define V_IP_HDR_LEN(x) ((x) << S_IP_HDR_LEN)
720 #define G_IP_HDR_LEN(x) (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN)
722 #define S_T6_IP_HDR_LEN 14
723 #define V_T6_IP_HDR_LEN(x) ((x) << S_T6_IP_HDR_LEN)
724 #define G_T6_IP_HDR_LEN(x) (((x) >> S_T6_IP_HDR_LEN) & M_IP_HDR_LEN)
726 #define S_ETH_HDR_LEN 26
727 #define M_ETH_HDR_LEN 0x3F
728 #define V_ETH_HDR_LEN(x) ((x) << S_ETH_HDR_LEN)
729 #define G_ETH_HDR_LEN(x) (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN)
731 #define S_T6_ETH_HDR_LEN 24
732 #define M_T6_ETH_HDR_LEN 0xFF
733 #define V_T6_ETH_HDR_LEN(x) ((x) << S_T6_ETH_HDR_LEN)
734 #define G_T6_ETH_HDR_LEN(x) (((x) >> S_T6_ETH_HDR_LEN) & M_T6_ETH_HDR_LEN)
736 /* cpl_pass_accept_req.l2info fields */
737 #define S_SYN_MAC_IDX 0
738 #define M_SYN_MAC_IDX 0x1FF
739 #define V_SYN_MAC_IDX(x) ((x) << S_SYN_MAC_IDX)
740 #define G_SYN_MAC_IDX(x) (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX)
742 #define S_SYN_XACT_MATCH 9
743 #define V_SYN_XACT_MATCH(x) ((x) << S_SYN_XACT_MATCH)
744 #define F_SYN_XACT_MATCH V_SYN_XACT_MATCH(1U)
746 #define S_SYN_INTF 12
747 #define M_SYN_INTF 0xF
748 #define V_SYN_INTF(x) ((x) << S_SYN_INTF)
749 #define G_SYN_INTF(x) (((x) >> S_SYN_INTF) & M_SYN_INTF)
751 struct cpl_pass_accept_rpl {
758 struct cpl_t5_pass_accept_rpl {
765 __be32 rsvd; /* T5 */
766 __be32 opt3; /* T6 */
770 struct cpl_act_open_req {
782 #define S_FILTER_TUPLE 24
783 #define M_FILTER_TUPLE 0xFFFFFFFFFF
784 #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE)
785 #define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE)
786 struct cpl_t5_act_open_req {
799 struct cpl_t6_act_open_req {
814 /* cpl_{t5,t6}_act_open_req.params field */
815 #define S_AOPEN_FCOEMASK 0
816 #define V_AOPEN_FCOEMASK(x) ((x) << S_AOPEN_FCOEMASK)
817 #define F_AOPEN_FCOEMASK V_AOPEN_FCOEMASK(1U)
819 struct cpl_act_open_req6 {
833 struct cpl_t5_act_open_req6 {
848 struct cpl_t6_act_open_req6 {
865 struct cpl_act_open_rpl {
871 /* cpl_act_open_rpl.atid_status fields */
872 #define S_AOPEN_STATUS 0
873 #define M_AOPEN_STATUS 0xFF
874 #define V_AOPEN_STATUS(x) ((x) << S_AOPEN_STATUS)
875 #define G_AOPEN_STATUS(x) (((x) >> S_AOPEN_STATUS) & M_AOPEN_STATUS)
877 #define S_AOPEN_ATID 8
878 #define M_AOPEN_ATID 0xFFFFFF
879 #define V_AOPEN_ATID(x) ((x) << S_AOPEN_ATID)
880 #define G_AOPEN_ATID(x) (((x) >> S_AOPEN_ATID) & M_AOPEN_ATID)
882 struct cpl_act_establish {
900 /* cpl_get_tcb.reply_ctrl fields */
902 #define M_QUEUENO 0x3FF
903 #define V_QUEUENO(x) ((x) << S_QUEUENO)
904 #define G_QUEUENO(x) (((x) >> S_QUEUENO) & M_QUEUENO)
906 #define S_REPLY_CHAN 14
907 #define V_REPLY_CHAN(x) ((x) << S_REPLY_CHAN)
908 #define F_REPLY_CHAN V_REPLY_CHAN(1U)
910 #define S_NO_REPLY 15
911 #define V_NO_REPLY(x) ((x) << S_NO_REPLY)
912 #define F_NO_REPLY V_NO_REPLY(1U)
914 struct cpl_get_tcb_rpl {
929 struct cpl_set_tcb_field {
938 struct cpl_set_tcb_field_core {
946 /* cpl_set_tcb_field.word_cookie fields */
949 #define V_WORD(x) ((x) << S_WORD)
950 #define G_WORD(x) (((x) >> S_WORD) & M_WORD)
954 #define V_COOKIE(x) ((x) << S_COOKIE)
955 #define G_COOKIE(x) (((x) >> S_COOKIE) & M_COOKIE)
957 struct cpl_set_tcb_rpl {
966 struct cpl_close_con_req {
972 struct cpl_close_con_rpl {
981 struct cpl_close_listsvr_req {
988 /* additional cpl_close_listsvr_req.reply_ctrl field */
989 #define S_LISTSVR_IPV6 14
990 #define V_LISTSVR_IPV6(x) ((x) << S_LISTSVR_IPV6)
991 #define F_LISTSVR_IPV6 V_LISTSVR_IPV6(1U)
993 struct cpl_close_listsvr_rpl {
1000 struct cpl_abort_req_rss {
1002 union opcode_tid ot;
1007 struct cpl_abort_req_rss6 {
1009 union opcode_tid ot;
1010 __u32 srqidx_status;
1013 #define S_ABORT_RSS_STATUS 0
1014 #define M_ABORT_RSS_STATUS 0xff
1015 #define V_ABORT_RSS_STATUS(x) ((x) << S_ABORT_RSS_STATUS)
1016 #define G_ABORT_RSS_STATUS(x) (((x) >> S_ABORT_RSS_STATUS) & M_ABORT_RSS_STATUS)
1018 #define S_ABORT_RSS_SRQIDX 8
1019 #define M_ABORT_RSS_SRQIDX 0xffffff
1020 #define V_ABORT_RSS_SRQIDX(x) ((x) << S_ABORT_RSS_SRQIDX)
1021 #define G_ABORT_RSS_SRQIDX(x) (((x) >> S_ABORT_RSS_SRQIDX) & M_ABORT_RSS_SRQIDX)
1024 /* cpl_abort_req status command code in case of T6,
1025 * bit[0] specifies whether to send RST (0) to remote peer or suppress it (1)
1026 * bit[1] indicates ABORT_REQ was sent after a CLOSE_CON_REQ
1027 * bit[2] specifies whether to disable the mmgr (1) or not (0)
1029 struct cpl_abort_req {
1031 union opcode_tid ot;
1038 struct cpl_abort_rpl_rss {
1040 union opcode_tid ot;
1045 struct cpl_abort_rpl_rss6 {
1047 union opcode_tid ot;
1048 __u32 srqidx_status;
1051 struct cpl_abort_rpl {
1053 union opcode_tid ot;
1060 struct cpl_peer_close {
1062 union opcode_tid ot;
1066 struct cpl_tid_release {
1068 union opcode_tid ot;
1081 /* tx_data_wr.flags fields */
1082 #define S_TX_ACK_PAGES 21
1083 #define M_TX_ACK_PAGES 0x7
1084 #define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES)
1085 #define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES)
1087 /* tx_data_wr.param fields */
1089 #define M_TX_PORT 0x7
1090 #define V_TX_PORT(x) ((x) << S_TX_PORT)
1091 #define G_TX_PORT(x) (((x) >> S_TX_PORT) & M_TX_PORT)
1094 #define M_TX_MSS 0xF
1095 #define V_TX_MSS(x) ((x) << S_TX_MSS)
1096 #define G_TX_MSS(x) (((x) >> S_TX_MSS) & M_TX_MSS)
1099 #define M_TX_QOS 0xFF
1100 #define V_TX_QOS(x) ((x) << S_TX_QOS)
1101 #define G_TX_QOS(x) (((x) >> S_TX_QOS) & M_TX_QOS)
1103 #define S_TX_SNDBUF 16
1104 #define M_TX_SNDBUF 0xFFFF
1105 #define V_TX_SNDBUF(x) ((x) << S_TX_SNDBUF)
1106 #define G_TX_SNDBUF(x) (((x) >> S_TX_SNDBUF) & M_TX_SNDBUF)
1108 struct cpl_tx_data {
1109 union opcode_tid ot;
1115 /* cpl_tx_data.flags fields */
1116 #define S_TX_PROXY 5
1117 #define V_TX_PROXY(x) ((x) << S_TX_PROXY)
1118 #define F_TX_PROXY V_TX_PROXY(1U)
1120 #define S_TX_ULP_SUBMODE 6
1121 #define M_TX_ULP_SUBMODE 0xF
1122 #define V_TX_ULP_SUBMODE(x) ((x) << S_TX_ULP_SUBMODE)
1123 #define G_TX_ULP_SUBMODE(x) (((x) >> S_TX_ULP_SUBMODE) & M_TX_ULP_SUBMODE)
1125 #define S_TX_ULP_MODE 10
1126 #define M_TX_ULP_MODE 0x7
1127 #define V_TX_ULP_MODE(x) ((x) << S_TX_ULP_MODE)
1128 #define G_TX_ULP_MODE(x) (((x) >> S_TX_ULP_MODE) & M_TX_ULP_MODE)
1130 #define S_TX_FORCE 13
1131 #define V_TX_FORCE(x) ((x) << S_TX_FORCE)
1132 #define F_TX_FORCE V_TX_FORCE(1U)
1134 #define S_TX_SHOVE 14
1135 #define V_TX_SHOVE(x) ((x) << S_TX_SHOVE)
1136 #define F_TX_SHOVE V_TX_SHOVE(1U)
1138 #define S_TX_MORE 15
1139 #define V_TX_MORE(x) ((x) << S_TX_MORE)
1140 #define F_TX_MORE V_TX_MORE(1U)
1143 #define V_TX_URG(x) ((x) << S_TX_URG)
1144 #define F_TX_URG V_TX_URG(1U)
1146 #define S_TX_FLUSH 17
1147 #define V_TX_FLUSH(x) ((x) << S_TX_FLUSH)
1148 #define F_TX_FLUSH V_TX_FLUSH(1U)
1150 #define S_TX_SAVE 18
1151 #define V_TX_SAVE(x) ((x) << S_TX_SAVE)
1152 #define F_TX_SAVE V_TX_SAVE(1U)
1155 #define V_TX_TNL(x) ((x) << S_TX_TNL)
1156 #define F_TX_TNL V_TX_TNL(1U)
1158 #define S_T6_TX_FORCE 20
1159 #define V_T6_TX_FORCE(x) ((x) << S_T6_TX_FORCE)
1160 #define F_T6_TX_FORCE V_T6_TX_FORCE(1U)
1162 /* additional tx_data_wr.flags fields */
1163 #define S_TX_CPU_IDX 0
1164 #define M_TX_CPU_IDX 0x3F
1165 #define V_TX_CPU_IDX(x) ((x) << S_TX_CPU_IDX)
1166 #define G_TX_CPU_IDX(x) (((x) >> S_TX_CPU_IDX) & M_TX_CPU_IDX)
1168 #define S_TX_CLOSE 17
1169 #define V_TX_CLOSE(x) ((x) << S_TX_CLOSE)
1170 #define F_TX_CLOSE V_TX_CLOSE(1U)
1172 #define S_TX_INIT 18
1173 #define V_TX_INIT(x) ((x) << S_TX_INIT)
1174 #define F_TX_INIT V_TX_INIT(1U)
1176 #define S_TX_IMM_ACK 19
1177 #define V_TX_IMM_ACK(x) ((x) << S_TX_IMM_ACK)
1178 #define F_TX_IMM_ACK V_TX_IMM_ACK(1U)
1180 #define S_TX_IMM_DMA 20
1181 #define V_TX_IMM_DMA(x) ((x) << S_TX_IMM_DMA)
1182 #define F_TX_IMM_DMA V_TX_IMM_DMA(1U)
1184 struct cpl_tx_data_ack {
1186 union opcode_tid ot;
1190 struct cpl_wr_ack { /* XXX */
1192 union opcode_tid ot;
1199 struct cpl_tx_pkt_core {
1208 struct cpl_tx_pkt_core c;
1211 #define cpl_tx_pkt_xt cpl_tx_pkt
1213 /* cpl_tx_pkt_core.ctrl0 fields */
1214 #define S_TXPKT_VF 0
1215 #define M_TXPKT_VF 0xFF
1216 #define V_TXPKT_VF(x) ((x) << S_TXPKT_VF)
1217 #define G_TXPKT_VF(x) (((x) >> S_TXPKT_VF) & M_TXPKT_VF)
1219 #define S_TXPKT_PF 8
1220 #define M_TXPKT_PF 0x7
1221 #define V_TXPKT_PF(x) ((x) << S_TXPKT_PF)
1222 #define G_TXPKT_PF(x) (((x) >> S_TXPKT_PF) & M_TXPKT_PF)
1224 #define S_TXPKT_VF_VLD 11
1225 #define V_TXPKT_VF_VLD(x) ((x) << S_TXPKT_VF_VLD)
1226 #define F_TXPKT_VF_VLD V_TXPKT_VF_VLD(1U)
1228 #define S_TXPKT_OVLAN_IDX 12
1229 #define M_TXPKT_OVLAN_IDX 0xF
1230 #define V_TXPKT_OVLAN_IDX(x) ((x) << S_TXPKT_OVLAN_IDX)
1231 #define G_TXPKT_OVLAN_IDX(x) (((x) >> S_TXPKT_OVLAN_IDX) & M_TXPKT_OVLAN_IDX)
1233 #define S_TXPKT_T5_OVLAN_IDX 12
1234 #define M_TXPKT_T5_OVLAN_IDX 0x7
1235 #define V_TXPKT_T5_OVLAN_IDX(x) ((x) << S_TXPKT_T5_OVLAN_IDX)
1236 #define G_TXPKT_T5_OVLAN_IDX(x) (((x) >> S_TXPKT_T5_OVLAN_IDX) & \
1237 M_TXPKT_T5_OVLAN_IDX)
1239 #define S_TXPKT_INTF 16
1240 #define M_TXPKT_INTF 0xF
1241 #define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF)
1242 #define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF)
1244 #define S_TXPKT_SPECIAL_STAT 20
1245 #define V_TXPKT_SPECIAL_STAT(x) ((x) << S_TXPKT_SPECIAL_STAT)
1246 #define F_TXPKT_SPECIAL_STAT V_TXPKT_SPECIAL_STAT(1U)
1248 #define S_TXPKT_T5_FCS_DIS 21
1249 #define V_TXPKT_T5_FCS_DIS(x) ((x) << S_TXPKT_T5_FCS_DIS)
1250 #define F_TXPKT_T5_FCS_DIS V_TXPKT_T5_FCS_DIS(1U)
1252 #define S_TXPKT_INS_OVLAN 21
1253 #define V_TXPKT_INS_OVLAN(x) ((x) << S_TXPKT_INS_OVLAN)
1254 #define F_TXPKT_INS_OVLAN V_TXPKT_INS_OVLAN(1U)
1256 #define S_TXPKT_T5_INS_OVLAN 15
1257 #define V_TXPKT_T5_INS_OVLAN(x) ((x) << S_TXPKT_T5_INS_OVLAN)
1258 #define F_TXPKT_T5_INS_OVLAN V_TXPKT_T5_INS_OVLAN(1U)
1260 #define S_TXPKT_STAT_DIS 22
1261 #define V_TXPKT_STAT_DIS(x) ((x) << S_TXPKT_STAT_DIS)
1262 #define F_TXPKT_STAT_DIS V_TXPKT_STAT_DIS(1U)
1264 #define S_TXPKT_LOOPBACK 23
1265 #define V_TXPKT_LOOPBACK(x) ((x) << S_TXPKT_LOOPBACK)
1266 #define F_TXPKT_LOOPBACK V_TXPKT_LOOPBACK(1U)
1268 #define S_TXPKT_TSTAMP 23
1269 #define V_TXPKT_TSTAMP(x) ((x) << S_TXPKT_TSTAMP)
1270 #define F_TXPKT_TSTAMP V_TXPKT_TSTAMP(1U)
1272 #define S_TXPKT_OPCODE 24
1273 #define M_TXPKT_OPCODE 0xFF
1274 #define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE)
1275 #define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE)
1277 /* cpl_tx_pkt_core.ctrl1 fields */
1278 #define S_TXPKT_SA_IDX 0
1279 #define M_TXPKT_SA_IDX 0xFFF
1280 #define V_TXPKT_SA_IDX(x) ((x) << S_TXPKT_SA_IDX)
1281 #define G_TXPKT_SA_IDX(x) (((x) >> S_TXPKT_SA_IDX) & M_TXPKT_SA_IDX)
1283 #define S_TXPKT_CSUM_END 12
1284 #define M_TXPKT_CSUM_END 0xFF
1285 #define V_TXPKT_CSUM_END(x) ((x) << S_TXPKT_CSUM_END)
1286 #define G_TXPKT_CSUM_END(x) (((x) >> S_TXPKT_CSUM_END) & M_TXPKT_CSUM_END)
1288 #define S_TXPKT_CSUM_START 20
1289 #define M_TXPKT_CSUM_START 0x3FF
1290 #define V_TXPKT_CSUM_START(x) ((x) << S_TXPKT_CSUM_START)
1291 #define G_TXPKT_CSUM_START(x) (((x) >> S_TXPKT_CSUM_START) & M_TXPKT_CSUM_START)
1293 #define S_TXPKT_IPHDR_LEN 20
1294 #define M_TXPKT_IPHDR_LEN 0x3FFF
1295 #define V_TXPKT_IPHDR_LEN(x) ((__u64)(x) << S_TXPKT_IPHDR_LEN)
1296 #define G_TXPKT_IPHDR_LEN(x) (((x) >> S_TXPKT_IPHDR_LEN) & M_TXPKT_IPHDR_LEN)
1298 #define M_T6_TXPKT_IPHDR_LEN 0xFFF
1299 #define G_T6_TXPKT_IPHDR_LEN(x) \
1300 (((x) >> S_TXPKT_IPHDR_LEN) & M_T6_TXPKT_IPHDR_LEN)
1302 #define S_TXPKT_CSUM_LOC 30
1303 #define M_TXPKT_CSUM_LOC 0x3FF
1304 #define V_TXPKT_CSUM_LOC(x) ((__u64)(x) << S_TXPKT_CSUM_LOC)
1305 #define G_TXPKT_CSUM_LOC(x) (((x) >> S_TXPKT_CSUM_LOC) & M_TXPKT_CSUM_LOC)
1307 #define S_TXPKT_ETHHDR_LEN 34
1308 #define M_TXPKT_ETHHDR_LEN 0x3F
1309 #define V_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_TXPKT_ETHHDR_LEN)
1310 #define G_TXPKT_ETHHDR_LEN(x) (((x) >> S_TXPKT_ETHHDR_LEN) & M_TXPKT_ETHHDR_LEN)
1312 #define S_T6_TXPKT_ETHHDR_LEN 32
1313 #define M_T6_TXPKT_ETHHDR_LEN 0xFF
1314 #define V_T6_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_T6_TXPKT_ETHHDR_LEN)
1315 #define G_T6_TXPKT_ETHHDR_LEN(x) \
1316 (((x) >> S_T6_TXPKT_ETHHDR_LEN) & M_T6_TXPKT_ETHHDR_LEN)
1318 #define S_TXPKT_CSUM_TYPE 40
1319 #define M_TXPKT_CSUM_TYPE 0xF
1320 #define V_TXPKT_CSUM_TYPE(x) ((__u64)(x) << S_TXPKT_CSUM_TYPE)
1321 #define G_TXPKT_CSUM_TYPE(x) (((x) >> S_TXPKT_CSUM_TYPE) & M_TXPKT_CSUM_TYPE)
1323 #define S_TXPKT_VLAN 44
1324 #define M_TXPKT_VLAN 0xFFFF
1325 #define V_TXPKT_VLAN(x) ((__u64)(x) << S_TXPKT_VLAN)
1326 #define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN)
1328 #define S_TXPKT_VLAN_VLD 60
1329 #define V_TXPKT_VLAN_VLD(x) ((__u64)(x) << S_TXPKT_VLAN_VLD)
1330 #define F_TXPKT_VLAN_VLD V_TXPKT_VLAN_VLD(1ULL)
1332 #define S_TXPKT_IPSEC 61
1333 #define V_TXPKT_IPSEC(x) ((__u64)(x) << S_TXPKT_IPSEC)
1334 #define F_TXPKT_IPSEC V_TXPKT_IPSEC(1ULL)
1336 #define S_TXPKT_IPCSUM_DIS 62
1337 #define V_TXPKT_IPCSUM_DIS(x) ((__u64)(x) << S_TXPKT_IPCSUM_DIS)
1338 #define F_TXPKT_IPCSUM_DIS V_TXPKT_IPCSUM_DIS(1ULL)
1340 #define S_TXPKT_L4CSUM_DIS 63
1341 #define V_TXPKT_L4CSUM_DIS(x) ((__u64)(x) << S_TXPKT_L4CSUM_DIS)
1342 #define F_TXPKT_L4CSUM_DIS V_TXPKT_L4CSUM_DIS(1ULL)
1344 struct cpl_tx_pkt_lso_core {
1348 __be32 seqno_offset;
1350 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1353 struct cpl_tx_pkt_lso {
1355 struct cpl_tx_pkt_lso_core c;
1356 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1359 struct cpl_tx_pkt_ufo_core {
1366 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1369 struct cpl_tx_pkt_ufo {
1371 struct cpl_tx_pkt_ufo_core c;
1372 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
1375 /* cpl_tx_pkt_lso_core.lso_ctrl fields */
1376 #define S_LSO_TCPHDR_LEN 0
1377 #define M_LSO_TCPHDR_LEN 0xF
1378 #define V_LSO_TCPHDR_LEN(x) ((x) << S_LSO_TCPHDR_LEN)
1379 #define G_LSO_TCPHDR_LEN(x) (((x) >> S_LSO_TCPHDR_LEN) & M_LSO_TCPHDR_LEN)
1381 #define S_LSO_IPHDR_LEN 4
1382 #define M_LSO_IPHDR_LEN 0xFFF
1383 #define V_LSO_IPHDR_LEN(x) ((x) << S_LSO_IPHDR_LEN)
1384 #define G_LSO_IPHDR_LEN(x) (((x) >> S_LSO_IPHDR_LEN) & M_LSO_IPHDR_LEN)
1386 #define S_LSO_ETHHDR_LEN 16
1387 #define M_LSO_ETHHDR_LEN 0xF
1388 #define V_LSO_ETHHDR_LEN(x) ((x) << S_LSO_ETHHDR_LEN)
1389 #define G_LSO_ETHHDR_LEN(x) (((x) >> S_LSO_ETHHDR_LEN) & M_LSO_ETHHDR_LEN)
1391 #define S_LSO_IPV6 20
1392 #define V_LSO_IPV6(x) ((x) << S_LSO_IPV6)
1393 #define F_LSO_IPV6 V_LSO_IPV6(1U)
1395 #define S_LSO_OFLD_ENCAP 21
1396 #define V_LSO_OFLD_ENCAP(x) ((x) << S_LSO_OFLD_ENCAP)
1397 #define F_LSO_OFLD_ENCAP V_LSO_OFLD_ENCAP(1U)
1399 #define S_LSO_LAST_SLICE 22
1400 #define V_LSO_LAST_SLICE(x) ((x) << S_LSO_LAST_SLICE)
1401 #define F_LSO_LAST_SLICE V_LSO_LAST_SLICE(1U)
1403 #define S_LSO_FIRST_SLICE 23
1404 #define V_LSO_FIRST_SLICE(x) ((x) << S_LSO_FIRST_SLICE)
1405 #define F_LSO_FIRST_SLICE V_LSO_FIRST_SLICE(1U)
1407 #define S_LSO_OPCODE 24
1408 #define M_LSO_OPCODE 0xFF
1409 #define V_LSO_OPCODE(x) ((x) << S_LSO_OPCODE)
1410 #define G_LSO_OPCODE(x) (((x) >> S_LSO_OPCODE) & M_LSO_OPCODE)
1412 #define S_LSO_T5_XFER_SIZE 0
1413 #define M_LSO_T5_XFER_SIZE 0xFFFFFFF
1414 #define V_LSO_T5_XFER_SIZE(x) ((x) << S_LSO_T5_XFER_SIZE)
1415 #define G_LSO_T5_XFER_SIZE(x) (((x) >> S_LSO_T5_XFER_SIZE) & M_LSO_T5_XFER_SIZE)
1417 /* cpl_tx_pkt_lso_core.mss fields */
1419 #define M_LSO_MSS 0x3FFF
1420 #define V_LSO_MSS(x) ((x) << S_LSO_MSS)
1421 #define G_LSO_MSS(x) (((x) >> S_LSO_MSS) & M_LSO_MSS)
1423 #define S_LSO_IPID_SPLIT 15
1424 #define V_LSO_IPID_SPLIT(x) ((x) << S_LSO_IPID_SPLIT)
1425 #define F_LSO_IPID_SPLIT V_LSO_IPID_SPLIT(1U)
1427 struct cpl_tx_pkt_fso {
1432 __be32 param_offset;
1434 /* encapsulated CPL (TX_PKT or TX_PKT_XT) follows here */
1437 /* cpl_tx_pkt_fso.fso_ctrl fields different from cpl_tx_pkt_lso.lso_ctrl */
1438 #define S_FSO_XCHG_CLASS 21
1439 #define V_FSO_XCHG_CLASS(x) ((x) << S_FSO_XCHG_CLASS)
1440 #define F_FSO_XCHG_CLASS V_FSO_XCHG_CLASS(1U)
1442 #define S_FSO_INITIATOR 20
1443 #define V_FSO_INITIATOR(x) ((x) << S_FSO_INITIATOR)
1444 #define F_FSO_INITIATOR V_FSO_INITIATOR(1U)
1446 #define S_FSO_FCHDR_LEN 12
1447 #define M_FSO_FCHDR_LEN 0xF
1448 #define V_FSO_FCHDR_LEN(x) ((x) << S_FSO_FCHDR_LEN)
1449 #define G_FSO_FCHDR_LEN(x) (((x) >> S_FSO_FCHDR_LEN) & M_FSO_FCHDR_LEN)
1451 struct cpl_iscsi_hdr_no_rss {
1452 union opcode_tid ot;
1461 struct cpl_tx_data_iso {
1468 __be32 reserved2_seglen_offset;
1469 __be32 datasn_offset;
1470 __be32 buffer_offset;
1473 /* encapsulated CPL_TX_DATA follows here */
1476 /* cpl_tx_data_iso.op_to_scsi fields */
1477 #define S_CPL_TX_DATA_ISO_OP 24
1478 #define M_CPL_TX_DATA_ISO_OP 0xff
1479 #define V_CPL_TX_DATA_ISO_OP(x) ((x) << S_CPL_TX_DATA_ISO_OP)
1480 #define G_CPL_TX_DATA_ISO_OP(x) \
1481 (((x) >> S_CPL_TX_DATA_ISO_OP) & M_CPL_TX_DATA_ISO_OP)
1483 #define S_CPL_TX_DATA_ISO_FIRST 23
1484 #define M_CPL_TX_DATA_ISO_FIRST 0x1
1485 #define V_CPL_TX_DATA_ISO_FIRST(x) ((x) << S_CPL_TX_DATA_ISO_FIRST)
1486 #define G_CPL_TX_DATA_ISO_FIRST(x) \
1487 (((x) >> S_CPL_TX_DATA_ISO_FIRST) & M_CPL_TX_DATA_ISO_FIRST)
1488 #define F_CPL_TX_DATA_ISO_FIRST V_CPL_TX_DATA_ISO_FIRST(1U)
1490 #define S_CPL_TX_DATA_ISO_LAST 22
1491 #define M_CPL_TX_DATA_ISO_LAST 0x1
1492 #define V_CPL_TX_DATA_ISO_LAST(x) ((x) << S_CPL_TX_DATA_ISO_LAST)
1493 #define G_CPL_TX_DATA_ISO_LAST(x) \
1494 (((x) >> S_CPL_TX_DATA_ISO_LAST) & M_CPL_TX_DATA_ISO_LAST)
1495 #define F_CPL_TX_DATA_ISO_LAST V_CPL_TX_DATA_ISO_LAST(1U)
1497 #define S_CPL_TX_DATA_ISO_CPLHDRLEN 21
1498 #define M_CPL_TX_DATA_ISO_CPLHDRLEN 0x1
1499 #define V_CPL_TX_DATA_ISO_CPLHDRLEN(x) ((x) << S_CPL_TX_DATA_ISO_CPLHDRLEN)
1500 #define G_CPL_TX_DATA_ISO_CPLHDRLEN(x) \
1501 (((x) >> S_CPL_TX_DATA_ISO_CPLHDRLEN) & M_CPL_TX_DATA_ISO_CPLHDRLEN)
1502 #define F_CPL_TX_DATA_ISO_CPLHDRLEN V_CPL_TX_DATA_ISO_CPLHDRLEN(1U)
1504 #define S_CPL_TX_DATA_ISO_HDRCRC 20
1505 #define M_CPL_TX_DATA_ISO_HDRCRC 0x1
1506 #define V_CPL_TX_DATA_ISO_HDRCRC(x) ((x) << S_CPL_TX_DATA_ISO_HDRCRC)
1507 #define G_CPL_TX_DATA_ISO_HDRCRC(x) \
1508 (((x) >> S_CPL_TX_DATA_ISO_HDRCRC) & M_CPL_TX_DATA_ISO_HDRCRC)
1509 #define F_CPL_TX_DATA_ISO_HDRCRC V_CPL_TX_DATA_ISO_HDRCRC(1U)
1511 #define S_CPL_TX_DATA_ISO_PLDCRC 19
1512 #define M_CPL_TX_DATA_ISO_PLDCRC 0x1
1513 #define V_CPL_TX_DATA_ISO_PLDCRC(x) ((x) << S_CPL_TX_DATA_ISO_PLDCRC)
1514 #define G_CPL_TX_DATA_ISO_PLDCRC(x) \
1515 (((x) >> S_CPL_TX_DATA_ISO_PLDCRC) & M_CPL_TX_DATA_ISO_PLDCRC)
1516 #define F_CPL_TX_DATA_ISO_PLDCRC V_CPL_TX_DATA_ISO_PLDCRC(1U)
1518 #define S_CPL_TX_DATA_ISO_IMMEDIATE 18
1519 #define M_CPL_TX_DATA_ISO_IMMEDIATE 0x1
1520 #define V_CPL_TX_DATA_ISO_IMMEDIATE(x) ((x) << S_CPL_TX_DATA_ISO_IMMEDIATE)
1521 #define G_CPL_TX_DATA_ISO_IMMEDIATE(x) \
1522 (((x) >> S_CPL_TX_DATA_ISO_IMMEDIATE) & M_CPL_TX_DATA_ISO_IMMEDIATE)
1523 #define F_CPL_TX_DATA_ISO_IMMEDIATE V_CPL_TX_DATA_ISO_IMMEDIATE(1U)
1525 #define S_CPL_TX_DATA_ISO_SCSI 16
1526 #define M_CPL_TX_DATA_ISO_SCSI 0x3
1527 #define V_CPL_TX_DATA_ISO_SCSI(x) ((x) << S_CPL_TX_DATA_ISO_SCSI)
1528 #define G_CPL_TX_DATA_ISO_SCSI(x) \
1529 (((x) >> S_CPL_TX_DATA_ISO_SCSI) & M_CPL_TX_DATA_ISO_SCSI)
1531 /* cpl_tx_data_iso.reserved2_seglen_offset fields */
1532 #define S_CPL_TX_DATA_ISO_SEGLEN_OFFSET 0
1533 #define M_CPL_TX_DATA_ISO_SEGLEN_OFFSET 0xffffff
1534 #define V_CPL_TX_DATA_ISO_SEGLEN_OFFSET(x) \
1535 ((x) << S_CPL_TX_DATA_ISO_SEGLEN_OFFSET)
1536 #define G_CPL_TX_DATA_ISO_SEGLEN_OFFSET(x) \
1537 (((x) >> S_CPL_TX_DATA_ISO_SEGLEN_OFFSET) & \
1538 M_CPL_TX_DATA_ISO_SEGLEN_OFFSET)
1540 struct cpl_iscsi_hdr {
1542 union opcode_tid ot;
1551 /* cpl_iscsi_hdr.pdu_len_ddp fields */
1552 #define S_ISCSI_PDU_LEN 0
1553 #define M_ISCSI_PDU_LEN 0x7FFF
1554 #define V_ISCSI_PDU_LEN(x) ((x) << S_ISCSI_PDU_LEN)
1555 #define G_ISCSI_PDU_LEN(x) (((x) >> S_ISCSI_PDU_LEN) & M_ISCSI_PDU_LEN)
1557 #define S_ISCSI_DDP 15
1558 #define V_ISCSI_DDP(x) ((x) << S_ISCSI_DDP)
1559 #define F_ISCSI_DDP V_ISCSI_DDP(1U)
1561 struct cpl_iscsi_data {
1563 union opcode_tid ot;
1572 struct cpl_rx_data {
1574 union opcode_tid ot;
1579 #if defined(__LITTLE_ENDIAN_BITFIELD)
1595 struct cpl_fcoe_hdr {
1597 union opcode_tid ot;
1611 /* cpl_fcoe_hdr.rctl_fctl fields */
1612 #define S_FCOE_FCHDR_RCTL 24
1613 #define M_FCOE_FCHDR_RCTL 0xff
1614 #define V_FCOE_FCHDR_RCTL(x) ((x) << S_FCOE_FCHDR_RCTL)
1615 #define G_FCOE_FCHDR_RCTL(x) \
1616 (((x) >> S_FCOE_FCHDR_RCTL) & M_FCOE_FCHDR_RCTL)
1618 #define S_FCOE_FCHDR_FCTL 0
1619 #define M_FCOE_FCHDR_FCTL 0xffffff
1620 #define V_FCOE_FCHDR_FCTL(x) ((x) << S_FCOE_FCHDR_FCTL)
1621 #define G_FCOE_FCHDR_FCTL(x) \
1622 (((x) >> S_FCOE_FCHDR_FCTL) & M_FCOE_FCHDR_FCTL)
1624 struct cpl_fcoe_data {
1626 union opcode_tid ot;
1634 struct cpl_rx_urg_notify {
1636 union opcode_tid ot;
1640 struct cpl_rx_urg_pkt {
1642 union opcode_tid ot;
1647 struct cpl_rx_data_ack {
1649 union opcode_tid ot;
1653 struct cpl_rx_data_ack_core {
1654 union opcode_tid ot;
1658 /* cpl_rx_data_ack.ack_seq fields */
1659 #define S_RX_CREDITS 0
1660 #define M_RX_CREDITS 0x3FFFFFF
1661 #define V_RX_CREDITS(x) ((x) << S_RX_CREDITS)
1662 #define G_RX_CREDITS(x) (((x) >> S_RX_CREDITS) & M_RX_CREDITS)
1664 #define S_RX_MODULATE_TX 26
1665 #define V_RX_MODULATE_TX(x) ((x) << S_RX_MODULATE_TX)
1666 #define F_RX_MODULATE_TX V_RX_MODULATE_TX(1U)
1668 #define S_RX_MODULATE_RX 27
1669 #define V_RX_MODULATE_RX(x) ((x) << S_RX_MODULATE_RX)
1670 #define F_RX_MODULATE_RX V_RX_MODULATE_RX(1U)
1672 #define S_RX_FORCE_ACK 28
1673 #define V_RX_FORCE_ACK(x) ((x) << S_RX_FORCE_ACK)
1674 #define F_RX_FORCE_ACK V_RX_FORCE_ACK(1U)
1676 #define S_RX_DACK_MODE 29
1677 #define M_RX_DACK_MODE 0x3
1678 #define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE)
1679 #define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE)
1681 #define S_RX_DACK_CHANGE 31
1682 #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE)
1683 #define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U)
1685 struct cpl_rx_ddp_complete {
1687 union opcode_tid ot;
1693 struct cpl_rx_data_ddp {
1695 union opcode_tid ot;
1707 #define cpl_rx_iscsi_ddp cpl_rx_data_ddp
1709 struct cpl_rx_fcoe_ddp {
1711 union opcode_tid ot;
1720 struct cpl_rx_data_dif {
1722 union opcode_tid ot;
1734 struct cpl_rx_iscsi_dif {
1736 union opcode_tid ot;
1751 struct cpl_rx_iscsi_cmp {
1753 union opcode_tid ot;
1764 struct cpl_rx_fcoe_dif {
1766 union opcode_tid ot;
1775 /* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddpvld fields */
1776 #define S_DDP_VALID 15
1777 #define M_DDP_VALID 0x1FFFF
1778 #define V_DDP_VALID(x) ((x) << S_DDP_VALID)
1779 #define G_DDP_VALID(x) (((x) >> S_DDP_VALID) & M_DDP_VALID)
1781 #define S_DDP_PPOD_MISMATCH 15
1782 #define V_DDP_PPOD_MISMATCH(x) ((x) << S_DDP_PPOD_MISMATCH)
1783 #define F_DDP_PPOD_MISMATCH V_DDP_PPOD_MISMATCH(1U)
1785 #define S_DDP_PDU 16
1786 #define V_DDP_PDU(x) ((x) << S_DDP_PDU)
1787 #define F_DDP_PDU V_DDP_PDU(1U)
1789 #define S_DDP_LLIMIT_ERR 17
1790 #define V_DDP_LLIMIT_ERR(x) ((x) << S_DDP_LLIMIT_ERR)
1791 #define F_DDP_LLIMIT_ERR V_DDP_LLIMIT_ERR(1U)
1793 #define S_DDP_PPOD_PARITY_ERR 18
1794 #define V_DDP_PPOD_PARITY_ERR(x) ((x) << S_DDP_PPOD_PARITY_ERR)
1795 #define F_DDP_PPOD_PARITY_ERR V_DDP_PPOD_PARITY_ERR(1U)
1797 #define S_DDP_PADDING_ERR 19
1798 #define V_DDP_PADDING_ERR(x) ((x) << S_DDP_PADDING_ERR)
1799 #define F_DDP_PADDING_ERR V_DDP_PADDING_ERR(1U)
1801 #define S_DDP_HDRCRC_ERR 20
1802 #define V_DDP_HDRCRC_ERR(x) ((x) << S_DDP_HDRCRC_ERR)
1803 #define F_DDP_HDRCRC_ERR V_DDP_HDRCRC_ERR(1U)
1805 #define S_DDP_DATACRC_ERR 21
1806 #define V_DDP_DATACRC_ERR(x) ((x) << S_DDP_DATACRC_ERR)
1807 #define F_DDP_DATACRC_ERR V_DDP_DATACRC_ERR(1U)
1809 #define S_DDP_INVALID_TAG 22
1810 #define V_DDP_INVALID_TAG(x) ((x) << S_DDP_INVALID_TAG)
1811 #define F_DDP_INVALID_TAG V_DDP_INVALID_TAG(1U)
1813 #define S_DDP_ULIMIT_ERR 23
1814 #define V_DDP_ULIMIT_ERR(x) ((x) << S_DDP_ULIMIT_ERR)
1815 #define F_DDP_ULIMIT_ERR V_DDP_ULIMIT_ERR(1U)
1817 #define S_DDP_OFFSET_ERR 24
1818 #define V_DDP_OFFSET_ERR(x) ((x) << S_DDP_OFFSET_ERR)
1819 #define F_DDP_OFFSET_ERR V_DDP_OFFSET_ERR(1U)
1821 #define S_DDP_COLOR_ERR 25
1822 #define V_DDP_COLOR_ERR(x) ((x) << S_DDP_COLOR_ERR)
1823 #define F_DDP_COLOR_ERR V_DDP_COLOR_ERR(1U)
1825 #define S_DDP_TID_MISMATCH 26
1826 #define V_DDP_TID_MISMATCH(x) ((x) << S_DDP_TID_MISMATCH)
1827 #define F_DDP_TID_MISMATCH V_DDP_TID_MISMATCH(1U)
1829 #define S_DDP_INVALID_PPOD 27
1830 #define V_DDP_INVALID_PPOD(x) ((x) << S_DDP_INVALID_PPOD)
1831 #define F_DDP_INVALID_PPOD V_DDP_INVALID_PPOD(1U)
1833 #define S_DDP_ULP_MODE 28
1834 #define M_DDP_ULP_MODE 0xF
1835 #define V_DDP_ULP_MODE(x) ((x) << S_DDP_ULP_MODE)
1836 #define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE)
1838 /* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddp_report fields */
1839 #define S_DDP_OFFSET 0
1840 #define M_DDP_OFFSET 0xFFFFFF
1841 #define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET)
1842 #define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET)
1844 #define S_DDP_DACK_MODE 24
1845 #define M_DDP_DACK_MODE 0x3
1846 #define V_DDP_DACK_MODE(x) ((x) << S_DDP_DACK_MODE)
1847 #define G_DDP_DACK_MODE(x) (((x) >> S_DDP_DACK_MODE) & M_DDP_DACK_MODE)
1849 #define S_DDP_BUF_IDX 26
1850 #define V_DDP_BUF_IDX(x) ((x) << S_DDP_BUF_IDX)
1851 #define F_DDP_BUF_IDX V_DDP_BUF_IDX(1U)
1853 #define S_DDP_URG 27
1854 #define V_DDP_URG(x) ((x) << S_DDP_URG)
1855 #define F_DDP_URG V_DDP_URG(1U)
1857 #define S_DDP_PSH 28
1858 #define V_DDP_PSH(x) ((x) << S_DDP_PSH)
1859 #define F_DDP_PSH V_DDP_PSH(1U)
1861 #define S_DDP_BUF_COMPLETE 29
1862 #define V_DDP_BUF_COMPLETE(x) ((x) << S_DDP_BUF_COMPLETE)
1863 #define F_DDP_BUF_COMPLETE V_DDP_BUF_COMPLETE(1U)
1865 #define S_DDP_BUF_TIMED_OUT 30
1866 #define V_DDP_BUF_TIMED_OUT(x) ((x) << S_DDP_BUF_TIMED_OUT)
1867 #define F_DDP_BUF_TIMED_OUT V_DDP_BUF_TIMED_OUT(1U)
1869 #define S_DDP_INV 31
1870 #define V_DDP_INV(x) ((x) << S_DDP_INV)
1871 #define F_DDP_INV V_DDP_INV(1U)
1876 #if defined(__LITTLE_ENDIAN_BITFIELD)
1897 /* rx_pkt.l2info fields */
1898 #define S_RX_ETHHDR_LEN 0
1899 #define M_RX_ETHHDR_LEN 0x1F
1900 #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN)
1901 #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN)
1903 #define S_RX_T5_ETHHDR_LEN 0
1904 #define M_RX_T5_ETHHDR_LEN 0x3F
1905 #define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN)
1906 #define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN)
1908 #define M_RX_T6_ETHHDR_LEN 0xFF
1909 #define G_RX_T6_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_T6_ETHHDR_LEN)
1911 #define S_RX_PKTYPE 5
1912 #define M_RX_PKTYPE 0x7
1913 #define V_RX_PKTYPE(x) ((x) << S_RX_PKTYPE)
1914 #define G_RX_PKTYPE(x) (((x) >> S_RX_PKTYPE) & M_RX_PKTYPE)
1916 #define S_RX_T5_DATYPE 6
1917 #define M_RX_T5_DATYPE 0x3
1918 #define V_RX_T5_DATYPE(x) ((x) << S_RX_T5_DATYPE)
1919 #define G_RX_T5_DATYPE(x) (((x) >> S_RX_T5_DATYPE) & M_RX_T5_DATYPE)
1921 #define S_RX_MACIDX 8
1922 #define M_RX_MACIDX 0x1FF
1923 #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX)
1924 #define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX)
1926 #define S_RX_T5_PKTYPE 17
1927 #define M_RX_T5_PKTYPE 0x7
1928 #define V_RX_T5_PKTYPE(x) ((x) << S_RX_T5_PKTYPE)
1929 #define G_RX_T5_PKTYPE(x) (((x) >> S_RX_T5_PKTYPE) & M_RX_T5_PKTYPE)
1931 #define S_RX_DATYPE 18
1932 #define M_RX_DATYPE 0x3
1933 #define V_RX_DATYPE(x) ((x) << S_RX_DATYPE)
1934 #define G_RX_DATYPE(x) (((x) >> S_RX_DATYPE) & M_RX_DATYPE)
1936 #define S_RXF_PSH 20
1937 #define V_RXF_PSH(x) ((x) << S_RXF_PSH)
1938 #define F_RXF_PSH V_RXF_PSH(1U)
1940 #define S_RXF_SYN 21
1941 #define V_RXF_SYN(x) ((x) << S_RXF_SYN)
1942 #define F_RXF_SYN V_RXF_SYN(1U)
1944 #define S_RXF_UDP 22
1945 #define V_RXF_UDP(x) ((x) << S_RXF_UDP)
1946 #define F_RXF_UDP V_RXF_UDP(1U)
1948 #define S_RXF_TCP 23
1949 #define V_RXF_TCP(x) ((x) << S_RXF_TCP)
1950 #define F_RXF_TCP V_RXF_TCP(1U)
1953 #define V_RXF_IP(x) ((x) << S_RXF_IP)
1954 #define F_RXF_IP V_RXF_IP(1U)
1956 #define S_RXF_IP6 25
1957 #define V_RXF_IP6(x) ((x) << S_RXF_IP6)
1958 #define F_RXF_IP6 V_RXF_IP6(1U)
1960 #define S_RXF_SYN_COOKIE 26
1961 #define V_RXF_SYN_COOKIE(x) ((x) << S_RXF_SYN_COOKIE)
1962 #define F_RXF_SYN_COOKIE V_RXF_SYN_COOKIE(1U)
1964 #define S_RXF_FCOE 26
1965 #define V_RXF_FCOE(x) ((x) << S_RXF_FCOE)
1966 #define F_RXF_FCOE V_RXF_FCOE(1U)
1968 #define S_RXF_LRO 27
1969 #define V_RXF_LRO(x) ((x) << S_RXF_LRO)
1970 #define F_RXF_LRO V_RXF_LRO(1U)
1972 #define S_RX_CHAN 28
1973 #define M_RX_CHAN 0xF
1974 #define V_RX_CHAN(x) ((x) << S_RX_CHAN)
1975 #define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN)
1977 /* rx_pkt.hdr_len fields */
1978 #define S_RX_TCPHDR_LEN 0
1979 #define M_RX_TCPHDR_LEN 0x3F
1980 #define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN)
1981 #define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN)
1983 #define S_RX_IPHDR_LEN 6
1984 #define M_RX_IPHDR_LEN 0x3FF
1985 #define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN)
1986 #define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN)
1988 /* rx_pkt.err_vec fields */
1989 #define S_RXERR_OR 0
1990 #define V_RXERR_OR(x) ((x) << S_RXERR_OR)
1991 #define F_RXERR_OR V_RXERR_OR(1U)
1993 #define S_RXERR_MAC 1
1994 #define V_RXERR_MAC(x) ((x) << S_RXERR_MAC)
1995 #define F_RXERR_MAC V_RXERR_MAC(1U)
1997 #define S_RXERR_IPVERS 2
1998 #define V_RXERR_IPVERS(x) ((x) << S_RXERR_IPVERS)
1999 #define F_RXERR_IPVERS V_RXERR_IPVERS(1U)
2001 #define S_RXERR_FRAG 3
2002 #define V_RXERR_FRAG(x) ((x) << S_RXERR_FRAG)
2003 #define F_RXERR_FRAG V_RXERR_FRAG(1U)
2005 #define S_RXERR_ATTACK 4
2006 #define V_RXERR_ATTACK(x) ((x) << S_RXERR_ATTACK)
2007 #define F_RXERR_ATTACK V_RXERR_ATTACK(1U)
2009 #define S_RXERR_ETHHDR_LEN 5
2010 #define V_RXERR_ETHHDR_LEN(x) ((x) << S_RXERR_ETHHDR_LEN)
2011 #define F_RXERR_ETHHDR_LEN V_RXERR_ETHHDR_LEN(1U)
2013 #define S_RXERR_IPHDR_LEN 6
2014 #define V_RXERR_IPHDR_LEN(x) ((x) << S_RXERR_IPHDR_LEN)
2015 #define F_RXERR_IPHDR_LEN V_RXERR_IPHDR_LEN(1U)
2017 #define S_RXERR_TCPHDR_LEN 7
2018 #define V_RXERR_TCPHDR_LEN(x) ((x) << S_RXERR_TCPHDR_LEN)
2019 #define F_RXERR_TCPHDR_LEN V_RXERR_TCPHDR_LEN(1U)
2021 #define S_RXERR_PKT_LEN 8
2022 #define V_RXERR_PKT_LEN(x) ((x) << S_RXERR_PKT_LEN)
2023 #define F_RXERR_PKT_LEN V_RXERR_PKT_LEN(1U)
2025 #define S_RXERR_TCP_OPT 9
2026 #define V_RXERR_TCP_OPT(x) ((x) << S_RXERR_TCP_OPT)
2027 #define F_RXERR_TCP_OPT V_RXERR_TCP_OPT(1U)
2029 #define S_RXERR_IPCSUM 12
2030 #define V_RXERR_IPCSUM(x) ((x) << S_RXERR_IPCSUM)
2031 #define F_RXERR_IPCSUM V_RXERR_IPCSUM(1U)
2033 #define S_RXERR_CSUM 13
2034 #define V_RXERR_CSUM(x) ((x) << S_RXERR_CSUM)
2035 #define F_RXERR_CSUM V_RXERR_CSUM(1U)
2037 #define S_RXERR_PING 14
2038 #define V_RXERR_PING(x) ((x) << S_RXERR_PING)
2039 #define F_RXERR_PING V_RXERR_PING(1U)
2041 /* In T6, rx_pkt.err_vec indicates
2042 * RxError Error vector (16b) or
2043 * Encapsulating header length (8b),
2044 * Outer encapsulation type (2b) and
2045 * compressed error vector (6b) if CRxPktEnc is
2046 * enabled in TP_OUT_CONFIG
2049 #define S_T6_COMPR_RXERR_VEC 0
2050 #define M_T6_COMPR_RXERR_VEC 0x3F
2051 #define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_VEC)
2052 #define G_T6_COMPR_RXERR_VEC(x) \
2053 (((x) >> S_T6_COMPR_RXERR_VEC) & M_T6_COMPR_RXERR_VEC)
2055 #define S_T6_COMPR_RXERR_MAC 0
2056 #define V_T6_COMPR_RXERR_MAC(x) ((x) << S_T6_COMPR_RXERR_MAC)
2057 #define F_T6_COMPR_RXERR_MAC V_T6_COMPR_RXERR_MAC(1U)
2059 /* Logical OR of RX_ERROR_PKT_LEN, RX_ERROR_TCP_HDR_LEN
2060 * RX_ERROR_IP_HDR_LEN, RX_ERROR_ETH_HDR_LEN
2062 #define S_T6_COMPR_RXERR_LEN 1
2063 #define V_T6_COMPR_RXERR_LEN(x) ((x) << S_T6_COMPR_RXERR_LEN)
2064 #define F_T6_COMPR_RXERR_LEN V_COMPR_T6_RXERR_LEN(1U)
2066 #define S_T6_COMPR_RXERR_TCP_OPT 2
2067 #define V_T6_COMPR_RXERR_TCP_OPT(x) ((x) << S_T6_COMPR_RXERR_TCP_OPT)
2068 #define F_T6_COMPR_RXERR_TCP_OPT V_T6_COMPR_RXERR_TCP_OPT(1U)
2070 #define S_T6_COMPR_RXERR_IPV6_EXT 3
2071 #define V_T6_COMPR_RXERR_IPV6_EXT(x) ((x) << S_T6_COMPR_RXERR_IPV6_EXT)
2072 #define F_T6_COMPR_RXERR_IPV6_EXT V_T6_COMPR_RXERR_IPV6_EXT(1U)
2074 /* Logical OR of RX_ERROR_CSUM, RX_ERROR_CSIP */
2075 #define S_T6_COMPR_RXERR_SUM 4
2076 #define V_T6_COMPR_RXERR_SUM(x) ((x) << S_T6_COMPR_RXERR_SUM)
2077 #define F_T6_COMPR_RXERR_SUM V_T6_COMPR_RXERR_SUM(1U)
2079 /* Logical OR of RX_ERROR_FPMA, RX_ERROR_PING_DROP,
2080 * RX_ERROR_ATTACK, RX_ERROR_FRAG,RX_ERROR_IPVERSION
2082 #define S_T6_COMPR_RXERR_MISC 5
2083 #define V_T6_COMPR_RXERR_MISC(x) ((x) << S_T6_COMPR_RXERR_MISC)
2084 #define F_T6_COMPR_RXERR_MISC V_T6_COMPR_RXERR_MISC(1U)
2086 #define S_T6_RX_TNL_TYPE 6
2087 #define M_T6_RX_TNL_TYPE 0x3
2088 #define V_T6_RX_TNL_TYPE(x) ((x) << S_T6_RX_TNL_TYPE)
2089 #define G_T6_RX_TNL_TYPE(x) (((x) >> S_T6_RX_TNL_TYPE) & M_T6_RX_TNL_TYPE)
2091 #define RX_PKT_TNL_TYPE_NVGRE 1
2092 #define RX_PKT_TNL_TYPE_VXLAN 2
2093 #define RX_PKT_TNL_TYPE_GENEVE 3
2095 #define S_T6_RX_TNLHDR_LEN 8
2096 #define M_T6_RX_TNLHDR_LEN 0xFF
2097 #define V_T6_RX_TNLHDR_LEN(x) ((x) << S_T6_RX_TNLHDR_LEN)
2098 #define G_T6_RX_TNLHDR_LEN(x) (((x) >> S_T6_RX_TNLHDR_LEN) & M_T6_RX_TNLHDR_LEN)
2100 struct cpl_trace_pkt {
2104 #if defined(__LITTLE_ENDIAN_BITFIELD)
2122 struct cpl_t5_trace_pkt {
2126 #if defined(__LITTLE_ENDIAN_BITFIELD)
2145 struct cpl_rte_delete_req {
2147 union opcode_tid ot;
2151 /* {cpl_rte_delete_req, cpl_rte_read_req}.params fields */
2152 #define S_RTE_REQ_LUT_IX 8
2153 #define M_RTE_REQ_LUT_IX 0x7FF
2154 #define V_RTE_REQ_LUT_IX(x) ((x) << S_RTE_REQ_LUT_IX)
2155 #define G_RTE_REQ_LUT_IX(x) (((x) >> S_RTE_REQ_LUT_IX) & M_RTE_REQ_LUT_IX)
2157 #define S_RTE_REQ_LUT_BASE 19
2158 #define M_RTE_REQ_LUT_BASE 0x7FF
2159 #define V_RTE_REQ_LUT_BASE(x) ((x) << S_RTE_REQ_LUT_BASE)
2160 #define G_RTE_REQ_LUT_BASE(x) (((x) >> S_RTE_REQ_LUT_BASE) & M_RTE_REQ_LUT_BASE)
2162 #define S_RTE_READ_REQ_SELECT 31
2163 #define V_RTE_READ_REQ_SELECT(x) ((x) << S_RTE_READ_REQ_SELECT)
2164 #define F_RTE_READ_REQ_SELECT V_RTE_READ_REQ_SELECT(1U)
2166 struct cpl_rte_delete_rpl {
2168 union opcode_tid ot;
2173 struct cpl_rte_write_req {
2175 union opcode_tid ot;
2183 /* cpl_rte_write_req.write_sel fields */
2184 #define S_RTE_WR_L2TIDX 31
2185 #define V_RTE_WR_L2TIDX(x) ((x) << S_RTE_WR_L2TIDX)
2186 #define F_RTE_WR_L2TIDX V_RTE_WR_L2TIDX(1U)
2188 #define S_RTE_WR_FADDR 30
2189 #define V_RTE_WR_FADDR(x) ((x) << S_RTE_WR_FADDR)
2190 #define F_RTE_WR_FADDR V_RTE_WR_FADDR(1U)
2192 /* cpl_rte_write_req.lut_params fields */
2193 #define S_RTE_WR_LUT_IX 10
2194 #define M_RTE_WR_LUT_IX 0x7FF
2195 #define V_RTE_WR_LUT_IX(x) ((x) << S_RTE_WR_LUT_IX)
2196 #define G_RTE_WR_LUT_IX(x) (((x) >> S_RTE_WR_LUT_IX) & M_RTE_WR_LUT_IX)
2198 #define S_RTE_WR_LUT_BASE 21
2199 #define M_RTE_WR_LUT_BASE 0x7FF
2200 #define V_RTE_WR_LUT_BASE(x) ((x) << S_RTE_WR_LUT_BASE)
2201 #define G_RTE_WR_LUT_BASE(x) (((x) >> S_RTE_WR_LUT_BASE) & M_RTE_WR_LUT_BASE)
2203 struct cpl_rte_write_rpl {
2205 union opcode_tid ot;
2210 struct cpl_rte_read_req {
2212 union opcode_tid ot;
2216 struct cpl_rte_read_rpl {
2218 union opcode_tid ot;
2222 #if defined(__LITTLE_ENDIAN_BITFIELD)
2232 struct cpl_l2t_write_req {
2234 union opcode_tid ot;
2241 /* cpl_l2t_write_req.params fields */
2242 #define S_L2T_W_INFO 2
2243 #define M_L2T_W_INFO 0x3F
2244 #define V_L2T_W_INFO(x) ((x) << S_L2T_W_INFO)
2245 #define G_L2T_W_INFO(x) (((x) >> S_L2T_W_INFO) & M_L2T_W_INFO)
2247 #define S_L2T_W_PORT 8
2248 #define M_L2T_W_PORT 0x3
2249 #define V_L2T_W_PORT(x) ((x) << S_L2T_W_PORT)
2250 #define G_L2T_W_PORT(x) (((x) >> S_L2T_W_PORT) & M_L2T_W_PORT)
2252 #define S_L2T_W_LPBK 10
2253 #define V_L2T_W_LPBK(x) ((x) << S_L2T_W_LPBK)
2254 #define F_L2T_W_PKBK V_L2T_W_LPBK(1U)
2256 #define S_L2T_W_ARPMISS 11
2257 #define V_L2T_W_ARPMISS(x) ((x) << S_L2T_W_ARPMISS)
2258 #define F_L2T_W_ARPMISS V_L2T_W_ARPMISS(1U)
2260 #define S_L2T_W_NOREPLY 15
2261 #define V_L2T_W_NOREPLY(x) ((x) << S_L2T_W_NOREPLY)
2262 #define F_L2T_W_NOREPLY V_L2T_W_NOREPLY(1U)
2264 #define CPL_L2T_VLAN_NONE 0xfff
2266 struct cpl_l2t_write_rpl {
2268 union opcode_tid ot;
2273 struct cpl_l2t_read_req {
2275 union opcode_tid ot;
2279 struct cpl_l2t_read_rpl {
2281 union opcode_tid ot;
2283 #if defined(__LITTLE_ENDIAN_BITFIELD)
2295 struct cpl_srq_table_req {
2297 union opcode_tid ot;
2307 struct cpl_srq_table_rpl {
2309 union opcode_tid ot;
2319 /* cpl_srq_table_{req,rpl}.params fields */
2320 #define S_SRQT_QLEN 28
2321 #define M_SRQT_QLEN 0xF
2322 #define V_SRQT_QLEN(x) ((x) << S_SRQT_QLEN)
2323 #define G_SRQT_QLEN(x) (((x) >> S_SRQT_QLEN) & M_SRQT_QLEN)
2325 #define S_SRQT_QBASE 0
2326 #define M_SRQT_QBASE 0x3FFFFFF
2327 #define V_SRQT_QBASE(x) ((x) << S_SRQT_QBASE)
2328 #define G_SRQT_QBASE(x) (((x) >> S_SRQT_QBASE) & M_SRQT_QBASE)
2330 #define S_SRQT_PDID 0
2331 #define M_SRQT_PDID 0xFF
2332 #define V_SRQT_PDID(x) ((x) << S_SRQT_PDID)
2333 #define G_SRQT_PDID(x) (((x) >> S_SRQT_PDID) & M_SRQT_PDID)
2335 #define S_SRQT_IDX 0
2336 #define M_SRQT_IDX 0xF
2337 #define V_SRQT_IDX(x) ((x) << S_SRQT_IDX)
2338 #define G_SRQT_IDX(x) (((x) >> S_SRQT_IDX) & M_SRQT_IDX)
2340 struct cpl_smt_write_req {
2342 union opcode_tid ot;
2350 struct cpl_t6_smt_write_req {
2352 union opcode_tid ot;
2361 struct cpl_smt_write_rpl {
2363 union opcode_tid ot;
2368 struct cpl_smt_read_req {
2370 union opcode_tid ot;
2374 struct cpl_smt_read_rpl {
2376 union opcode_tid ot;
2386 /* cpl_smt_{read,write}_req.params fields */
2387 #define S_SMTW_OVLAN_IDX 16
2388 #define M_SMTW_OVLAN_IDX 0xF
2389 #define V_SMTW_OVLAN_IDX(x) ((x) << S_SMTW_OVLAN_IDX)
2390 #define G_SMTW_OVLAN_IDX(x) (((x) >> S_SMTW_OVLAN_IDX) & M_SMTW_OVLAN_IDX)
2392 #define S_SMTW_IDX 20
2393 #define M_SMTW_IDX 0x7F
2394 #define V_SMTW_IDX(x) ((x) << S_SMTW_IDX)
2395 #define G_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_SMTW_IDX)
2397 #define M_T6_SMTW_IDX 0xFF
2398 #define G_T6_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_T6_SMTW_IDX)
2400 #define S_SMTW_NORPL 31
2401 #define V_SMTW_NORPL(x) ((x) << S_SMTW_NORPL)
2402 #define F_SMTW_NORPL V_SMTW_NORPL(1U)
2404 /* cpl_smt_{read,write}_req.pfvf? fields */
2406 #define M_SMTW_VF 0xFF
2407 #define V_SMTW_VF(x) ((x) << S_SMTW_VF)
2408 #define G_SMTW_VF(x) (((x) >> S_SMTW_VF) & M_SMTW_VF)
2411 #define M_SMTW_PF 0x7
2412 #define V_SMTW_PF(x) ((x) << S_SMTW_PF)
2413 #define G_SMTW_PF(x) (((x) >> S_SMTW_PF) & M_SMTW_PF)
2415 #define S_SMTW_VF_VLD 11
2416 #define V_SMTW_VF_VLD(x) ((x) << S_SMTW_VF_VLD)
2417 #define F_SMTW_VF_VLD V_SMTW_VF_VLD(1U)
2419 struct cpl_tag_write_req {
2421 union opcode_tid ot;
2426 struct cpl_tag_write_rpl {
2428 union opcode_tid ot;
2434 struct cpl_tag_read_req {
2436 union opcode_tid ot;
2440 struct cpl_tag_read_rpl {
2442 union opcode_tid ot;
2444 #if defined(__LITTLE_ENDIAN_BITFIELD)
2460 /* cpl_tag{read,write}_req.params fields */
2461 #define S_TAGW_IDX 0
2462 #define M_TAGW_IDX 0x7F
2463 #define V_TAGW_IDX(x) ((x) << S_TAGW_IDX)
2464 #define G_TAGW_IDX(x) (((x) >> S_TAGW_IDX) & M_TAGW_IDX)
2466 #define S_TAGW_LEN 20
2467 #define V_TAGW_LEN(x) ((x) << S_TAGW_LEN)
2468 #define F_TAGW_LEN V_TAGW_LEN(1U)
2470 #define S_TAGW_INS_ENABLE 23
2471 #define V_TAGW_INS_ENABLE(x) ((x) << S_TAGW_INS_ENABLE)
2472 #define F_TAGW_INS_ENABLE V_TAGW_INS_ENABLE(1U)
2474 #define S_TAGW_NORPL 31
2475 #define V_TAGW_NORPL(x) ((x) << S_TAGW_NORPL)
2476 #define F_TAGW_NORPL V_TAGW_NORPL(1U)
2478 struct cpl_barrier {
2486 /* cpl_barrier.chan_map fields */
2487 #define S_CHAN_MAP 4
2488 #define M_CHAN_MAP 0xF
2489 #define V_CHAN_MAP(x) ((x) << S_CHAN_MAP)
2490 #define G_CHAN_MAP(x) (((x) >> S_CHAN_MAP) & M_CHAN_MAP)
2494 union opcode_tid ot;
2498 struct cpl_hit_notify {
2500 union opcode_tid ot;
2506 struct cpl_pkt_notify {
2508 union opcode_tid ot;
2515 /* cpl_{hit,pkt}_notify.info fields */
2516 #define S_NTFY_MAC_IDX 0
2517 #define M_NTFY_MAC_IDX 0x1FF
2518 #define V_NTFY_MAC_IDX(x) ((x) << S_NTFY_MAC_IDX)
2519 #define G_NTFY_MAC_IDX(x) (((x) >> S_NTFY_MAC_IDX) & M_NTFY_MAC_IDX)
2521 #define S_NTFY_INTF 10
2522 #define M_NTFY_INTF 0xF
2523 #define V_NTFY_INTF(x) ((x) << S_NTFY_INTF)
2524 #define G_NTFY_INTF(x) (((x) >> S_NTFY_INTF) & M_NTFY_INTF)
2526 #define S_NTFY_TCPHDR_LEN 14
2527 #define M_NTFY_TCPHDR_LEN 0xF
2528 #define V_NTFY_TCPHDR_LEN(x) ((x) << S_NTFY_TCPHDR_LEN)
2529 #define G_NTFY_TCPHDR_LEN(x) (((x) >> S_NTFY_TCPHDR_LEN) & M_NTFY_TCPHDR_LEN)
2531 #define S_NTFY_IPHDR_LEN 18
2532 #define M_NTFY_IPHDR_LEN 0x1FF
2533 #define V_NTFY_IPHDR_LEN(x) ((x) << S_NTFY_IPHDR_LEN)
2534 #define G_NTFY_IPHDR_LEN(x) (((x) >> S_NTFY_IPHDR_LEN) & M_NTFY_IPHDR_LEN)
2536 #define S_NTFY_ETHHDR_LEN 27
2537 #define M_NTFY_ETHHDR_LEN 0x1F
2538 #define V_NTFY_ETHHDR_LEN(x) ((x) << S_NTFY_ETHHDR_LEN)
2539 #define G_NTFY_ETHHDR_LEN(x) (((x) >> S_NTFY_ETHHDR_LEN) & M_NTFY_ETHHDR_LEN)
2541 #define S_NTFY_T5_IPHDR_LEN 18
2542 #define M_NTFY_T5_IPHDR_LEN 0xFF
2543 #define V_NTFY_T5_IPHDR_LEN(x) ((x) << S_NTFY_T5_IPHDR_LEN)
2544 #define G_NTFY_T5_IPHDR_LEN(x) (((x) >> S_NTFY_T5_IPHDR_LEN) & M_NTFY_T5_IPHDR_LEN)
2546 #define S_NTFY_T5_ETHHDR_LEN 26
2547 #define M_NTFY_T5_ETHHDR_LEN 0x3F
2548 #define V_NTFY_T5_ETHHDR_LEN(x) ((x) << S_NTFY_T5_ETHHDR_LEN)
2549 #define G_NTFY_T5_ETHHDR_LEN(x) (((x) >> S_NTFY_T5_ETHHDR_LEN) & M_NTFY_T5_ETHHDR_LEN)
2551 struct cpl_rdma_terminate {
2553 union opcode_tid ot;
2558 struct cpl_set_le_req {
2560 union opcode_tid ot;
2569 /* cpl_set_le_req.reply_ctrl additional fields */
2570 #define S_LE_REQ_IP6 13
2571 #define V_LE_REQ_IP6(x) ((x) << S_LE_REQ_IP6)
2572 #define F_LE_REQ_IP6 V_LE_REQ_IP6(1U)
2574 /* cpl_set_le_req.params fields */
2576 #define M_LE_CHAN 0x3
2577 #define V_LE_CHAN(x) ((x) << S_LE_CHAN)
2578 #define G_LE_CHAN(x) (((x) >> S_LE_CHAN) & M_LE_CHAN)
2580 #define S_LE_OFFSET 5
2581 #define M_LE_OFFSET 0x7
2582 #define V_LE_OFFSET(x) ((x) << S_LE_OFFSET)
2583 #define G_LE_OFFSET(x) (((x) >> S_LE_OFFSET) & M_LE_OFFSET)
2586 #define V_LE_MORE(x) ((x) << S_LE_MORE)
2587 #define F_LE_MORE V_LE_MORE(1U)
2589 #define S_LE_REQSIZE 9
2590 #define M_LE_REQSIZE 0x7
2591 #define V_LE_REQSIZE(x) ((x) << S_LE_REQSIZE)
2592 #define G_LE_REQSIZE(x) (((x) >> S_LE_REQSIZE) & M_LE_REQSIZE)
2594 #define S_LE_REQCMD 12
2595 #define M_LE_REQCMD 0xF
2596 #define V_LE_REQCMD(x) ((x) << S_LE_REQCMD)
2597 #define G_LE_REQCMD(x) (((x) >> S_LE_REQCMD) & M_LE_REQCMD)
2599 struct cpl_set_le_rpl {
2601 union opcode_tid ot;
2607 /* cpl_set_le_rpl.info fields */
2608 #define S_LE_RSPCMD 0
2609 #define M_LE_RSPCMD 0xF
2610 #define V_LE_RSPCMD(x) ((x) << S_LE_RSPCMD)
2611 #define G_LE_RSPCMD(x) (((x) >> S_LE_RSPCMD) & M_LE_RSPCMD)
2613 #define S_LE_RSPSIZE 4
2614 #define M_LE_RSPSIZE 0x7
2615 #define V_LE_RSPSIZE(x) ((x) << S_LE_RSPSIZE)
2616 #define G_LE_RSPSIZE(x) (((x) >> S_LE_RSPSIZE) & M_LE_RSPSIZE)
2618 #define S_LE_RSPTYPE 7
2619 #define V_LE_RSPTYPE(x) ((x) << S_LE_RSPTYPE)
2620 #define F_LE_RSPTYPE V_LE_RSPTYPE(1U)
2622 struct cpl_sge_egr_update {
2629 /* cpl_sge_egr_update.ot fields */
2630 #define S_AUTOEQU 22
2631 #define M_AUTOEQU 0x1
2632 #define V_AUTOEQU(x) ((x) << S_AUTOEQU)
2633 #define G_AUTOEQU(x) (((x) >> S_AUTOEQU) & M_AUTOEQU)
2636 #define M_EGR_QID 0x1FFFF
2637 #define V_EGR_QID(x) ((x) << S_EGR_QID)
2638 #define G_EGR_QID(x) (((x) >> S_EGR_QID) & M_EGR_QID)
2640 /* cpl_fw*.type values */
2642 FW_TYPE_CMD_RPL = 0,
2645 FW_TYPE_OFLD_CONNECTION_WR_RPL = 3,
2647 FW_TYPE_WRERR_RPL = 5,
2649 FW_TYPE_TLS_KEY = 7,
2652 struct cpl_fw2_pld {
2659 struct cpl_fw4_pld {
2670 struct cpl_fw6_pld {
2678 struct cpl_fw2_msg {
2680 union opcode_info oi;
2683 struct cpl_fw4_msg {
2692 struct cpl_fw4_ack {
2694 union opcode_tid ot;
2704 CPL_FW4_ACK_FLAGS_SEQVAL = 0x1, /* seqn valid */
2705 CPL_FW4_ACK_FLAGS_CH = 0x2, /* channel change complete */
2706 CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */
2709 struct cpl_fw6_msg {
2718 /* cpl_fw6_msg.type values */
2720 FW6_TYPE_CMD_RPL = FW_TYPE_CMD_RPL,
2721 FW6_TYPE_WR_RPL = FW_TYPE_WR_RPL,
2722 FW6_TYPE_CQE = FW_TYPE_CQE,
2723 FW6_TYPE_OFLD_CONNECTION_WR_RPL = FW_TYPE_OFLD_CONNECTION_WR_RPL,
2724 FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL,
2725 FW6_TYPE_WRERR_RPL = FW_TYPE_WRERR_RPL,
2726 FW6_TYPE_PI_ERR = FW_TYPE_PI_ERR,
2730 struct cpl_fw6_msg_ofld_connection_wr_rpl {
2732 __be32 tid; /* or atid in case of active failure */
2738 /* ULP_TX opcodes */
2740 ULP_TX_MEM_READ = 2,
2741 ULP_TX_MEM_WRITE = 3,
2746 ULP_TX_SC_NOOP = 0x80,
2747 ULP_TX_SC_IMM = 0x81,
2748 ULP_TX_SC_DSGL = 0x82,
2749 ULP_TX_SC_ISGL = 0x83,
2750 ULP_TX_SC_PICTRL = 0x84,
2751 ULP_TX_SC_MEMRD = 0x86
2754 #define S_ULPTX_CMD 24
2755 #define M_ULPTX_CMD 0xFF
2756 #define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD)
2758 #define S_ULPTX_LEN16 0
2759 #define M_ULPTX_LEN16 0xFF
2760 #define V_ULPTX_LEN16(x) ((x) << S_ULPTX_LEN16)
2762 #define S_ULP_TX_SC_MORE 23
2763 #define V_ULP_TX_SC_MORE(x) ((x) << S_ULP_TX_SC_MORE)
2764 #define F_ULP_TX_SC_MORE V_ULP_TX_SC_MORE(1U)
2766 struct ulptx_sge_pair {
2775 #if !(defined C99_NOT_SUPPORTED)
2776 struct ulptx_sge_pair sge[0];
2789 #if !(defined C99_NOT_SUPPORTED)
2790 struct ulptx_isge sge[0];
2794 struct ulptx_idata {
2799 #define S_ULPTX_NSGE 0
2800 #define M_ULPTX_NSGE 0xFFFF
2801 #define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE)
2802 #define G_ULPTX_NSGE(x) (((x) >> S_ULPTX_NSGE) & M_ULPTX_NSGE)
2804 struct ulptx_sc_memrd {
2812 __be32 len16; /* command length */
2813 __be32 dlen; /* data length in 32-byte units */
2817 /* additional ulp_mem_io.cmd fields */
2818 #define S_ULP_MEMIO_ORDER 23
2819 #define V_ULP_MEMIO_ORDER(x) ((x) << S_ULP_MEMIO_ORDER)
2820 #define F_ULP_MEMIO_ORDER V_ULP_MEMIO_ORDER(1U)
2822 #define S_T5_ULP_MEMIO_IMM 23
2823 #define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM)
2824 #define F_T5_ULP_MEMIO_IMM V_T5_ULP_MEMIO_IMM(1U)
2826 #define S_T5_ULP_MEMIO_ORDER 22
2827 #define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER)
2828 #define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U)
2830 #define S_T5_ULP_MEMIO_FID 4
2831 #define M_T5_ULP_MEMIO_FID 0x7ff
2832 #define V_T5_ULP_MEMIO_FID(x) ((x) << S_T5_ULP_MEMIO_FID)
2834 /* ulp_mem_io.lock_addr fields */
2835 #define S_ULP_MEMIO_ADDR 0
2836 #define M_ULP_MEMIO_ADDR 0x7FFFFFF
2837 #define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR)
2839 #define S_ULP_MEMIO_LOCK 31
2840 #define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK)
2841 #define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U)
2843 /* ulp_mem_io.dlen fields */
2844 #define S_ULP_MEMIO_DATA_LEN 0
2845 #define M_ULP_MEMIO_DATA_LEN 0x1F
2846 #define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN)
2848 /* ULP_TXPKT field values */
2850 ULP_TXPKT_DEST_TP = 0,
2853 ULP_TXPKT_DEST_DEVNULL,
2861 /* ulp_txpkt.cmd_dest fields */
2862 #define S_ULP_TXPKT_DATAMODIFY 23
2863 #define M_ULP_TXPKT_DATAMODIFY 0x1
2864 #define V_ULP_TXPKT_DATAMODIFY(x) ((x) << S_ULP_TXPKT_DATAMODIFY)
2865 #define G_ULP_TXPKT_DATAMODIFY(x) \
2866 (((x) >> S_ULP_TXPKT_DATAMODIFY) & M_ULP_TXPKT_DATAMODIFY_)
2867 #define F_ULP_TXPKT_DATAMODIFY V_ULP_TXPKT_DATAMODIFY(1U)
2869 #define S_ULP_TXPKT_CHANNELID 22
2870 #define M_ULP_TXPKT_CHANNELID 0x1
2871 #define V_ULP_TXPKT_CHANNELID(x) ((x) << S_ULP_TXPKT_CHANNELID)
2872 #define G_ULP_TXPKT_CHANNELID(x) \
2873 (((x) >> S_ULP_TXPKT_CHANNELID) & M_ULP_TXPKT_CHANNELID)
2874 #define F_ULP_TXPKT_CHANNELID V_ULP_TXPKT_CHANNELID(1U)
2876 /* ulp_txpkt.cmd_dest fields */
2877 #define S_ULP_TXPKT_DEST 16
2878 #define M_ULP_TXPKT_DEST 0x3
2879 #define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST)
2881 #define S_ULP_TXPKT_FID 4
2882 #define M_ULP_TXPKT_FID 0x7ff
2883 #define V_ULP_TXPKT_FID(x) ((x) << S_ULP_TXPKT_FID)
2885 #define S_ULP_TXPKT_RO 3
2886 #define V_ULP_TXPKT_RO(x) ((x) << S_ULP_TXPKT_RO)
2887 #define F_ULP_TXPKT_RO V_ULP_TXPKT_RO(1U)
2889 enum cpl_tx_tnl_lso_type {
2896 struct cpl_tx_tnl_lso {
2897 __be32 op_to_IpIdSplitOut;
2898 __be16 IpIdOffsetOut;
2899 __be16 UdpLenSetOut_to_TnlHdrLen;
2901 __be32 Flow_to_TcpHdrLen;
2903 __be16 IpIdSplit_to_Mss;
2904 __be32 TCPSeqOffset;
2905 __be32 EthLenOffset_Size;
2906 /* encapsulated CPL (TX_PKT_XT) follows here */
2909 #define S_CPL_TX_TNL_LSO_OPCODE 24
2910 #define M_CPL_TX_TNL_LSO_OPCODE 0xff
2911 #define V_CPL_TX_TNL_LSO_OPCODE(x) ((x) << S_CPL_TX_TNL_LSO_OPCODE)
2912 #define G_CPL_TX_TNL_LSO_OPCODE(x) \
2913 (((x) >> S_CPL_TX_TNL_LSO_OPCODE) & M_CPL_TX_TNL_LSO_OPCODE)
2915 #define S_CPL_TX_TNL_LSO_FIRST 23
2916 #define M_CPL_TX_TNL_LSO_FIRST 0x1
2917 #define V_CPL_TX_TNL_LSO_FIRST(x) ((x) << S_CPL_TX_TNL_LSO_FIRST)
2918 #define G_CPL_TX_TNL_LSO_FIRST(x) \
2919 (((x) >> S_CPL_TX_TNL_LSO_FIRST) & M_CPL_TX_TNL_LSO_FIRST)
2920 #define F_CPL_TX_TNL_LSO_FIRST V_CPL_TX_TNL_LSO_FIRST(1U)
2922 #define S_CPL_TX_TNL_LSO_LAST 22
2923 #define M_CPL_TX_TNL_LSO_LAST 0x1
2924 #define V_CPL_TX_TNL_LSO_LAST(x) ((x) << S_CPL_TX_TNL_LSO_LAST)
2925 #define G_CPL_TX_TNL_LSO_LAST(x) \
2926 (((x) >> S_CPL_TX_TNL_LSO_LAST) & M_CPL_TX_TNL_LSO_LAST)
2927 #define F_CPL_TX_TNL_LSO_LAST V_CPL_TX_TNL_LSO_LAST(1U)
2929 #define S_CPL_TX_TNL_LSO_ETHHDRLENXOUT 21
2930 #define M_CPL_TX_TNL_LSO_ETHHDRLENXOUT 0x1
2931 #define V_CPL_TX_TNL_LSO_ETHHDRLENXOUT(x) \
2932 ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENXOUT)
2933 #define G_CPL_TX_TNL_LSO_ETHHDRLENXOUT(x) \
2934 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENXOUT) & M_CPL_TX_TNL_LSO_ETHHDRLENXOUT)
2935 #define F_CPL_TX_TNL_LSO_ETHHDRLENXOUT V_CPL_TX_TNL_LSO_ETHHDRLENXOUT(1U)
2937 #define S_CPL_TX_TNL_LSO_IPV6OUT 20
2938 #define M_CPL_TX_TNL_LSO_IPV6OUT 0x1
2939 #define V_CPL_TX_TNL_LSO_IPV6OUT(x) ((x) << S_CPL_TX_TNL_LSO_IPV6OUT)
2940 #define G_CPL_TX_TNL_LSO_IPV6OUT(x) \
2941 (((x) >> S_CPL_TX_TNL_LSO_IPV6OUT) & M_CPL_TX_TNL_LSO_IPV6OUT)
2942 #define F_CPL_TX_TNL_LSO_IPV6OUT V_CPL_TX_TNL_LSO_IPV6OUT(1U)
2944 #define S_CPL_TX_TNL_LSO_ETHHDRLENOUT 16
2945 #define M_CPL_TX_TNL_LSO_ETHHDRLENOUT 0xf
2946 #define V_CPL_TX_TNL_LSO_ETHHDRLENOUT(x) \
2947 ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENOUT)
2948 #define G_CPL_TX_TNL_LSO_ETHHDRLENOUT(x) \
2949 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENOUT) & M_CPL_TX_TNL_LSO_ETHHDRLENOUT)
2951 #define S_CPL_TX_TNL_LSO_IPHDRLENOUT 4
2952 #define M_CPL_TX_TNL_LSO_IPHDRLENOUT 0xfff
2953 #define V_CPL_TX_TNL_LSO_IPHDRLENOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRLENOUT)
2954 #define G_CPL_TX_TNL_LSO_IPHDRLENOUT(x) \
2955 (((x) >> S_CPL_TX_TNL_LSO_IPHDRLENOUT) & M_CPL_TX_TNL_LSO_IPHDRLENOUT)
2957 #define S_CPL_TX_TNL_LSO_IPHDRCHKOUT 3
2958 #define M_CPL_TX_TNL_LSO_IPHDRCHKOUT 0x1
2959 #define V_CPL_TX_TNL_LSO_IPHDRCHKOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRCHKOUT)
2960 #define G_CPL_TX_TNL_LSO_IPHDRCHKOUT(x) \
2961 (((x) >> S_CPL_TX_TNL_LSO_IPHDRCHKOUT) & M_CPL_TX_TNL_LSO_IPHDRCHKOUT)
2962 #define F_CPL_TX_TNL_LSO_IPHDRCHKOUT V_CPL_TX_TNL_LSO_IPHDRCHKOUT(1U)
2964 #define S_CPL_TX_TNL_LSO_IPLENSETOUT 2
2965 #define M_CPL_TX_TNL_LSO_IPLENSETOUT 0x1
2966 #define V_CPL_TX_TNL_LSO_IPLENSETOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPLENSETOUT)
2967 #define G_CPL_TX_TNL_LSO_IPLENSETOUT(x) \
2968 (((x) >> S_CPL_TX_TNL_LSO_IPLENSETOUT) & M_CPL_TX_TNL_LSO_IPLENSETOUT)
2969 #define F_CPL_TX_TNL_LSO_IPLENSETOUT V_CPL_TX_TNL_LSO_IPLENSETOUT(1U)
2971 #define S_CPL_TX_TNL_LSO_IPIDINCOUT 1
2972 #define M_CPL_TX_TNL_LSO_IPIDINCOUT 0x1
2973 #define V_CPL_TX_TNL_LSO_IPIDINCOUT(x) ((x) << S_CPL_TX_TNL_LSO_IPIDINCOUT)
2974 #define G_CPL_TX_TNL_LSO_IPIDINCOUT(x) \
2975 (((x) >> S_CPL_TX_TNL_LSO_IPIDINCOUT) & M_CPL_TX_TNL_LSO_IPIDINCOUT)
2976 #define F_CPL_TX_TNL_LSO_IPIDINCOUT V_CPL_TX_TNL_LSO_IPIDINCOUT(1U)
2978 #define S_CPL_TX_TNL_LSO_IPIDSPLITOUT 0
2979 #define M_CPL_TX_TNL_LSO_IPIDSPLITOUT 0x1
2980 #define V_CPL_TX_TNL_LSO_IPIDSPLITOUT(x) \
2981 ((x) << S_CPL_TX_TNL_LSO_IPIDSPLITOUT)
2982 #define G_CPL_TX_TNL_LSO_IPIDSPLITOUT(x) \
2983 (((x) >> S_CPL_TX_TNL_LSO_IPIDSPLITOUT) & M_CPL_TX_TNL_LSO_IPIDSPLITOUT)
2984 #define F_CPL_TX_TNL_LSO_IPIDSPLITOUT V_CPL_TX_TNL_LSO_IPIDSPLITOUT(1U)
2986 #define S_CPL_TX_TNL_LSO_UDPLENSETOUT 15
2987 #define M_CPL_TX_TNL_LSO_UDPLENSETOUT 0x1
2988 #define V_CPL_TX_TNL_LSO_UDPLENSETOUT(x) \
2989 ((x) << S_CPL_TX_TNL_LSO_UDPLENSETOUT)
2990 #define G_CPL_TX_TNL_LSO_UDPLENSETOUT(x) \
2991 (((x) >> S_CPL_TX_TNL_LSO_UDPLENSETOUT) & M_CPL_TX_TNL_LSO_UDPLENSETOUT)
2992 #define F_CPL_TX_TNL_LSO_UDPLENSETOUT V_CPL_TX_TNL_LSO_UDPLENSETOUT(1U)
2994 #define S_CPL_TX_TNL_LSO_UDPCHKCLROUT 14
2995 #define M_CPL_TX_TNL_LSO_UDPCHKCLROUT 0x1
2996 #define V_CPL_TX_TNL_LSO_UDPCHKCLROUT(x) \
2997 ((x) << S_CPL_TX_TNL_LSO_UDPCHKCLROUT)
2998 #define G_CPL_TX_TNL_LSO_UDPCHKCLROUT(x) \
2999 (((x) >> S_CPL_TX_TNL_LSO_UDPCHKCLROUT) & M_CPL_TX_TNL_LSO_UDPCHKCLROUT)
3000 #define F_CPL_TX_TNL_LSO_UDPCHKCLROUT V_CPL_TX_TNL_LSO_UDPCHKCLROUT(1U)
3002 #define S_CPL_TX_TNL_LSO_TNLTYPE 12
3003 #define M_CPL_TX_TNL_LSO_TNLTYPE 0x3
3004 #define V_CPL_TX_TNL_LSO_TNLTYPE(x) ((x) << S_CPL_TX_TNL_LSO_TNLTYPE)
3005 #define G_CPL_TX_TNL_LSO_TNLTYPE(x) \
3006 (((x) >> S_CPL_TX_TNL_LSO_TNLTYPE) & M_CPL_TX_TNL_LSO_TNLTYPE)
3008 #define S_CPL_TX_TNL_LSO_TNLHDRLEN 0
3009 #define M_CPL_TX_TNL_LSO_TNLHDRLEN 0xfff
3010 #define V_CPL_TX_TNL_LSO_TNLHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_TNLHDRLEN)
3011 #define G_CPL_TX_TNL_LSO_TNLHDRLEN(x) \
3012 (((x) >> S_CPL_TX_TNL_LSO_TNLHDRLEN) & M_CPL_TX_TNL_LSO_TNLHDRLEN)
3014 #define S_CPL_TX_TNL_LSO_FLOW 21
3015 #define M_CPL_TX_TNL_LSO_FLOW 0x1
3016 #define V_CPL_TX_TNL_LSO_FLOW(x) ((x) << S_CPL_TX_TNL_LSO_FLOW)
3017 #define G_CPL_TX_TNL_LSO_FLOW(x) \
3018 (((x) >> S_CPL_TX_TNL_LSO_FLOW) & M_CPL_TX_TNL_LSO_FLOW)
3019 #define F_CPL_TX_TNL_LSO_FLOW V_CPL_TX_TNL_LSO_FLOW(1U)
3021 #define S_CPL_TX_TNL_LSO_IPV6 20
3022 #define M_CPL_TX_TNL_LSO_IPV6 0x1
3023 #define V_CPL_TX_TNL_LSO_IPV6(x) ((x) << S_CPL_TX_TNL_LSO_IPV6)
3024 #define G_CPL_TX_TNL_LSO_IPV6(x) \
3025 (((x) >> S_CPL_TX_TNL_LSO_IPV6) & M_CPL_TX_TNL_LSO_IPV6)
3026 #define F_CPL_TX_TNL_LSO_IPV6 V_CPL_TX_TNL_LSO_IPV6(1U)
3028 #define S_CPL_TX_TNL_LSO_ETHHDRLEN 16
3029 #define M_CPL_TX_TNL_LSO_ETHHDRLEN 0xf
3030 #define V_CPL_TX_TNL_LSO_ETHHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLEN)
3031 #define G_CPL_TX_TNL_LSO_ETHHDRLEN(x) \
3032 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLEN) & M_CPL_TX_TNL_LSO_ETHHDRLEN)
3034 #define S_CPL_TX_TNL_LSO_IPHDRLEN 4
3035 #define M_CPL_TX_TNL_LSO_IPHDRLEN 0xfff
3036 #define V_CPL_TX_TNL_LSO_IPHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_IPHDRLEN)
3037 #define G_CPL_TX_TNL_LSO_IPHDRLEN(x) \
3038 (((x) >> S_CPL_TX_TNL_LSO_IPHDRLEN) & M_CPL_TX_TNL_LSO_IPHDRLEN)
3040 #define S_CPL_TX_TNL_LSO_TCPHDRLEN 0
3041 #define M_CPL_TX_TNL_LSO_TCPHDRLEN 0xf
3042 #define V_CPL_TX_TNL_LSO_TCPHDRLEN(x) ((x) << S_CPL_TX_TNL_LSO_TCPHDRLEN)
3043 #define G_CPL_TX_TNL_LSO_TCPHDRLEN(x) \
3044 (((x) >> S_CPL_TX_TNL_LSO_TCPHDRLEN) & M_CPL_TX_TNL_LSO_TCPHDRLEN)
3046 #define S_CPL_TX_TNL_LSO_IPIDSPLIT 15
3047 #define M_CPL_TX_TNL_LSO_IPIDSPLIT 0x1
3048 #define V_CPL_TX_TNL_LSO_IPIDSPLIT(x) ((x) << S_CPL_TX_TNL_LSO_IPIDSPLIT)
3049 #define G_CPL_TX_TNL_LSO_IPIDSPLIT(x) \
3050 (((x) >> S_CPL_TX_TNL_LSO_IPIDSPLIT) & M_CPL_TX_TNL_LSO_IPIDSPLIT)
3051 #define F_CPL_TX_TNL_LSO_IPIDSPLIT V_CPL_TX_TNL_LSO_IPIDSPLIT(1U)
3053 #define S_CPL_TX_TNL_LSO_ETHHDRLENX 14
3054 #define M_CPL_TX_TNL_LSO_ETHHDRLENX 0x1
3055 #define V_CPL_TX_TNL_LSO_ETHHDRLENX(x) ((x) << S_CPL_TX_TNL_LSO_ETHHDRLENX)
3056 #define G_CPL_TX_TNL_LSO_ETHHDRLENX(x) \
3057 (((x) >> S_CPL_TX_TNL_LSO_ETHHDRLENX) & M_CPL_TX_TNL_LSO_ETHHDRLENX)
3058 #define F_CPL_TX_TNL_LSO_ETHHDRLENX V_CPL_TX_TNL_LSO_ETHHDRLENX(1U)
3060 #define S_CPL_TX_TNL_LSO_MSS 0
3061 #define M_CPL_TX_TNL_LSO_MSS 0x3fff
3062 #define V_CPL_TX_TNL_LSO_MSS(x) ((x) << S_CPL_TX_TNL_LSO_MSS)
3063 #define G_CPL_TX_TNL_LSO_MSS(x) \
3064 (((x) >> S_CPL_TX_TNL_LSO_MSS) & M_CPL_TX_TNL_LSO_MSS)
3066 #define S_CPL_TX_TNL_LSO_ETHLENOFFSET 28
3067 #define M_CPL_TX_TNL_LSO_ETHLENOFFSET 0xf
3068 #define V_CPL_TX_TNL_LSO_ETHLENOFFSET(x) \
3069 ((x) << S_CPL_TX_TNL_LSO_ETHLENOFFSET)
3070 #define G_CPL_TX_TNL_LSO_ETHLENOFFSET(x) \
3071 (((x) >> S_CPL_TX_TNL_LSO_ETHLENOFFSET) & M_CPL_TX_TNL_LSO_ETHLENOFFSET)
3073 #define S_CPL_TX_TNL_LSO_SIZE 0
3074 #define M_CPL_TX_TNL_LSO_SIZE 0xfffffff
3075 #define V_CPL_TX_TNL_LSO_SIZE(x) ((x) << S_CPL_TX_TNL_LSO_SIZE)
3076 #define G_CPL_TX_TNL_LSO_SIZE(x) \
3077 (((x) >> S_CPL_TX_TNL_LSO_SIZE) & M_CPL_TX_TNL_LSO_SIZE)
3079 struct cpl_rx_mps_pkt {
3081 __be32 r1_lo_length;
3084 #define S_CPL_RX_MPS_PKT_OP 24
3085 #define M_CPL_RX_MPS_PKT_OP 0xff
3086 #define V_CPL_RX_MPS_PKT_OP(x) ((x) << S_CPL_RX_MPS_PKT_OP)
3087 #define G_CPL_RX_MPS_PKT_OP(x) \
3088 (((x) >> S_CPL_RX_MPS_PKT_OP) & M_CPL_RX_MPS_PKT_OP)
3090 #define S_CPL_RX_MPS_PKT_TYPE 20
3091 #define M_CPL_RX_MPS_PKT_TYPE 0xf
3092 #define V_CPL_RX_MPS_PKT_TYPE(x) ((x) << S_CPL_RX_MPS_PKT_TYPE)
3093 #define G_CPL_RX_MPS_PKT_TYPE(x) \
3094 (((x) >> S_CPL_RX_MPS_PKT_TYPE) & M_CPL_RX_MPS_PKT_TYPE)
3097 * Values for CPL_RX_MPS_PKT_TYPE, a bit-wise orthogonal field.
3099 #define X_CPL_RX_MPS_PKT_TYPE_PAUSE (1 << 0)
3100 #define X_CPL_RX_MPS_PKT_TYPE_PPP (1 << 1)
3101 #define X_CPL_RX_MPS_PKT_TYPE_QFC (1 << 2)
3102 #define X_CPL_RX_MPS_PKT_TYPE_PTP (1 << 3)
3104 struct cpl_tx_tls_sfo {
3105 __be32 op_to_seg_len;
3108 __be32 seqno_numivs;
3109 __be32 ivgen_hdrlen;
3113 /* cpl_tx_tls_sfo macros */
3114 #define S_CPL_TX_TLS_SFO_OPCODE 24
3115 #define M_CPL_TX_TLS_SFO_OPCODE 0xff
3116 #define V_CPL_TX_TLS_SFO_OPCODE(x) ((x) << S_CPL_TX_TLS_SFO_OPCODE)
3117 #define G_CPL_TX_TLS_SFO_OPCODE(x) \
3118 (((x) >> S_CPL_TX_TLS_SFO_OPCODE) & M_CPL_TX_TLS_SFO_OPCODE)
3120 #define S_CPL_TX_TLS_SFO_DATA_TYPE 20
3121 #define M_CPL_TX_TLS_SFO_DATA_TYPE 0xf
3122 #define V_CPL_TX_TLS_SFO_DATA_TYPE(x) ((x) << S_CPL_TX_TLS_SFO_DATA_TYPE)
3123 #define G_CPL_TX_TLS_SFO_DATA_TYPE(x) \
3124 (((x) >> S_CPL_TX_TLS_SFO_DATA_TYPE) & M_CPL_TX_TLS_SFO_DATA_TYPE)
3126 #define S_CPL_TX_TLS_SFO_CPL_LEN 16
3127 #define M_CPL_TX_TLS_SFO_CPL_LEN 0xf
3128 #define V_CPL_TX_TLS_SFO_CPL_LEN(x) ((x) << S_CPL_TX_TLS_SFO_CPL_LEN)
3129 #define G_CPL_TX_TLS_SFO_CPL_LEN(x) \
3130 (((x) >> S_CPL_TX_TLS_SFO_CPL_LEN) & M_CPL_TX_TLS_SFO_CPL_LEN)
3131 #define S_CPL_TX_TLS_SFO_SEG_LEN 0
3132 #define M_CPL_TX_TLS_SFO_SEG_LEN 0xffff
3133 #define V_CPL_TX_TLS_SFO_SEG_LEN(x) ((x) << S_CPL_TX_TLS_SFO_SEG_LEN)
3134 #define G_CPL_TX_TLS_SFO_SEG_LEN(x) \
3135 (((x) >> S_CPL_TX_TLS_SFO_SEG_LEN) & M_CPL_TX_TLS_SFO_SEG_LEN)
3137 struct cpl_tls_data {
3145 #define S_CPL_TLS_DATA_OPCODE 24
3146 #define M_CPL_TLS_DATA_OPCODE 0xff
3147 #define V_CPL_TLS_DATA_OPCODE(x) ((x) << S_CPL_TLS_DATA_OPCODE)
3148 #define G_CPL_TLS_DATA_OPCODE(x) \
3149 (((x) >> S_CPL_TLS_DATA_OPCODE) & M_CPL_TLS_DATA_OPCODE)
3151 #define S_CPL_TLS_DATA_TID 0
3152 #define M_CPL_TLS_DATA_TID 0xffffff
3153 #define V_CPL_TLS_DATA_TID(x) ((x) << S_CPL_TLS_DATA_TID)
3154 #define G_CPL_TLS_DATA_TID(x) \
3155 (((x) >> S_CPL_TLS_DATA_TID) & M_CPL_TLS_DATA_TID)
3157 #define S_CPL_TLS_DATA_LENGTH 0
3158 #define M_CPL_TLS_DATA_LENGTH 0xffff
3159 #define V_CPL_TLS_DATA_LENGTH(x) ((x) << S_CPL_TLS_DATA_LENGTH)
3160 #define G_CPL_TLS_DATA_LENGTH(x) \
3161 (((x) >> S_CPL_TLS_DATA_LENGTH) & M_CPL_TLS_DATA_LENGTH)
3163 struct cpl_rx_tls_cmp {
3166 __be32 pdulength_length;
3173 #define S_CPL_RX_TLS_CMP_OPCODE 24
3174 #define M_CPL_RX_TLS_CMP_OPCODE 0xff
3175 #define V_CPL_RX_TLS_CMP_OPCODE(x) ((x) << S_CPL_RX_TLS_CMP_OPCODE)
3176 #define G_CPL_RX_TLS_CMP_OPCODE(x) \
3177 (((x) >> S_CPL_RX_TLS_CMP_OPCODE) & M_CPL_RX_TLS_CMP_OPCODE)
3179 #define S_CPL_RX_TLS_CMP_TID 0
3180 #define M_CPL_RX_TLS_CMP_TID 0xffffff
3181 #define V_CPL_RX_TLS_CMP_TID(x) ((x) << S_CPL_RX_TLS_CMP_TID)
3182 #define G_CPL_RX_TLS_CMP_TID(x) \
3183 (((x) >> S_CPL_RX_TLS_CMP_TID) & M_CPL_RX_TLS_CMP_TID)
3185 #define S_CPL_RX_TLS_CMP_PDULENGTH 16
3186 #define M_CPL_RX_TLS_CMP_PDULENGTH 0xffff
3187 #define V_CPL_RX_TLS_CMP_PDULENGTH(x) ((x) << S_CPL_RX_TLS_CMP_PDULENGTH)
3188 #define G_CPL_RX_TLS_CMP_PDULENGTH(x) \
3189 (((x) >> S_CPL_RX_TLS_CMP_PDULENGTH) & M_CPL_RX_TLS_CMP_PDULENGTH)
3191 #define S_CPL_RX_TLS_CMP_LENGTH 0
3192 #define M_CPL_RX_TLS_CMP_LENGTH 0xffff
3193 #define V_CPL_RX_TLS_CMP_LENGTH(x) ((x) << S_CPL_RX_TLS_CMP_LENGTH)
3194 #define G_CPL_RX_TLS_CMP_LENGTH(x) \
3195 (((x) >> S_CPL_RX_TLS_CMP_LENGTH) & M_CPL_RX_TLS_CMP_LENGTH)
3197 #define S_SCMD_SEQ_NO_CTRL 29
3198 #define M_SCMD_SEQ_NO_CTRL 0x3
3199 #define V_SCMD_SEQ_NO_CTRL(x) ((x) << S_SCMD_SEQ_NO_CTRL)
3200 #define G_SCMD_SEQ_NO_CTRL(x) \
3201 (((x) >> S_SCMD_SEQ_NO_CTRL) & M_SCMD_SEQ_NO_CTRL)
3203 /* StsFieldPrsnt- Status field at the end of the TLS PDU */
3204 #define S_SCMD_STATUS_PRESENT 28
3205 #define M_SCMD_STATUS_PRESENT 0x1
3206 #define V_SCMD_STATUS_PRESENT(x) ((x) << S_SCMD_STATUS_PRESENT)
3207 #define G_SCMD_STATUS_PRESENT(x) \
3208 (((x) >> S_SCMD_STATUS_PRESENT) & M_SCMD_STATUS_PRESENT)
3209 #define F_SCMD_STATUS_PRESENT V_SCMD_STATUS_PRESENT(1U)
3211 /* ProtoVersion - Protocol Version 0: 1.2, 1:1.1, 2:DTLS, 3:Generic,
3212 * 3-15: Reserved. */
3213 #define S_SCMD_PROTO_VERSION 24
3214 #define M_SCMD_PROTO_VERSION 0xf
3215 #define V_SCMD_PROTO_VERSION(x) ((x) << S_SCMD_PROTO_VERSION)
3216 #define G_SCMD_PROTO_VERSION(x) \
3217 (((x) >> S_SCMD_PROTO_VERSION) & M_SCMD_PROTO_VERSION)
3219 /* EncDecCtrl - Encryption/Decryption Control. 0: Encrypt, 1: Decrypt */
3220 #define S_SCMD_ENC_DEC_CTRL 23
3221 #define M_SCMD_ENC_DEC_CTRL 0x1
3222 #define V_SCMD_ENC_DEC_CTRL(x) ((x) << S_SCMD_ENC_DEC_CTRL)
3223 #define G_SCMD_ENC_DEC_CTRL(x) \
3224 (((x) >> S_SCMD_ENC_DEC_CTRL) & M_SCMD_ENC_DEC_CTRL)
3225 #define F_SCMD_ENC_DEC_CTRL V_SCMD_ENC_DEC_CTRL(1U)
3227 /* CipherAuthSeqCtrl - Cipher Authentication Sequence Control. */
3228 #define S_SCMD_CIPH_AUTH_SEQ_CTRL 22
3229 #define M_SCMD_CIPH_AUTH_SEQ_CTRL 0x1
3230 #define V_SCMD_CIPH_AUTH_SEQ_CTRL(x) \
3231 ((x) << S_SCMD_CIPH_AUTH_SEQ_CTRL)
3232 #define G_SCMD_CIPH_AUTH_SEQ_CTRL(x) \
3233 (((x) >> S_SCMD_CIPH_AUTH_SEQ_CTRL) & M_SCMD_CIPH_AUTH_SEQ_CTRL)
3234 #define F_SCMD_CIPH_AUTH_SEQ_CTRL V_SCMD_CIPH_AUTH_SEQ_CTRL(1U)
3236 /* CiphMode - Cipher Mode. 0: NOP, 1:AES-CBC, 2:AES-GCM, 3:AES-CTR,
3237 * 4:Generic-AES, 5-15: Reserved. */
3238 #define S_SCMD_CIPH_MODE 18
3239 #define M_SCMD_CIPH_MODE 0xf
3240 #define V_SCMD_CIPH_MODE(x) ((x) << S_SCMD_CIPH_MODE)
3241 #define G_SCMD_CIPH_MODE(x) \
3242 (((x) >> S_SCMD_CIPH_MODE) & M_SCMD_CIPH_MODE)
3244 /* AuthMode - Auth Mode. 0: NOP, 1:SHA1, 2:SHA2-224, 3:SHA2-256
3246 #define S_SCMD_AUTH_MODE 14
3247 #define M_SCMD_AUTH_MODE 0xf
3248 #define V_SCMD_AUTH_MODE(x) ((x) << S_SCMD_AUTH_MODE)
3249 #define G_SCMD_AUTH_MODE(x) \
3250 (((x) >> S_SCMD_AUTH_MODE) & M_SCMD_AUTH_MODE)
3252 /* HmacCtrl - HMAC Control. 0:NOP, 1:No truncation, 2:Support HMAC Truncation
3253 * per RFC 4366, 3:IPSec 96 bits, 4-7:Reserved
3255 #define S_SCMD_HMAC_CTRL 11
3256 #define M_SCMD_HMAC_CTRL 0x7
3257 #define V_SCMD_HMAC_CTRL(x) ((x) << S_SCMD_HMAC_CTRL)
3258 #define G_SCMD_HMAC_CTRL(x) \
3259 (((x) >> S_SCMD_HMAC_CTRL) & M_SCMD_HMAC_CTRL)
3261 /* IvSize - IV size in units of 2 bytes */
3262 #define S_SCMD_IV_SIZE 7
3263 #define M_SCMD_IV_SIZE 0xf
3264 #define V_SCMD_IV_SIZE(x) ((x) << S_SCMD_IV_SIZE)
3265 #define G_SCMD_IV_SIZE(x) \
3266 (((x) >> S_SCMD_IV_SIZE) & M_SCMD_IV_SIZE)
3268 /* NumIVs - Number of IVs */
3269 #define S_SCMD_NUM_IVS 0
3270 #define M_SCMD_NUM_IVS 0x7f
3271 #define V_SCMD_NUM_IVS(x) ((x) << S_SCMD_NUM_IVS)
3272 #define G_SCMD_NUM_IVS(x) \
3273 (((x) >> S_SCMD_NUM_IVS) & M_SCMD_NUM_IVS)
3275 /* EnbDbgId - If this is enabled upper 20 (63:44) bits if SeqNumber
3276 * (below) are used as Cid (connection id for debug status), these
3277 * bits are padded to zero for forming the 64 bit
3278 * sequence number for TLS
3280 #define S_SCMD_ENB_DBGID 31
3281 #define M_SCMD_ENB_DBGID 0x1
3282 #define V_SCMD_ENB_DBGID(x) ((x) << S_SCMD_ENB_DBGID)
3283 #define G_SCMD_ENB_DBGID(x) \
3284 (((x) >> S_SCMD_ENB_DBGID) & M_SCMD_ENB_DBGID)
3286 /* IV generation in SW. */
3287 #define S_SCMD_IV_GEN_CTRL 30
3288 #define M_SCMD_IV_GEN_CTRL 0x1
3289 #define V_SCMD_IV_GEN_CTRL(x) ((x) << S_SCMD_IV_GEN_CTRL)
3290 #define G_SCMD_IV_GEN_CTRL(x) \
3291 (((x) >> S_SCMD_IV_GEN_CTRL) & M_SCMD_IV_GEN_CTRL)
3292 #define F_SCMD_IV_GEN_CTRL V_SCMD_IV_GEN_CTRL(1U)
3295 #define S_SCMD_MORE_FRAGS 20
3296 #define M_SCMD_MORE_FRAGS 0x1
3297 #define V_SCMD_MORE_FRAGS(x) ((x) << S_SCMD_MORE_FRAGS)
3298 #define G_SCMD_MORE_FRAGS(x) (((x) >> S_SCMD_MORE_FRAGS) & M_SCMD_MORE_FRAGS)
3301 #define S_SCMD_LAST_FRAG 19
3302 #define M_SCMD_LAST_FRAG 0x1
3303 #define V_SCMD_LAST_FRAG(x) ((x) << S_SCMD_LAST_FRAG)
3304 #define G_SCMD_LAST_FRAG(x) (((x) >> S_SCMD_LAST_FRAG) & M_SCMD_LAST_FRAG)
3307 #define S_SCMD_TLS_COMPPDU 18
3308 #define M_SCMD_TLS_COMPPDU 0x1
3309 #define V_SCMD_TLS_COMPPDU(x) ((x) << S_SCMD_TLS_COMPPDU)
3310 #define G_SCMD_TLS_COMPPDU(x) (((x) >> S_SCMD_TLS_COMPPDU) & M_SCMD_TLS_COMPPDU)
3312 /* KeyCntxtInline - Key context inline after the scmd OR PayloadOnly*/
3313 #define S_SCMD_KEY_CTX_INLINE 17
3314 #define M_SCMD_KEY_CTX_INLINE 0x1
3315 #define V_SCMD_KEY_CTX_INLINE(x) ((x) << S_SCMD_KEY_CTX_INLINE)
3316 #define G_SCMD_KEY_CTX_INLINE(x) \
3317 (((x) >> S_SCMD_KEY_CTX_INLINE) & M_SCMD_KEY_CTX_INLINE)
3318 #define F_SCMD_KEY_CTX_INLINE V_SCMD_KEY_CTX_INLINE(1U)
3320 /* TLSFragEnable - 0: Host created TLS PDUs, 1: TLS Framgmentation in ASIC */
3321 #define S_SCMD_TLS_FRAG_ENABLE 16
3322 #define M_SCMD_TLS_FRAG_ENABLE 0x1
3323 #define V_SCMD_TLS_FRAG_ENABLE(x) ((x) << S_SCMD_TLS_FRAG_ENABLE)
3324 #define G_SCMD_TLS_FRAG_ENABLE(x) \
3325 (((x) >> S_SCMD_TLS_FRAG_ENABLE) & M_SCMD_TLS_FRAG_ENABLE)
3326 #define F_SCMD_TLS_FRAG_ENABLE V_SCMD_TLS_FRAG_ENABLE(1U)
3328 /* MacOnly - Only send the MAC and discard PDU. This is valid for hash only
3329 * modes, in this case TLS_TX will drop the PDU and only
3330 * send back the MAC bytes. */
3331 #define S_SCMD_MAC_ONLY 15
3332 #define M_SCMD_MAC_ONLY 0x1
3333 #define V_SCMD_MAC_ONLY(x) ((x) << S_SCMD_MAC_ONLY)
3334 #define G_SCMD_MAC_ONLY(x) \
3335 (((x) >> S_SCMD_MAC_ONLY) & M_SCMD_MAC_ONLY)
3336 #define F_SCMD_MAC_ONLY V_SCMD_MAC_ONLY(1U)
3338 /* AadIVDrop - Drop the AAD and IV fields. Useful in protocols
3339 * which have complex AAD and IV formations Eg:AES-CCM
3341 #define S_SCMD_AADIVDROP 14
3342 #define M_SCMD_AADIVDROP 0x1
3343 #define V_SCMD_AADIVDROP(x) ((x) << S_SCMD_AADIVDROP)
3344 #define G_SCMD_AADIVDROP(x) \
3345 (((x) >> S_SCMD_AADIVDROP) & M_SCMD_AADIVDROP)
3346 #define F_SCMD_AADIVDROP V_SCMD_AADIVDROP(1U)
3348 /* HdrLength - Length of all headers excluding TLS header
3349 * present before start of crypto PDU/payload. */
3350 #define S_SCMD_HDR_LEN 0
3351 #define M_SCMD_HDR_LEN 0x3fff
3352 #define V_SCMD_HDR_LEN(x) ((x) << S_SCMD_HDR_LEN)
3353 #define G_SCMD_HDR_LEN(x) \
3354 (((x) >> S_SCMD_HDR_LEN) & M_SCMD_HDR_LEN)
3356 struct cpl_tx_sec_pdu {
3357 __be32 op_ivinsrtofst;
3359 __be32 aadstart_cipherstop_hi;
3360 __be32 cipherstop_lo_authinsert;
3361 __be32 seqno_numivs;
3362 __be32 ivgen_hdrlen;
3366 #define S_CPL_TX_SEC_PDU_OPCODE 24
3367 #define M_CPL_TX_SEC_PDU_OPCODE 0xff
3368 #define V_CPL_TX_SEC_PDU_OPCODE(x) ((x) << S_CPL_TX_SEC_PDU_OPCODE)
3369 #define G_CPL_TX_SEC_PDU_OPCODE(x) \
3370 (((x) >> S_CPL_TX_SEC_PDU_OPCODE) & M_CPL_TX_SEC_PDU_OPCODE)
3373 #define S_CPL_TX_SEC_PDU_RXCHID 22
3374 #define M_CPL_TX_SEC_PDU_RXCHID 0x1
3375 #define V_CPL_TX_SEC_PDU_RXCHID(x) ((x) << S_CPL_TX_SEC_PDU_RXCHID)
3376 #define G_CPL_TX_SEC_PDU_RXCHID(x) \
3377 (((x) >> S_CPL_TX_SEC_PDU_RXCHID) & M_CPL_TX_SEC_PDU_RXCHID)
3378 #define F_CPL_TX_SEC_PDU_RXCHID V_CPL_TX_SEC_PDU_RXCHID(1U)
3381 #define S_CPL_TX_SEC_PDU_ACKFOLLOWS 21
3382 #define M_CPL_TX_SEC_PDU_ACKFOLLOWS 0x1
3383 #define V_CPL_TX_SEC_PDU_ACKFOLLOWS(x) ((x) << S_CPL_TX_SEC_PDU_ACKFOLLOWS)
3384 #define G_CPL_TX_SEC_PDU_ACKFOLLOWS(x) \
3385 (((x) >> S_CPL_TX_SEC_PDU_ACKFOLLOWS) & M_CPL_TX_SEC_PDU_ACKFOLLOWS)
3386 #define F_CPL_TX_SEC_PDU_ACKFOLLOWS V_CPL_TX_SEC_PDU_ACKFOLLOWS(1U)
3388 /* Loopback bit in cpl_tx_sec_pdu */
3389 #define S_CPL_TX_SEC_PDU_ULPTXLPBK 20
3390 #define M_CPL_TX_SEC_PDU_ULPTXLPBK 0x1
3391 #define V_CPL_TX_SEC_PDU_ULPTXLPBK(x) ((x) << S_CPL_TX_SEC_PDU_ULPTXLPBK)
3392 #define G_CPL_TX_SEC_PDU_ULPTXLPBK(x) \
3393 (((x) >> S_CPL_TX_SEC_PDU_ULPTXLPBK) & M_CPL_TX_SEC_PDU_ULPTXLPBK)
3394 #define F_CPL_TX_SEC_PDU_ULPTXLPBK V_CPL_TX_SEC_PDU_ULPTXLPBK(1U)
3396 /* Length of cpl header encapsulated */
3397 #define S_CPL_TX_SEC_PDU_CPLLEN 16
3398 #define M_CPL_TX_SEC_PDU_CPLLEN 0xf
3399 #define V_CPL_TX_SEC_PDU_CPLLEN(x) ((x) << S_CPL_TX_SEC_PDU_CPLLEN)
3400 #define G_CPL_TX_SEC_PDU_CPLLEN(x) \
3401 (((x) >> S_CPL_TX_SEC_PDU_CPLLEN) & M_CPL_TX_SEC_PDU_CPLLEN)
3404 #define S_CPL_TX_SEC_PDU_PLACEHOLDER 10
3405 #define M_CPL_TX_SEC_PDU_PLACEHOLDER 0x1
3406 #define V_CPL_TX_SEC_PDU_PLACEHOLDER(x) ((x) << S_CPL_TX_SEC_PDU_PLACEHOLDER)
3407 #define G_CPL_TX_SEC_PDU_PLACEHOLDER(x) \
3408 (((x) >> S_CPL_TX_SEC_PDU_PLACEHOLDER) & \
3409 M_CPL_TX_SEC_PDU_PLACEHOLDER)
3411 /* IvInsrtOffset: Insertion location for IV */
3412 #define S_CPL_TX_SEC_PDU_IVINSRTOFST 0
3413 #define M_CPL_TX_SEC_PDU_IVINSRTOFST 0x3ff
3414 #define V_CPL_TX_SEC_PDU_IVINSRTOFST(x) ((x) << S_CPL_TX_SEC_PDU_IVINSRTOFST)
3415 #define G_CPL_TX_SEC_PDU_IVINSRTOFST(x) \
3416 (((x) >> S_CPL_TX_SEC_PDU_IVINSRTOFST) & \
3417 M_CPL_TX_SEC_PDU_IVINSRTOFST)
3419 /* AadStartOffset: Offset in bytes for AAD start from
3420 * the first byte following
3421 * the pkt headers (0-255
3423 #define S_CPL_TX_SEC_PDU_AADSTART 24
3424 #define M_CPL_TX_SEC_PDU_AADSTART 0xff
3425 #define V_CPL_TX_SEC_PDU_AADSTART(x) ((x) << S_CPL_TX_SEC_PDU_AADSTART)
3426 #define G_CPL_TX_SEC_PDU_AADSTART(x) \
3427 (((x) >> S_CPL_TX_SEC_PDU_AADSTART) & \
3428 M_CPL_TX_SEC_PDU_AADSTART)
3430 /* AadStopOffset: offset in bytes for AAD stop/end from the first byte following
3431 * the pkt headers (0-511 bytes) */
3432 #define S_CPL_TX_SEC_PDU_AADSTOP 15
3433 #define M_CPL_TX_SEC_PDU_AADSTOP 0x1ff
3434 #define V_CPL_TX_SEC_PDU_AADSTOP(x) ((x) << S_CPL_TX_SEC_PDU_AADSTOP)
3435 #define G_CPL_TX_SEC_PDU_AADSTOP(x) \
3436 (((x) >> S_CPL_TX_SEC_PDU_AADSTOP) & M_CPL_TX_SEC_PDU_AADSTOP)
3438 /* CipherStartOffset: offset in bytes for encryption/decryption start from the
3439 * first byte following the pkt headers (0-1023
3441 #define S_CPL_TX_SEC_PDU_CIPHERSTART 5
3442 #define M_CPL_TX_SEC_PDU_CIPHERSTART 0x3ff
3443 #define V_CPL_TX_SEC_PDU_CIPHERSTART(x) ((x) << S_CPL_TX_SEC_PDU_CIPHERSTART)
3444 #define G_CPL_TX_SEC_PDU_CIPHERSTART(x) \
3445 (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTART) & \
3446 M_CPL_TX_SEC_PDU_CIPHERSTART)
3448 /* CipherStopOffset: offset in bytes for encryption/decryption end
3449 * from end of the payload of this command (0-511 bytes) */
3450 #define S_CPL_TX_SEC_PDU_CIPHERSTOP_HI 0
3451 #define M_CPL_TX_SEC_PDU_CIPHERSTOP_HI 0x1f
3452 #define V_CPL_TX_SEC_PDU_CIPHERSTOP_HI(x) \
3453 ((x) << S_CPL_TX_SEC_PDU_CIPHERSTOP_HI)
3454 #define G_CPL_TX_SEC_PDU_CIPHERSTOP_HI(x) \
3455 (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTOP_HI) & \
3456 M_CPL_TX_SEC_PDU_CIPHERSTOP_HI)
3458 #define S_CPL_TX_SEC_PDU_CIPHERSTOP_LO 28
3459 #define M_CPL_TX_SEC_PDU_CIPHERSTOP_LO 0xf
3460 #define V_CPL_TX_SEC_PDU_CIPHERSTOP_LO(x) \
3461 ((x) << S_CPL_TX_SEC_PDU_CIPHERSTOP_LO)
3462 #define G_CPL_TX_SEC_PDU_CIPHERSTOP_LO(x) \
3463 (((x) >> S_CPL_TX_SEC_PDU_CIPHERSTOP_LO) & \
3464 M_CPL_TX_SEC_PDU_CIPHERSTOP_LO)
3466 /* AuthStartOffset: offset in bytes for authentication start from
3467 * the first byte following the pkt headers (0-1023)
3469 #define S_CPL_TX_SEC_PDU_AUTHSTART 18
3470 #define M_CPL_TX_SEC_PDU_AUTHSTART 0x3ff
3471 #define V_CPL_TX_SEC_PDU_AUTHSTART(x) ((x) << S_CPL_TX_SEC_PDU_AUTHSTART)
3472 #define G_CPL_TX_SEC_PDU_AUTHSTART(x) \
3473 (((x) >> S_CPL_TX_SEC_PDU_AUTHSTART) & \
3474 M_CPL_TX_SEC_PDU_AUTHSTART)
3476 /* AuthStopOffset: offset in bytes for authentication
3477 * end from end of the payload of this command (0-511 Bytes) */
3478 #define S_CPL_TX_SEC_PDU_AUTHSTOP 9
3479 #define M_CPL_TX_SEC_PDU_AUTHSTOP 0x1ff
3480 #define V_CPL_TX_SEC_PDU_AUTHSTOP(x) ((x) << S_CPL_TX_SEC_PDU_AUTHSTOP)
3481 #define G_CPL_TX_SEC_PDU_AUTHSTOP(x) \
3482 (((x) >> S_CPL_TX_SEC_PDU_AUTHSTOP) & \
3483 M_CPL_TX_SEC_PDU_AUTHSTOP)
3485 /* AuthInsrtOffset: offset in bytes for authentication insertion
3486 * from end of the payload of this command (0-511 bytes) */
3487 #define S_CPL_TX_SEC_PDU_AUTHINSERT 0
3488 #define M_CPL_TX_SEC_PDU_AUTHINSERT 0x1ff
3489 #define V_CPL_TX_SEC_PDU_AUTHINSERT(x) ((x) << S_CPL_TX_SEC_PDU_AUTHINSERT)
3490 #define G_CPL_TX_SEC_PDU_AUTHINSERT(x) \
3491 (((x) >> S_CPL_TX_SEC_PDU_AUTHINSERT) & \
3492 M_CPL_TX_SEC_PDU_AUTHINSERT)
3494 struct cpl_rx_phys_dsgl {
3496 __be32 pcirlxorder_to_noofsgentr;
3497 struct rss_header rss_hdr_int;
3500 #define S_CPL_RX_PHYS_DSGL_OPCODE 24
3501 #define M_CPL_RX_PHYS_DSGL_OPCODE 0xff
3502 #define V_CPL_RX_PHYS_DSGL_OPCODE(x) ((x) << S_CPL_RX_PHYS_DSGL_OPCODE)
3503 #define G_CPL_RX_PHYS_DSGL_OPCODE(x) \
3504 (((x) >> S_CPL_RX_PHYS_DSGL_OPCODE) & M_CPL_RX_PHYS_DSGL_OPCODE)
3506 #define S_CPL_RX_PHYS_DSGL_ISRDMA 23
3507 #define M_CPL_RX_PHYS_DSGL_ISRDMA 0x1
3508 #define V_CPL_RX_PHYS_DSGL_ISRDMA(x) ((x) << S_CPL_RX_PHYS_DSGL_ISRDMA)
3509 #define G_CPL_RX_PHYS_DSGL_ISRDMA(x) \
3510 (((x) >> S_CPL_RX_PHYS_DSGL_ISRDMA) & M_CPL_RX_PHYS_DSGL_ISRDMA)
3511 #define F_CPL_RX_PHYS_DSGL_ISRDMA V_CPL_RX_PHYS_DSGL_ISRDMA(1U)
3513 #define S_CPL_RX_PHYS_DSGL_RSVD1 20
3514 #define M_CPL_RX_PHYS_DSGL_RSVD1 0x7
3515 #define V_CPL_RX_PHYS_DSGL_RSVD1(x) ((x) << S_CPL_RX_PHYS_DSGL_RSVD1)
3516 #define G_CPL_RX_PHYS_DSGL_RSVD1(x) \
3517 (((x) >> S_CPL_RX_PHYS_DSGL_RSVD1) & M_CPL_RX_PHYS_DSGL_RSVD1)
3519 #define S_CPL_RX_PHYS_DSGL_PCIRLXORDER 31
3520 #define M_CPL_RX_PHYS_DSGL_PCIRLXORDER 0x1
3521 #define V_CPL_RX_PHYS_DSGL_PCIRLXORDER(x) \
3522 ((x) << S_CPL_RX_PHYS_DSGL_PCIRLXORDER)
3523 #define G_CPL_RX_PHYS_DSGL_PCIRLXORDER(x) \
3524 (((x) >> S_CPL_RX_PHYS_DSGL_PCIRLXORDER) & \
3525 M_CPL_RX_PHYS_DSGL_PCIRLXORDER)
3526 #define F_CPL_RX_PHYS_DSGL_PCIRLXORDER V_CPL_RX_PHYS_DSGL_PCIRLXORDER(1U)
3528 #define S_CPL_RX_PHYS_DSGL_PCINOSNOOP 30
3529 #define M_CPL_RX_PHYS_DSGL_PCINOSNOOP 0x1
3530 #define V_CPL_RX_PHYS_DSGL_PCINOSNOOP(x) \
3531 ((x) << S_CPL_RX_PHYS_DSGL_PCINOSNOOP)
3532 #define G_CPL_RX_PHYS_DSGL_PCINOSNOOP(x) \
3533 (((x) >> S_CPL_RX_PHYS_DSGL_PCINOSNOOP) & \
3534 M_CPL_RX_PHYS_DSGL_PCINOSNOOP)
3535 #define F_CPL_RX_PHYS_DSGL_PCINOSNOOP V_CPL_RX_PHYS_DSGL_PCINOSNOOP(1U)
3537 #define S_CPL_RX_PHYS_DSGL_PCITPHNTENB 29
3538 #define M_CPL_RX_PHYS_DSGL_PCITPHNTENB 0x1
3539 #define V_CPL_RX_PHYS_DSGL_PCITPHNTENB(x) \
3540 ((x) << S_CPL_RX_PHYS_DSGL_PCITPHNTENB)
3541 #define G_CPL_RX_PHYS_DSGL_PCITPHNTENB(x) \
3542 (((x) >> S_CPL_RX_PHYS_DSGL_PCITPHNTENB) & \
3543 M_CPL_RX_PHYS_DSGL_PCITPHNTENB)
3544 #define F_CPL_RX_PHYS_DSGL_PCITPHNTENB V_CPL_RX_PHYS_DSGL_PCITPHNTENB(1U)
3546 #define S_CPL_RX_PHYS_DSGL_PCITPHNT 27
3547 #define M_CPL_RX_PHYS_DSGL_PCITPHNT 0x3
3548 #define V_CPL_RX_PHYS_DSGL_PCITPHNT(x) ((x) << S_CPL_RX_PHYS_DSGL_PCITPHNT)
3549 #define G_CPL_RX_PHYS_DSGL_PCITPHNT(x) \
3550 (((x) >> S_CPL_RX_PHYS_DSGL_PCITPHNT) & \
3551 M_CPL_RX_PHYS_DSGL_PCITPHNT)
3553 #define S_CPL_RX_PHYS_DSGL_DCAID 16
3554 #define M_CPL_RX_PHYS_DSGL_DCAID 0x7ff
3555 #define V_CPL_RX_PHYS_DSGL_DCAID(x) ((x) << S_CPL_RX_PHYS_DSGL_DCAID)
3556 #define G_CPL_RX_PHYS_DSGL_DCAID(x) \
3557 (((x) >> S_CPL_RX_PHYS_DSGL_DCAID) & \
3558 M_CPL_RX_PHYS_DSGL_DCAID)
3560 #define S_CPL_RX_PHYS_DSGL_NOOFSGENTR 0
3561 #define M_CPL_RX_PHYS_DSGL_NOOFSGENTR 0xffff
3562 #define V_CPL_RX_PHYS_DSGL_NOOFSGENTR(x) \
3563 ((x) << S_CPL_RX_PHYS_DSGL_NOOFSGENTR)
3564 #define G_CPL_RX_PHYS_DSGL_NOOFSGENTR(x) \
3565 (((x) >> S_CPL_RX_PHYS_DSGL_NOOFSGENTR) & \
3566 M_CPL_RX_PHYS_DSGL_NOOFSGENTR)
3568 /* CPL_TX_TLS_ACK */
3569 struct cpl_tx_tls_ack {
3575 #define S_CPL_TX_TLS_ACK_OPCODE 24
3576 #define M_CPL_TX_TLS_ACK_OPCODE 0xff
3577 #define V_CPL_TX_TLS_ACK_OPCODE(x) ((x) << S_CPL_TX_TLS_ACK_OPCODE)
3578 #define G_CPL_TX_TLS_ACK_OPCODE(x) \
3579 (((x) >> S_CPL_TX_TLS_ACK_OPCODE) & M_CPL_TX_TLS_ACK_OPCODE)
3581 #define S_CPL_TX_TLS_ACK_RSVD1 23
3582 #define M_CPL_TX_TLS_ACK_RSVD1 0x1
3583 #define V_CPL_TX_TLS_ACK_RSVD1(x) ((x) << S_CPL_TX_TLS_ACK_RSVD1)
3584 #define G_CPL_TX_TLS_ACK_RSVD1(x) \
3585 (((x) >> S_CPL_TX_TLS_ACK_RSVD1) & M_CPL_TX_TLS_ACK_RSVD1)
3586 #define F_CPL_TX_TLS_ACK_RSVD1 V_CPL_TX_TLS_ACK_RSVD1(1U)
3588 #define S_CPL_TX_TLS_ACK_RXCHID 22
3589 #define M_CPL_TX_TLS_ACK_RXCHID 0x1
3590 #define V_CPL_TX_TLS_ACK_RXCHID(x) ((x) << S_CPL_TX_TLS_ACK_RXCHID)
3591 #define G_CPL_TX_TLS_ACK_RXCHID(x) \
3592 (((x) >> S_CPL_TX_TLS_ACK_RXCHID) & M_CPL_TX_TLS_ACK_RXCHID)
3593 #define F_CPL_TX_TLS_ACK_RXCHID V_CPL_TX_TLS_ACK_RXCHID(1U)
3595 #define S_CPL_TX_TLS_ACK_FWMSG 21
3596 #define M_CPL_TX_TLS_ACK_FWMSG 0x1
3597 #define V_CPL_TX_TLS_ACK_FWMSG(x) ((x) << S_CPL_TX_TLS_ACK_FWMSG)
3598 #define G_CPL_TX_TLS_ACK_FWMSG(x) \
3599 (((x) >> S_CPL_TX_TLS_ACK_FWMSG) & M_CPL_TX_TLS_ACK_FWMSG)
3600 #define F_CPL_TX_TLS_ACK_FWMSG V_CPL_TX_TLS_ACK_FWMSG(1U)
3602 #define S_CPL_TX_TLS_ACK_ULPTXLPBK 20
3603 #define M_CPL_TX_TLS_ACK_ULPTXLPBK 0x1
3604 #define V_CPL_TX_TLS_ACK_ULPTXLPBK(x) ((x) << S_CPL_TX_TLS_ACK_ULPTXLPBK)
3605 #define G_CPL_TX_TLS_ACK_ULPTXLPBK(x) \
3606 (((x) >> S_CPL_TX_TLS_ACK_ULPTXLPBK) & M_CPL_TX_TLS_ACK_ULPTXLPBK)
3607 #define F_CPL_TX_TLS_ACK_ULPTXLPBK V_CPL_TX_TLS_ACK_ULPTXLPBK(1U)
3609 #define S_CPL_TX_TLS_ACK_CPLLEN 16
3610 #define M_CPL_TX_TLS_ACK_CPLLEN 0xf
3611 #define V_CPL_TX_TLS_ACK_CPLLEN(x) ((x) << S_CPL_TX_TLS_ACK_CPLLEN)
3612 #define G_CPL_TX_TLS_ACK_CPLLEN(x) \
3613 (((x) >> S_CPL_TX_TLS_ACK_CPLLEN) & M_CPL_TX_TLS_ACK_CPLLEN)
3615 #define S_CPL_TX_TLS_ACK_COMPLONERR 15
3616 #define M_CPL_TX_TLS_ACK_COMPLONERR 0x1
3617 #define V_CPL_TX_TLS_ACK_COMPLONERR(x) ((x) << S_CPL_TX_TLS_ACK_COMPLONERR)
3618 #define G_CPL_TX_TLS_ACK_COMPLONERR(x) \
3619 (((x) >> S_CPL_TX_TLS_ACK_COMPLONERR) & M_CPL_TX_TLS_ACK_COMPLONERR)
3620 #define F_CPL_TX_TLS_ACK_COMPLONERR V_CPL_TX_TLS_ACK_COMPLONERR(1U)
3622 #define S_CPL_TX_TLS_ACK_LCB 14
3623 #define M_CPL_TX_TLS_ACK_LCB 0x1
3624 #define V_CPL_TX_TLS_ACK_LCB(x) ((x) << S_CPL_TX_TLS_ACK_LCB)
3625 #define G_CPL_TX_TLS_ACK_LCB(x) \
3626 (((x) >> S_CPL_TX_TLS_ACK_LCB) & M_CPL_TX_TLS_ACK_LCB)
3627 #define F_CPL_TX_TLS_ACK_LCB V_CPL_TX_TLS_ACK_LCB(1U)
3629 #define S_CPL_TX_TLS_ACK_PHASH 13
3630 #define M_CPL_TX_TLS_ACK_PHASH 0x1
3631 #define V_CPL_TX_TLS_ACK_PHASH(x) ((x) << S_CPL_TX_TLS_ACK_PHASH)
3632 #define G_CPL_TX_TLS_ACK_PHASH(x) \
3633 (((x) >> S_CPL_TX_TLS_ACK_PHASH) & M_CPL_TX_TLS_ACK_PHASH)
3634 #define F_CPL_TX_TLS_ACK_PHASH V_CPL_TX_TLS_ACK_PHASH(1U)
3636 #define S_CPL_TX_TLS_ACK_RSVD2 0
3637 #define M_CPL_TX_TLS_ACK_RSVD2 0x1fff
3638 #define V_CPL_TX_TLS_ACK_RSVD2(x) ((x) << S_CPL_TX_TLS_ACK_RSVD2)
3639 #define G_CPL_TX_TLS_ACK_RSVD2(x) \
3640 (((x) >> S_CPL_TX_TLS_ACK_RSVD2) & M_CPL_TX_TLS_ACK_RSVD2)
3642 #endif /* T4_MSG_H */