2 * Copyright (c) 2015-2016 Chelsio Communications, Inc.
4 * Written by: John Baldwin <jhb@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/systm.h>
36 #include <dev/pci/pcivar.h>
40 #include <sys/iov_schema.h>
41 #include <dev/pci/pci_iov.h>
44 #include "common/common.h"
45 #include "common/t4_regs.h"
55 struct resource *regs_res;
56 bus_space_handle_t bh;
64 {0x4000, "Chelsio T440-dbg"},
65 {0x4001, "Chelsio T420-CR"},
66 {0x4002, "Chelsio T422-CR"},
67 {0x4003, "Chelsio T440-CR"},
68 {0x4004, "Chelsio T420-BCH"},
69 {0x4005, "Chelsio T440-BCH"},
70 {0x4006, "Chelsio T440-CH"},
71 {0x4007, "Chelsio T420-SO"},
72 {0x4008, "Chelsio T420-CX"},
73 {0x4009, "Chelsio T420-BT"},
74 {0x400a, "Chelsio T404-BT"},
75 {0x400e, "Chelsio T440-LP-CR"},
77 {0x5000, "Chelsio T580-dbg"},
78 {0x5001, "Chelsio T520-CR"}, /* 2 x 10G */
79 {0x5002, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */
80 {0x5003, "Chelsio T540-CR"}, /* 4 x 10G */
81 {0x5007, "Chelsio T520-SO"}, /* 2 x 10G, nomem */
82 {0x5009, "Chelsio T520-BT"}, /* 2 x 10GBaseT */
83 {0x500a, "Chelsio T504-BT"}, /* 4 x 1G */
84 {0x500d, "Chelsio T580-CR"}, /* 2 x 40G */
85 {0x500e, "Chelsio T540-LP-CR"}, /* 4 x 10G */
86 {0x5010, "Chelsio T580-LP-CR"}, /* 2 x 40G */
87 {0x5011, "Chelsio T520-LL-CR"}, /* 2 x 10G */
88 {0x5012, "Chelsio T560-CR"}, /* 1 x 40G, 2 x 10G */
89 {0x5014, "Chelsio T580-LP-SO-CR"}, /* 2 x 40G, nomem */
90 {0x5015, "Chelsio T502-BT"}, /* 2 x 1G */
91 {0x5018, "Chelsio T540-BT"}, /* 4 x 10GBaseT */
92 {0x5019, "Chelsio T540-LP-BT"}, /* 4 x 10GBaseT */
93 {0x501a, "Chelsio T540-SO-BT"}, /* 4 x 10GBaseT, nomem */
94 {0x501b, "Chelsio T540-SO-CR"}, /* 4 x 10G, nomem */
96 {0x6000, "Chelsio T6-DBG-25"}, /* 2 x 10/25G, debug */
97 {0x6001, "Chelsio T6225-CR"}, /* 2 x 10/25G */
98 {0x6002, "Chelsio T6225-SO-CR"}, /* 2 x 10/25G, nomem */
99 {0x6003, "Chelsio T6425-CR"}, /* 4 x 10/25G */
100 {0x6004, "Chelsio T6425-SO-CR"}, /* 4 x 10/25G, nomem */
101 {0x6005, "Chelsio T6225-OCP-SO"}, /* 2 x 10/25G, nomem */
102 {0x6006, "Chelsio T62100-OCP-SO"}, /* 2 x 40/50/100G, nomem */
103 {0x6007, "Chelsio T62100-LP-CR"}, /* 2 x 40/50/100G */
104 {0x6008, "Chelsio T62100-SO-CR"}, /* 2 x 40/50/100G, nomem */
105 {0x6009, "Chelsio T6210-BT"}, /* 2 x 10GBASE-T */
106 {0x600d, "Chelsio T62100-CR"}, /* 2 x 40/50/100G */
107 {0x6010, "Chelsio T6-DBG-100"}, /* 2 x 40/50/100G, debug */
108 {0x6011, "Chelsio T6225-LL-CR"}, /* 2 x 10/25G */
109 {0x6014, "Chelsio T61100-OCP-SO"}, /* 1 x 40/50/100G, nomem */
110 {0x6015, "Chelsio T6201-BT"}, /* 2 x 1000BASE-T */
113 {0x6080, "Chelsio T6225 80"},
114 {0x6081, "Chelsio T62100 81"},
115 {0x6082, "Chelsio T6225-CR 82"},
116 {0x6083, "Chelsio T62100-CR 83"},
117 {0x6084, "Chelsio T64100-CR 84"},
118 {0x6085, "Chelsio T6240-SO 85"},
119 {0x6086, "Chelsio T6225-SO-CR 86"},
120 {0x6087, "Chelsio T6225-CR 87"},
123 static inline uint32_t
124 t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg)
127 return bus_space_read_4(sc->bt, sc->bh, reg);
130 static int t4iov_attach_child(device_t dev);
133 t4iov_probe(device_t dev)
138 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
141 d = pci_get_device(dev);
142 for (i = 0; i < nitems(t4iov_pciids); i++) {
143 if (d == t4iov_pciids[i].device) {
144 device_set_desc(dev, t4iov_pciids[i].desc);
146 return (BUS_PROBE_DEFAULT);
153 t5iov_probe(device_t dev)
158 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
161 d = pci_get_device(dev);
162 for (i = 0; i < nitems(t5iov_pciids); i++) {
163 if (d == t5iov_pciids[i].device) {
164 device_set_desc(dev, t5iov_pciids[i].desc);
166 return (BUS_PROBE_DEFAULT);
173 t6iov_probe(device_t dev)
178 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
181 d = pci_get_device(dev);
182 for (i = 0; i < nitems(t6iov_pciids); i++) {
183 if (d == t6iov_pciids[i].device) {
184 device_set_desc(dev, t6iov_pciids[i].desc);
186 return (BUS_PROBE_DEFAULT);
193 t4iov_attach(device_t dev)
195 struct t4iov_softc *sc;
196 uint32_t pl_rev, whoami;
198 sc = device_get_softc(dev);
201 sc->regs_rid = PCIR_BAR(0);
202 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
203 &sc->regs_rid, RF_ACTIVE);
204 if (sc->regs_res == NULL) {
205 device_printf(dev, "cannot map registers.\n");
208 sc->bt = rman_get_bustag(sc->regs_res);
209 sc->bh = rman_get_bushandle(sc->regs_res);
211 pl_rev = t4iov_read_reg(sc, A_PL_REV);
212 whoami = t4iov_read_reg(sc, A_PL_WHOAMI);
213 if (G_CHIPID(pl_rev) <= CHELSIO_T5)
214 sc->pf = G_SOURCEPF(whoami);
216 sc->pf = G_T6_SOURCEPF(whoami);
218 sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
219 pci_get_slot(dev), 4);
220 if (sc->sc_main == NULL)
222 if (T4_IS_MAIN_READY(sc->sc_main) == 0)
223 return (t4iov_attach_child(dev));
228 t4iov_attach_child(device_t dev)
230 struct t4iov_softc *sc;
232 nvlist_t *pf_schema, *vf_schema;
237 sc = device_get_softc(dev);
238 MPASS(!sc->sc_attached);
241 * PF0-3 are associated with a specific port on the NIC (PF0
242 * with port 0, etc.). Ask the PF4 driver for the device for
243 * this function's associated port to determine if the port is
246 error = T4_READ_PORT_DEVICE(sc->sc_main, pci_get_function(dev), &pdev);
251 pf_schema = pci_iov_schema_alloc_node();
252 vf_schema = pci_iov_schema_alloc_node();
253 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
254 error = pci_iov_attach_name(dev, pf_schema, vf_schema, "%s",
255 device_get_nameunit(pdev));
257 device_printf(dev, "Failed to initialize SR-IOV: %d\n", error);
262 sc->sc_attached = true;
267 t4iov_detach_child(device_t dev)
269 struct t4iov_softc *sc;
274 sc = device_get_softc(dev);
275 if (!sc->sc_attached)
279 error = pci_iov_detach(dev);
281 device_printf(dev, "Failed to disable SR-IOV\n");
286 sc->sc_attached = false;
291 t4iov_detach(device_t dev)
293 struct t4iov_softc *sc;
296 sc = device_get_softc(dev);
297 if (sc->sc_attached) {
298 error = t4iov_detach_child(dev);
303 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
311 t4iov_iov_init(device_t dev, uint16_t num_vfs, const struct nvlist *config)
314 /* XXX: The Linux driver sets up a vf_monitor task on T4 adapters. */
319 t4iov_iov_uninit(device_t dev)
324 t4iov_add_vf(device_t dev, uint16_t vfnum, const struct nvlist *config)
327 struct t4iov_softc *sc;
328 struct adapter *adap;
329 uint8_t ma[ETHER_ADDR_LEN];
333 if (nvlist_exists_binary(config, "mac-addr")) {
334 mac = nvlist_get_binary(config, "mac-addr", &size);
335 bcopy(mac, ma, ETHER_ADDR_LEN);
337 sc = device_get_softc(dev);
338 MPASS(sc->sc_attached);
339 MPASS(sc->sc_main != NULL);
340 adap = device_get_softc(sc->sc_main);
341 if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
344 rc = -t4_set_vf_mac(adap, sc->pf, vfnum + 1, 1, ma);
345 end_synchronized_op(adap, 0);
348 "Failed to set VF%d MAC address to "
349 "%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum,
350 ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc);
359 static device_method_t t4iov_methods[] = {
360 DEVMETHOD(device_probe, t4iov_probe),
361 DEVMETHOD(device_attach, t4iov_attach),
362 DEVMETHOD(device_detach, t4iov_detach),
365 DEVMETHOD(pci_iov_init, t4iov_iov_init),
366 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
367 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
370 DEVMETHOD(t4_attach_child, t4iov_attach_child),
371 DEVMETHOD(t4_detach_child, t4iov_detach_child),
376 static driver_t t4iov_driver = {
379 sizeof(struct t4iov_softc)
382 static device_method_t t5iov_methods[] = {
383 DEVMETHOD(device_probe, t5iov_probe),
384 DEVMETHOD(device_attach, t4iov_attach),
385 DEVMETHOD(device_detach, t4iov_detach),
388 DEVMETHOD(pci_iov_init, t4iov_iov_init),
389 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
390 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
393 DEVMETHOD(t4_attach_child, t4iov_attach_child),
394 DEVMETHOD(t4_detach_child, t4iov_detach_child),
399 static driver_t t5iov_driver = {
402 sizeof(struct t4iov_softc)
405 static device_method_t t6iov_methods[] = {
406 DEVMETHOD(device_probe, t6iov_probe),
407 DEVMETHOD(device_attach, t4iov_attach),
408 DEVMETHOD(device_detach, t4iov_detach),
411 DEVMETHOD(pci_iov_init, t4iov_iov_init),
412 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
413 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
416 DEVMETHOD(t4_attach_child, t4iov_attach_child),
417 DEVMETHOD(t4_detach_child, t4iov_detach_child),
422 static driver_t t6iov_driver = {
425 sizeof(struct t4iov_softc)
428 static devclass_t t4iov_devclass, t5iov_devclass, t6iov_devclass;
430 DRIVER_MODULE(t4iov, pci, t4iov_driver, t4iov_devclass, 0, 0);
431 MODULE_VERSION(t4iov, 1);
433 DRIVER_MODULE(t5iov, pci, t5iov_driver, t5iov_devclass, 0, 0);
434 MODULE_VERSION(t5iov, 1);
436 DRIVER_MODULE(t6iov, pci, t6iov_driver, t6iov_devclass, 0, 0);
437 MODULE_VERSION(t6iov, 1);