2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include "opt_inet6.h"
34 #include <sys/types.h>
35 #include <sys/eventhandler.h>
37 #include <sys/socket.h>
38 #include <sys/kernel.h>
40 #include <sys/malloc.h>
41 #include <sys/queue.h>
43 #include <sys/taskqueue.h>
45 #include <sys/sysctl.h>
47 #include <sys/counter.h>
49 #include <net/ethernet.h>
51 #include <net/if_vlan_var.h>
52 #include <netinet/in.h>
53 #include <netinet/ip.h>
54 #include <netinet/ip6.h>
55 #include <netinet/tcp.h>
56 #include <machine/md_var.h>
60 #include <machine/bus.h>
61 #include <sys/selinfo.h>
62 #include <net/if_var.h>
63 #include <net/netmap.h>
64 #include <dev/netmap/netmap_kern.h>
67 #include "common/common.h"
68 #include "common/t4_regs.h"
69 #include "common/t4_regs_values.h"
70 #include "common/t4_msg.h"
72 #ifdef T4_PKT_TIMESTAMP
73 #define RX_COPY_THRESHOLD (MINCLSIZE - 8)
75 #define RX_COPY_THRESHOLD MINCLSIZE
79 * Ethernet frames are DMA'd at this byte offset into the freelist buffer.
80 * 0-7 are valid values.
83 TUNABLE_INT("hw.cxgbe.fl_pktshift", &fl_pktshift);
86 * Pad ethernet payload up to this boundary.
87 * -1: driver should figure out a good value.
89 * Any power of 2 from 32 to 4096 (both inclusive) is also a valid value.
92 TUNABLE_INT("hw.cxgbe.fl_pad", &fl_pad);
96 * -1: driver should figure out a good value.
97 * 64 or 128 are the only other valid values.
100 TUNABLE_INT("hw.cxgbe.spg_len", &spg_len);
104 * -1: no congestion feedback (not recommended).
105 * 0: backpressure the channel instead of dropping packets right away.
106 * 1: no backpressure, drop packets for the congested queue immediately.
108 static int cong_drop = 0;
109 TUNABLE_INT("hw.cxgbe.cong_drop", &cong_drop);
112 * Deliver multiple frames in the same free list buffer if they fit.
113 * -1: let the driver decide whether to enable buffer packing or not.
114 * 0: disable buffer packing.
115 * 1: enable buffer packing.
117 static int buffer_packing = -1;
118 TUNABLE_INT("hw.cxgbe.buffer_packing", &buffer_packing);
121 * Start next frame in a packed buffer at this boundary.
122 * -1: driver should figure out a good value.
123 * T4: driver will ignore this and use the same value as fl_pad above.
124 * T5: 16, or a power of 2 from 64 to 4096 (both inclusive) is a valid value.
126 static int fl_pack = -1;
127 TUNABLE_INT("hw.cxgbe.fl_pack", &fl_pack);
130 * Allow the driver to create mbuf(s) in a cluster allocated for rx.
131 * 0: never; always allocate mbufs from the zone_mbuf UMA zone.
132 * 1: ok to create mbuf(s) within a cluster if there is room.
134 static int allow_mbufs_in_cluster = 1;
135 TUNABLE_INT("hw.cxgbe.allow_mbufs_in_cluster", &allow_mbufs_in_cluster);
138 * Largest rx cluster size that the driver is allowed to allocate.
140 static int largest_rx_cluster = MJUM16BYTES;
141 TUNABLE_INT("hw.cxgbe.largest_rx_cluster", &largest_rx_cluster);
144 * Size of cluster allocation that's most likely to succeed. The driver will
145 * fall back to this size if it fails to allocate clusters larger than this.
147 static int safest_rx_cluster = PAGE_SIZE;
148 TUNABLE_INT("hw.cxgbe.safest_rx_cluster", &safest_rx_cluster);
150 /* Used to track coalesced tx work request */
152 uint64_t *flitp; /* ptr to flit where next pkt should start */
153 uint8_t npkt; /* # of packets in this work request */
154 uint8_t nflits; /* # of flits used by this work request */
155 uint16_t plen; /* total payload (sum of all packets) */
158 /* A packet's SGL. This + m_pkthdr has all info needed for tx */
160 int nsegs; /* # of segments in the SGL, 0 means imm. tx */
161 int nflits; /* # of flits needed for the SGL */
162 bus_dma_segment_t seg[TX_SGL_SEGS];
165 static int service_iq(struct sge_iq *, int);
166 static struct mbuf *get_fl_payload(struct adapter *, struct sge_fl *, uint32_t);
167 static int t4_eth_rx(struct sge_iq *, const struct rss_header *, struct mbuf *);
168 static inline void init_iq(struct sge_iq *, struct adapter *, int, int, int);
169 static inline void init_fl(struct adapter *, struct sge_fl *, int, int, char *);
170 static inline void init_eq(struct sge_eq *, int, int, uint8_t, uint16_t,
172 static int alloc_ring(struct adapter *, size_t, bus_dma_tag_t *, bus_dmamap_t *,
173 bus_addr_t *, void **);
174 static int free_ring(struct adapter *, bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
176 static int alloc_iq_fl(struct port_info *, struct sge_iq *, struct sge_fl *,
178 static int free_iq_fl(struct port_info *, struct sge_iq *, struct sge_fl *);
179 static void add_fl_sysctls(struct sysctl_ctx_list *, struct sysctl_oid *,
181 static int alloc_fwq(struct adapter *);
182 static int free_fwq(struct adapter *);
183 static int alloc_mgmtq(struct adapter *);
184 static int free_mgmtq(struct adapter *);
185 static int alloc_rxq(struct port_info *, struct sge_rxq *, int, int,
186 struct sysctl_oid *);
187 static int free_rxq(struct port_info *, struct sge_rxq *);
189 static int alloc_ofld_rxq(struct port_info *, struct sge_ofld_rxq *, int, int,
190 struct sysctl_oid *);
191 static int free_ofld_rxq(struct port_info *, struct sge_ofld_rxq *);
194 static int alloc_nm_rxq(struct port_info *, struct sge_nm_rxq *, int, int,
195 struct sysctl_oid *);
196 static int free_nm_rxq(struct port_info *, struct sge_nm_rxq *);
197 static int alloc_nm_txq(struct port_info *, struct sge_nm_txq *, int, int,
198 struct sysctl_oid *);
199 static int free_nm_txq(struct port_info *, struct sge_nm_txq *);
201 static int ctrl_eq_alloc(struct adapter *, struct sge_eq *);
202 static int eth_eq_alloc(struct adapter *, struct port_info *, struct sge_eq *);
204 static int ofld_eq_alloc(struct adapter *, struct port_info *, struct sge_eq *);
206 static int alloc_eq(struct adapter *, struct port_info *, struct sge_eq *);
207 static int free_eq(struct adapter *, struct sge_eq *);
208 static int alloc_wrq(struct adapter *, struct port_info *, struct sge_wrq *,
209 struct sysctl_oid *);
210 static int free_wrq(struct adapter *, struct sge_wrq *);
211 static int alloc_txq(struct port_info *, struct sge_txq *, int,
212 struct sysctl_oid *);
213 static int free_txq(struct port_info *, struct sge_txq *);
214 static void oneseg_dma_callback(void *, bus_dma_segment_t *, int, int);
215 static inline void ring_fl_db(struct adapter *, struct sge_fl *);
216 static int refill_fl(struct adapter *, struct sge_fl *, int);
217 static void refill_sfl(void *);
218 static int alloc_fl_sdesc(struct sge_fl *);
219 static void free_fl_sdesc(struct adapter *, struct sge_fl *);
220 static void find_best_refill_source(struct adapter *, struct sge_fl *, int);
221 static void find_safe_refill_source(struct adapter *, struct sge_fl *);
222 static void add_fl_to_sfl(struct adapter *, struct sge_fl *);
224 static int get_pkt_sgl(struct sge_txq *, struct mbuf **, struct sgl *, int);
225 static int free_pkt_sgl(struct sge_txq *, struct sgl *);
226 static int write_txpkt_wr(struct port_info *, struct sge_txq *, struct mbuf *,
228 static int add_to_txpkts(struct port_info *, struct sge_txq *, struct txpkts *,
229 struct mbuf *, struct sgl *);
230 static void write_txpkts_wr(struct sge_txq *, struct txpkts *);
231 static inline void write_ulp_cpl_sgl(struct port_info *, struct sge_txq *,
232 struct txpkts *, struct mbuf *, struct sgl *);
233 static int write_sgl_to_txd(struct sge_eq *, struct sgl *, caddr_t *);
234 static inline void copy_to_txd(struct sge_eq *, caddr_t, caddr_t *, int);
235 static inline void ring_eq_db(struct adapter *, struct sge_eq *);
236 static inline int reclaimable(struct sge_eq *);
237 static int reclaim_tx_descs(struct sge_txq *, int, int);
238 static void write_eqflush_wr(struct sge_eq *);
239 static __be64 get_flit(bus_dma_segment_t *, int, int);
240 static int handle_sge_egr_update(struct sge_iq *, const struct rss_header *,
242 static int handle_fw_msg(struct sge_iq *, const struct rss_header *,
245 static int sysctl_uint16(SYSCTL_HANDLER_ARGS);
246 static int sysctl_bufsizes(SYSCTL_HANDLER_ARGS);
248 static counter_u64_t extfree_refs;
249 static counter_u64_t extfree_rels;
252 * Called on MOD_LOAD. Validates and calculates the SGE tunables.
258 if (fl_pktshift < 0 || fl_pktshift > 7) {
259 printf("Invalid hw.cxgbe.fl_pktshift value (%d),"
260 " using 2 instead.\n", fl_pktshift);
264 if (spg_len != 64 && spg_len != 128) {
267 #if defined(__i386__) || defined(__amd64__)
268 len = cpu_clflush_line_size > 64 ? 128 : 64;
273 printf("Invalid hw.cxgbe.spg_len value (%d),"
274 " using %d instead.\n", spg_len, len);
279 if (cong_drop < -1 || cong_drop > 1) {
280 printf("Invalid hw.cxgbe.cong_drop value (%d),"
281 " using 0 instead.\n", cong_drop);
285 extfree_refs = counter_u64_alloc(M_WAITOK);
286 extfree_rels = counter_u64_alloc(M_WAITOK);
287 counter_u64_zero(extfree_refs);
288 counter_u64_zero(extfree_rels);
292 t4_sge_modunload(void)
295 counter_u64_free(extfree_refs);
296 counter_u64_free(extfree_rels);
300 t4_sge_extfree_refs(void)
304 rels = counter_u64_fetch(extfree_rels);
305 refs = counter_u64_fetch(extfree_refs);
307 return (refs - rels);
311 t4_init_sge_cpl_handlers(struct adapter *sc)
314 t4_register_cpl_handler(sc, CPL_FW4_MSG, handle_fw_msg);
315 t4_register_cpl_handler(sc, CPL_FW6_MSG, handle_fw_msg);
316 t4_register_cpl_handler(sc, CPL_SGE_EGR_UPDATE, handle_sge_egr_update);
317 t4_register_cpl_handler(sc, CPL_RX_PKT, t4_eth_rx);
318 t4_register_fw_msg_handler(sc, FW6_TYPE_CMD_RPL, t4_handle_fw_rpl);
322 setup_pad_and_pack_boundaries(struct adapter *sc)
328 if (fl_pad < 32 || fl_pad > 4096 || !powerof2(fl_pad)) {
330 * If there is any chance that we might use buffer packing and
331 * the chip is a T4, then pick 64 as the pad/pack boundary. Set
332 * it to 32 in all other cases.
334 pad = is_t4(sc) && buffer_packing ? 64 : 32;
337 * For fl_pad = 0 we'll still write a reasonable value to the
338 * register but all the freelists will opt out of padding.
339 * We'll complain here only if the user tried to set it to a
340 * value greater than 0 that was invalid.
343 device_printf(sc->dev, "Invalid hw.cxgbe.fl_pad value"
344 " (%d), using %d instead.\n", fl_pad, pad);
347 m = V_INGPADBOUNDARY(M_INGPADBOUNDARY);
348 v = V_INGPADBOUNDARY(ilog2(pad) - 5);
349 t4_set_reg_field(sc, A_SGE_CONTROL, m, v);
352 if (fl_pack != -1 && fl_pack != pad) {
353 /* Complain but carry on. */
354 device_printf(sc->dev, "hw.cxgbe.fl_pack (%d) ignored,"
355 " using %d instead.\n", fl_pack, pad);
361 if (fl_pack < 16 || fl_pack == 32 || fl_pack > 4096 ||
362 !powerof2(fl_pack)) {
363 pack = max(sc->params.pci.mps, CACHE_LINE_SIZE);
364 MPASS(powerof2(pack));
372 device_printf(sc->dev, "Invalid hw.cxgbe.fl_pack value"
373 " (%d), using %d instead.\n", fl_pack, pack);
376 m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY);
378 v = V_INGPACKBOUNDARY(0);
380 v = V_INGPACKBOUNDARY(ilog2(pack) - 5);
382 MPASS(!is_t4(sc)); /* T4 doesn't have SGE_CONTROL2 */
383 t4_set_reg_field(sc, A_SGE_CONTROL2, m, v);
387 * adap->params.vpd.cclk must be set up before this is called.
390 t4_tweak_chip_settings(struct adapter *sc)
394 int intr_timer[SGE_NTIMERS] = {1, 5, 10, 50, 100, 200};
395 int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk;
396 int intr_pktcount[SGE_NCOUNTERS] = {1, 8, 16, 32}; /* 63 max */
397 uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
398 static int sge_flbuf_sizes[] = {
400 #if MJUMPAGESIZE != MCLBYTES
402 MJUMPAGESIZE - CL_METADATA_SIZE,
403 MJUMPAGESIZE - 2 * MSIZE - CL_METADATA_SIZE,
407 MCLBYTES - MSIZE - CL_METADATA_SIZE,
408 MJUM9BYTES - CL_METADATA_SIZE,
409 MJUM16BYTES - CL_METADATA_SIZE,
412 KASSERT(sc->flags & MASTER_PF,
413 ("%s: trying to change chip settings when not master.", __func__));
415 m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
416 v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
417 V_EGRSTATUSPAGESIZE(spg_len == 128);
418 t4_set_reg_field(sc, A_SGE_CONTROL, m, v);
420 setup_pad_and_pack_boundaries(sc);
422 v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
423 V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
424 V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
425 V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
426 V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
427 V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
428 V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
429 V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
430 t4_write_reg(sc, A_SGE_HOST_PAGE_SIZE, v);
432 KASSERT(nitems(sge_flbuf_sizes) <= SGE_FLBUF_SIZES,
433 ("%s: hw buffer size table too big", __func__));
434 for (i = 0; i < min(nitems(sge_flbuf_sizes), SGE_FLBUF_SIZES); i++) {
435 t4_write_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i),
439 v = V_THRESHOLD_0(intr_pktcount[0]) | V_THRESHOLD_1(intr_pktcount[1]) |
440 V_THRESHOLD_2(intr_pktcount[2]) | V_THRESHOLD_3(intr_pktcount[3]);
441 t4_write_reg(sc, A_SGE_INGRESS_RX_THRESHOLD, v);
443 KASSERT(intr_timer[0] <= timer_max,
444 ("%s: not a single usable timer (%d, %d)", __func__, intr_timer[0],
446 for (i = 1; i < nitems(intr_timer); i++) {
447 KASSERT(intr_timer[i] >= intr_timer[i - 1],
448 ("%s: timers not listed in increasing order (%d)",
451 while (intr_timer[i] > timer_max) {
452 if (i == nitems(intr_timer) - 1) {
453 intr_timer[i] = timer_max;
456 intr_timer[i] += intr_timer[i - 1];
461 v = V_TIMERVALUE0(us_to_core_ticks(sc, intr_timer[0])) |
462 V_TIMERVALUE1(us_to_core_ticks(sc, intr_timer[1]));
463 t4_write_reg(sc, A_SGE_TIMER_VALUE_0_AND_1, v);
464 v = V_TIMERVALUE2(us_to_core_ticks(sc, intr_timer[2])) |
465 V_TIMERVALUE3(us_to_core_ticks(sc, intr_timer[3]));
466 t4_write_reg(sc, A_SGE_TIMER_VALUE_2_AND_3, v);
467 v = V_TIMERVALUE4(us_to_core_ticks(sc, intr_timer[4])) |
468 V_TIMERVALUE5(us_to_core_ticks(sc, intr_timer[5]));
469 t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, v);
471 if (cong_drop == 0) {
472 m = F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
474 t4_set_reg_field(sc, A_TP_PARA_REG3, m, 0);
477 /* 4K, 16K, 64K, 256K DDP "page sizes" */
478 v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
479 t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, v);
481 m = v = F_TDDPTAGTCB;
482 t4_set_reg_field(sc, A_ULP_RX_CTL, m, v);
484 m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
486 v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
487 t4_set_reg_field(sc, A_TP_PARA_REG5, m, v);
491 * SGE wants the buffer to be at least 64B and then a multiple of 16. If
492 * padding and packing are enabled, the buffer's start and end need to be
493 * correctly aligned as well. We'll just make sure that the size is a multiple
494 * of the alignment, it is up to other parts .
497 hwsz_ok(struct adapter *sc, int hwsz)
502 MPASS(sc->sge.pad_boundary > align);
503 align = sc->sge.pad_boundary;
505 if (buffer_packing && sc->sge.pack_boundary > align)
506 align = sc->sge.pack_boundary;
507 align--; /* now a mask */
508 return (hwsz >= 64 && (hwsz & align) == 0);
513 * XXX: driver really should be able to deal with unexpected settings.
516 t4_read_chip_settings(struct adapter *sc)
518 struct sge *s = &sc->sge;
521 uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
522 static int sw_buf_sizes[] = { /* Sorted by size */
524 #if MJUMPAGESIZE != MCLBYTES
530 struct sw_zone_info *swz, *safe_swz;
531 struct hw_buf_info *hwb;
533 m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
534 v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
535 V_EGRSTATUSPAGESIZE(spg_len == 128);
536 r = t4_read_reg(sc, A_SGE_CONTROL);
538 device_printf(sc->dev, "invalid SGE_CONTROL(0x%x)\n", r);
541 s->pad_boundary = 1 << (G_INGPADBOUNDARY(r) + 5);
544 s->pack_boundary = s->pad_boundary;
546 r = t4_read_reg(sc, A_SGE_CONTROL2);
547 if (G_INGPACKBOUNDARY(r) == 0)
548 s->pack_boundary = 16;
550 s->pack_boundary = 1 << (G_INGPACKBOUNDARY(r) + 5);
553 v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
554 V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
555 V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
556 V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
557 V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
558 V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
559 V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
560 V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
561 r = t4_read_reg(sc, A_SGE_HOST_PAGE_SIZE);
563 device_printf(sc->dev, "invalid SGE_HOST_PAGE_SIZE(0x%x)\n", r);
567 /* Filter out unusable hw buffer sizes entirely (mark with -2). */
568 hwb = &s->hw_buf_info[0];
569 for (i = 0; i < nitems(s->hw_buf_info); i++, hwb++) {
570 r = t4_read_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i));
572 hwb->zidx = hwsz_ok(sc, r) ? -1 : -2;
577 * Create a sorted list in decreasing order of hw buffer sizes (and so
578 * increasing order of spare area) for each software zone.
580 * If padding is enabled then the start and end of the buffer must align
581 * to the pad boundary; if packing is enabled then they must align with
582 * the pack boundary as well. Allocations from the cluster zones are
583 * aligned to min(size, 4K), so the buffer starts at that alignment and
584 * ends at hwb->size alignment. If mbuf inlining is allowed the
585 * starting alignment will be reduced to MSIZE and the driver will
586 * exercise appropriate caution when deciding on the best buffer layout
589 n = 0; /* no usable buffer size to begin with */
590 swz = &s->sw_zone_info[0];
592 for (i = 0; i < SW_ZONE_SIZES; i++, swz++) {
593 int8_t head = -1, tail = -1;
595 swz->size = sw_buf_sizes[i];
596 swz->zone = m_getzone(swz->size);
597 swz->type = m_gettype(swz->size);
599 if (swz->size < PAGE_SIZE) {
600 MPASS(powerof2(swz->size));
601 if (fl_pad && (swz->size % sc->sge.pad_boundary != 0))
603 if (buffer_packing &&
604 (swz->size % sc->sge.pack_boundary != 0))
608 if (swz->size == safest_rx_cluster)
611 hwb = &s->hw_buf_info[0];
612 for (j = 0; j < SGE_FLBUF_SIZES; j++, hwb++) {
613 if (hwb->zidx != -1 || hwb->size > swz->size)
617 MPASS(hwb->size % sc->sge.pad_boundary == 0);
619 MPASS(hwb->size % sc->sge.pack_boundary == 0);
624 else if (hwb->size < s->hw_buf_info[tail].size) {
625 s->hw_buf_info[tail].next = j;
629 struct hw_buf_info *t;
631 for (cur = &head; *cur != -1; cur = &t->next) {
632 t = &s->hw_buf_info[*cur];
633 if (hwb->size == t->size) {
637 if (hwb->size > t->size) {
645 swz->head_hwidx = head;
646 swz->tail_hwidx = tail;
650 if (swz->size - s->hw_buf_info[tail].size >=
652 sc->flags |= BUF_PACKING_OK;
656 device_printf(sc->dev, "no usable SGE FL buffer size.\n");
662 if (safe_swz != NULL) {
663 s->safe_hwidx1 = safe_swz->head_hwidx;
664 for (i = safe_swz->head_hwidx; i != -1; i = hwb->next) {
667 hwb = &s->hw_buf_info[i];
670 MPASS(hwb->size % sc->sge.pad_boundary == 0);
672 MPASS(hwb->size % sc->sge.pack_boundary == 0);
674 spare = safe_swz->size - hwb->size;
675 if (spare >= CL_METADATA_SIZE) {
682 r = t4_read_reg(sc, A_SGE_INGRESS_RX_THRESHOLD);
683 s->counter_val[0] = G_THRESHOLD_0(r);
684 s->counter_val[1] = G_THRESHOLD_1(r);
685 s->counter_val[2] = G_THRESHOLD_2(r);
686 s->counter_val[3] = G_THRESHOLD_3(r);
688 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_0_AND_1);
689 s->timer_val[0] = G_TIMERVALUE0(r) / core_ticks_per_usec(sc);
690 s->timer_val[1] = G_TIMERVALUE1(r) / core_ticks_per_usec(sc);
691 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_2_AND_3);
692 s->timer_val[2] = G_TIMERVALUE2(r) / core_ticks_per_usec(sc);
693 s->timer_val[3] = G_TIMERVALUE3(r) / core_ticks_per_usec(sc);
694 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_4_AND_5);
695 s->timer_val[4] = G_TIMERVALUE4(r) / core_ticks_per_usec(sc);
696 s->timer_val[5] = G_TIMERVALUE5(r) / core_ticks_per_usec(sc);
698 if (cong_drop == 0) {
699 m = F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
701 r = t4_read_reg(sc, A_TP_PARA_REG3);
703 device_printf(sc->dev,
704 "invalid TP_PARA_REG3(0x%x)\n", r);
709 v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
710 r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ);
712 device_printf(sc->dev, "invalid ULP_RX_TDDP_PSZ(0x%x)\n", r);
716 m = v = F_TDDPTAGTCB;
717 r = t4_read_reg(sc, A_ULP_RX_CTL);
719 device_printf(sc->dev, "invalid ULP_RX_CTL(0x%x)\n", r);
723 m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
725 v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
726 r = t4_read_reg(sc, A_TP_PARA_REG5);
728 device_printf(sc->dev, "invalid TP_PARA_REG5(0x%x)\n", r);
732 r = t4_read_reg(sc, A_SGE_CONM_CTRL);
733 s->fl_starve_threshold = G_EGRTHRESHOLD(r) * 2 + 1;
735 s->fl_starve_threshold2 = s->fl_starve_threshold;
737 s->fl_starve_threshold2 = G_EGRTHRESHOLDPACKING(r) * 2 + 1;
739 /* egress queues: log2 of # of doorbells per BAR2 page */
740 r = t4_read_reg(sc, A_SGE_EGRESS_QUEUES_PER_PAGE_PF);
741 r >>= S_QUEUESPERPAGEPF0 +
742 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * sc->pf;
743 s->eq_s_qpp = r & M_QUEUESPERPAGEPF0;
745 /* ingress queues: log2 of # of doorbells per BAR2 page */
746 r = t4_read_reg(sc, A_SGE_INGRESS_QUEUES_PER_PAGE_PF);
747 r >>= S_QUEUESPERPAGEPF0 +
748 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * sc->pf;
749 s->iq_s_qpp = r & M_QUEUESPERPAGEPF0;
751 t4_init_tp_params(sc);
753 t4_read_mtu_tbl(sc, sc->params.mtus, NULL);
754 t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd);
760 t4_create_dma_tag(struct adapter *sc)
764 rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev), 1, 0,
765 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE,
766 BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL,
769 device_printf(sc->dev,
770 "failed to create main DMA tag: %d\n", rc);
777 t4_sge_sysctls(struct adapter *sc, struct sysctl_ctx_list *ctx,
778 struct sysctl_oid_list *children)
781 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "buffer_sizes",
782 CTLTYPE_STRING | CTLFLAG_RD, &sc->sge, 0, sysctl_bufsizes, "A",
783 "freelist buffer sizes");
785 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pktshift", CTLFLAG_RD,
786 NULL, fl_pktshift, "payload DMA offset in rx buffer (bytes)");
788 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pad", CTLFLAG_RD,
789 NULL, sc->sge.pad_boundary, "payload pad boundary (bytes)");
791 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "spg_len", CTLFLAG_RD,
792 NULL, spg_len, "status page size (bytes)");
794 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "cong_drop", CTLFLAG_RD,
795 NULL, cong_drop, "congestion drop setting");
797 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pack", CTLFLAG_RD,
798 NULL, sc->sge.pack_boundary, "payload pack boundary (bytes)");
802 t4_destroy_dma_tag(struct adapter *sc)
805 bus_dma_tag_destroy(sc->dmat);
811 * Allocate and initialize the firmware event queue and the management queue.
813 * Returns errno on failure. Resources allocated up to that point may still be
814 * allocated. Caller is responsible for cleanup in case this function fails.
817 t4_setup_adapter_queues(struct adapter *sc)
821 ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
823 sysctl_ctx_init(&sc->ctx);
824 sc->flags |= ADAP_SYSCTL_CTX;
827 * Firmware event queue
834 * Management queue. This is just a control queue that uses the fwq as
837 rc = alloc_mgmtq(sc);
846 t4_teardown_adapter_queues(struct adapter *sc)
849 ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
851 /* Do this before freeing the queue */
852 if (sc->flags & ADAP_SYSCTL_CTX) {
853 sysctl_ctx_free(&sc->ctx);
854 sc->flags &= ~ADAP_SYSCTL_CTX;
864 port_intr_count(struct port_info *pi)
868 if (pi->flags & INTR_RXQ)
871 if (pi->flags & INTR_OFLD_RXQ)
875 if (pi->flags & INTR_NM_RXQ)
882 first_vector(struct port_info *pi)
884 struct adapter *sc = pi->adapter;
885 int rc = T4_EXTRA_INTR, i;
887 if (sc->intr_count == 1)
890 for_each_port(sc, i) {
891 if (i == pi->port_id)
894 rc += port_intr_count(sc->port[i]);
901 * Given an arbitrary "index," come up with an iq that can be used by other
902 * queues (of this port) for interrupt forwarding, SGE egress updates, etc.
903 * The iq returned is guaranteed to be something that takes direct interrupts.
905 static struct sge_iq *
906 port_intr_iq(struct port_info *pi, int idx)
908 struct adapter *sc = pi->adapter;
909 struct sge *s = &sc->sge;
910 struct sge_iq *iq = NULL;
913 if (sc->intr_count == 1)
914 return (&sc->sge.fwq);
916 nintr = port_intr_count(pi);
918 ("%s: pi %p has no exclusive interrupts, total interrupts = %d",
919 __func__, pi, sc->intr_count));
921 /* Exclude netmap queues as they can't take anyone else's interrupts */
922 if (pi->flags & INTR_NM_RXQ)
925 ("%s: pi %p has nintr %d after netmap adjustment of %d", __func__,
926 pi, nintr, pi->nnmrxq));
930 if (pi->flags & INTR_RXQ) {
932 iq = &s->rxq[pi->first_rxq + i].iq;
938 if (pi->flags & INTR_OFLD_RXQ) {
939 if (i < pi->nofldrxq) {
940 iq = &s->ofld_rxq[pi->first_ofld_rxq + i].iq;
946 panic("%s: pi %p, intr_flags 0x%lx, idx %d, total intr %d\n", __func__,
947 pi, pi->flags & INTR_ALL, idx, nintr);
950 KASSERT(iq->flags & IQ_INTR,
951 ("%s: iq %p (port %p, intr_flags 0x%lx, idx %d)", __func__, iq, pi,
952 pi->flags & INTR_ALL, idx));
956 /* Maximum payload that can be delivered with a single iq descriptor */
958 mtu_to_max_payload(struct adapter *sc, int mtu, const int toe)
964 payload = sc->tt.rx_coalesce ?
965 G_RXCOALESCESIZE(t4_read_reg(sc, A_TP_PARA_REG2)) : mtu;
968 /* large enough even when hw VLAN extraction is disabled */
969 payload = fl_pktshift + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
979 t4_setup_port_queues(struct port_info *pi)
981 int rc = 0, i, j, intr_idx, iqid;
984 struct sge_wrq *ctrlq;
986 struct sge_ofld_rxq *ofld_rxq;
987 struct sge_wrq *ofld_txq;
990 struct sge_nm_rxq *nm_rxq;
991 struct sge_nm_txq *nm_txq;
994 struct adapter *sc = pi->adapter;
995 struct ifnet *ifp = pi->ifp;
996 struct sysctl_oid *oid = device_get_sysctl_tree(pi->dev);
997 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
998 int maxp, mtu = ifp->if_mtu;
1000 /* Interrupt vector to start from (when using multiple vectors) */
1001 intr_idx = first_vector(pi);
1004 * First pass over all NIC and TOE rx queues:
1005 * a) initialize iq and fl
1006 * b) allocate queue iff it will take direct interrupts.
1008 maxp = mtu_to_max_payload(sc, mtu, 0);
1009 if (pi->flags & INTR_RXQ) {
1010 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "rxq",
1011 CTLFLAG_RD, NULL, "rx queues");
1013 for_each_rxq(pi, i, rxq) {
1015 init_iq(&rxq->iq, sc, pi->tmr_idx, pi->pktc_idx, pi->qsize_rxq);
1017 snprintf(name, sizeof(name), "%s rxq%d-fl",
1018 device_get_nameunit(pi->dev), i);
1019 init_fl(sc, &rxq->fl, pi->qsize_rxq / 8, maxp, name);
1021 if (pi->flags & INTR_RXQ) {
1022 rxq->iq.flags |= IQ_INTR;
1023 rc = alloc_rxq(pi, rxq, intr_idx, i, oid);
1030 maxp = mtu_to_max_payload(sc, mtu, 1);
1031 if (is_offload(sc) && pi->flags & INTR_OFLD_RXQ) {
1032 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_rxq",
1034 "rx queues for offloaded TCP connections");
1036 for_each_ofld_rxq(pi, i, ofld_rxq) {
1038 init_iq(&ofld_rxq->iq, sc, pi->tmr_idx, pi->pktc_idx,
1041 snprintf(name, sizeof(name), "%s ofld_rxq%d-fl",
1042 device_get_nameunit(pi->dev), i);
1043 init_fl(sc, &ofld_rxq->fl, pi->qsize_rxq / 8, maxp, name);
1045 if (pi->flags & INTR_OFLD_RXQ) {
1046 ofld_rxq->iq.flags |= IQ_INTR;
1047 rc = alloc_ofld_rxq(pi, ofld_rxq, intr_idx, i, oid);
1056 * We don't have buffers to back the netmap rx queues right now so we
1057 * create the queues in a way that doesn't set off any congestion signal
1060 if (pi->flags & INTR_NM_RXQ) {
1061 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "nm_rxq",
1062 CTLFLAG_RD, NULL, "rx queues for netmap");
1063 for_each_nm_rxq(pi, i, nm_rxq) {
1064 rc = alloc_nm_rxq(pi, nm_rxq, intr_idx, i, oid);
1073 * Second pass over all NIC and TOE rx queues. The queues forwarding
1074 * their interrupts are allocated now.
1077 if (!(pi->flags & INTR_RXQ)) {
1078 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "rxq",
1079 CTLFLAG_RD, NULL, "rx queues");
1080 for_each_rxq(pi, i, rxq) {
1081 MPASS(!(rxq->iq.flags & IQ_INTR));
1083 intr_idx = port_intr_iq(pi, j)->abs_id;
1085 rc = alloc_rxq(pi, rxq, intr_idx, i, oid);
1092 if (is_offload(sc) && !(pi->flags & INTR_OFLD_RXQ)) {
1093 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_rxq",
1095 "rx queues for offloaded TCP connections");
1096 for_each_ofld_rxq(pi, i, ofld_rxq) {
1097 MPASS(!(ofld_rxq->iq.flags & IQ_INTR));
1099 intr_idx = port_intr_iq(pi, j)->abs_id;
1101 rc = alloc_ofld_rxq(pi, ofld_rxq, intr_idx, i, oid);
1109 if (!(pi->flags & INTR_NM_RXQ))
1110 CXGBE_UNIMPLEMENTED(__func__);
1114 * Now the tx queues. Only one pass needed.
1116 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "txq", CTLFLAG_RD,
1119 for_each_txq(pi, i, txq) {
1120 iqid = port_intr_iq(pi, j)->cntxt_id;
1121 snprintf(name, sizeof(name), "%s txq%d",
1122 device_get_nameunit(pi->dev), i);
1123 init_eq(&txq->eq, EQ_ETH, pi->qsize_txq, pi->tx_chan, iqid,
1126 rc = alloc_txq(pi, txq, i, oid);
1132 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_txq",
1133 CTLFLAG_RD, NULL, "tx queues for offloaded TCP connections");
1134 for_each_ofld_txq(pi, i, ofld_txq) {
1135 struct sysctl_oid *oid2;
1137 iqid = port_intr_iq(pi, j)->cntxt_id;
1138 snprintf(name, sizeof(name), "%s ofld_txq%d",
1139 device_get_nameunit(pi->dev), i);
1140 init_eq(&ofld_txq->eq, EQ_OFLD, pi->qsize_txq, pi->tx_chan,
1143 snprintf(name, sizeof(name), "%d", i);
1144 oid2 = SYSCTL_ADD_NODE(&pi->ctx, SYSCTL_CHILDREN(oid), OID_AUTO,
1145 name, CTLFLAG_RD, NULL, "offload tx queue");
1147 rc = alloc_wrq(sc, pi, ofld_txq, oid2);
1154 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "nm_txq",
1155 CTLFLAG_RD, NULL, "tx queues for netmap use");
1156 for_each_nm_txq(pi, i, nm_txq) {
1157 iqid = pi->first_nm_rxq + (j % pi->nnmrxq);
1158 rc = alloc_nm_txq(pi, nm_txq, iqid, i, oid);
1166 * Finally, the control queue.
1168 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ctrlq", CTLFLAG_RD,
1169 NULL, "ctrl queue");
1170 ctrlq = &sc->sge.ctrlq[pi->port_id];
1171 iqid = port_intr_iq(pi, 0)->cntxt_id;
1172 snprintf(name, sizeof(name), "%s ctrlq", device_get_nameunit(pi->dev));
1173 init_eq(&ctrlq->eq, EQ_CTRL, CTRL_EQ_QSIZE, pi->tx_chan, iqid, name);
1174 rc = alloc_wrq(sc, pi, ctrlq, oid);
1178 t4_teardown_port_queues(pi);
1187 t4_teardown_port_queues(struct port_info *pi)
1190 struct adapter *sc = pi->adapter;
1191 struct sge_rxq *rxq;
1192 struct sge_txq *txq;
1194 struct sge_ofld_rxq *ofld_rxq;
1195 struct sge_wrq *ofld_txq;
1198 struct sge_nm_rxq *nm_rxq;
1199 struct sge_nm_txq *nm_txq;
1202 /* Do this before freeing the queues */
1203 if (pi->flags & PORT_SYSCTL_CTX) {
1204 sysctl_ctx_free(&pi->ctx);
1205 pi->flags &= ~PORT_SYSCTL_CTX;
1209 * Take down all the tx queues first, as they reference the rx queues
1210 * (for egress updates, etc.).
1213 free_wrq(sc, &sc->sge.ctrlq[pi->port_id]);
1215 for_each_txq(pi, i, txq) {
1219 for_each_ofld_txq(pi, i, ofld_txq) {
1220 free_wrq(sc, ofld_txq);
1224 for_each_nm_txq(pi, i, nm_txq)
1225 free_nm_txq(pi, nm_txq);
1229 * Then take down the rx queues that forward their interrupts, as they
1230 * reference other rx queues.
1233 for_each_rxq(pi, i, rxq) {
1234 if ((rxq->iq.flags & IQ_INTR) == 0)
1238 for_each_ofld_rxq(pi, i, ofld_rxq) {
1239 if ((ofld_rxq->iq.flags & IQ_INTR) == 0)
1240 free_ofld_rxq(pi, ofld_rxq);
1244 for_each_nm_rxq(pi, i, nm_rxq)
1245 free_nm_rxq(pi, nm_rxq);
1249 * Then take down the rx queues that take direct interrupts.
1252 for_each_rxq(pi, i, rxq) {
1253 if (rxq->iq.flags & IQ_INTR)
1257 for_each_ofld_rxq(pi, i, ofld_rxq) {
1258 if (ofld_rxq->iq.flags & IQ_INTR)
1259 free_ofld_rxq(pi, ofld_rxq);
1263 CXGBE_UNIMPLEMENTED(__func__);
1270 * Deals with errors and the firmware event queue. All data rx queues forward
1271 * their interrupt to the firmware event queue.
1274 t4_intr_all(void *arg)
1276 struct adapter *sc = arg;
1277 struct sge_iq *fwq = &sc->sge.fwq;
1280 if (atomic_cmpset_int(&fwq->state, IQS_IDLE, IQS_BUSY)) {
1282 atomic_cmpset_int(&fwq->state, IQS_BUSY, IQS_IDLE);
1286 /* Deals with error interrupts */
1288 t4_intr_err(void *arg)
1290 struct adapter *sc = arg;
1292 t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0);
1293 t4_slow_intr_handler(sc);
1297 t4_intr_evt(void *arg)
1299 struct sge_iq *iq = arg;
1301 if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1303 atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1310 struct sge_iq *iq = arg;
1312 if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1314 atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1319 * Deals with anything and everything on the given ingress queue.
1322 service_iq(struct sge_iq *iq, int budget)
1325 struct sge_rxq *rxq = iq_to_rxq(iq); /* Use iff iq is part of rxq */
1326 struct sge_fl *fl; /* Use iff IQ_HAS_FL */
1327 struct adapter *sc = iq->adapter;
1328 struct iq_desc *d = &iq->desc[iq->cidx];
1329 int ndescs = 0, limit;
1330 int rsp_type, refill;
1332 uint16_t fl_hw_cidx;
1334 STAILQ_HEAD(, sge_iq) iql = STAILQ_HEAD_INITIALIZER(iql);
1335 #if defined(INET) || defined(INET6)
1336 const struct timeval lro_timeout = {0, sc->lro_timeout};
1339 KASSERT(iq->state == IQS_BUSY, ("%s: iq %p not BUSY", __func__, iq));
1341 limit = budget ? budget : iq->qsize / 16;
1343 if (iq->flags & IQ_HAS_FL) {
1345 fl_hw_cidx = fl->hw_cidx; /* stable snapshot */
1348 fl_hw_cidx = 0; /* to silence gcc warning */
1352 * We always come back and check the descriptor ring for new indirect
1353 * interrupts and other responses after running a single handler.
1356 while ((d->rsp.u.type_gen & F_RSPD_GEN) == iq->gen) {
1362 rsp_type = G_RSPD_TYPE(d->rsp.u.type_gen);
1363 lq = be32toh(d->rsp.pldbuflen_qid);
1366 case X_RSPD_TYPE_FLBUF:
1368 KASSERT(iq->flags & IQ_HAS_FL,
1369 ("%s: data for an iq (%p) with no freelist",
1372 m0 = get_fl_payload(sc, fl, lq);
1373 if (__predict_false(m0 == NULL))
1375 refill = IDXDIFF(fl->hw_cidx, fl_hw_cidx, fl->sidx) > 2;
1376 #ifdef T4_PKT_TIMESTAMP
1378 * 60 bit timestamp for the payload is
1379 * *(uint64_t *)m0->m_pktdat. Note that it is
1380 * in the leading free-space in the mbuf. The
1381 * kernel can clobber it during a pullup,
1382 * m_copymdata, etc. You need to make sure that
1383 * the mbuf reaches you unmolested if you care
1384 * about the timestamp.
1386 *(uint64_t *)m0->m_pktdat =
1387 be64toh(ctrl->u.last_flit) &
1393 case X_RSPD_TYPE_CPL:
1394 KASSERT(d->rss.opcode < NUM_CPL_CMDS,
1395 ("%s: bad opcode %02x.", __func__,
1397 sc->cpl_handler[d->rss.opcode](iq, &d->rss, m0);
1400 case X_RSPD_TYPE_INTR:
1403 * Interrupts should be forwarded only to queues
1404 * that are not forwarding their interrupts.
1405 * This means service_iq can recurse but only 1
1408 KASSERT(budget == 0,
1409 ("%s: budget %u, rsp_type %u", __func__,
1413 * There are 1K interrupt-capable queues (qids 0
1414 * through 1023). A response type indicating a
1415 * forwarded interrupt with a qid >= 1K is an
1416 * iWARP async notification.
1419 sc->an_handler(iq, &d->rsp);
1423 q = sc->sge.iqmap[lq - sc->sge.iq_start];
1424 if (atomic_cmpset_int(&q->state, IQS_IDLE,
1426 if (service_iq(q, q->qsize / 16) == 0) {
1427 atomic_cmpset_int(&q->state,
1428 IQS_BUSY, IQS_IDLE);
1430 STAILQ_INSERT_TAIL(&iql, q,
1438 ("%s: illegal response type %d on iq %p",
1439 __func__, rsp_type, iq));
1441 "%s: illegal response type %d on iq %p",
1442 device_get_nameunit(sc->dev), rsp_type, iq);
1447 if (__predict_false(++iq->cidx == iq->sidx)) {
1449 iq->gen ^= F_RSPD_GEN;
1452 if (__predict_false(++ndescs == limit)) {
1453 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
1455 V_INGRESSQID(iq->cntxt_id) |
1456 V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
1459 #if defined(INET) || defined(INET6)
1460 if (iq->flags & IQ_LRO_ENABLED &&
1461 sc->lro_timeout != 0) {
1462 tcp_lro_flush_inactive(&rxq->lro,
1468 if (iq->flags & IQ_HAS_FL) {
1470 refill_fl(sc, fl, 32);
1473 return (EINPROGRESS);
1478 refill_fl(sc, fl, 32);
1480 fl_hw_cidx = fl->hw_cidx;
1485 if (STAILQ_EMPTY(&iql))
1489 * Process the head only, and send it to the back of the list if
1490 * it's still not done.
1492 q = STAILQ_FIRST(&iql);
1493 STAILQ_REMOVE_HEAD(&iql, link);
1494 if (service_iq(q, q->qsize / 8) == 0)
1495 atomic_cmpset_int(&q->state, IQS_BUSY, IQS_IDLE);
1497 STAILQ_INSERT_TAIL(&iql, q, link);
1500 #if defined(INET) || defined(INET6)
1501 if (iq->flags & IQ_LRO_ENABLED) {
1502 struct lro_ctrl *lro = &rxq->lro;
1503 struct lro_entry *l;
1505 while (!SLIST_EMPTY(&lro->lro_active)) {
1506 l = SLIST_FIRST(&lro->lro_active);
1507 SLIST_REMOVE_HEAD(&lro->lro_active, next);
1508 tcp_lro_flush(lro, l);
1513 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(ndescs) |
1514 V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params));
1516 if (iq->flags & IQ_HAS_FL) {
1520 starved = refill_fl(sc, fl, 64);
1522 if (__predict_false(starved != 0))
1523 add_fl_to_sfl(sc, fl);
1530 cl_has_metadata(struct sge_fl *fl, struct cluster_layout *cll)
1532 int rc = fl->flags & FL_BUF_PACKING || cll->region1 > 0;
1535 MPASS(cll->region3 >= CL_METADATA_SIZE);
1540 static inline struct cluster_metadata *
1541 cl_metadata(struct adapter *sc, struct sge_fl *fl, struct cluster_layout *cll,
1545 if (cl_has_metadata(fl, cll)) {
1546 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
1548 return ((struct cluster_metadata *)(cl + swz->size) - 1);
1554 rxb_free(struct mbuf *m, void *arg1, void *arg2)
1556 uma_zone_t zone = arg1;
1559 uma_zfree(zone, cl);
1560 counter_u64_add(extfree_rels, 1);
1564 * The mbuf returned by this function could be allocated from zone_mbuf or
1565 * constructed in spare room in the cluster.
1567 * The mbuf carries the payload in one of these ways
1568 * a) frame inside the mbuf (mbuf from zone_mbuf)
1569 * b) m_cljset (for clusters without metadata) zone_mbuf
1570 * c) m_extaddref (cluster with metadata) inline mbuf
1571 * d) m_extaddref (cluster with metadata) zone_mbuf
1573 static struct mbuf *
1574 get_scatter_segment(struct adapter *sc, struct sge_fl *fl, int total, int flags)
1577 struct fl_sdesc *sd = &fl->sdesc[fl->cidx];
1578 struct cluster_layout *cll = &sd->cll;
1579 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
1580 struct hw_buf_info *hwb = &sc->sge.hw_buf_info[cll->hwidx];
1581 struct cluster_metadata *clm = cl_metadata(sc, fl, cll, sd->cl);
1582 int len, padded_len;
1585 len = min(total, hwb->size - fl->rx_offset);
1586 payload = sd->cl + cll->region1 + fl->rx_offset;
1587 if (fl->flags & FL_BUF_PACKING) {
1588 padded_len = roundup2(len, fl->buf_boundary);
1589 MPASS(fl->rx_offset + padded_len <= hwb->size);
1591 padded_len = hwb->size;
1592 MPASS(fl->rx_offset == 0); /* not packing */
1595 if (sc->sc_do_rxcopy && len < RX_COPY_THRESHOLD) {
1598 * Copy payload into a freshly allocated mbuf.
1601 m = flags & M_PKTHDR ?
1602 m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
1605 fl->mbuf_allocated++;
1606 #ifdef T4_PKT_TIMESTAMP
1607 /* Leave room for a timestamp */
1610 /* copy data to mbuf */
1611 bcopy(payload, mtod(m, caddr_t), len);
1613 } else if (sd->nmbuf * MSIZE < cll->region1) {
1616 * There's spare room in the cluster for an mbuf. Create one
1617 * and associate it with the payload that's in the cluster.
1621 m = (struct mbuf *)(sd->cl + sd->nmbuf * MSIZE);
1622 /* No bzero required */
1623 if (m_init(m, NULL, 0, M_NOWAIT, MT_DATA, flags | M_NOFREE))
1626 m_extaddref(m, payload, padded_len, &clm->refcount, rxb_free,
1628 if (sd->nmbuf++ == 0)
1629 counter_u64_add(extfree_refs, 1);
1634 * Grab an mbuf from zone_mbuf and associate it with the
1635 * payload in the cluster.
1638 m = flags & M_PKTHDR ?
1639 m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
1642 fl->mbuf_allocated++;
1644 m_extaddref(m, payload, padded_len, &clm->refcount,
1645 rxb_free, swz->zone, sd->cl);
1646 if (sd->nmbuf++ == 0)
1647 counter_u64_add(extfree_refs, 1);
1649 m_cljset(m, sd->cl, swz->type);
1650 sd->cl = NULL; /* consumed, not a recycle candidate */
1653 if (flags & M_PKTHDR)
1654 m->m_pkthdr.len = total;
1657 if (fl->flags & FL_BUF_PACKING) {
1658 fl->rx_offset += padded_len;
1659 MPASS(fl->rx_offset <= hwb->size);
1660 if (fl->rx_offset < hwb->size)
1661 return (m); /* without advancing the cidx */
1664 if (__predict_false(++fl->cidx % 8 == 0)) {
1665 uint16_t cidx = fl->cidx / 8;
1667 if (__predict_false(cidx == fl->sidx))
1668 fl->cidx = cidx = 0;
1676 static struct mbuf *
1677 get_fl_payload(struct adapter *sc, struct sge_fl *fl, uint32_t len_newbuf)
1679 struct mbuf *m0, *m, **pnext;
1682 len = G_RSPD_LEN(len_newbuf);
1683 if (__predict_false(fl->flags & FL_BUF_RESUME)) {
1684 M_ASSERTPKTHDR(fl->m0);
1685 MPASS(len == fl->m0->m_pkthdr.len);
1686 MPASS(fl->remaining < len);
1690 len = fl->remaining;
1691 fl->flags &= ~FL_BUF_RESUME;
1695 if (fl->rx_offset > 0 && len_newbuf & F_RSPD_NEWBUF) {
1697 if (__predict_false(++fl->cidx % 8 == 0)) {
1698 uint16_t cidx = fl->cidx / 8;
1700 if (__predict_false(cidx == fl->sidx))
1701 fl->cidx = cidx = 0;
1707 * Payload starts at rx_offset in the current hw buffer. Its length is
1708 * 'len' and it may span multiple hw buffers.
1711 m0 = get_scatter_segment(sc, fl, len, M_PKTHDR);
1715 pnext = &m0->m_next;
1718 MPASS(fl->rx_offset == 0);
1719 m = get_scatter_segment(sc, fl, len, 0);
1720 if (__predict_false(m == NULL)) {
1723 fl->remaining = len;
1724 fl->flags |= FL_BUF_RESUME;
1737 t4_eth_rx(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m0)
1739 struct sge_rxq *rxq = iq_to_rxq(iq);
1740 struct ifnet *ifp = rxq->ifp;
1741 const struct cpl_rx_pkt *cpl = (const void *)(rss + 1);
1742 #if defined(INET) || defined(INET6)
1743 struct lro_ctrl *lro = &rxq->lro;
1746 KASSERT(m0 != NULL, ("%s: no payload with opcode %02x", __func__,
1749 m0->m_pkthdr.len -= fl_pktshift;
1750 m0->m_len -= fl_pktshift;
1751 m0->m_data += fl_pktshift;
1753 m0->m_pkthdr.rcvif = ifp;
1754 M_HASHTYPE_SET(m0, M_HASHTYPE_OPAQUE);
1755 m0->m_pkthdr.flowid = be32toh(rss->hash_val);
1757 if (cpl->csum_calc && !cpl->err_vec) {
1758 if (ifp->if_capenable & IFCAP_RXCSUM &&
1759 cpl->l2info & htobe32(F_RXF_IP)) {
1760 m0->m_pkthdr.csum_flags = (CSUM_IP_CHECKED |
1761 CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
1763 } else if (ifp->if_capenable & IFCAP_RXCSUM_IPV6 &&
1764 cpl->l2info & htobe32(F_RXF_IP6)) {
1765 m0->m_pkthdr.csum_flags = (CSUM_DATA_VALID_IPV6 |
1770 if (__predict_false(cpl->ip_frag))
1771 m0->m_pkthdr.csum_data = be16toh(cpl->csum);
1773 m0->m_pkthdr.csum_data = 0xffff;
1777 m0->m_pkthdr.ether_vtag = be16toh(cpl->vlan);
1778 m0->m_flags |= M_VLANTAG;
1779 rxq->vlan_extraction++;
1782 #if defined(INET) || defined(INET6)
1783 if (cpl->l2info & htobe32(F_RXF_LRO) &&
1784 iq->flags & IQ_LRO_ENABLED &&
1785 tcp_lro_rx(lro, m0, 0) == 0) {
1786 /* queued for LRO */
1789 ifp->if_input(ifp, m0);
1795 * Doesn't fail. Holds on to work requests it can't send right away.
1798 t4_wrq_tx_locked(struct adapter *sc, struct sge_wrq *wrq, struct wrqe *wr)
1800 struct sge_eq *eq = &wrq->eq;
1804 TXQ_LOCK_ASSERT_OWNED(wrq);
1806 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_OFLD ||
1807 (eq->flags & EQ_TYPEMASK) == EQ_CTRL,
1808 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1810 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_CTRL,
1811 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1814 if (__predict_true(wr != NULL))
1815 STAILQ_INSERT_TAIL(&wrq->wr_list, wr, link);
1817 can_reclaim = reclaimable(eq);
1818 if (__predict_false(eq->flags & EQ_STALLED)) {
1819 if (eq->avail + can_reclaim < tx_resume_threshold(eq))
1821 eq->flags &= ~EQ_STALLED;
1824 eq->cidx += can_reclaim;
1825 eq->avail += can_reclaim;
1826 if (__predict_false(eq->cidx >= eq->cap))
1827 eq->cidx -= eq->cap;
1829 while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL) {
1832 if (__predict_false(wr->wr_len < 0 ||
1833 wr->wr_len > SGE_MAX_WR_LEN || (wr->wr_len & 0x7))) {
1836 panic("%s: work request with length %d", __func__,
1842 log(LOG_ERR, "%s: %s work request with length %d",
1843 device_get_nameunit(sc->dev), __func__, wr->wr_len);
1844 STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
1849 ndesc = howmany(wr->wr_len, EQ_ESIZE);
1850 if (eq->avail < ndesc) {
1855 dst = (void *)&eq->desc[eq->pidx];
1856 copy_to_txd(eq, wrtod(wr), &dst, wr->wr_len);
1860 if (__predict_false(eq->pidx >= eq->cap))
1861 eq->pidx -= eq->cap;
1863 eq->pending += ndesc;
1864 if (eq->pending >= 8)
1868 STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
1871 if (eq->avail < 8) {
1872 can_reclaim = reclaimable(eq);
1873 eq->cidx += can_reclaim;
1874 eq->avail += can_reclaim;
1875 if (__predict_false(eq->cidx >= eq->cap))
1876 eq->cidx -= eq->cap;
1884 eq->flags |= EQ_STALLED;
1885 if (callout_pending(&eq->tx_callout) == 0)
1886 callout_reset(&eq->tx_callout, 1, t4_tx_callout, eq);
1890 /* Per-packet header in a coalesced tx WR, before the SGL starts (in flits) */
1891 #define TXPKTS_PKT_HDR ((\
1892 sizeof(struct ulp_txpkt) + \
1893 sizeof(struct ulptx_idata) + \
1894 sizeof(struct cpl_tx_pkt_core) \
1897 /* Header of a coalesced tx WR, before SGL of first packet (in flits) */
1898 #define TXPKTS_WR_HDR (\
1899 sizeof(struct fw_eth_tx_pkts_wr) / 8 + \
1902 /* Header of a tx WR, before SGL of first packet (in flits) */
1903 #define TXPKT_WR_HDR ((\
1904 sizeof(struct fw_eth_tx_pkt_wr) + \
1905 sizeof(struct cpl_tx_pkt_core) \
1908 /* Header of a tx LSO WR, before SGL of first packet (in flits) */
1909 #define TXPKT_LSO_WR_HDR ((\
1910 sizeof(struct fw_eth_tx_pkt_wr) + \
1911 sizeof(struct cpl_tx_pkt_lso_core) + \
1912 sizeof(struct cpl_tx_pkt_core) \
1916 t4_eth_tx(struct ifnet *ifp, struct sge_txq *txq, struct mbuf *m)
1918 struct port_info *pi = (void *)ifp->if_softc;
1919 struct adapter *sc = pi->adapter;
1920 struct sge_eq *eq = &txq->eq;
1921 struct buf_ring *br = txq->br;
1923 int rc, coalescing, can_reclaim;
1924 struct txpkts txpkts;
1927 TXQ_LOCK_ASSERT_OWNED(txq);
1928 KASSERT(m, ("%s: called with nothing to do.", __func__));
1929 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_ETH,
1930 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1932 prefetch(&eq->desc[eq->pidx]);
1933 prefetch(&txq->sdesc[eq->pidx]);
1935 txpkts.npkt = 0;/* indicates there's nothing in txpkts */
1938 can_reclaim = reclaimable(eq);
1939 if (__predict_false(eq->flags & EQ_STALLED)) {
1940 if (eq->avail + can_reclaim < tx_resume_threshold(eq)) {
1944 eq->flags &= ~EQ_STALLED;
1948 if (__predict_false(eq->flags & EQ_DOOMED)) {
1950 while ((m = buf_ring_dequeue_sc(txq->br)) != NULL)
1955 if (eq->avail < 8 && can_reclaim)
1956 reclaim_tx_descs(txq, can_reclaim, 32);
1958 for (; m; m = next ? next : drbr_dequeue(ifp, br)) {
1963 next = m->m_nextpkt;
1964 m->m_nextpkt = NULL;
1966 if (next || buf_ring_peek(br))
1969 rc = get_pkt_sgl(txq, &m, &sgl, coalescing);
1973 /* Short of resources, suspend tx */
1975 m->m_nextpkt = next;
1980 * Unrecoverable error for this packet, throw it away
1981 * and move on to the next. get_pkt_sgl may already
1982 * have freed m (it will be NULL in that case and the
1983 * m_freem here is still safe).
1991 add_to_txpkts(pi, txq, &txpkts, m, &sgl) == 0) {
1993 /* Successfully absorbed into txpkts */
1995 write_ulp_cpl_sgl(pi, txq, &txpkts, m, &sgl);
2000 * We weren't coalescing to begin with, or current frame could
2001 * not be coalesced (add_to_txpkts flushes txpkts if a frame
2002 * given to it can't be coalesced). Either way there should be
2003 * nothing in txpkts.
2005 KASSERT(txpkts.npkt == 0,
2006 ("%s: txpkts not empty: %d", __func__, txpkts.npkt));
2008 /* We're sending out individual packets now */
2012 reclaim_tx_descs(txq, 0, 8);
2013 rc = write_txpkt_wr(pi, txq, m, &sgl);
2016 /* Short of hardware descriptors, suspend tx */
2019 * This is an unlikely but expensive failure. We've
2020 * done all the hard work (DMA mappings etc.) and now we
2021 * can't send out the packet. What's worse, we have to
2022 * spend even more time freeing up everything in sgl.
2025 free_pkt_sgl(txq, &sgl);
2027 m->m_nextpkt = next;
2031 ETHER_BPF_MTAP(ifp, m);
2035 if (eq->pending >= 8)
2038 can_reclaim = reclaimable(eq);
2039 if (can_reclaim >= 32)
2040 reclaim_tx_descs(txq, can_reclaim, 64);
2043 if (txpkts.npkt > 0)
2044 write_txpkts_wr(txq, &txpkts);
2047 * m not NULL means there was an error but we haven't thrown it away.
2048 * This can happen when we're short of tx descriptors (no_desc) or maybe
2049 * even DMA maps (no_dmamap). Either way, a credit flush and reclaim
2050 * will get things going again.
2052 if (m && !(eq->flags & EQ_CRFLUSHED)) {
2053 struct tx_sdesc *txsd = &txq->sdesc[eq->pidx];
2056 * If EQ_CRFLUSHED is not set then we know we have at least one
2057 * available descriptor because any WR that reduces eq->avail to
2058 * 0 also sets EQ_CRFLUSHED.
2060 KASSERT(eq->avail > 0, ("%s: no space for eqflush.", __func__));
2062 txsd->desc_used = 1;
2064 write_eqflush_wr(eq);
2071 reclaim_tx_descs(txq, 0, 128);
2073 if (eq->flags & EQ_STALLED && callout_pending(&eq->tx_callout) == 0)
2074 callout_reset(&eq->tx_callout, 1, t4_tx_callout, eq);
2080 t4_update_fl_bufsize(struct ifnet *ifp)
2082 struct port_info *pi = ifp->if_softc;
2083 struct adapter *sc = pi->adapter;
2084 struct sge_rxq *rxq;
2086 struct sge_ofld_rxq *ofld_rxq;
2089 int i, maxp, mtu = ifp->if_mtu;
2091 maxp = mtu_to_max_payload(sc, mtu, 0);
2092 for_each_rxq(pi, i, rxq) {
2096 find_best_refill_source(sc, fl, maxp);
2100 maxp = mtu_to_max_payload(sc, mtu, 1);
2101 for_each_ofld_rxq(pi, i, ofld_rxq) {
2105 find_best_refill_source(sc, fl, maxp);
2112 can_resume_tx(struct sge_eq *eq)
2115 return (eq->avail + reclaimable(eq) >= tx_resume_threshold(eq));
2119 init_iq(struct sge_iq *iq, struct adapter *sc, int tmr_idx, int pktc_idx,
2123 KASSERT(tmr_idx >= 0 && tmr_idx < SGE_NTIMERS,
2124 ("%s: bad tmr_idx %d", __func__, tmr_idx));
2125 KASSERT(pktc_idx < SGE_NCOUNTERS, /* -ve is ok, means don't use */
2126 ("%s: bad pktc_idx %d", __func__, pktc_idx));
2130 iq->intr_params = V_QINTR_TIMER_IDX(tmr_idx);
2131 iq->intr_pktc_idx = SGE_NCOUNTERS - 1;
2132 if (pktc_idx >= 0) {
2133 iq->intr_params |= F_QINTR_CNT_EN;
2134 iq->intr_pktc_idx = pktc_idx;
2136 iq->qsize = roundup2(qsize, 16); /* See FW_IQ_CMD/iqsize */
2137 iq->sidx = iq->qsize - spg_len / IQ_ESIZE;
2141 init_fl(struct adapter *sc, struct sge_fl *fl, int qsize, int maxp, char *name)
2145 fl->sidx = qsize - spg_len / EQ_ESIZE;
2146 strlcpy(fl->lockname, name, sizeof(fl->lockname));
2147 if (sc->flags & BUF_PACKING_OK &&
2148 ((!is_t4(sc) && buffer_packing) || /* T5+: enabled unless 0 */
2149 (is_t4(sc) && buffer_packing == 1)))/* T4: disabled unless 1 */
2150 fl->flags |= FL_BUF_PACKING;
2151 find_best_refill_source(sc, fl, maxp);
2152 find_safe_refill_source(sc, fl);
2156 init_eq(struct sge_eq *eq, int eqtype, int qsize, uint8_t tx_chan,
2157 uint16_t iqid, char *name)
2159 KASSERT(tx_chan < NCHAN, ("%s: bad tx channel %d", __func__, tx_chan));
2160 KASSERT(eqtype <= EQ_TYPEMASK, ("%s: bad qtype %d", __func__, eqtype));
2162 eq->flags = eqtype & EQ_TYPEMASK;
2163 eq->tx_chan = tx_chan;
2166 strlcpy(eq->lockname, name, sizeof(eq->lockname));
2168 TASK_INIT(&eq->tx_task, 0, t4_tx_task, eq);
2169 callout_init(&eq->tx_callout, CALLOUT_MPSAFE);
2173 alloc_ring(struct adapter *sc, size_t len, bus_dma_tag_t *tag,
2174 bus_dmamap_t *map, bus_addr_t *pa, void **va)
2178 rc = bus_dma_tag_create(sc->dmat, 512, 0, BUS_SPACE_MAXADDR,
2179 BUS_SPACE_MAXADDR, NULL, NULL, len, 1, len, 0, NULL, NULL, tag);
2181 device_printf(sc->dev, "cannot allocate DMA tag: %d\n", rc);
2185 rc = bus_dmamem_alloc(*tag, va,
2186 BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, map);
2188 device_printf(sc->dev, "cannot allocate DMA memory: %d\n", rc);
2192 rc = bus_dmamap_load(*tag, *map, *va, len, oneseg_dma_callback, pa, 0);
2194 device_printf(sc->dev, "cannot load DMA map: %d\n", rc);
2199 free_ring(sc, *tag, *map, *pa, *va);
2205 free_ring(struct adapter *sc, bus_dma_tag_t tag, bus_dmamap_t map,
2206 bus_addr_t pa, void *va)
2209 bus_dmamap_unload(tag, map);
2211 bus_dmamem_free(tag, va, map);
2213 bus_dma_tag_destroy(tag);
2219 * Allocates the ring for an ingress queue and an optional freelist. If the
2220 * freelist is specified it will be allocated and then associated with the
2223 * Returns errno on failure. Resources allocated up to that point may still be
2224 * allocated. Caller is responsible for cleanup in case this function fails.
2226 * If the ingress queue will take interrupts directly (iq->flags & IQ_INTR) then
2227 * the intr_idx specifies the vector, starting from 0. Otherwise it specifies
2228 * the abs_id of the ingress queue to which its interrupts should be forwarded.
2231 alloc_iq_fl(struct port_info *pi, struct sge_iq *iq, struct sge_fl *fl,
2232 int intr_idx, int cong)
2234 int rc, i, cntxt_id;
2237 struct adapter *sc = iq->adapter;
2240 len = iq->qsize * IQ_ESIZE;
2241 rc = alloc_ring(sc, len, &iq->desc_tag, &iq->desc_map, &iq->ba,
2242 (void **)&iq->desc);
2246 bzero(&c, sizeof(c));
2247 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST |
2248 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_IQ_CMD_PFN(sc->pf) |
2249 V_FW_IQ_CMD_VFN(0));
2251 c.alloc_to_len16 = htobe32(F_FW_IQ_CMD_ALLOC | F_FW_IQ_CMD_IQSTART |
2254 /* Special handling for firmware event queue */
2255 if (iq == &sc->sge.fwq)
2256 v |= F_FW_IQ_CMD_IQASYNCH;
2258 if (iq->flags & IQ_INTR) {
2259 KASSERT(intr_idx < sc->intr_count,
2260 ("%s: invalid direct intr_idx %d", __func__, intr_idx));
2262 v |= F_FW_IQ_CMD_IQANDST;
2263 v |= V_FW_IQ_CMD_IQANDSTINDEX(intr_idx);
2265 c.type_to_iqandstindex = htobe32(v |
2266 V_FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) |
2267 V_FW_IQ_CMD_VIID(pi->viid) |
2268 V_FW_IQ_CMD_IQANUD(X_UPDATEDELIVERY_INTERRUPT));
2269 c.iqdroprss_to_iqesize = htobe16(V_FW_IQ_CMD_IQPCIECH(pi->tx_chan) |
2270 F_FW_IQ_CMD_IQGTSMODE |
2271 V_FW_IQ_CMD_IQINTCNTTHRESH(iq->intr_pktc_idx) |
2272 V_FW_IQ_CMD_IQESIZE(ilog2(IQ_ESIZE) - 4));
2273 c.iqsize = htobe16(iq->qsize);
2274 c.iqaddr = htobe64(iq->ba);
2276 c.iqns_to_fl0congen = htobe32(F_FW_IQ_CMD_IQFLINTCONGEN);
2279 mtx_init(&fl->fl_lock, fl->lockname, NULL, MTX_DEF);
2281 len = fl->qsize * EQ_ESIZE;
2282 rc = alloc_ring(sc, len, &fl->desc_tag, &fl->desc_map,
2283 &fl->ba, (void **)&fl->desc);
2287 /* Allocate space for one software descriptor per buffer. */
2288 rc = alloc_fl_sdesc(fl);
2290 device_printf(sc->dev,
2291 "failed to setup fl software descriptors: %d\n",
2296 if (fl->flags & FL_BUF_PACKING) {
2297 fl->lowat = roundup2(sc->sge.fl_starve_threshold2, 8);
2298 fl->buf_boundary = sc->sge.pack_boundary;
2300 fl->lowat = roundup2(sc->sge.fl_starve_threshold, 8);
2301 fl->buf_boundary = 16;
2303 if (fl_pad && fl->buf_boundary < sc->sge.pad_boundary)
2304 fl->buf_boundary = sc->sge.pad_boundary;
2306 c.iqns_to_fl0congen |=
2307 htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) |
2308 F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO |
2309 (fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) |
2310 (fl->flags & FL_BUF_PACKING ? F_FW_IQ_CMD_FL0PACKEN :
2313 c.iqns_to_fl0congen |=
2314 htobe32(V_FW_IQ_CMD_FL0CNGCHMAP(cong) |
2315 F_FW_IQ_CMD_FL0CONGCIF |
2316 F_FW_IQ_CMD_FL0CONGEN);
2318 c.fl0dcaen_to_fl0cidxfthresh =
2319 htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) |
2320 V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
2321 c.fl0size = htobe16(fl->qsize);
2322 c.fl0addr = htobe64(fl->ba);
2325 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2327 device_printf(sc->dev,
2328 "failed to create ingress queue: %d\n", rc);
2333 iq->gen = F_RSPD_GEN;
2334 iq->intr_next = iq->intr_params;
2335 iq->cntxt_id = be16toh(c.iqid);
2336 iq->abs_id = be16toh(c.physiqid);
2337 iq->flags |= IQ_ALLOCATED;
2339 cntxt_id = iq->cntxt_id - sc->sge.iq_start;
2340 if (cntxt_id >= sc->sge.niq) {
2341 panic ("%s: iq->cntxt_id (%d) more than the max (%d)", __func__,
2342 cntxt_id, sc->sge.niq - 1);
2344 sc->sge.iqmap[cntxt_id] = iq;
2349 iq->flags |= IQ_HAS_FL;
2350 fl->cntxt_id = be16toh(c.fl0id);
2351 fl->pidx = fl->cidx = 0;
2353 cntxt_id = fl->cntxt_id - sc->sge.eq_start;
2354 if (cntxt_id >= sc->sge.neq) {
2355 panic("%s: fl->cntxt_id (%d) more than the max (%d)",
2356 __func__, cntxt_id, sc->sge.neq - 1);
2358 sc->sge.eqmap[cntxt_id] = (void *)fl;
2361 if (isset(&sc->doorbells, DOORBELL_UDB)) {
2362 uint32_t s_qpp = sc->sge.eq_s_qpp;
2363 uint32_t mask = (1 << s_qpp) - 1;
2364 volatile uint8_t *udb;
2366 udb = sc->udbs_base + UDBS_DB_OFFSET;
2367 udb += (qid >> s_qpp) << PAGE_SHIFT;
2369 if (qid < PAGE_SIZE / UDBS_SEG_SIZE) {
2370 udb += qid << UDBS_SEG_SHIFT;
2373 fl->udb = (volatile void *)udb;
2375 fl->dbval = F_DBPRIO | V_QID(qid);
2377 fl->dbval |= F_DBTYPE;
2380 /* Enough to make sure the SGE doesn't think it's starved */
2381 refill_fl(sc, fl, fl->lowat);
2385 if (is_t5(sc) && cong >= 0) {
2386 uint32_t param, val;
2388 param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
2389 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_CONM_CTXT) |
2390 V_FW_PARAMS_PARAM_YZ(iq->cntxt_id);
2395 for (i = 0; i < 4; i++) {
2396 if (cong & (1 << i))
2397 val |= 1 << (i << 2);
2401 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val);
2403 /* report error but carry on */
2404 device_printf(sc->dev,
2405 "failed to set congestion manager context for "
2406 "ingress queue %d: %d\n", iq->cntxt_id, rc);
2410 /* Enable IQ interrupts */
2411 atomic_store_rel_int(&iq->state, IQS_IDLE);
2412 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_SEINTARM(iq->intr_params) |
2413 V_INGRESSQID(iq->cntxt_id));
2419 free_iq_fl(struct port_info *pi, struct sge_iq *iq, struct sge_fl *fl)
2422 struct adapter *sc = iq->adapter;
2426 return (0); /* nothing to do */
2428 dev = pi ? pi->dev : sc->dev;
2430 if (iq->flags & IQ_ALLOCATED) {
2431 rc = -t4_iq_free(sc, sc->mbox, sc->pf, 0,
2432 FW_IQ_TYPE_FL_INT_CAP, iq->cntxt_id,
2433 fl ? fl->cntxt_id : 0xffff, 0xffff);
2436 "failed to free queue %p: %d\n", iq, rc);
2439 iq->flags &= ~IQ_ALLOCATED;
2442 free_ring(sc, iq->desc_tag, iq->desc_map, iq->ba, iq->desc);
2444 bzero(iq, sizeof(*iq));
2447 free_ring(sc, fl->desc_tag, fl->desc_map, fl->ba,
2451 free_fl_sdesc(sc, fl);
2453 if (mtx_initialized(&fl->fl_lock))
2454 mtx_destroy(&fl->fl_lock);
2456 bzero(fl, sizeof(*fl));
2463 add_fl_sysctls(struct sysctl_ctx_list *ctx, struct sysctl_oid *oid,
2466 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2468 oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL,
2470 children = SYSCTL_CHILDREN(oid);
2472 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
2473 CTLTYPE_INT | CTLFLAG_RD, &fl->cntxt_id, 0, sysctl_uint16, "I",
2474 "SGE context id of the freelist");
2475 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "padding", CTLFLAG_RD, NULL,
2476 fl_pad ? 1 : 0, "padding enabled");
2477 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "packing", CTLFLAG_RD, NULL,
2478 fl->flags & FL_BUF_PACKING ? 1 : 0, "packing enabled");
2479 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, &fl->cidx,
2480 0, "consumer index");
2481 if (fl->flags & FL_BUF_PACKING) {
2482 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_offset",
2483 CTLFLAG_RD, &fl->rx_offset, 0, "packing rx offset");
2485 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, &fl->pidx,
2486 0, "producer index");
2487 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_allocated",
2488 CTLFLAG_RD, &fl->mbuf_allocated, "# of mbuf allocated");
2489 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_inlined",
2490 CTLFLAG_RD, &fl->mbuf_inlined, "# of mbuf inlined in clusters");
2491 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_allocated",
2492 CTLFLAG_RD, &fl->cl_allocated, "# of clusters allocated");
2493 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_recycled",
2494 CTLFLAG_RD, &fl->cl_recycled, "# of clusters recycled");
2495 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_fast_recycled",
2496 CTLFLAG_RD, &fl->cl_fast_recycled, "# of clusters recycled (fast)");
2500 alloc_fwq(struct adapter *sc)
2503 struct sge_iq *fwq = &sc->sge.fwq;
2504 struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2505 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2507 init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE);
2508 fwq->flags |= IQ_INTR; /* always */
2509 intr_idx = sc->intr_count > 1 ? 1 : 0;
2510 rc = alloc_iq_fl(sc->port[0], fwq, NULL, intr_idx, -1);
2512 device_printf(sc->dev,
2513 "failed to create firmware event queue: %d\n", rc);
2517 oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "fwq", CTLFLAG_RD,
2518 NULL, "firmware event queue");
2519 children = SYSCTL_CHILDREN(oid);
2521 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "abs_id",
2522 CTLTYPE_INT | CTLFLAG_RD, &fwq->abs_id, 0, sysctl_uint16, "I",
2523 "absolute id of the queue");
2524 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cntxt_id",
2525 CTLTYPE_INT | CTLFLAG_RD, &fwq->cntxt_id, 0, sysctl_uint16, "I",
2526 "SGE context id of the queue");
2527 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cidx",
2528 CTLTYPE_INT | CTLFLAG_RD, &fwq->cidx, 0, sysctl_uint16, "I",
2535 free_fwq(struct adapter *sc)
2537 return free_iq_fl(NULL, &sc->sge.fwq, NULL);
2541 alloc_mgmtq(struct adapter *sc)
2544 struct sge_wrq *mgmtq = &sc->sge.mgmtq;
2546 struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2547 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2549 oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "mgmtq", CTLFLAG_RD,
2550 NULL, "management queue");
2552 snprintf(name, sizeof(name), "%s mgmtq", device_get_nameunit(sc->dev));
2553 init_eq(&mgmtq->eq, EQ_CTRL, CTRL_EQ_QSIZE, sc->port[0]->tx_chan,
2554 sc->sge.fwq.cntxt_id, name);
2555 rc = alloc_wrq(sc, NULL, mgmtq, oid);
2557 device_printf(sc->dev,
2558 "failed to create management queue: %d\n", rc);
2566 free_mgmtq(struct adapter *sc)
2569 return free_wrq(sc, &sc->sge.mgmtq);
2573 tnl_cong(struct port_info *pi)
2576 if (cong_drop == -1)
2578 else if (cong_drop == 1)
2581 return (pi->rx_chan_map);
2585 alloc_rxq(struct port_info *pi, struct sge_rxq *rxq, int intr_idx, int idx,
2586 struct sysctl_oid *oid)
2589 struct sysctl_oid_list *children;
2592 rc = alloc_iq_fl(pi, &rxq->iq, &rxq->fl, intr_idx, tnl_cong(pi));
2597 * The freelist is just barely above the starvation threshold right now,
2598 * fill it up a bit more.
2601 refill_fl(pi->adapter, &rxq->fl, 128);
2602 FL_UNLOCK(&rxq->fl);
2604 #if defined(INET) || defined(INET6)
2605 rc = tcp_lro_init(&rxq->lro);
2608 rxq->lro.ifp = pi->ifp; /* also indicates LRO init'ed */
2610 if (pi->ifp->if_capenable & IFCAP_LRO)
2611 rxq->iq.flags |= IQ_LRO_ENABLED;
2615 children = SYSCTL_CHILDREN(oid);
2617 snprintf(name, sizeof(name), "%d", idx);
2618 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2620 children = SYSCTL_CHILDREN(oid);
2622 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id",
2623 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.abs_id, 0, sysctl_uint16, "I",
2624 "absolute id of the queue");
2625 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id",
2626 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cntxt_id, 0, sysctl_uint16, "I",
2627 "SGE context id of the queue");
2628 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2629 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cidx, 0, sysctl_uint16, "I",
2631 #if defined(INET) || defined(INET6)
2632 SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_queued", CTLFLAG_RD,
2633 &rxq->lro.lro_queued, 0, NULL);
2634 SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_flushed", CTLFLAG_RD,
2635 &rxq->lro.lro_flushed, 0, NULL);
2637 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "rxcsum", CTLFLAG_RD,
2638 &rxq->rxcsum, "# of times hardware assisted with checksum");
2639 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_extraction",
2640 CTLFLAG_RD, &rxq->vlan_extraction,
2641 "# of times hardware extracted 802.1Q tag");
2643 add_fl_sysctls(&pi->ctx, oid, &rxq->fl);
2649 free_rxq(struct port_info *pi, struct sge_rxq *rxq)
2653 #if defined(INET) || defined(INET6)
2655 tcp_lro_free(&rxq->lro);
2656 rxq->lro.ifp = NULL;
2660 rc = free_iq_fl(pi, &rxq->iq, &rxq->fl);
2662 bzero(rxq, sizeof(*rxq));
2669 alloc_ofld_rxq(struct port_info *pi, struct sge_ofld_rxq *ofld_rxq,
2670 int intr_idx, int idx, struct sysctl_oid *oid)
2673 struct sysctl_oid_list *children;
2676 rc = alloc_iq_fl(pi, &ofld_rxq->iq, &ofld_rxq->fl, intr_idx,
2681 children = SYSCTL_CHILDREN(oid);
2683 snprintf(name, sizeof(name), "%d", idx);
2684 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2686 children = SYSCTL_CHILDREN(oid);
2688 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id",
2689 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.abs_id, 0, sysctl_uint16,
2690 "I", "absolute id of the queue");
2691 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id",
2692 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cntxt_id, 0, sysctl_uint16,
2693 "I", "SGE context id of the queue");
2694 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2695 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cidx, 0, sysctl_uint16, "I",
2698 add_fl_sysctls(&pi->ctx, oid, &ofld_rxq->fl);
2704 free_ofld_rxq(struct port_info *pi, struct sge_ofld_rxq *ofld_rxq)
2708 rc = free_iq_fl(pi, &ofld_rxq->iq, &ofld_rxq->fl);
2710 bzero(ofld_rxq, sizeof(*ofld_rxq));
2718 alloc_nm_rxq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int intr_idx,
2719 int idx, struct sysctl_oid *oid)
2722 struct sysctl_oid_list *children;
2723 struct sysctl_ctx_list *ctx;
2726 struct adapter *sc = pi->adapter;
2727 struct netmap_adapter *na = NA(pi->nm_ifp);
2731 len = pi->qsize_rxq * IQ_ESIZE;
2732 rc = alloc_ring(sc, len, &nm_rxq->iq_desc_tag, &nm_rxq->iq_desc_map,
2733 &nm_rxq->iq_ba, (void **)&nm_rxq->iq_desc);
2737 len = na->num_rx_desc * EQ_ESIZE + spg_len;
2738 rc = alloc_ring(sc, len, &nm_rxq->fl_desc_tag, &nm_rxq->fl_desc_map,
2739 &nm_rxq->fl_ba, (void **)&nm_rxq->fl_desc);
2745 nm_rxq->iq_cidx = 0;
2746 nm_rxq->iq_sidx = pi->qsize_rxq - spg_len / IQ_ESIZE;
2747 nm_rxq->iq_gen = F_RSPD_GEN;
2748 nm_rxq->fl_pidx = nm_rxq->fl_cidx = 0;
2749 nm_rxq->fl_sidx = na->num_rx_desc;
2750 nm_rxq->intr_idx = intr_idx;
2753 children = SYSCTL_CHILDREN(oid);
2755 snprintf(name, sizeof(name), "%d", idx);
2756 oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, name, CTLFLAG_RD, NULL,
2758 children = SYSCTL_CHILDREN(oid);
2760 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "abs_id",
2761 CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_abs_id, 0, sysctl_uint16,
2762 "I", "absolute id of the queue");
2763 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
2764 CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_cntxt_id, 0, sysctl_uint16,
2765 "I", "SGE context id of the queue");
2766 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx",
2767 CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_cidx, 0, sysctl_uint16, "I",
2770 children = SYSCTL_CHILDREN(oid);
2771 oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL,
2773 children = SYSCTL_CHILDREN(oid);
2775 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
2776 CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->fl_cntxt_id, 0, sysctl_uint16,
2777 "I", "SGE context id of the freelist");
2778 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD,
2779 &nm_rxq->fl_cidx, 0, "consumer index");
2780 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD,
2781 &nm_rxq->fl_pidx, 0, "producer index");
2788 free_nm_rxq(struct port_info *pi, struct sge_nm_rxq *nm_rxq)
2790 struct adapter *sc = pi->adapter;
2792 free_ring(sc, nm_rxq->iq_desc_tag, nm_rxq->iq_desc_map, nm_rxq->iq_ba,
2794 free_ring(sc, nm_rxq->fl_desc_tag, nm_rxq->fl_desc_map, nm_rxq->fl_ba,
2801 alloc_nm_txq(struct port_info *pi, struct sge_nm_txq *nm_txq, int iqidx, int idx,
2802 struct sysctl_oid *oid)
2806 struct adapter *sc = pi->adapter;
2807 struct netmap_adapter *na = NA(pi->nm_ifp);
2809 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2811 len = na->num_tx_desc * EQ_ESIZE + spg_len;
2812 rc = alloc_ring(sc, len, &nm_txq->desc_tag, &nm_txq->desc_map,
2813 &nm_txq->ba, (void **)&nm_txq->desc);
2817 nm_txq->pidx = nm_txq->cidx = 0;
2818 nm_txq->sidx = na->num_tx_desc;
2820 nm_txq->iqidx = iqidx;
2821 nm_txq->cpl_ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
2822 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(sc->pf));
2824 snprintf(name, sizeof(name), "%d", idx);
2825 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2826 NULL, "netmap tx queue");
2827 children = SYSCTL_CHILDREN(oid);
2829 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
2830 &nm_txq->cntxt_id, 0, "SGE context id of the queue");
2831 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2832 CTLTYPE_INT | CTLFLAG_RD, &nm_txq->cidx, 0, sysctl_uint16, "I",
2834 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "pidx",
2835 CTLTYPE_INT | CTLFLAG_RD, &nm_txq->pidx, 0, sysctl_uint16, "I",
2842 free_nm_txq(struct port_info *pi, struct sge_nm_txq *nm_txq)
2844 struct adapter *sc = pi->adapter;
2846 free_ring(sc, nm_txq->desc_tag, nm_txq->desc_map, nm_txq->ba,
2854 ctrl_eq_alloc(struct adapter *sc, struct sge_eq *eq)
2857 struct fw_eq_ctrl_cmd c;
2859 bzero(&c, sizeof(c));
2861 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_CTRL_CMD) | F_FW_CMD_REQUEST |
2862 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_CTRL_CMD_PFN(sc->pf) |
2863 V_FW_EQ_CTRL_CMD_VFN(0));
2864 c.alloc_to_len16 = htobe32(F_FW_EQ_CTRL_CMD_ALLOC |
2865 F_FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c));
2866 c.cmpliqid_eqid = htonl(V_FW_EQ_CTRL_CMD_CMPLIQID(eq->iqid)); /* XXX */
2867 c.physeqid_pkd = htobe32(0);
2868 c.fetchszm_to_iqid =
2869 htobe32(V_FW_EQ_CTRL_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2870 V_FW_EQ_CTRL_CMD_PCIECHN(eq->tx_chan) |
2871 F_FW_EQ_CTRL_CMD_FETCHRO | V_FW_EQ_CTRL_CMD_IQID(eq->iqid));
2873 htobe32(V_FW_EQ_CTRL_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2874 V_FW_EQ_CTRL_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2875 V_FW_EQ_CTRL_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2876 V_FW_EQ_CTRL_CMD_EQSIZE(eq->qsize));
2877 c.eqaddr = htobe64(eq->ba);
2879 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2881 device_printf(sc->dev,
2882 "failed to create control queue %d: %d\n", eq->tx_chan, rc);
2885 eq->flags |= EQ_ALLOCATED;
2887 eq->cntxt_id = G_FW_EQ_CTRL_CMD_EQID(be32toh(c.cmpliqid_eqid));
2888 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2889 if (cntxt_id >= sc->sge.neq)
2890 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2891 cntxt_id, sc->sge.neq - 1);
2892 sc->sge.eqmap[cntxt_id] = eq;
2898 eth_eq_alloc(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2901 struct fw_eq_eth_cmd c;
2903 bzero(&c, sizeof(c));
2905 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_ETH_CMD) | F_FW_CMD_REQUEST |
2906 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_ETH_CMD_PFN(sc->pf) |
2907 V_FW_EQ_ETH_CMD_VFN(0));
2908 c.alloc_to_len16 = htobe32(F_FW_EQ_ETH_CMD_ALLOC |
2909 F_FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c));
2910 c.autoequiqe_to_viid = htobe32(V_FW_EQ_ETH_CMD_VIID(pi->viid));
2911 c.fetchszm_to_iqid =
2912 htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2913 V_FW_EQ_ETH_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO |
2914 V_FW_EQ_ETH_CMD_IQID(eq->iqid));
2915 c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2916 V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2917 V_FW_EQ_ETH_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2918 V_FW_EQ_ETH_CMD_EQSIZE(eq->qsize));
2919 c.eqaddr = htobe64(eq->ba);
2921 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2923 device_printf(pi->dev,
2924 "failed to create Ethernet egress queue: %d\n", rc);
2927 eq->flags |= EQ_ALLOCATED;
2929 eq->cntxt_id = G_FW_EQ_ETH_CMD_EQID(be32toh(c.eqid_pkd));
2930 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2931 if (cntxt_id >= sc->sge.neq)
2932 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2933 cntxt_id, sc->sge.neq - 1);
2934 sc->sge.eqmap[cntxt_id] = eq;
2941 ofld_eq_alloc(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2944 struct fw_eq_ofld_cmd c;
2946 bzero(&c, sizeof(c));
2948 c.op_to_vfn = htonl(V_FW_CMD_OP(FW_EQ_OFLD_CMD) | F_FW_CMD_REQUEST |
2949 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_OFLD_CMD_PFN(sc->pf) |
2950 V_FW_EQ_OFLD_CMD_VFN(0));
2951 c.alloc_to_len16 = htonl(F_FW_EQ_OFLD_CMD_ALLOC |
2952 F_FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c));
2953 c.fetchszm_to_iqid =
2954 htonl(V_FW_EQ_OFLD_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2955 V_FW_EQ_OFLD_CMD_PCIECHN(eq->tx_chan) |
2956 F_FW_EQ_OFLD_CMD_FETCHRO | V_FW_EQ_OFLD_CMD_IQID(eq->iqid));
2958 htobe32(V_FW_EQ_OFLD_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2959 V_FW_EQ_OFLD_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2960 V_FW_EQ_OFLD_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2961 V_FW_EQ_OFLD_CMD_EQSIZE(eq->qsize));
2962 c.eqaddr = htobe64(eq->ba);
2964 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2966 device_printf(pi->dev,
2967 "failed to create egress queue for TCP offload: %d\n", rc);
2970 eq->flags |= EQ_ALLOCATED;
2972 eq->cntxt_id = G_FW_EQ_OFLD_CMD_EQID(be32toh(c.eqid_pkd));
2973 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2974 if (cntxt_id >= sc->sge.neq)
2975 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2976 cntxt_id, sc->sge.neq - 1);
2977 sc->sge.eqmap[cntxt_id] = eq;
2984 alloc_eq(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2989 mtx_init(&eq->eq_lock, eq->lockname, NULL, MTX_DEF);
2991 len = eq->qsize * EQ_ESIZE;
2992 rc = alloc_ring(sc, len, &eq->desc_tag, &eq->desc_map,
2993 &eq->ba, (void **)&eq->desc);
2997 eq->cap = eq->qsize - spg_len / EQ_ESIZE;
2998 eq->spg = (void *)&eq->desc[eq->cap];
2999 eq->avail = eq->cap - 1; /* one less to avoid cidx = pidx */
3000 eq->pidx = eq->cidx = 0;
3001 eq->doorbells = sc->doorbells;
3003 switch (eq->flags & EQ_TYPEMASK) {
3005 rc = ctrl_eq_alloc(sc, eq);
3009 rc = eth_eq_alloc(sc, pi, eq);
3014 rc = ofld_eq_alloc(sc, pi, eq);
3019 panic("%s: invalid eq type %d.", __func__,
3020 eq->flags & EQ_TYPEMASK);
3023 device_printf(sc->dev,
3024 "failed to allocate egress queue(%d): %d\n",
3025 eq->flags & EQ_TYPEMASK, rc);
3028 eq->tx_callout.c_cpu = eq->cntxt_id % mp_ncpus;
3030 if (isset(&eq->doorbells, DOORBELL_UDB) ||
3031 isset(&eq->doorbells, DOORBELL_UDBWC) ||
3032 isset(&eq->doorbells, DOORBELL_WCWR)) {
3033 uint32_t s_qpp = sc->sge.eq_s_qpp;
3034 uint32_t mask = (1 << s_qpp) - 1;
3035 volatile uint8_t *udb;
3037 udb = sc->udbs_base + UDBS_DB_OFFSET;
3038 udb += (eq->cntxt_id >> s_qpp) << PAGE_SHIFT; /* pg offset */
3039 eq->udb_qid = eq->cntxt_id & mask; /* id in page */
3040 if (eq->udb_qid >= PAGE_SIZE / UDBS_SEG_SIZE)
3041 clrbit(&eq->doorbells, DOORBELL_WCWR);
3043 udb += eq->udb_qid << UDBS_SEG_SHIFT; /* seg offset */
3046 eq->udb = (volatile void *)udb;
3053 free_eq(struct adapter *sc, struct sge_eq *eq)
3057 if (eq->flags & EQ_ALLOCATED) {
3058 switch (eq->flags & EQ_TYPEMASK) {
3060 rc = -t4_ctrl_eq_free(sc, sc->mbox, sc->pf, 0,
3065 rc = -t4_eth_eq_free(sc, sc->mbox, sc->pf, 0,
3071 rc = -t4_ofld_eq_free(sc, sc->mbox, sc->pf, 0,
3077 panic("%s: invalid eq type %d.", __func__,
3078 eq->flags & EQ_TYPEMASK);
3081 device_printf(sc->dev,
3082 "failed to free egress queue (%d): %d\n",
3083 eq->flags & EQ_TYPEMASK, rc);
3086 eq->flags &= ~EQ_ALLOCATED;
3089 free_ring(sc, eq->desc_tag, eq->desc_map, eq->ba, eq->desc);
3091 if (mtx_initialized(&eq->eq_lock))
3092 mtx_destroy(&eq->eq_lock);
3094 bzero(eq, sizeof(*eq));
3099 alloc_wrq(struct adapter *sc, struct port_info *pi, struct sge_wrq *wrq,
3100 struct sysctl_oid *oid)
3103 struct sysctl_ctx_list *ctx = pi ? &pi->ctx : &sc->ctx;
3104 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
3106 rc = alloc_eq(sc, pi, &wrq->eq);
3111 STAILQ_INIT(&wrq->wr_list);
3113 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
3114 &wrq->eq.cntxt_id, 0, "SGE context id of the queue");
3115 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx",
3116 CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.cidx, 0, sysctl_uint16, "I",
3118 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "pidx",
3119 CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.pidx, 0, sysctl_uint16, "I",
3121 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs", CTLFLAG_RD,
3122 &wrq->tx_wrs, "# of work requests");
3123 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "no_desc", CTLFLAG_RD,
3125 "# of times queue ran out of hardware descriptors");
3126 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "unstalled", CTLFLAG_RD,
3127 &wrq->eq.unstalled, 0, "# of times queue recovered after stall");
3133 free_wrq(struct adapter *sc, struct sge_wrq *wrq)
3137 rc = free_eq(sc, &wrq->eq);
3141 bzero(wrq, sizeof(*wrq));
3146 alloc_txq(struct port_info *pi, struct sge_txq *txq, int idx,
3147 struct sysctl_oid *oid)
3150 struct adapter *sc = pi->adapter;
3151 struct sge_eq *eq = &txq->eq;
3153 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
3155 rc = alloc_eq(sc, pi, eq);
3161 txq->sdesc = malloc(eq->cap * sizeof(struct tx_sdesc), M_CXGBE,
3163 txq->br = buf_ring_alloc(eq->qsize, M_CXGBE, M_WAITOK, &eq->eq_lock);
3165 rc = bus_dma_tag_create(sc->dmat, 1, 0, BUS_SPACE_MAXADDR,
3166 BUS_SPACE_MAXADDR, NULL, NULL, 64 * 1024, TX_SGL_SEGS,
3167 BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL, NULL, &txq->tx_tag);
3169 device_printf(sc->dev,
3170 "failed to create tx DMA tag: %d\n", rc);
3175 * We can stuff ~10 frames in an 8-descriptor txpkts WR (8 is the SGE
3176 * limit for any WR). txq->no_dmamap events shouldn't occur if maps is
3177 * sized for the worst case.
3179 rc = t4_alloc_tx_maps(&txq->txmaps, txq->tx_tag, eq->qsize * 10 / 8,
3182 device_printf(sc->dev, "failed to setup tx DMA maps: %d\n", rc);
3186 snprintf(name, sizeof(name), "%d", idx);
3187 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
3189 children = SYSCTL_CHILDREN(oid);
3191 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
3192 &eq->cntxt_id, 0, "SGE context id of the queue");
3193 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
3194 CTLTYPE_INT | CTLFLAG_RD, &eq->cidx, 0, sysctl_uint16, "I",
3196 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "pidx",
3197 CTLTYPE_INT | CTLFLAG_RD, &eq->pidx, 0, sysctl_uint16, "I",
3200 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txcsum", CTLFLAG_RD,
3201 &txq->txcsum, "# of times hardware assisted with checksum");
3202 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_insertion",
3203 CTLFLAG_RD, &txq->vlan_insertion,
3204 "# of times hardware inserted 802.1Q tag");
3205 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "tso_wrs", CTLFLAG_RD,
3206 &txq->tso_wrs, "# of TSO work requests");
3207 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "imm_wrs", CTLFLAG_RD,
3208 &txq->imm_wrs, "# of work requests with immediate data");
3209 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "sgl_wrs", CTLFLAG_RD,
3210 &txq->sgl_wrs, "# of work requests with direct SGL");
3211 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkt_wrs", CTLFLAG_RD,
3212 &txq->txpkt_wrs, "# of txpkt work requests (one pkt/WR)");
3213 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkts_wrs", CTLFLAG_RD,
3214 &txq->txpkts_wrs, "# of txpkts work requests (multiple pkts/WR)");
3215 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkts_pkts", CTLFLAG_RD,
3216 &txq->txpkts_pkts, "# of frames tx'd using txpkts work requests");
3218 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "br_drops", CTLFLAG_RD,
3219 &txq->br->br_drops, "# of drops in the buf_ring for this queue");
3220 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "no_dmamap", CTLFLAG_RD,
3221 &txq->no_dmamap, 0, "# of times txq ran out of DMA maps");
3222 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "no_desc", CTLFLAG_RD,
3223 &txq->no_desc, 0, "# of times txq ran out of hardware descriptors");
3224 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "egr_update", CTLFLAG_RD,
3225 &eq->egr_update, 0, "egress update notifications from the SGE");
3226 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "unstalled", CTLFLAG_RD,
3227 &eq->unstalled, 0, "# of times txq recovered after stall");
3233 free_txq(struct port_info *pi, struct sge_txq *txq)
3236 struct adapter *sc = pi->adapter;
3237 struct sge_eq *eq = &txq->eq;
3239 rc = free_eq(sc, eq);
3243 free(txq->sdesc, M_CXGBE);
3245 if (txq->txmaps.maps)
3246 t4_free_tx_maps(&txq->txmaps, txq->tx_tag);
3248 buf_ring_free(txq->br, M_CXGBE);
3251 bus_dma_tag_destroy(txq->tx_tag);
3253 bzero(txq, sizeof(*txq));
3258 oneseg_dma_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3260 bus_addr_t *ba = arg;
3263 ("%s meant for single segment mappings only.", __func__));
3265 *ba = error ? 0 : segs->ds_addr;
3269 ring_fl_db(struct adapter *sc, struct sge_fl *fl)
3273 n = IDXDIFF(fl->pidx / 8, fl->dbidx, fl->sidx);
3277 v = fl->dbval | V_PIDX(n);
3279 *fl->udb = htole32(v);
3281 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), v);
3282 IDXINCR(fl->dbidx, n, fl->sidx);
3286 * Fills up the freelist by allocating upto 'n' buffers. Buffers that are
3287 * recycled do not count towards this allocation budget.
3289 * Returns non-zero to indicate that this freelist should be added to the list
3290 * of starving freelists.
3293 refill_fl(struct adapter *sc, struct sge_fl *fl, int n)
3296 struct fl_sdesc *sd;
3299 struct cluster_layout *cll;
3300 struct sw_zone_info *swz;
3301 struct cluster_metadata *clm;
3303 uint16_t hw_cidx = fl->hw_cidx; /* stable snapshot */
3305 FL_LOCK_ASSERT_OWNED(fl);
3308 * We always stop at the begining of the hardware descriptor that's just
3309 * before the one with the hw cidx. This is to avoid hw pidx = hw cidx,
3310 * which would mean an empty freelist to the chip.
3312 max_pidx = __predict_false(hw_cidx == 0) ? fl->sidx - 1 : hw_cidx - 1;
3313 if (fl->pidx == max_pidx * 8)
3316 d = &fl->desc[fl->pidx];
3317 sd = &fl->sdesc[fl->pidx];
3318 cll = &fl->cll_def; /* default layout */
3319 swz = &sc->sge.sw_zone_info[cll->zidx];
3323 if (sd->cl != NULL) {
3325 if (sd->nmbuf == 0) {
3327 * Fast recycle without involving any atomics on
3328 * the cluster's metadata (if the cluster has
3329 * metadata). This happens when all frames
3330 * received in the cluster were small enough to
3331 * fit within a single mbuf each.
3333 fl->cl_fast_recycled++;
3335 clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
3337 MPASS(clm->refcount == 1);
3343 * Cluster is guaranteed to have metadata. Clusters
3344 * without metadata always take the fast recycle path
3345 * when they're recycled.
3347 clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
3350 if (atomic_fetchadd_int(&clm->refcount, -1) == 1) {
3352 counter_u64_add(extfree_rels, 1);
3355 sd->cl = NULL; /* gave up my reference */
3357 MPASS(sd->cl == NULL);
3359 cl = uma_zalloc(swz->zone, M_NOWAIT);
3360 if (__predict_false(cl == NULL)) {
3361 if (cll == &fl->cll_alt || fl->cll_alt.zidx == -1 ||
3362 fl->cll_def.zidx == fl->cll_alt.zidx)
3365 /* fall back to the safe zone */
3367 swz = &sc->sge.sw_zone_info[cll->zidx];
3373 pa = pmap_kextract((vm_offset_t)cl);
3377 *d = htobe64(pa | cll->hwidx);
3378 clm = cl_metadata(sc, fl, cll, cl);
3390 if (__predict_false(++fl->pidx % 8 == 0)) {
3391 uint16_t pidx = fl->pidx / 8;
3393 if (__predict_false(pidx == fl->sidx)) {
3399 if (pidx == max_pidx)
3402 if (IDXDIFF(pidx, fl->dbidx, fl->sidx) >= 4)
3407 if (fl->pidx / 8 != fl->dbidx)
3410 return (FL_RUNNING_LOW(fl) && !(fl->flags & FL_STARVING));
3414 * Attempt to refill all starving freelists.
3417 refill_sfl(void *arg)
3419 struct adapter *sc = arg;
3420 struct sge_fl *fl, *fl_temp;
3422 mtx_lock(&sc->sfl_lock);
3423 TAILQ_FOREACH_SAFE(fl, &sc->sfl, link, fl_temp) {
3425 refill_fl(sc, fl, 64);
3426 if (FL_NOT_RUNNING_LOW(fl) || fl->flags & FL_DOOMED) {
3427 TAILQ_REMOVE(&sc->sfl, fl, link);
3428 fl->flags &= ~FL_STARVING;
3433 if (!TAILQ_EMPTY(&sc->sfl))
3434 callout_schedule(&sc->sfl_callout, hz / 5);
3435 mtx_unlock(&sc->sfl_lock);
3439 alloc_fl_sdesc(struct sge_fl *fl)
3442 fl->sdesc = malloc(fl->sidx * 8 * sizeof(struct fl_sdesc), M_CXGBE,
3449 free_fl_sdesc(struct adapter *sc, struct sge_fl *fl)
3451 struct fl_sdesc *sd;
3452 struct cluster_metadata *clm;
3453 struct cluster_layout *cll;
3457 for (i = 0; i < fl->sidx * 8; i++, sd++) {
3462 clm = cl_metadata(sc, fl, cll, sd->cl);
3464 uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
3465 else if (clm && atomic_fetchadd_int(&clm->refcount, -1) == 1) {
3466 uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
3467 counter_u64_add(extfree_rels, 1);
3472 free(fl->sdesc, M_CXGBE);
3477 t4_alloc_tx_maps(struct tx_maps *txmaps, bus_dma_tag_t tx_tag, int count,
3483 txmaps->map_total = txmaps->map_avail = count;
3484 txmaps->map_cidx = txmaps->map_pidx = 0;
3486 txmaps->maps = malloc(count * sizeof(struct tx_map), M_CXGBE,
3490 for (i = 0; i < count; i++, txm++) {
3491 rc = bus_dmamap_create(tx_tag, 0, &txm->map);
3500 bus_dmamap_destroy(tx_tag, txm->map);
3502 KASSERT(txm == txmaps->maps, ("%s: EDOOFUS", __func__));
3504 free(txmaps->maps, M_CXGBE);
3505 txmaps->maps = NULL;
3511 t4_free_tx_maps(struct tx_maps *txmaps, bus_dma_tag_t tx_tag)
3517 for (i = 0; i < txmaps->map_total; i++, txm++) {
3520 bus_dmamap_unload(tx_tag, txm->map);
3525 bus_dmamap_destroy(tx_tag, txm->map);
3528 free(txmaps->maps, M_CXGBE);
3529 txmaps->maps = NULL;
3533 * We'll do immediate data tx for non-TSO, but only when not coalescing. We're
3534 * willing to use upto 2 hardware descriptors which means a maximum of 96 bytes
3535 * of immediate data.
3539 - sizeof(struct fw_eth_tx_pkt_wr) \
3540 - sizeof(struct cpl_tx_pkt_core))
3543 * Returns non-zero on failure, no need to cleanup anything in that case.
3545 * Note 1: We always try to defrag the mbuf if required and return EFBIG only
3546 * if the resulting chain still won't fit in a tx descriptor.
3548 * Note 2: We'll pullup the mbuf chain if TSO is requested and the first mbuf
3549 * does not have the TCP header in it.
3552 get_pkt_sgl(struct sge_txq *txq, struct mbuf **fp, struct sgl *sgl,
3555 struct mbuf *m = *fp;
3556 struct tx_maps *txmaps;
3558 int rc, defragged = 0, n;
3560 TXQ_LOCK_ASSERT_OWNED(txq);
3562 if (m->m_pkthdr.tso_segsz)
3563 sgl_only = 1; /* Do not allow immediate data with LSO */
3565 start: sgl->nsegs = 0;
3567 if (m->m_pkthdr.len <= IMM_LEN && !sgl_only)
3568 return (0); /* nsegs = 0 tells caller to use imm. tx */
3570 txmaps = &txq->txmaps;
3571 if (txmaps->map_avail == 0) {
3575 txm = &txmaps->maps[txmaps->map_pidx];
3577 if (m->m_pkthdr.tso_segsz && m->m_len < 50) {
3578 *fp = m_pullup(m, 50);
3584 rc = bus_dmamap_load_mbuf_sg(txq->tx_tag, txm->map, m, sgl->seg,
3585 &sgl->nsegs, BUS_DMA_NOWAIT);
3586 if (rc == EFBIG && defragged == 0) {
3587 m = m_defrag(m, M_NOWAIT);
3599 txmaps->map_avail--;
3600 if (++txmaps->map_pidx == txmaps->map_total)
3601 txmaps->map_pidx = 0;
3603 KASSERT(sgl->nsegs > 0 && sgl->nsegs <= TX_SGL_SEGS,
3604 ("%s: bad DMA mapping (%d segments)", __func__, sgl->nsegs));
3607 * Store the # of flits required to hold this frame's SGL in nflits. An
3608 * SGL has a (ULPTX header + len0, addr0) tuple optionally followed by
3609 * multiple (len0 + len1, addr0, addr1) tuples. If addr1 is not used
3610 * then len1 must be set to 0.
3613 sgl->nflits = (3 * n) / 2 + (n & 1) + 2;
3620 * Releases all the txq resources used up in the specified sgl.
3623 free_pkt_sgl(struct sge_txq *txq, struct sgl *sgl)
3625 struct tx_maps *txmaps;
3628 TXQ_LOCK_ASSERT_OWNED(txq);
3630 if (sgl->nsegs == 0)
3631 return (0); /* didn't use any map */
3633 txmaps = &txq->txmaps;
3635 /* 1 pkt uses exactly 1 map, back it out */
3637 txmaps->map_avail++;
3638 if (txmaps->map_pidx > 0)
3641 txmaps->map_pidx = txmaps->map_total - 1;
3643 txm = &txmaps->maps[txmaps->map_pidx];
3644 bus_dmamap_unload(txq->tx_tag, txm->map);
3651 write_txpkt_wr(struct port_info *pi, struct sge_txq *txq, struct mbuf *m,
3654 struct sge_eq *eq = &txq->eq;
3655 struct fw_eth_tx_pkt_wr *wr;
3656 struct cpl_tx_pkt_core *cpl;
3657 uint32_t ctrl; /* used in many unrelated places */
3659 int nflits, ndesc, pktlen;
3660 struct tx_sdesc *txsd;
3663 TXQ_LOCK_ASSERT_OWNED(txq);
3665 pktlen = m->m_pkthdr.len;
3668 * Do we have enough flits to send this frame out?
3670 ctrl = sizeof(struct cpl_tx_pkt_core);
3671 if (m->m_pkthdr.tso_segsz) {
3672 nflits = TXPKT_LSO_WR_HDR;
3673 ctrl += sizeof(struct cpl_tx_pkt_lso_core);
3675 nflits = TXPKT_WR_HDR;
3677 nflits += sgl->nflits;
3679 nflits += howmany(pktlen, 8);
3682 ndesc = howmany(nflits, 8);
3683 if (ndesc > eq->avail)
3686 /* Firmware work request header */
3687 wr = (void *)&eq->desc[eq->pidx];
3688 wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |
3689 V_FW_ETH_TX_PKT_WR_IMMDLEN(ctrl));
3690 ctrl = V_FW_WR_LEN16(howmany(nflits, 2));
3691 if (eq->avail == ndesc) {
3692 if (!(eq->flags & EQ_CRFLUSHED)) {
3693 ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
3694 eq->flags |= EQ_CRFLUSHED;
3696 eq->flags |= EQ_STALLED;
3699 wr->equiq_to_len16 = htobe32(ctrl);
3702 if (m->m_pkthdr.tso_segsz) {
3703 struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1);
3704 struct ether_header *eh;
3706 #if defined(INET) || defined(INET6)
3711 ctrl = V_LSO_OPCODE(CPL_TX_PKT_LSO) | F_LSO_FIRST_SLICE |
3714 eh = mtod(m, struct ether_header *);
3715 eh_type = ntohs(eh->ether_type);
3716 if (eh_type == ETHERTYPE_VLAN) {
3717 struct ether_vlan_header *evh = (void *)eh;
3719 ctrl |= V_LSO_ETHHDR_LEN(1);
3721 eh_type = ntohs(evh->evl_proto);
3727 case ETHERTYPE_IPV6:
3729 struct ip6_hdr *ip6 = l3hdr;
3732 * XXX-BZ For now we do not pretend to support
3733 * IPv6 extension headers.
3735 KASSERT(ip6->ip6_nxt == IPPROTO_TCP, ("%s: CSUM_TSO "
3736 "with ip6_nxt != TCP: %u", __func__, ip6->ip6_nxt));
3737 tcp = (struct tcphdr *)(ip6 + 1);
3739 ctrl |= V_LSO_IPHDR_LEN(sizeof(*ip6) >> 2) |
3740 V_LSO_TCPHDR_LEN(tcp->th_off);
3747 struct ip *ip = l3hdr;
3749 tcp = (void *)((uintptr_t)ip + ip->ip_hl * 4);
3750 ctrl |= V_LSO_IPHDR_LEN(ip->ip_hl) |
3751 V_LSO_TCPHDR_LEN(tcp->th_off);
3756 panic("%s: CSUM_TSO but no supported IP version "
3757 "(0x%04x)", __func__, eh_type);
3760 lso->lso_ctrl = htobe32(ctrl);
3761 lso->ipid_ofst = htobe16(0);
3762 lso->mss = htobe16(m->m_pkthdr.tso_segsz);
3763 lso->seqno_offset = htobe32(0);
3764 lso->len = htobe32(pktlen);
3766 cpl = (void *)(lso + 1);
3770 cpl = (void *)(wr + 1);
3772 /* Checksum offload */
3774 if (!(m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)))
3775 ctrl1 |= F_TXPKT_IPCSUM_DIS;
3776 if (!(m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
3777 CSUM_TCP_IPV6 | CSUM_TSO)))
3778 ctrl1 |= F_TXPKT_L4CSUM_DIS;
3779 if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
3780 CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
3781 txq->txcsum++; /* some hardware assistance provided */
3783 /* VLAN tag insertion */
3784 if (m->m_flags & M_VLANTAG) {
3785 ctrl1 |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
3786 txq->vlan_insertion++;
3790 cpl->ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3791 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(pi->adapter->pf));
3793 cpl->len = htobe16(pktlen);
3794 cpl->ctrl1 = htobe64(ctrl1);
3796 /* Software descriptor */
3797 txsd = &txq->sdesc[eq->pidx];
3798 txsd->desc_used = ndesc;
3800 eq->pending += ndesc;
3803 if (eq->pidx >= eq->cap)
3804 eq->pidx -= eq->cap;
3807 dst = (void *)(cpl + 1);
3808 if (sgl->nsegs > 0) {
3811 write_sgl_to_txd(eq, sgl, &dst);
3815 for (; m; m = m->m_next) {
3816 copy_to_txd(eq, mtod(m, caddr_t), &dst, m->m_len);
3822 KASSERT(pktlen == 0, ("%s: %d bytes left.", __func__, pktlen));
3832 * Returns 0 to indicate that m has been accepted into a coalesced tx work
3833 * request. It has either been folded into txpkts or txpkts was flushed and m
3834 * has started a new coalesced work request (as the first frame in a fresh
3837 * Returns non-zero to indicate a failure - caller is responsible for
3838 * transmitting m, if there was anything in txpkts it has been flushed.
3841 add_to_txpkts(struct port_info *pi, struct sge_txq *txq, struct txpkts *txpkts,
3842 struct mbuf *m, struct sgl *sgl)
3844 struct sge_eq *eq = &txq->eq;
3846 struct tx_sdesc *txsd;
3849 TXQ_LOCK_ASSERT_OWNED(txq);
3851 KASSERT(sgl->nsegs, ("%s: can't coalesce imm data", __func__));
3853 if (txpkts->npkt > 0) {
3854 flits = TXPKTS_PKT_HDR + sgl->nflits;
3855 can_coalesce = m->m_pkthdr.tso_segsz == 0 &&
3856 txpkts->nflits + flits <= TX_WR_FLITS &&
3857 txpkts->nflits + flits <= eq->avail * 8 &&
3858 txpkts->plen + m->m_pkthdr.len < 65536;
3862 txpkts->nflits += flits;
3863 txpkts->plen += m->m_pkthdr.len;
3865 txsd = &txq->sdesc[eq->pidx];
3872 * Couldn't coalesce m into txpkts. The first order of business
3873 * is to send txpkts on its way. Then we'll revisit m.
3875 write_txpkts_wr(txq, txpkts);
3879 * Check if we can start a new coalesced tx work request with m as
3880 * the first packet in it.
3883 KASSERT(txpkts->npkt == 0, ("%s: txpkts not empty", __func__));
3885 flits = TXPKTS_WR_HDR + sgl->nflits;
3886 can_coalesce = m->m_pkthdr.tso_segsz == 0 &&
3887 flits <= eq->avail * 8 && flits <= TX_WR_FLITS;
3889 if (can_coalesce == 0)
3893 * Start a fresh coalesced tx WR with m as the first frame in it.
3896 txpkts->nflits = flits;
3897 txpkts->flitp = &eq->desc[eq->pidx].flit[2];
3898 txpkts->plen = m->m_pkthdr.len;
3900 txsd = &txq->sdesc[eq->pidx];
3907 * Note that write_txpkts_wr can never run out of hardware descriptors (but
3908 * write_txpkt_wr can). add_to_txpkts ensures that a frame is accepted for
3909 * coalescing only if sufficient hardware descriptors are available.
3912 write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts)
3914 struct sge_eq *eq = &txq->eq;
3915 struct fw_eth_tx_pkts_wr *wr;
3916 struct tx_sdesc *txsd;
3920 TXQ_LOCK_ASSERT_OWNED(txq);
3922 ndesc = howmany(txpkts->nflits, 8);
3924 wr = (void *)&eq->desc[eq->pidx];
3925 wr->op_pkd = htobe32(V_FW_WR_OP(FW_ETH_TX_PKTS_WR));
3926 ctrl = V_FW_WR_LEN16(howmany(txpkts->nflits, 2));
3927 if (eq->avail == ndesc) {
3928 if (!(eq->flags & EQ_CRFLUSHED)) {
3929 ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
3930 eq->flags |= EQ_CRFLUSHED;
3932 eq->flags |= EQ_STALLED;
3934 wr->equiq_to_len16 = htobe32(ctrl);
3935 wr->plen = htobe16(txpkts->plen);
3936 wr->npkt = txpkts->npkt;
3937 wr->r3 = wr->type = 0;
3939 /* Everything else already written */
3941 txsd = &txq->sdesc[eq->pidx];
3942 txsd->desc_used = ndesc;
3944 KASSERT(eq->avail >= ndesc, ("%s: out of descriptors", __func__));
3946 eq->pending += ndesc;
3949 if (eq->pidx >= eq->cap)
3950 eq->pidx -= eq->cap;
3952 txq->txpkts_pkts += txpkts->npkt;
3954 txpkts->npkt = 0; /* emptied */
3958 write_ulp_cpl_sgl(struct port_info *pi, struct sge_txq *txq,
3959 struct txpkts *txpkts, struct mbuf *m, struct sgl *sgl)
3961 struct ulp_txpkt *ulpmc;
3962 struct ulptx_idata *ulpsc;
3963 struct cpl_tx_pkt_core *cpl;
3964 struct sge_eq *eq = &txq->eq;
3965 uintptr_t flitp, start, end;
3969 KASSERT(txpkts->npkt > 0, ("%s: txpkts is empty", __func__));
3971 start = (uintptr_t)eq->desc;
3972 end = (uintptr_t)eq->spg;
3974 /* Checksum offload */
3976 if (!(m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)))
3977 ctrl |= F_TXPKT_IPCSUM_DIS;
3978 if (!(m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
3979 CSUM_TCP_IPV6 | CSUM_TSO)))
3980 ctrl |= F_TXPKT_L4CSUM_DIS;
3981 if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
3982 CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
3983 txq->txcsum++; /* some hardware assistance provided */
3985 /* VLAN tag insertion */
3986 if (m->m_flags & M_VLANTAG) {
3987 ctrl |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
3988 txq->vlan_insertion++;
3992 * The previous packet's SGL must have ended at a 16 byte boundary (this
3993 * is required by the firmware/hardware). It follows that flitp cannot
3994 * wrap around between the ULPTX master command and ULPTX subcommand (8
3995 * bytes each), and that it can not wrap around in the middle of the
3996 * cpl_tx_pkt_core either.
3998 flitp = (uintptr_t)txpkts->flitp;
3999 KASSERT((flitp & 0xf) == 0,
4000 ("%s: last SGL did not end at 16 byte boundary: %p",
4001 __func__, txpkts->flitp));
4003 /* ULP master command */
4004 ulpmc = (void *)flitp;
4005 ulpmc->cmd_dest = htonl(V_ULPTX_CMD(ULP_TX_PKT) | V_ULP_TXPKT_DEST(0) |
4006 V_ULP_TXPKT_FID(eq->iqid));
4007 ulpmc->len = htonl(howmany(sizeof(*ulpmc) + sizeof(*ulpsc) +
4008 sizeof(*cpl) + 8 * sgl->nflits, 16));
4010 /* ULP subcommand */
4011 ulpsc = (void *)(ulpmc + 1);
4012 ulpsc->cmd_more = htobe32(V_ULPTX_CMD((u32)ULP_TX_SC_IMM) |
4014 ulpsc->len = htobe32(sizeof(struct cpl_tx_pkt_core));
4016 flitp += sizeof(*ulpmc) + sizeof(*ulpsc);
4021 cpl = (void *)flitp;
4022 cpl->ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
4023 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(pi->adapter->pf));
4025 cpl->len = htobe16(m->m_pkthdr.len);
4026 cpl->ctrl1 = htobe64(ctrl);
4028 flitp += sizeof(*cpl);
4032 /* SGL for this frame */
4033 dst = (caddr_t)flitp;
4034 txpkts->nflits += write_sgl_to_txd(eq, sgl, &dst);
4035 txpkts->flitp = (void *)dst;
4037 KASSERT(((uintptr_t)dst & 0xf) == 0,
4038 ("%s: SGL ends at %p (not a 16 byte boundary)", __func__, dst));
4042 * If the SGL ends on an address that is not 16 byte aligned, this function will
4043 * add a 0 filled flit at the end. It returns 1 in that case.
4046 write_sgl_to_txd(struct sge_eq *eq, struct sgl *sgl, caddr_t *to)
4048 __be64 *flitp, *end;
4049 struct ulptx_sgl *usgl;
4050 bus_dma_segment_t *seg;
4053 KASSERT(sgl->nsegs > 0 && sgl->nflits > 0,
4054 ("%s: bad SGL - nsegs=%d, nflits=%d",
4055 __func__, sgl->nsegs, sgl->nflits));
4057 KASSERT(((uintptr_t)(*to) & 0xf) == 0,
4058 ("%s: SGL must start at a 16 byte boundary: %p", __func__, *to));
4060 flitp = (__be64 *)(*to);
4061 end = flitp + sgl->nflits;
4063 usgl = (void *)flitp;
4066 * We start at a 16 byte boundary somewhere inside the tx descriptor
4067 * ring, so we're at least 16 bytes away from the status page. There is
4068 * no chance of a wrap around in the middle of usgl (which is 16 bytes).
4071 usgl->cmd_nsge = htobe32(V_ULPTX_CMD(ULP_TX_SC_DSGL) |
4072 V_ULPTX_NSGE(sgl->nsegs));
4073 usgl->len0 = htobe32(seg->ds_len);
4074 usgl->addr0 = htobe64(seg->ds_addr);
4077 if ((uintptr_t)end <= (uintptr_t)eq->spg) {
4079 /* Won't wrap around at all */
4081 for (i = 0; i < sgl->nsegs - 1; i++, seg++) {
4082 usgl->sge[i / 2].len[i & 1] = htobe32(seg->ds_len);
4083 usgl->sge[i / 2].addr[i & 1] = htobe64(seg->ds_addr);
4086 usgl->sge[i / 2].len[1] = htobe32(0);
4089 /* Will wrap somewhere in the rest of the SGL */
4091 /* 2 flits already written, write the rest flit by flit */
4092 flitp = (void *)(usgl + 1);
4093 for (i = 0; i < sgl->nflits - 2; i++) {
4094 if ((uintptr_t)flitp == (uintptr_t)eq->spg)
4095 flitp = (void *)eq->desc;
4096 *flitp++ = get_flit(seg, sgl->nsegs - 1, i);
4101 if ((uintptr_t)end & 0xf) {
4102 *(uint64_t *)end = 0;
4108 if ((uintptr_t)end == (uintptr_t)eq->spg)
4109 *to = (void *)eq->desc;
4117 copy_to_txd(struct sge_eq *eq, caddr_t from, caddr_t *to, int len)
4119 if (__predict_true((uintptr_t)(*to) + len <= (uintptr_t)eq->spg)) {
4120 bcopy(from, *to, len);
4123 int portion = (uintptr_t)eq->spg - (uintptr_t)(*to);
4125 bcopy(from, *to, portion);
4127 portion = len - portion; /* remaining */
4128 bcopy(from, (void *)eq->desc, portion);
4129 (*to) = (caddr_t)eq->desc + portion;
4134 ring_eq_db(struct adapter *sc, struct sge_eq *eq)
4139 pending = eq->pending;
4141 clrbit(&db, DOORBELL_WCWR);
4145 switch (ffs(db) - 1) {
4147 *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(pending));
4150 case DOORBELL_WCWR: {
4151 volatile uint64_t *dst, *src;
4155 * Queues whose 128B doorbell segment fits in the page do not
4156 * use relative qid (udb_qid is always 0). Only queues with
4157 * doorbell segments can do WCWR.
4159 KASSERT(eq->udb_qid == 0 && pending == 1,
4160 ("%s: inappropriate doorbell (0x%x, %d, %d) for eq %p",
4161 __func__, eq->doorbells, pending, eq->pidx, eq));
4163 dst = (volatile void *)((uintptr_t)eq->udb + UDBS_WR_OFFSET -
4165 i = eq->pidx ? eq->pidx - 1 : eq->cap - 1;
4166 src = (void *)&eq->desc[i];
4167 while (src != (void *)&eq->desc[i + 1])
4173 case DOORBELL_UDBWC:
4174 *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(pending));
4179 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
4180 V_QID(eq->cntxt_id) | V_PIDX(pending));
4186 reclaimable(struct sge_eq *eq)
4190 cidx = eq->spg->cidx; /* stable snapshot */
4191 cidx = be16toh(cidx);
4193 if (cidx >= eq->cidx)
4194 return (cidx - eq->cidx);
4196 return (cidx + eq->cap - eq->cidx);
4200 * There are "can_reclaim" tx descriptors ready to be reclaimed. Reclaim as
4201 * many as possible but stop when there are around "n" mbufs to free.
4203 * The actual number reclaimed is provided as the return value.
4206 reclaim_tx_descs(struct sge_txq *txq, int can_reclaim, int n)
4208 struct tx_sdesc *txsd;
4209 struct tx_maps *txmaps;
4211 unsigned int reclaimed, maps;
4212 struct sge_eq *eq = &txq->eq;
4214 TXQ_LOCK_ASSERT_OWNED(txq);
4216 if (can_reclaim == 0)
4217 can_reclaim = reclaimable(eq);
4219 maps = reclaimed = 0;
4220 while (can_reclaim && maps < n) {
4223 txsd = &txq->sdesc[eq->cidx];
4224 ndesc = txsd->desc_used;
4226 /* Firmware doesn't return "partial" credits. */
4227 KASSERT(can_reclaim >= ndesc,
4228 ("%s: unexpected number of credits: %d, %d",
4229 __func__, can_reclaim, ndesc));
4231 maps += txsd->credits;
4234 can_reclaim -= ndesc;
4237 if (__predict_false(eq->cidx >= eq->cap))
4238 eq->cidx -= eq->cap;
4241 txmaps = &txq->txmaps;
4242 txm = &txmaps->maps[txmaps->map_cidx];
4246 eq->avail += reclaimed;
4247 KASSERT(eq->avail < eq->cap, /* avail tops out at (cap - 1) */
4248 ("%s: too many descriptors available", __func__));
4250 txmaps->map_avail += maps;
4251 KASSERT(txmaps->map_avail <= txmaps->map_total,
4252 ("%s: too many maps available", __func__));
4255 struct tx_map *next;
4258 if (__predict_false(txmaps->map_cidx + 1 == txmaps->map_total))
4259 next = txmaps->maps;
4262 bus_dmamap_unload(txq->tx_tag, txm->map);
4267 if (__predict_false(++txmaps->map_cidx == txmaps->map_total))
4268 txmaps->map_cidx = 0;
4275 write_eqflush_wr(struct sge_eq *eq)
4277 struct fw_eq_flush_wr *wr;
4279 EQ_LOCK_ASSERT_OWNED(eq);
4280 KASSERT(eq->avail > 0, ("%s: no descriptors left.", __func__));
4281 KASSERT(!(eq->flags & EQ_CRFLUSHED), ("%s: flushed already", __func__));
4283 wr = (void *)&eq->desc[eq->pidx];
4284 bzero(wr, sizeof(*wr));
4285 wr->opcode = FW_EQ_FLUSH_WR;
4286 wr->equiq_to_len16 = htobe32(V_FW_WR_LEN16(sizeof(*wr) / 16) |
4287 F_FW_WR_EQUEQ | F_FW_WR_EQUIQ);
4289 eq->flags |= (EQ_CRFLUSHED | EQ_STALLED);
4292 if (++eq->pidx == eq->cap)
4297 get_flit(bus_dma_segment_t *sgl, int nsegs, int idx)
4299 int i = (idx / 3) * 2;
4305 rc = htobe32(sgl[i].ds_len);
4307 rc |= (uint64_t)htobe32(sgl[i + 1].ds_len) << 32;
4312 return htobe64(sgl[i].ds_addr);
4314 return htobe64(sgl[i + 1].ds_addr);
4321 find_best_refill_source(struct adapter *sc, struct sge_fl *fl, int maxp)
4323 int8_t zidx, hwidx, idx;
4324 uint16_t region1, region3;
4325 int spare, spare_needed, n;
4326 struct sw_zone_info *swz;
4327 struct hw_buf_info *hwb, *hwb_list = &sc->sge.hw_buf_info[0];
4330 * Buffer Packing: Look for PAGE_SIZE or larger zone which has a bufsize
4331 * large enough for the max payload and cluster metadata. Otherwise
4332 * settle for the largest bufsize that leaves enough room in the cluster
4335 * Without buffer packing: Look for the smallest zone which has a
4336 * bufsize large enough for the max payload. Settle for the largest
4337 * bufsize available if there's nothing big enough for max payload.
4339 spare_needed = fl->flags & FL_BUF_PACKING ? CL_METADATA_SIZE : 0;
4340 swz = &sc->sge.sw_zone_info[0];
4342 for (zidx = 0; zidx < SW_ZONE_SIZES; zidx++, swz++) {
4343 if (swz->size > largest_rx_cluster) {
4344 if (__predict_true(hwidx != -1))
4348 * This is a misconfiguration. largest_rx_cluster is
4349 * preventing us from finding a refill source. See
4350 * dev.t5nex.<n>.buffer_sizes to figure out why.
4352 device_printf(sc->dev, "largest_rx_cluster=%u leaves no"
4353 " refill source for fl %p (dma %u). Ignored.\n",
4354 largest_rx_cluster, fl, maxp);
4356 for (idx = swz->head_hwidx; idx != -1; idx = hwb->next) {
4357 hwb = &hwb_list[idx];
4358 spare = swz->size - hwb->size;
4359 if (spare < spare_needed)
4362 hwidx = idx; /* best option so far */
4363 if (hwb->size >= maxp) {
4365 if ((fl->flags & FL_BUF_PACKING) == 0)
4366 goto done; /* stop looking (not packing) */
4368 if (swz->size >= safest_rx_cluster)
4369 goto done; /* stop looking (packing) */
4371 break; /* keep looking, next zone */
4375 /* A usable hwidx has been located. */
4377 hwb = &hwb_list[hwidx];
4379 swz = &sc->sge.sw_zone_info[zidx];
4381 region3 = swz->size - hwb->size;
4384 * Stay within this zone and see if there is a better match when mbuf
4385 * inlining is allowed. Remember that the hwidx's are sorted in
4386 * decreasing order of size (so in increasing order of spare area).
4388 for (idx = hwidx; idx != -1; idx = hwb->next) {
4389 hwb = &hwb_list[idx];
4390 spare = swz->size - hwb->size;
4392 if (allow_mbufs_in_cluster == 0 || hwb->size < maxp)
4396 * Do not inline mbufs if doing so would violate the pad/pack
4397 * boundary alignment requirement.
4399 if (fl_pad && (MSIZE % sc->sge.pad_boundary) != 0)
4401 if (fl->flags & FL_BUF_PACKING &&
4402 (MSIZE % sc->sge.pack_boundary) != 0)
4405 if (spare < CL_METADATA_SIZE + MSIZE)
4407 n = (spare - CL_METADATA_SIZE) / MSIZE;
4408 if (n > howmany(hwb->size, maxp))
4412 if (fl->flags & FL_BUF_PACKING) {
4413 region1 = n * MSIZE;
4414 region3 = spare - region1;
4417 region3 = spare - region1;
4422 KASSERT(zidx >= 0 && zidx < SW_ZONE_SIZES,
4423 ("%s: bad zone %d for fl %p, maxp %d", __func__, zidx, fl, maxp));
4424 KASSERT(hwidx >= 0 && hwidx <= SGE_FLBUF_SIZES,
4425 ("%s: bad hwidx %d for fl %p, maxp %d", __func__, hwidx, fl, maxp));
4426 KASSERT(region1 + sc->sge.hw_buf_info[hwidx].size + region3 ==
4427 sc->sge.sw_zone_info[zidx].size,
4428 ("%s: bad buffer layout for fl %p, maxp %d. "
4429 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4430 sc->sge.sw_zone_info[zidx].size, region1,
4431 sc->sge.hw_buf_info[hwidx].size, region3));
4432 if (fl->flags & FL_BUF_PACKING || region1 > 0) {
4433 KASSERT(region3 >= CL_METADATA_SIZE,
4434 ("%s: no room for metadata. fl %p, maxp %d; "
4435 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4436 sc->sge.sw_zone_info[zidx].size, region1,
4437 sc->sge.hw_buf_info[hwidx].size, region3));
4438 KASSERT(region1 % MSIZE == 0,
4439 ("%s: bad mbuf region for fl %p, maxp %d. "
4440 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4441 sc->sge.sw_zone_info[zidx].size, region1,
4442 sc->sge.hw_buf_info[hwidx].size, region3));
4445 fl->cll_def.zidx = zidx;
4446 fl->cll_def.hwidx = hwidx;
4447 fl->cll_def.region1 = region1;
4448 fl->cll_def.region3 = region3;
4452 find_safe_refill_source(struct adapter *sc, struct sge_fl *fl)
4454 struct sge *s = &sc->sge;
4455 struct hw_buf_info *hwb;
4456 struct sw_zone_info *swz;
4460 if (fl->flags & FL_BUF_PACKING)
4461 hwidx = s->safe_hwidx2; /* with room for metadata */
4462 else if (allow_mbufs_in_cluster && s->safe_hwidx2 != -1) {
4463 hwidx = s->safe_hwidx2;
4464 hwb = &s->hw_buf_info[hwidx];
4465 swz = &s->sw_zone_info[hwb->zidx];
4466 spare = swz->size - hwb->size;
4468 /* no good if there isn't room for an mbuf as well */
4469 if (spare < CL_METADATA_SIZE + MSIZE)
4470 hwidx = s->safe_hwidx1;
4472 hwidx = s->safe_hwidx1;
4475 /* No fallback source */
4476 fl->cll_alt.hwidx = -1;
4477 fl->cll_alt.zidx = -1;
4482 hwb = &s->hw_buf_info[hwidx];
4483 swz = &s->sw_zone_info[hwb->zidx];
4484 spare = swz->size - hwb->size;
4485 fl->cll_alt.hwidx = hwidx;
4486 fl->cll_alt.zidx = hwb->zidx;
4487 if (allow_mbufs_in_cluster &&
4488 (fl_pad == 0 || (MSIZE % sc->sge.pad_boundary) == 0) &&
4489 (!(fl->flags & FL_BUF_PACKING) || (MSIZE % sc->sge.pack_boundary) == 0))
4490 fl->cll_alt.region1 = ((spare - CL_METADATA_SIZE) / MSIZE) * MSIZE;
4492 fl->cll_alt.region1 = 0;
4493 fl->cll_alt.region3 = spare - fl->cll_alt.region1;
4497 add_fl_to_sfl(struct adapter *sc, struct sge_fl *fl)
4499 mtx_lock(&sc->sfl_lock);
4501 if ((fl->flags & FL_DOOMED) == 0) {
4502 fl->flags |= FL_STARVING;
4503 TAILQ_INSERT_TAIL(&sc->sfl, fl, link);
4504 callout_reset(&sc->sfl_callout, hz / 5, refill_sfl, sc);
4507 mtx_unlock(&sc->sfl_lock);
4511 handle_sge_egr_update(struct sge_iq *iq, const struct rss_header *rss,
4514 const struct cpl_sge_egr_update *cpl = (const void *)(rss + 1);
4515 unsigned int qid = G_EGR_QID(ntohl(cpl->opcode_qid));
4516 struct adapter *sc = iq->adapter;
4517 struct sge *s = &sc->sge;
4520 KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4523 eq = s->eqmap[qid - s->eq_start];
4525 KASSERT(eq->flags & EQ_CRFLUSHED,
4526 ("%s: unsolicited egress update", __func__));
4527 eq->flags &= ~EQ_CRFLUSHED;
4530 if (__predict_false(eq->flags & EQ_DOOMED))
4532 else if (eq->flags & EQ_STALLED && can_resume_tx(eq))
4533 taskqueue_enqueue(sc->tq[eq->tx_chan], &eq->tx_task);
4539 /* handle_fw_msg works for both fw4_msg and fw6_msg because this is valid */
4540 CTASSERT(offsetof(struct cpl_fw4_msg, data) == \
4541 offsetof(struct cpl_fw6_msg, data));
4544 handle_fw_msg(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
4546 struct adapter *sc = iq->adapter;
4547 const struct cpl_fw6_msg *cpl = (const void *)(rss + 1);
4549 KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4552 if (cpl->type == FW_TYPE_RSSCPL || cpl->type == FW6_TYPE_RSSCPL) {
4553 const struct rss_header *rss2;
4555 rss2 = (const struct rss_header *)&cpl->data[0];
4556 return (sc->cpl_handler[rss2->opcode](iq, rss2, m));
4559 return (sc->fw_msg_handler[cpl->type](sc, &cpl->data[0]));
4563 sysctl_uint16(SYSCTL_HANDLER_ARGS)
4565 uint16_t *id = arg1;
4568 return sysctl_handle_int(oidp, &i, 0, req);
4572 sysctl_bufsizes(SYSCTL_HANDLER_ARGS)
4574 struct sge *s = arg1;
4575 struct hw_buf_info *hwb = &s->hw_buf_info[0];
4576 struct sw_zone_info *swz = &s->sw_zone_info[0];
4581 sbuf_new(&sb, NULL, 32, SBUF_AUTOEXTEND);
4582 for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) {
4583 if (hwb->zidx >= 0 && swz[hwb->zidx].size <= largest_rx_cluster)
4588 sbuf_printf(&sb, "%u%c ", hwb->size, c);
4592 rc = sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);