2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2018 Chelsio Communications, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include "opt_inet6.h"
34 #include <sys/param.h>
35 #include <sys/eventhandler.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/rwlock.h>
43 #include <sys/socket.h>
45 #include <netinet/in.h>
47 #include "common/common.h"
48 #include "common/t4_msg.h"
52 * Module locking notes: There is a RW lock protecting the SMAC table as a
53 * whole plus a spinlock per SMT entry. Entry lookups and allocations happen
54 * under the protection of the table lock, individual entry changes happen
55 * while holding that entry's spinlock. The table lock nests outside the
56 * entry locks. Allocations of new entries take the table lock as writers so
57 * no other lookups can happen while allocating new entries. Entry updates
58 * take the table lock as readers so multiple entries can be updated in
59 * parallel. An SMT entry can be dropped by decrementing its reference count
60 * and therefore can happen in parallel with entry allocation but no entry
61 * can change state or increment its ref count during allocation as both of
62 * these perform lookups.
64 * Note: We do not take references to ifnets in this module because both
65 * the TOE and the sockets already hold references to the interfaces and the
66 * lifetime of an SMT entry is fully contained in the lifetime of the TOE.
70 * Allocate a free SMT entry. Must be called with smt_data.lock held.
73 t4_find_or_alloc_sme(struct smt_data *s, uint8_t *smac)
75 struct smt_entry *end, *e;
76 struct smt_entry *first_free = NULL;
78 rw_assert(&s->lock, RA_WLOCKED);
79 for (e = &s->smtab[0], end = &s->smtab[s->smt_size]; e != end; ++e) {
80 if (atomic_load_acq_int(&e->refcnt) == 0) {
84 if (e->state == SMT_STATE_SWITCHING) {
86 * This entry is actually in use. See if we can
89 if (memcmp(e->smac, smac, ETHER_ADDR_LEN) == 0)
101 e->state = SMT_STATE_UNUSED;
103 atomic_add_int(&e->refcnt, 1);
108 * Write an SMT entry. Must be called with the entry locked.
111 t4_write_sme(struct smt_entry *e)
116 struct wrq_cookie cookie;
117 struct cpl_smt_write_req *req;
118 struct cpl_t6_smt_write_req *t6req;
121 mtx_assert(&e->lock, MA_OWNED);
123 MPASS(e->wrq != NULL);
126 MPASS(wrq->adapter != NULL);
130 if (chip_id(sc) <= CHELSIO_T5) {
131 /* Source MAC Table (SMT) contains 256 SMAC entries
132 * organized in 128 rows of 2 entries each.
134 req = start_wrq_wr(wrq, howmany(sizeof(*req), 16), &cookie);
138 /* Each row contains an SMAC pair.
139 * LSB selects the SMAC entry within a row
144 memcpy(req->src_mac1, e->smac, ETHER_ADDR_LEN);
145 /* fill pfvf0/src_mac0 with entry
146 * at prev index from smt-tab.
149 memcpy(req->src_mac0, s->smtab[e->idx - 1].smac,
153 memcpy(req->src_mac0, e->smac, ETHER_ADDR_LEN);
154 /* fill pfvf1/src_mac1 with entry
155 * at next index from smt-tab
158 memcpy(req->src_mac1, s->smtab[e->idx + 1].smac,
162 /* Source MAC Table (SMT) contains 256 SMAC entries */
163 t6req = start_wrq_wr(wrq, howmany(sizeof(*t6req), 16), &cookie);
166 INIT_TP_WR(t6req, 0);
167 req = (struct cpl_smt_write_req *)t6req;
169 /* fill pfvf0/src_mac0 from smt-tab */
171 memcpy(req->src_mac0, s->smtab[e->idx].smac, ETHER_ADDR_LEN);
174 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, e->idx |
175 V_TID_QID(e->iqid)));
176 req->params = htonl(V_SMTW_NORPL(0) |
178 V_SMTW_OVLAN_IDX(0));
180 commit_wrq_wr(wrq, req, &cookie);
186 * Allocate an SMT entry for use by a switching rule.
189 t4_smt_alloc_switching(struct smt_data *s, uint8_t *smac)
195 e = t4_find_or_alloc_sme(s, smac);
196 rw_wunlock(&s->lock);
201 * Sets/updates the contents of a switching SMT entry that has been allocated
202 * with an earlier call to @t4_smt_alloc_switching.
205 t4_smt_set_switching(struct adapter *sc, struct smt_entry *e, uint16_t pfvf,
210 if (atomic_load_acq_int(&e->refcnt) == 1) {
211 /* Setup the entry for the first time */
213 e->wrq = &sc->sge.ctrlq[0];
214 e->iqid = sc->sge.fwq.abs_id;
216 e->state = SMT_STATE_SWITCHING;
217 memcpy(e->smac, smac, ETHER_ADDR_LEN);
218 rc = t4_write_sme(e);
219 mtx_unlock(&e->lock);
226 t4_init_smt(struct adapter *sc, int flags)
232 s = malloc(sizeof(*s) + smt_size * sizeof (struct smt_entry), M_CXGBE,
237 s->smt_size = smt_size;
238 rw_init(&s->lock, "SMT");
240 for (i = 0; i < smt_size; i++) {
241 struct smt_entry *e = &s->smtab[i];
244 e->state = SMT_STATE_UNUSED;
245 mtx_init(&e->lock, "SMT_E", NULL, MTX_DEF);
246 atomic_store_rel_int(&e->refcnt, 0);
255 t4_free_smt(struct smt_data *s)
259 for (i = 0; i < s->smt_size; i++)
260 mtx_destroy(&s->smtab[i].lock);
261 rw_destroy(&s->lock);
268 do_smt_write_rpl(struct sge_iq *iq, const struct rss_header *rss,
271 struct adapter *sc = iq->adapter;
272 const struct cpl_smt_write_rpl *rpl = (const void *)(rss + 1);
273 unsigned int tid = GET_TID(rpl);
274 unsigned int smtidx = G_TID_TID(tid);
276 if (__predict_false(rpl->status != CPL_ERR_NONE)) {
277 struct smt_entry *e = &sc->smt->smtab[smtidx];
279 "Unexpected SMT_WRITE_RPL (%u) for entry at hw_idx %u\n",
280 rpl->status, smtidx);
282 e->state = SMT_STATE_ERROR;
283 mtx_unlock(&e->lock);
291 smt_state(const struct smt_entry *e)
294 case SMT_STATE_SWITCHING: return 'X';
295 case SMT_STATE_ERROR: return 'E';
301 sysctl_smt(SYSCTL_HANDLER_ARGS)
303 struct adapter *sc = arg1;
304 struct smt_data *smt = sc->smt;
307 int rc, i, header = 0;
312 rc = sysctl_wire_old_buffer(req, 0);
316 sb = sbuf_new_for_sysctl(NULL, NULL, SMT_SIZE, req);
321 for (i = 0; i < smt->smt_size; i++, e++) {
323 if (e->state == SMT_STATE_UNUSED)
327 sbuf_printf(sb, " Idx "
328 "Ethernet address State Users");
331 sbuf_printf(sb, "\n%4u %02x:%02x:%02x:%02x:%02x:%02x "
333 e->idx, e->smac[0], e->smac[1], e->smac[2],
334 e->smac[3], e->smac[4], e->smac[5],
335 smt_state(e), atomic_load_acq_int(&e->refcnt));
337 mtx_unlock(&e->lock);
340 rc = sbuf_finish(sb);