2 * Copyright (c) 2016 Chelsio Communications, Inc.
4 * Written by: John Baldwin <jhb@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include "opt_inet6.h"
34 #include <sys/param.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
40 #include <dev/pci/pcivar.h>
41 #if defined(__i386__) || defined(__amd64__)
46 #include "common/common.h"
47 #include "common/t4_regs.h"
49 #include "t4_mp_ring.h"
54 * The Virtual Interfaces are connected to an internal switch on the chip
55 * which allows VIs attached to the same port to talk to each other even when
56 * the port link is down. As a result, we might want to always report a
57 * VF's link as being "up".
59 * XXX: Add a TUNABLE and possible per-device sysctl for this?
62 struct intrs_and_queues {
63 uint16_t intr_type; /* MSI, or MSI-X */
64 uint16_t nirq; /* Total # of vectors */
65 uint16_t ntxq; /* # of NIC txq's for each port */
66 uint16_t nrxq; /* # of NIC rxq's for each port */
73 {0x4800, "Chelsio T440-dbg VF"},
74 {0x4801, "Chelsio T420-CR VF"},
75 {0x4802, "Chelsio T422-CR VF"},
76 {0x4803, "Chelsio T440-CR VF"},
77 {0x4804, "Chelsio T420-BCH VF"},
78 {0x4805, "Chelsio T440-BCH VF"},
79 {0x4806, "Chelsio T440-CH VF"},
80 {0x4807, "Chelsio T420-SO VF"},
81 {0x4808, "Chelsio T420-CX VF"},
82 {0x4809, "Chelsio T420-BT VF"},
83 {0x480a, "Chelsio T404-BT VF"},
84 {0x480e, "Chelsio T440-LP-CR VF"},
86 {0x5800, "Chelsio T580-dbg VF"},
87 {0x5801, "Chelsio T520-CR VF"}, /* 2 x 10G */
88 {0x5802, "Chelsio T522-CR VF"}, /* 2 x 10G, 2 X 1G */
89 {0x5803, "Chelsio T540-CR VF"}, /* 4 x 10G */
90 {0x5807, "Chelsio T520-SO VF"}, /* 2 x 10G, nomem */
91 {0x5809, "Chelsio T520-BT VF"}, /* 2 x 10GBaseT */
92 {0x580a, "Chelsio T504-BT VF"}, /* 4 x 1G */
93 {0x580d, "Chelsio T580-CR VF"}, /* 2 x 40G */
94 {0x580e, "Chelsio T540-LP-CR VF"}, /* 4 x 10G */
95 {0x5810, "Chelsio T580-LP-CR VF"}, /* 2 x 40G */
96 {0x5811, "Chelsio T520-LL-CR VF"}, /* 2 x 10G */
97 {0x5812, "Chelsio T560-CR VF"}, /* 1 x 40G, 2 x 10G */
98 {0x5814, "Chelsio T580-LP-SO-CR VF"}, /* 2 x 40G, nomem */
99 {0x5815, "Chelsio T502-BT VF"}, /* 2 x 1G */
100 {0x5818, "Chelsio T540-BT VF"}, /* 4 x 10GBaseT */
101 {0x5819, "Chelsio T540-LP-BT VF"}, /* 4 x 10GBaseT */
102 {0x581a, "Chelsio T540-SO-BT VF"}, /* 4 x 10GBaseT, nomem */
103 {0x581b, "Chelsio T540-SO-CR VF"}, /* 4 x 10G, nomem */
105 {0x6800, "Chelsio T6-DBG-25 VF"}, /* 2 x 10/25G, debug */
106 {0x6801, "Chelsio T6225-CR VF"}, /* 2 x 10/25G */
107 {0x6802, "Chelsio T6225-SO-CR VF"}, /* 2 x 10/25G, nomem */
108 {0x6803, "Chelsio T6425-CR VF"}, /* 4 x 10/25G */
109 {0x6804, "Chelsio T6425-SO-CR VF"}, /* 4 x 10/25G, nomem */
110 {0x6805, "Chelsio T6225-OCP-SO VF"}, /* 2 x 10/25G, nomem */
111 {0x6806, "Chelsio T62100-OCP-SO VF"}, /* 2 x 40/50/100G, nomem */
112 {0x6807, "Chelsio T62100-LP-CR VF"}, /* 2 x 40/50/100G */
113 {0x6808, "Chelsio T62100-SO-CR VF"}, /* 2 x 40/50/100G, nomem */
114 {0x6809, "Chelsio T6210-BT VF"}, /* 2 x 10GBASE-T */
115 {0x680d, "Chelsio T62100-CR VF"}, /* 2 x 40/50/100G */
116 {0x6810, "Chelsio T6-DBG-100 VF"}, /* 2 x 40/50/100G, debug */
117 {0x6811, "Chelsio T6225-LL-CR VF"}, /* 2 x 10/25G */
118 {0x6814, "Chelsio T61100-OCP-SO VF"}, /* 1 x 40/50/100G, nomem */
119 {0x6815, "Chelsio T6201-BT VF"}, /* 2 x 1000BASE-T */
122 {0x6880, "Chelsio T6225 80 VF"},
123 {0x6881, "Chelsio T62100 81 VF"},
124 {0x6882, "Chelsio T6225-CR 82 VF"},
125 {0x6883, "Chelsio T62100-CR 83 VF"},
126 {0x6884, "Chelsio T64100-CR 84 VF"},
127 {0x6885, "Chelsio T6240-SO 85 VF"},
128 {0x6886, "Chelsio T6225-SO-CR 86 VF"},
129 {0x6887, "Chelsio T6225-CR 87 VF"},
132 static d_ioctl_t t4vf_ioctl;
134 static struct cdevsw t4vf_cdevsw = {
135 .d_version = D_VERSION,
136 .d_ioctl = t4vf_ioctl,
141 t4vf_probe(device_t dev)
146 d = pci_get_device(dev);
147 for (i = 0; i < nitems(t4vf_pciids); i++) {
148 if (d == t4vf_pciids[i].device) {
149 device_set_desc(dev, t4vf_pciids[i].desc);
150 return (BUS_PROBE_DEFAULT);
157 t5vf_probe(device_t dev)
162 d = pci_get_device(dev);
163 for (i = 0; i < nitems(t5vf_pciids); i++) {
164 if (d == t5vf_pciids[i].device) {
165 device_set_desc(dev, t5vf_pciids[i].desc);
166 return (BUS_PROBE_DEFAULT);
173 t6vf_probe(device_t dev)
178 d = pci_get_device(dev);
179 for (i = 0; i < nitems(t6vf_pciids); i++) {
180 if (d == t6vf_pciids[i].device) {
181 device_set_desc(dev, t6vf_pciids[i].desc);
182 return (BUS_PROBE_DEFAULT);
188 #define FW_PARAM_DEV(param) \
189 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \
190 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param))
191 #define FW_PARAM_PFVF(param) \
192 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \
193 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param))
196 get_params__pre_init(struct adapter *sc)
199 uint32_t param[3], val[3];
201 param[0] = FW_PARAM_DEV(FWREV);
202 param[1] = FW_PARAM_DEV(TPREV);
203 param[2] = FW_PARAM_DEV(CCLK);
204 rc = -t4vf_query_params(sc, nitems(param), param, val);
206 device_printf(sc->dev,
207 "failed to query parameters (pre_init): %d.\n", rc);
211 sc->params.fw_vers = val[0];
212 sc->params.tp_vers = val[1];
213 sc->params.vpd.cclk = val[2];
215 snprintf(sc->fw_version, sizeof(sc->fw_version), "%u.%u.%u.%u",
216 G_FW_HDR_FW_VER_MAJOR(sc->params.fw_vers),
217 G_FW_HDR_FW_VER_MINOR(sc->params.fw_vers),
218 G_FW_HDR_FW_VER_MICRO(sc->params.fw_vers),
219 G_FW_HDR_FW_VER_BUILD(sc->params.fw_vers));
221 snprintf(sc->tp_version, sizeof(sc->tp_version), "%u.%u.%u.%u",
222 G_FW_HDR_FW_VER_MAJOR(sc->params.tp_vers),
223 G_FW_HDR_FW_VER_MINOR(sc->params.tp_vers),
224 G_FW_HDR_FW_VER_MICRO(sc->params.tp_vers),
225 G_FW_HDR_FW_VER_BUILD(sc->params.tp_vers));
231 get_params__post_init(struct adapter *sc)
236 rc = -t4vf_get_sge_params(sc);
238 device_printf(sc->dev,
239 "unable to retrieve adapter SGE parameters: %d\n", rc);
243 rc = -t4vf_get_rss_glb_config(sc);
245 device_printf(sc->dev,
246 "unable to retrieve adapter RSS parameters: %d\n", rc);
249 if (sc->params.rss.mode != FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) {
250 device_printf(sc->dev,
251 "unable to operate with global RSS mode %d\n",
252 sc->params.rss.mode);
257 * Grab our Virtual Interface resource allocation, extract the
258 * features that we're interested in and do a bit of sanity testing on
261 rc = -t4vf_get_vfres(sc);
263 device_printf(sc->dev,
264 "unable to get virtual interface resources: %d\n", rc);
269 * Check for various parameter sanity issues.
271 if (sc->params.vfres.pmask == 0) {
272 device_printf(sc->dev, "no port access configured/usable!\n");
275 if (sc->params.vfres.nvi == 0) {
276 device_printf(sc->dev,
277 "no virtual interfaces configured/usable!\n");
280 sc->params.portvec = sc->params.vfres.pmask;
282 param = FW_PARAM_PFVF(MAX_PKTS_PER_ETH_TX_PKTS_WR);
283 rc = -t4vf_query_params(sc, 1, ¶m, &val);
285 sc->params.max_pkts_per_eth_tx_pkts_wr = val;
287 sc->params.max_pkts_per_eth_tx_pkts_wr = 14;
289 rc = t4_verify_chip_settings(sc);
292 t4_init_rx_buf_info(sc);
298 set_params__post_init(struct adapter *sc)
302 /* ask for encapsulated CPLs */
303 param = FW_PARAM_PFVF(CPLFW4MSG_ENCAP);
305 (void)t4vf_set_params(sc, 1, ¶m, &val);
307 /* Enable 32b port caps if the firmware supports it. */
308 param = FW_PARAM_PFVF(PORT_CAPS32);
310 if (t4vf_set_params(sc, 1, ¶m, &val) == 0)
311 sc->params.port_caps32 = 1;
320 cfg_itype_and_nqueues(struct adapter *sc, struct intrs_and_queues *iaq)
322 struct vf_resources *vfres;
323 int nrxq, ntxq, nports;
324 int itype, iq_avail, navail, rc;
327 * Figure out the layout of queues across our VIs and ensure
328 * we can allocate enough interrupts for our layout.
330 vfres = &sc->params.vfres;
331 nports = sc->params.nports;
332 bzero(iaq, sizeof(*iaq));
334 for (itype = INTR_MSIX; itype != 0; itype >>= 1) {
335 if (itype == INTR_INTX)
338 if (itype == INTR_MSIX)
339 navail = pci_msix_count(sc->dev);
341 navail = pci_msi_count(sc->dev);
346 iaq->intr_type = itype;
349 * XXX: The Linux driver reserves an Ingress Queue for
350 * forwarded interrupts when using MSI (but not MSI-X).
351 * It seems it just always asks for 2 interrupts and
352 * forwards all rxqs to the forwarded interrupt.
354 * We must reserve one IRQ for the for the firmware
357 * Every rxq requires an ingress queue with a free
358 * list and interrupts and an egress queue. Every txq
359 * requires an ETH egress queue.
361 iaq->nirq = T4VF_EXTRA_INTR;
364 * First, determine how many queues we can allocate.
365 * Start by finding the upper bound on rxqs from the
366 * limit on ingress queues.
368 iq_avail = vfres->niqflint - iaq->nirq;
369 if (iq_avail < nports) {
370 device_printf(sc->dev,
371 "Not enough ingress queues (%d) for %d ports\n",
372 vfres->niqflint, nports);
377 * Try to honor the cap on interrupts. If there aren't
378 * enough interrupts for at least one interrupt per
379 * port, then don't bother, we will just forward all
380 * interrupts to one interrupt in that case.
382 if (iaq->nirq + nports <= navail) {
383 if (iq_avail > navail - iaq->nirq)
384 iq_avail = navail - iaq->nirq;
387 nrxq = nports * t4_nrxq;
388 if (nrxq > iq_avail) {
390 * Too many ingress queues. Use what we can.
392 nrxq = (iq_avail / nports) * nports;
394 KASSERT(nrxq <= iq_avail, ("too many ingress queues"));
397 * Next, determine the upper bound on txqs from the limit
400 if (vfres->nethctrl < nports) {
401 device_printf(sc->dev,
402 "Not enough ETH queues (%d) for %d ports\n",
403 vfres->nethctrl, nports);
407 ntxq = nports * t4_ntxq;
408 if (ntxq > vfres->nethctrl) {
410 * Too many ETH queues. Use what we can.
412 ntxq = (vfres->nethctrl / nports) * nports;
414 KASSERT(ntxq <= vfres->nethctrl, ("too many ETH queues"));
417 * Finally, ensure we have enough egress queues.
419 if (vfres->neq < nports * 2) {
420 device_printf(sc->dev,
421 "Not enough egress queues (%d) for %d ports\n",
425 if (nrxq + ntxq > vfres->neq) {
426 /* Just punt and use 1 for everything. */
427 nrxq = ntxq = nports;
429 KASSERT(nrxq <= iq_avail, ("too many ingress queues"));
430 KASSERT(ntxq <= vfres->nethctrl, ("too many ETH queues"));
431 KASSERT(nrxq + ntxq <= vfres->neq, ("too many egress queues"));
434 * Do we have enough interrupts? For MSI the interrupts
435 * have to be a power of 2 as well.
440 if (iaq->nirq <= navail &&
441 (itype != INTR_MSI || powerof2(iaq->nirq))) {
443 if (itype == INTR_MSIX)
444 rc = pci_alloc_msix(sc->dev, &navail);
446 rc = pci_alloc_msi(sc->dev, &navail);
448 device_printf(sc->dev,
449 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n",
450 itype, rc, iaq->nirq, navail);
453 if (navail == iaq->nirq) {
456 pci_release_msi(sc->dev);
459 /* Fall back to a single interrupt. */
462 if (itype == INTR_MSIX)
463 rc = pci_alloc_msix(sc->dev, &navail);
465 rc = pci_alloc_msi(sc->dev, &navail);
467 device_printf(sc->dev,
468 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n",
469 itype, rc, iaq->nirq, navail);
473 device_printf(sc->dev,
474 "failed to find a usable interrupt type. "
475 "allowed=%d, msi-x=%d, msi=%d, intx=1", t4_intr_types,
476 pci_msix_count(sc->dev), pci_msi_count(sc->dev));
482 t4vf_attach(device_t dev)
485 int rc = 0, i, j, rqidx, tqidx, n, p, pmask;
486 struct make_dev_args mda;
487 struct intrs_and_queues iaq;
490 sc = device_get_softc(dev);
492 pci_enable_busmaster(dev);
493 pci_set_max_read_req(dev, 4096);
494 sc->params.pci.mps = pci_get_max_payload(dev);
497 TUNABLE_INT_FETCH("hw.cxgbe.dflags", &sc->debug_flags);
499 sc->sge_gts_reg = VF_SGE_REG(A_SGE_VF_GTS);
500 sc->sge_kdoorbell_reg = VF_SGE_REG(A_SGE_VF_KDOORBELL);
501 snprintf(sc->lockname, sizeof(sc->lockname), "%s",
502 device_get_nameunit(dev));
503 mtx_init(&sc->sc_lock, sc->lockname, 0, MTX_DEF);
506 mtx_init(&sc->sfl_lock, "starving freelists", 0, MTX_DEF);
507 TAILQ_INIT(&sc->sfl);
508 callout_init_mtx(&sc->sfl_callout, &sc->sfl_lock, 0);
510 mtx_init(&sc->reg_lock, "indirect register access", 0, MTX_DEF);
512 rc = t4_map_bars_0_and_4(sc);
514 goto done; /* error message displayed already */
516 rc = -t4vf_prep_adapter(sc);
520 t4_init_devnames(sc);
521 if (sc->names == NULL) {
523 goto done; /* error message displayed already */
527 * Leave the 'pf' and 'mbox' values as zero. This ensures
528 * that various firmware messages do not set the fields which
529 * is the correct thing to do for a VF.
532 memset(sc->chan_map, 0xff, sizeof(sc->chan_map));
534 make_dev_args_init(&mda);
535 mda.mda_devsw = &t4vf_cdevsw;
536 mda.mda_uid = UID_ROOT;
537 mda.mda_gid = GID_WHEEL;
539 mda.mda_si_drv1 = sc;
540 rc = make_dev_s(&mda, &sc->cdev, "%s", device_get_nameunit(dev));
542 device_printf(dev, "failed to create nexus char device: %d.\n",
545 #if defined(__i386__)
546 if ((cpu_feature & CPUID_CX8) == 0) {
547 device_printf(dev, "64 bit atomics not available.\n");
554 * Some environments do not properly handle PCIE FLRs -- e.g. in Linux
555 * 2.6.31 and later we can't call pci_reset_function() in order to
556 * issue an FLR because of a self- deadlock on the device semaphore.
557 * Meanwhile, the OS infrastructure doesn't issue FLRs in all the
558 * cases where they're needed -- for instance, some versions of KVM
559 * fail to reset "Assigned Devices" when the VM reboots. Therefore we
560 * use the firmware based reset in order to reset any per function
563 rc = -t4vf_fw_reset(sc);
565 device_printf(dev, "FW reset failed: %d\n", rc);
571 * Grab basic operational parameters. These will predominantly have
572 * been set up by the Physical Function Driver or will be hard coded
573 * into the adapter. We just have to live with them ... Note that
574 * we _must_ get our VPD parameters before our SGE parameters because
575 * we need to know the adapter's core clock from the VPD in order to
576 * properly decode the SGE Timer Values.
578 rc = get_params__pre_init(sc);
580 goto done; /* error message displayed already */
581 rc = get_params__post_init(sc);
583 goto done; /* error message displayed already */
585 rc = set_params__post_init(sc);
587 goto done; /* error message displayed already */
589 rc = t4_map_bar_2(sc);
591 goto done; /* error message displayed already */
593 rc = t4_create_dma_tag(sc);
595 goto done; /* error message displayed already */
598 * The number of "ports" which we support is equal to the number of
599 * Virtual Interfaces with which we've been provisioned.
601 sc->params.nports = imin(sc->params.vfres.nvi, MAX_NPORTS);
604 * We may have been provisioned with more VIs than the number of
605 * ports we're allowed to access (our Port Access Rights Mask).
606 * Just use a single VI for each port.
608 sc->params.nports = imin(sc->params.nports,
609 bitcount32(sc->params.vfres.pmask));
613 * XXX: The Linux VF driver will lower nports if it thinks there
614 * are too few resources in vfres (niqflint, nethctrl, neq).
619 * First pass over all the ports - allocate VIs and initialize some
620 * basic parameters like mac address, port type, etc.
622 pmask = sc->params.vfres.pmask;
623 for_each_port(sc, i) {
624 struct port_info *pi;
625 uint8_t mac[ETHER_ADDR_LEN];
627 pi = malloc(sizeof(*pi), M_CXGBE, M_ZERO | M_WAITOK);
630 /* These must be set before t4_port_init */
634 pi->vi = malloc(sizeof(struct vi_info) * pi->nvi, M_CXGBE,
638 * Allocate the "main" VI and initialize parameters
641 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i);
643 device_printf(dev, "unable to initialize port %d: %d\n",
645 free(pi->vi, M_CXGBE);
651 /* Prefer the MAC address set by the PF, if there is one. */
655 rc = t4vf_get_vf_mac(sc, p, &n, mac);
656 if (rc == 0 && n == 1)
657 t4_os_set_hw_addr(pi, mac);
660 /* No t4_link_start. */
662 snprintf(pi->lockname, sizeof(pi->lockname), "%sp%d",
663 device_get_nameunit(dev), i);
664 mtx_init(&pi->pi_lock, pi->lockname, 0, MTX_DEF);
665 sc->chan_map[pi->tx_chan] = i;
667 /* All VIs on this port share this media. */
668 ifmedia_init(&pi->media, IFM_IMASK, cxgbe_media_change,
671 pi->dev = device_add_child(dev, sc->names->vf_ifnet_name, -1);
672 if (pi->dev == NULL) {
674 "failed to add device for port %d.\n", i);
678 pi->vi[0].dev = pi->dev;
679 device_set_softc(pi->dev, pi);
683 * Interrupt type, # of interrupts, # of rx/tx queues, etc.
685 rc = cfg_itype_and_nqueues(sc, &iaq);
687 goto done; /* error message displayed already */
689 sc->intr_type = iaq.intr_type;
690 sc->intr_count = iaq.nirq;
693 s->nrxq = sc->params.nports * iaq.nrxq;
694 s->ntxq = sc->params.nports * iaq.ntxq;
695 s->neq = s->ntxq + s->nrxq; /* the free list in an rxq is an eq */
696 s->neq += sc->params.nports; /* ctrl queues: 1 per port */
697 s->niq = s->nrxq + 1; /* 1 extra for firmware event queue */
699 s->iqmap_sz = s->niq;
700 s->eqmap_sz = s->neq;
702 s->rxq = malloc(s->nrxq * sizeof(struct sge_rxq), M_CXGBE,
704 s->txq = malloc(s->ntxq * sizeof(struct sge_txq), M_CXGBE,
706 s->iqmap = malloc(s->iqmap_sz * sizeof(struct sge_iq *), M_CXGBE,
708 s->eqmap = malloc(s->eqmap_sz * sizeof(struct sge_eq *), M_CXGBE,
711 sc->irq = malloc(sc->intr_count * sizeof(struct irq), M_CXGBE,
715 * Second pass over the ports. This time we know the number of rx and
716 * tx queues that each port should get.
719 for_each_port(sc, i) {
720 struct port_info *pi = sc->port[i];
726 for_each_vi(pi, j, vi) {
729 vi->qsize_rxq = t4_qsize_rxq;
730 vi->qsize_txq = t4_qsize_txq;
732 vi->first_rxq = rqidx;
733 vi->first_txq = tqidx;
734 vi->tmr_idx = t4_tmr_idx;
735 vi->pktc_idx = t4_pktc_idx;
736 vi->nrxq = j == 0 ? iaq.nrxq: 1;
737 vi->ntxq = j == 0 ? iaq.ntxq: 1;
742 vi->rsrv_noflowq = 0;
746 rc = t4_setup_intr_handlers(sc);
749 "failed to setup interrupt handlers: %d\n", rc);
753 rc = bus_generic_attach(dev);
756 "failed to attach all child ports: %d\n", rc);
761 "%d ports, %d %s interrupt%s, %d eq, %d iq\n",
762 sc->params.nports, sc->intr_count, sc->intr_type == INTR_MSIX ?
763 "MSI-X" : "MSI", sc->intr_count > 1 ? "s" : "", sc->sge.neq,
768 t4_detach_common(dev);
776 get_regs(struct adapter *sc, struct t4_regdump *regs, uint8_t *buf)
779 /* 0x3f is used as the revision for VFs. */
780 regs->version = chip_id(sc) | (0x3f << 10);
781 t4_get_regs(sc, buf, regs->len);
785 t4_clr_vi_stats(struct adapter *sc)
789 for (reg = A_MPS_VF_STAT_TX_VF_BCAST_BYTES_L;
790 reg <= A_MPS_VF_STAT_RX_VF_ERR_FRAMES_H; reg += 4)
791 t4_write_reg(sc, VF_MPS_REG(reg), 0);
795 t4vf_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
799 struct adapter *sc = dev->si_drv1;
801 rc = priv_check(td, PRIV_DRIVER);
806 case CHELSIO_T4_GETREG: {
807 struct t4_reg *edata = (struct t4_reg *)data;
809 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len)
812 if (edata->size == 4)
813 edata->val = t4_read_reg(sc, edata->addr);
814 else if (edata->size == 8)
815 edata->val = t4_read_reg64(sc, edata->addr);
821 case CHELSIO_T4_SETREG: {
822 struct t4_reg *edata = (struct t4_reg *)data;
824 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len)
827 if (edata->size == 4) {
828 if (edata->val & 0xffffffff00000000)
830 t4_write_reg(sc, edata->addr, (uint32_t) edata->val);
831 } else if (edata->size == 8)
832 t4_write_reg64(sc, edata->addr, edata->val);
837 case CHELSIO_T4_REGDUMP: {
838 struct t4_regdump *regs = (struct t4_regdump *)data;
839 int reglen = t4_get_regs_len(sc);
842 if (regs->len < reglen) {
843 regs->len = reglen; /* hint to the caller */
848 buf = malloc(reglen, M_CXGBE, M_WAITOK | M_ZERO);
849 get_regs(sc, regs, buf);
850 rc = copyout(buf, regs->data, reglen);
854 case CHELSIO_T4_CLEAR_STATS: {
856 u_int port_id = *(uint32_t *)data;
857 struct port_info *pi;
860 if (port_id >= sc->params.nports)
862 pi = sc->port[port_id];
865 pi->tx_parse_error = 0;
869 * Since this command accepts a port, clear stats for
870 * all VIs on this port.
872 for_each_vi(pi, v, vi) {
873 if (vi->flags & VI_INIT_DONE) {
877 for_each_rxq(vi, i, rxq) {
878 #if defined(INET) || defined(INET6)
879 rxq->lro.lro_queued = 0;
880 rxq->lro.lro_flushed = 0;
883 rxq->vlan_extraction = 0;
886 for_each_txq(vi, i, txq) {
889 txq->vlan_insertion = 0;
893 txq->txpkts0_wrs = 0;
894 txq->txpkts1_wrs = 0;
895 txq->txpkts0_pkts = 0;
896 txq->txpkts1_pkts = 0;
897 txq->txpkts_flush = 0;
898 mp_ring_reset_stats(txq->r);
904 case CHELSIO_T4_SCHED_CLASS:
905 rc = t4_set_sched_class(sc, (struct t4_sched_params *)data);
907 case CHELSIO_T4_SCHED_QUEUE:
908 rc = t4_set_sched_queue(sc, (struct t4_sched_queue *)data);
917 static device_method_t t4vf_methods[] = {
918 DEVMETHOD(device_probe, t4vf_probe),
919 DEVMETHOD(device_attach, t4vf_attach),
920 DEVMETHOD(device_detach, t4_detach_common),
925 static driver_t t4vf_driver = {
928 sizeof(struct adapter)
931 static device_method_t t5vf_methods[] = {
932 DEVMETHOD(device_probe, t5vf_probe),
933 DEVMETHOD(device_attach, t4vf_attach),
934 DEVMETHOD(device_detach, t4_detach_common),
939 static driver_t t5vf_driver = {
942 sizeof(struct adapter)
945 static device_method_t t6vf_methods[] = {
946 DEVMETHOD(device_probe, t6vf_probe),
947 DEVMETHOD(device_attach, t4vf_attach),
948 DEVMETHOD(device_detach, t4_detach_common),
953 static driver_t t6vf_driver = {
956 sizeof(struct adapter)
959 static driver_t cxgbev_driver = {
962 sizeof(struct port_info)
965 static driver_t cxlv_driver = {
968 sizeof(struct port_info)
971 static driver_t ccv_driver = {
974 sizeof(struct port_info)
977 static devclass_t t4vf_devclass, t5vf_devclass, t6vf_devclass;
978 static devclass_t cxgbev_devclass, cxlv_devclass, ccv_devclass;
980 DRIVER_MODULE(t4vf, pci, t4vf_driver, t4vf_devclass, 0, 0);
981 MODULE_VERSION(t4vf, 1);
982 MODULE_DEPEND(t4vf, t4nex, 1, 1, 1);
984 DRIVER_MODULE(t5vf, pci, t5vf_driver, t5vf_devclass, 0, 0);
985 MODULE_VERSION(t5vf, 1);
986 MODULE_DEPEND(t5vf, t5nex, 1, 1, 1);
988 DRIVER_MODULE(t6vf, pci, t6vf_driver, t6vf_devclass, 0, 0);
989 MODULE_VERSION(t6vf, 1);
990 MODULE_DEPEND(t6vf, t6nex, 1, 1, 1);
992 DRIVER_MODULE(cxgbev, t4vf, cxgbev_driver, cxgbev_devclass, 0, 0);
993 MODULE_VERSION(cxgbev, 1);
995 DRIVER_MODULE(cxlv, t5vf, cxlv_driver, cxlv_devclass, 0, 0);
996 MODULE_VERSION(cxlv, 1);
998 DRIVER_MODULE(ccv, t6vf, ccv_driver, ccv_devclass, 0, 0);
999 MODULE_VERSION(ccv, 1);