2 * Copyright (c) 1997 by Simon Shapiro
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * dpt.h: Definitions and constants used by the SCSI side of the DPT
36 * credits: Mike Neuffer; DPT low level code and in other areas as well.
37 * Mark Salyzyn; Many vital bits of info and diagnostics.
38 * Justin Gibbs; FreeBSD API, debugging and style
39 * Ron McDaniels; SCSI Software Interrupts
40 * FreeBSD.ORG; Great O/S to work on and for.
46 #include <sys/ioccom.h>
49 #undef DPT_USE_DLM_SWI
56 #define DPT_YEAR 18 /* 1998 - 1980 */
58 #define DPT_CTL_RELEASE 1
59 #define DPT_CTL_VERSION 0
60 #define DPT_CTL_PATCH 6
67 typedef void *physaddr;
70 #undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */
71 #define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */
72 #define DPT_OPENNINGS 8 /* Commands-in-progress per device */
74 #define DPT_RETRIES 5 /* Times to retry failed commands */
78 /* Arguments to dpt_run_queue() can be: */
80 #define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192
81 #define DPT_FREE_LIST_INCREMENT 64
82 #define DPT_CMD_LEN 12
85 * How many segments do we want in a Scatter/Gather list?
86 * Some HBA's can do 16, Some 8192. Since we pre-allocate
87 * them in fixed increments, we need to put a practical limit on
88 * these. A passed parameter (from kernel boot or lkm) would help
90 #define DPT_MAX_SEGS 32
96 #undef DPT_DEBUG_SETUP
97 #undef DPT_DEBUG_STATES
98 #undef DPT_DEBUG_CONFIG
99 #undef DPT_DEBUG_QUEUES
100 #undef DPT_DEBUG_SCSI_CMD
101 #undef DPT_DEBUG_SOFTINTR
102 #undef DPT_DEBUG_HARDINTR
103 #undef DPT_DEBUG_HEX_DUMPS
104 #undef DPT_DEBUG_POLLING
105 #undef DPT_DEBUG_INQUIRE
106 #undef DPT_DEBUG_COMPLETION
107 #undef DPT_DEBUG_COMPLETION_ERRORS
108 #define DPT_DEBUG_MINPHYS
110 #undef DPT_DEBUG_SG_SHOW_DATA
111 #undef DPT_DEBUG_SCSI_CMD_NAME
112 #undef DPT_DEBUG_CONTROL
113 #undef DPT_DEBUG_TIMEOUTS
114 #undef DPT_DEBUG_SHUTDOWN
115 #define DPT_DEBUG_USER_CMD
125 #define MAX_CHANNELS 3
126 #define MAX_TARGETS 16
129 /* Map minor numbers to device identity */
130 #define TARGET_MASK 0x000f
131 #define BUS_MASK 0x0030
132 #define HBA_MASK 0x01c0
133 #define LUN_MASK 0x0e00
135 #define minor2target(minor) ( minor & TARGET_MASK )
136 #define minor2bus(minor) ( (minor & BUS_MASK) >> 4 )
137 #define minor2hba(minor) ( (minor & HBA_MASK) >> 6 )
138 #define minor2lun(minor) ( (minor & LUN_MASK) >> 9 )
141 * Valid values for cache_type
143 #define DPT_NO_CACHE 0
144 #define DPT_CACHE_WRITETHROUGH 1
145 #define DPT_CACHE_WRITEBACK 2
147 #define min(a,b) ((a<b)?(a):(b))
157 #define BUSMASTER 0xff
160 #define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */
161 #define DPT_BLINK_INDICATOR 0x42445054
173 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
174 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
175 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
177 #define DPT_MAX_RETRIES 2
183 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
184 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
185 #define SD(host) ((hostdata *)&(host->hostdata))
188 * EATA Command & Register definitions
191 #define PCI_REG_DPTconfig 0x40
192 #define PCI_REG_PumpModeAddress 0x44
193 #define PCI_REG_PumpModeData 0x48
194 #define PCI_REG_ConfigParam1 0x50
195 #define PCI_REG_ConfigParam2 0x54
197 #define EATA_CMD_RESET 0xf9
198 #define EATA_COLD_BOOT 0x06 /* Last resort only! */
200 #define EATA_CMD_IMMEDIATE 0xfa
202 #define EATA_CMD_DMA_READ_CONFIG 0xfd
203 #define EATA_CMD_DMA_SET_CONFIG 0xfe
204 #define EATA_CMD_DMA_SEND_CP 0xff
206 #define ECS_EMULATE_SENSE 0xd4
210 * Beware of this enumeration. Not all commands are in sequence!
213 enum dpt_immediate_cmd {
219 EATA_SMART_ROM_DL_EN,
220 EATA_COLD_BOOT_HBA, /* Only as a last resort */
222 EATA_SCSI_BUS_OFFLINE,
223 EATA_RESET_MASKED_BUS,
227 #define HA_CTRLREG 0x206 /* control register for HBA */
228 #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */
229 #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */
230 #define HA_CTRL_8HEADS 0x08 /*
231 * CTRLREG: set for drives with
233 * (WD1003 rudimentary :-)
236 #define HA_WCOMMAND 0x07 /* command register offset */
237 #define HA_WIFC 0x06 /* immediate command offset */
238 #define HA_WCODE 0x05
239 #define HA_WCODE2 0x04
240 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
241 #define HA_RERROR 0x01 /* Error Register, offset 1 from base */
242 #define HA_RAUXSTAT 0x08 /* aux status register offset */
243 #define HA_RSTATUS 0x07 /* status register offset */
244 #define HA_RDATA 0x00 /* data register (16bit) */
245 #define HA_WDATA 0x00 /* data register (16bit) */
247 #define HA_ABUSY 0x01 /* aux busy bit */
248 #define HA_AIRQ 0x02 /* aux IRQ pending bit */
249 #define HA_SERROR 0x01 /* pr. command ended in error */
250 #define HA_SMORE 0x02 /* more data soon to come */
251 #define HA_SCORR 0x04 /* datio_addra corrected */
252 #define HA_SDRQ 0x08 /* data request active */
253 #define HA_SSC 0x10 /* seek complete */
254 #define HA_SFAULT 0x20 /* write fault */
255 #define HA_SREADY 0x40 /* drive ready */
256 #define HA_SBUSY 0x80 /* drive busy */
257 #define HA_SDRDY (HA_SSC|HA_SREADY|HA_SDRQ)
260 * Message definitions
264 HA_NO_ERROR, /* No Error */
265 HA_ERR_SEL_TO, /* Selection Timeout */
266 HA_ERR_CMD_TO, /* Command Timeout */
268 HA_HBA_POWER_UP, /* Initial Controller Power-up */
269 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */
270 HA_UNX_BUS_FREE, /* Unexpected Bus Free */
271 HA_BUS_PARITY, /* Bus Parity Error */
272 HA_SCSI_HUNG, /* SCSI Hung */
273 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */
274 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */
275 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */
276 HA_PARITY_ERR, /* Controller Ram Parity Error */
277 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */
278 HA_CP_ABORTED, /* Abort Message sent to active cmd */
279 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */
280 HA_CP_RESET, /* Reset Message sent to active cmd */
281 HA_ECC_ERR, /* Controller Ram ECC Error */
282 HA_PCI_PARITY, /* PCI Parity Error */
283 HA_PCI_MABORT, /* PCI Master Abort */
284 HA_PCI_TABORT, /* PCI Target Abort */
285 HA_PCI_STABORT /* PCI Signaled Target Abort */
288 #define HA_STATUS_MASK 0x7F
289 #define HA_IDENTIFY_MSG 0x80
290 #define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */
292 #define DPT_RW_BUFF_HEART 0X00
293 #define DPT_RW_BUFF_DLM 0x02
294 #define DPT_RW_BUFF_ACCESS 0x03
296 #define HA_INTR_OFF 1
299 /* This is really a one-time shot through some black magic */
300 #define DPT_EATA_REVA 0x1c
301 #define DPT_EATA_REVB 0x1e
302 #define DPT_EATA_REVC 0x22
303 #define DPT_EATA_REVZ 0x24
308 #define DPT_RW_CMD_LEN 32
309 #define DPT_RW_CMD_DUMP_SOFTC "dump softc"
310 #define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo"
311 #define DPT_RW_CMD_DUMP_METRICS "dump metrics"
312 #define DPT_RW_CMD_CLEAR_METRICS "clear metrics"
313 #define DPT_RW_CMD_SHOW_LED "show LED"
315 #define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t)
316 #define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t)
317 #define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t)
318 #define SDI_SEND 0x40044444 /* Observed from dptmgr */
324 #define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4)
325 #define DPT_HCP_FIRST(page) (&page[4])
326 #define DPT_HCP_NEXT(param) (¶m[3 + param[3] + 1])
327 #define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param))
330 /* Possible return values from dpt_register_buffer() */
332 #define SCSI_TM_READ_BUFFER 0x3c
333 #define SCSI_TM_WRITE_BUFFER 0x3b
335 #define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */
336 #define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */
339 SUCCESSFULLY_REGISTERED,
342 REGISTERED_TO_ANOTHER,
356 * New way for completion routines to reliably copmplete processing.
357 * Should take properly typed dpt_softc_t and dpt_ccb_t,
358 * but interdependencies preclude that.
360 typedef void (*ccb_callback)(void *dpt, int bus, void *ccb);
362 typedef void (*buff_wr_done)(int unit, u_int8_t channel, u_int8_t target,
363 u_int8_t lun, u_int16_t offset, u_int16_t length,
366 typedef void (*dpt_rec_buff)(int unit, u_int8_t channel, u_int8_t target,
367 u_int8_t lun, void *buffer, u_int16_t offset,
370 /* HBA's Status port (register) bitmap */
371 typedef struct reg_bit { /* reading this one will clear the interrupt */
372 u_int8_t error :1, /* previous command ended in an error */
373 more :1, /* More DATA coming soon Poll BSY & DRQ (PIO) */
374 corr :1, /* data read was successfully corrected with ECC */
375 drq :1, /* data request active */
376 sc :1, /* seek complete */
377 fault :1, /* write fault */
378 ready :1, /* drive ready */
379 busy :1; /* controller busy */
382 /* HBA's Auxiliary status port (register) bitmap */
383 typedef struct reg_abit { /* reading this won't clear the interrupt */
384 u_int8_t abusy :1, /* auxiliary busy */
385 irq :1, /* set when drive interrupt is asserted */
389 /* The EATA Register Set as a structure */
390 typedef struct eata_register {
391 u_int8_t data_reg[2]; /* R, couldn't figure this one out */
392 u_int8_t cp_addr[4]; /* W, CP address register */
396 * [read|set] conf, send CP
398 struct reg_bit status; /* R, see register_bit1 */
401 struct reg_abit aux_stat; /* R, see register_bit2 */
405 * Holds the results of a READ_CONFIGURATION command
406 * Beware of data items which are larger than 1 byte.
407 * these come from the DPT in network order.
408 * On an Intel ``CPU'' they will be upside down and backwards!
409 * The dpt_get_conf function is normally responsible for flipping
412 typedef struct get_conf { /* Read Configuration Array */
415 u_int8_t foo_DevType;
416 u_int8_t foo_PageCode;
417 u_int8_t foo_Reserved0;
420 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */
422 #define gcs_length bar.foo_length
423 #define gcs_PageCode bar.foo.foo_DevType
424 #define gcs_reserved0 bar.foo.foo_Reserved0
425 #define gcs_len bar.foo.foo_len
427 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */
429 u_int8_t version2 :4,
430 version :4; /* EATA Version level */
432 u_int8_t OCS_enabled :1, /* Overlap Command Support enabled */
433 TAR_support :1, /* SCSI Target Mode supported */
434 TRNXFR :1, /* Truncate Transfer Cmd Used in PIO Mode */
435 MORE_support:1, /* MORE supported (PIO Mode Only) */
436 DMA_support :1, /* DMA supported */
437 DMA_valid :1, /* DRQ value in Byte 30 is valid */
438 ATA :1, /* ATA device connected (not supported) */
439 HAA_valid :1; /* Hostadapter Address is valid */
441 u_int16_t cppadlen; /*
442 * Number of pad bytes send after CD data set
443 * to zero for DMA commands. Ntohl()`ed
445 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */
446 u_int8_t scsi_id2; /* If not, zero is returned */
449 u_int32_t cplen; /* CP length: number of valid cp bytes */
451 u_int32_t splen; /* Returned bytes for a received SP command */
452 u_int16_t queuesiz; /* max number of queueable CPs */
455 u_int16_t SGsiz; /* max number of SG table entrie */
457 u_int8_t IRQ :4,/* IRQ used this HBA */
458 IRQ_TR :1,/* IRQ Trigger: 0=edge, 1=level */
459 SECOND :1,/* This is a secondary controller */
460 DMA_channel:2;/* DRQ index, DRQ is 2comp of DRQX */
462 u_int8_t sync; /* 0-7 sync active bitmask (deprecated) */
463 u_int8_t DSBLE :1, /* ISA i/o addressing is disabled */
464 FORCADR :1, /* i/o address has been forced */
469 u_int8_t MAX_ID :5, /* Max number of SCSI target IDs */
470 MAX_CHAN :3; /* Number of SCSI busses on HBA */
472 u_int8_t MAX_LUN; /* Max number of LUNs */
476 ID_qest :1, /* Raidnum ID is questionable */
477 is_PCI :1, /* HBA is PCI */
478 is_EISA :1; /* HBA is EISA */
480 u_int8_t RAIDNUM; /* unique HBA identifier */
481 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */
483 /* >>------>> End of The DPT structure <<------<< */
485 u_int32_t length; /* True length, after ntohl conversion */
488 /* Scatter-Gather list entry */
489 typedef struct dpt_sg_segment {
490 u_int32_t seg_addr; /* All fields in network byte order */
496 typedef struct eata_sp {
497 u_int8_t hba_stat :7, /* HBA status */
498 EOC :1; /* True if command finished */
500 u_int8_t scsi_stat; /* Target SCSI status */
502 u_int8_t reserved[2];
504 u_int32_t residue_len; /* Number of bytes not transferred */
506 u_int32_t ccb_busaddr;
508 u_int8_t sp_ID_Message;
509 u_int8_t sp_Que_Message;
510 u_int8_t sp_Tag_Message;
515 * A strange collection of O/S-Hardware releated bits and pieces.
516 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command.
518 typedef struct dpt_drive_parameters {
519 u_int16_t cylinders; /* Up to 1024 */
520 u_int8_t heads; /* Up to 255 */
521 u_int8_t sectors; /* Up to 63 */
524 typedef struct driveParam_S driveParam_T;
526 #define SI_CMOS_Valid 0x0001
527 #define SI_NumDrivesValid 0x0002
528 #define SI_ProcessorValid 0x0004
529 #define SI_MemorySizeValid 0x0008
530 #define SI_DriveParamsValid 0x0010
531 #define SI_SmartROMverValid 0x0020
532 #define SI_OSversionValid 0x0040
533 #define SI_OSspecificValid 0x0080
534 #define SI_BusTypeValid 0x0100
536 #define SI_ALL_VALID 0x0FFF
537 #define SI_NO_SmartROM 0x8000
539 #define SI_ISA_BUS 0x00
540 #define SI_PCI_BUS 0x04
542 #define HBA_BUS_ISA 0x00
543 #define HBA_BUS_PCI 0x02
545 typedef struct dpt_sysinfo {
546 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */
547 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */
548 u_int8_t numDrives; /* 0040:0075 contents */
549 u_int8_t processorFamily; /* Same as DPTSIG definition */
550 u_int8_t processorType; /* Same as DPTSIG definition */
551 u_int8_t smartROMMajorVersion;
552 u_int8_t smartROMMinorVersion; /* SmartROM version */
553 u_int8_t smartROMRevision;
554 u_int16_t flags; /* See bit definitions above */
555 u_int16_t conventionalMemSize; /* in KB */
556 u_int32_t extendedMemSize; /* in KB */
557 u_int32_t osType; /* Same as DPTSIG definition */
558 u_int8_t osMajorVersion;
559 u_int8_t osMinorVersion; /* The OS version */
561 u_int8_t osSubRevision;
562 u_int8_t busType; /* See defininitions above */
563 u_int8_t pad[3]; /* For alignment */
564 dpt_drive_t drives[16]; /* SmartROM Logical Drives */
567 /* SEND_COMMAND packet structure */
568 typedef struct eata_ccb {
569 u_int8_t SCSI_Reset :1, /* Cause a SCSI Bus reset on the cmd */
570 HBA_Init :1, /* Cause Controller to reinitialize */
571 Auto_Req_Sen :1, /* Do Auto Request Sense on errors */
572 scatter :1, /* Data Ptr points to a SG Packet */
573 Quick :1, /* Set this one for NO Status PAcket */
574 Interpret :1, /* Interpret the SCSI cdb for own use */
575 DataOut :1, /* Data Out phase with command */
576 DataIn :1; /* Data In phase with command */
578 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */
580 u_int8_t FWNEST :1, /* send cmd to phys RAID component */
583 u_int8_t Phsunit :1, /* physical unit on mirrored pair */
584 I_AT :1, /* inhibit address translation */
585 Disable_Cache :1, /* HBA inhibit caching */
588 u_int8_t cp_id :5, /* SCSI Device ID of target */
589 cp_channel :3; /* SCSI Channel # of HBA */
592 cp_luntar :1, /* CP is for target ROUTINE */
593 cp_dispri :1, /* Grant disconnect privilege */
594 cp_identify :1; /* Always TRUE */
596 u_int8_t cp_msg[3]; /* Message bytes 0-3 */
600 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */
602 u_int8_t x_extent :1,
614 u_int8_t reserved5 :4;
615 u_int8_t x_vendor :2;
617 u_int8_t z[12]; /* Command Descriptor Block (= 12) */
620 #define cp_cdb cp_w.z
621 #define cp_scsi_cmd cp_w.x.x_scsi_cmd
622 #define cp_extent cp_w.x.x_extent
623 #define cp_lun cp_w.x.x_lun
624 #define cp_page cp_w.x.x_page
625 #define cp_len cp_w.x.x_len
627 #define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */
628 #define BUS_QUIET 0x04 /* Quite Scsi Bus Code */
629 #define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */
631 u_int32_t cp_datalen; /*
632 * Data Transfer Length. If scatter=1 len (IN
633 * BYTES!) of the S/G array
636 u_int32_t cp_busaddr; /* Unique identifier. Busaddr works well */
637 u_int32_t cp_dataDMA; /*
638 * Data Address, if scatter=1 then it is the
639 * address of scatter packet
641 u_int32_t cp_statDMA; /* address for Status Packet */
642 u_int32_t cp_reqDMA; /*
643 * Request Sense Address, used if CP command
651 * DPT Signature Structure.
652 * Used by /dev/dpt to directly pass commands to the HBA
653 * We have more information here than we care for...
656 /* Current Signature Version - sigBYTE dsSigVersion; */
657 #define SIG_VERSION 1
660 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE
662 * What type of processor the file is meant to run on.
663 * This will let us know whether to read sigWORDs as high/low or low/high.
665 #define PROC_INTEL 0x00 /* Intel 80x86 */
666 #define PROC_MOTOROLA 0x01 /* Motorola 68K */
667 #define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */
668 #define PROC_ALPHA 0x03 /* DEC Alpha */
671 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS
673 * Different bit definitions dependent on processor_family
677 #define PROC_8086 0x01 /* Intel 8086 */
678 #define PROC_286 0x02 /* Intel 80286 */
679 #define PROC_386 0x04 /* Intel 80386 */
680 #define PROC_486 0x08 /* Intel 80486 */
681 #define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */
682 #define PROC_P6 0x20 /* Intel 686 aka P6 */
685 #define PROC_68000 0x01 /* Motorola 68000 */
686 #define PROC_68020 0x02 /* Motorola 68020 */
687 #define PROC_68030 0x04 /* Motorola 68030 */
688 #define PROC_68040 0x08 /* Motorola 68040 */
690 /* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */
691 #define FT_EXECUTABLE 0 /* Executable Program */
692 #define FT_SCRIPT 1 /* Script/Batch File??? */
693 #define FT_HBADRVR 2 /* HBA Driver */
694 #define FT_OTHERDRVR 3 /* Other Driver */
695 #define FT_IFS 4 /* Installable Filesystem Driver */
696 #define FT_ENGINE 5 /* DPT Engine */
697 #define FT_COMPDRVR 6 /* Compressed Driver Disk */
698 #define FT_LANGUAGE 7 /* Foreign Language file */
699 #define FT_FIRMWARE 8 /* Downloadable or actual Firmware */
700 #define FT_COMMMODL 9 /* Communications Module */
701 #define FT_INT13 10 /* INT 13 style HBA Driver */
702 #define FT_HELPFILE 11 /* Help file */
703 #define FT_LOGGER 12 /* Event Logger */
704 #define FT_INSTALL 13 /* An Install Program */
705 #define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */
706 #define FT_RESOURCE 15 /* Storage Manager Resource File */
707 #define FT_MODEM_DB 16 /* Storage Manager Modem Database */
709 /* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */
710 #define FTF_DLL 0x01 /* Dynamic Link Library */
711 #define FTF_NLM 0x02 /* Netware Loadable Module */
712 #define FTF_OVERLAYS 0x04 /* Uses overlays */
713 #define FTF_DEBUG 0x08 /* Debug version */
714 #define FTF_TSR 0x10 /* TSR */
715 #define FTF_SYS 0x20 /* DOS Lodable driver */
716 #define FTF_PROTECTED 0x40 /* Runs in protected mode */
717 #define FTF_APP_SPEC 0x80 /* Application Specific */
719 /* OEM - sigBYTE dsOEM; DISTINCT VALUES */
720 #define OEM_DPT 0 /* DPT */
721 #define OEM_ATT 1 /* ATT */
722 #define OEM_NEC 2 /* NEC */
723 #define OEM_ALPHA 3 /* Alphatronix */
724 #define OEM_AST 4 /* AST */
725 #define OEM_OLIVETTI 5 /* Olivetti */
726 #define OEM_SNI 6 /* Siemens/Nixdorf */
728 /* Operating System - sigLONG dsOS; FLAG BITS */
729 #define OS_DOS 0x00000001 /* PC/MS-DOS */
730 #define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */
731 #define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */
732 #define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */
733 #define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */
734 #define OS_OS22x 0x00000020 /* IBM OS/2 2.x */
735 #define OS_NW286 0x00000040 /* Novell NetWare 286 */
736 #define OS_NW386 0x00000080 /* Novell NetWare 386 */
737 #define OS_GEN_UNIX 0x00000100 /* Generic Unix */
738 #define OS_SCO_UNIX 0x00000200 /* SCO Unix */
739 #define OS_ATT_UNIX 0x00000400 /* ATT Unix */
740 #define OS_UNIXWARE 0x00000800 /* UnixWare Unix */
741 #define OS_INT_UNIX 0x00001000 /* Interactive Unix */
742 #define OS_SOLARIS 0x00002000 /* SunSoft Solaris */
743 #define OS_QN 0x00004000 /* QNX for Tom Moch */
744 #define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */
745 #define OS_BANYAN 0x00010000 /* Banyan Vines */
746 #define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */
747 #define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */
748 #define OS_OTHER 0x80000000 /* Other */
750 /* Capabilities - sigWORD dsCapabilities; FLAG BITS */
751 #define CAP_RAID0 0x0001 /* RAID-0 */
752 #define CAP_RAID1 0x0002 /* RAID-1 */
753 #define CAP_RAID3 0x0004 /* RAID-3 */
754 #define CAP_RAID5 0x0008 /* RAID-5 */
755 #define CAP_SPAN 0x0010 /* Spanning */
756 #define CAP_PASS 0x0020 /* Provides passthrough */
757 #define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */
758 #define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */
759 #define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */
760 #define CAP_EXTEND 0x8000 /* Extended info appears after description */
762 /* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */
763 #define DEV_DASD 0x0001 /* DASD (hard drives) */
764 #define DEV_TAPE 0x0002 /* Tape drives */
765 #define DEV_PRINTER 0x0004 /* Printers */
766 #define DEV_PROC 0x0008 /* Processors */
767 #define DEV_WORM 0x0010 /* WORM drives */
768 #define DEV_CDROM 0x0020 /* CD-ROM drives */
769 #define DEV_SCANNER 0x0040 /* Scanners */
770 #define DEV_OPTICAL 0x0080 /* Optical Drives */
771 #define DEV_JUKEBOX 0x0100 /* Jukebox */
772 #define DEV_COMM 0x0200 /* Communications Devices */
773 #define DEV_OTHER 0x0400 /* Other Devices */
774 #define DEV_ALL 0xFFFF /* All SCSI Devices */
776 /* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */
777 #define ADF_2001 0x0001 /* PM2001 */
778 #define ADF_2012A 0x0002 /* PM2012A */
779 #define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */
780 #define ADF_SC3_ISA 0x0010 /* PM2021 */
781 #define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */
782 #define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */
783 #define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */
784 #define ADF_ALL_MASTER 0xFFFE /* All bus mastering */
785 #define ADF_ALL_CACHE 0xFFFC /* All caching */
786 #define ADF_ALL 0xFFFF /* ALL DPT adapters */
788 /* Application - sigWORD dsApplication; FLAG BITS */
789 #define APP_DPTMGR 0x0001 /* DPT Storage Manager */
790 #define APP_ENGINE 0x0002 /* DPT Engine */
791 #define APP_SYTOS 0x0004 /* Sytron Sytos Plus */
792 #define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */
793 #define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */
794 #define APP_NOVABACK 0x0020 /* NovaStor Novaback */
795 #define APP_AIM 0x0040 /* Archive Information Manager */
797 /* Requirements - sigBYTE dsRequirements; FLAG BITS */
798 #define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */
799 #define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */
800 #define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */
801 #define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */
802 #define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */
803 #define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */
805 typedef struct dpt_sig {
806 char dsSignature[6]; /* ALWAYS "dPtSiG" */
807 u_int8_t SigVersion; /* signature version (currently 1) */
808 u_int8_t ProcessorFamily; /* what type of processor */
809 u_int8_t Processor; /* precise processor */
810 u_int8_t Filetype; /* type of file */
811 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */
812 u_int8_t OEM; /* OEM file was created for */
813 u_int32_t OS; /* which Operating systems */
814 u_int16_t Capabilities; /* RAID levels, etc. */
815 u_int16_t DeviceSupp; /* Types of SCSI devices supported */
816 u_int16_t AdapterSupp; /* DPT adapter families supported */
817 u_int16_t Application; /* applications file is for */
818 u_int8_t Requirements; /* Other driver dependencies */
819 u_int8_t Version; /* 1 */
820 u_int8_t Revision; /* 'J' */
821 u_int8_t SubRevision; /* '9', ' ' if N/A */
822 u_int8_t Month; /* creation month */
823 u_int8_t Day; /* creation day */
824 u_int8_t Year; /* creation year since 1980 */
825 char *Description; /* description (NULL terminated) */
828 /* 32 bytes minimum - with no description. Put NULL at description[0] */
829 /* 81 bytes maximum - with 49 character description plus NULL. */
831 /* This line added at Roycroft's request */
832 /* Microsoft's NT compiler gets confused if you do a pack and don't */
834 typedef struct eata_pass_through {
838 #define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */
839 #define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */
840 #define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */
841 #define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */
842 #define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */
843 #define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */
845 u_int8_t *command_buffer;
846 eata_ccb_t command_packet;
848 u_int8_t host_status;
849 u_int8_t target_status;
856 DCCB_RELEASE_SIMQ = 0x02
859 typedef struct dpt_ccb {
862 struct callout timer;
864 u_int32_t sg_busaddr;
867 struct scsi_sense_data sense_data;
870 u_int8_t status; /* status of this queueslot */
871 u_int8_t *cmd; /* address of cmd */
873 u_int32_t transaction_id;
876 SLIST_ENTRY(dpt_ccb) links;
878 #ifdef DPT_MEASURE_PERFORMANCE
879 u_int32_t submitted_time;
880 struct timeval command_started;
881 struct timeval command_ended;
886 * This is provided for compatibility with UnixWare only.
887 * Some of the fields may be bogus.
888 * Others may have a totally different meaning.
890 typedef struct dpt_scsi_ha {
891 u_int32_t ha_state; /* Operational state */
892 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */
893 int32_t ha_base; /* Base I/O address */
894 int ha_max_jobs; /* Max number of Active Jobs */
895 int ha_cache:2; /* Cache parameters */
896 int ha_cachesize:30; /* In meg, only if cache present*/
897 int ha_nbus; /* Number Of Busses on HBA */
898 int ha_ntargets; /* Number Of Targets Supported */
899 int ha_nluns; /* Number Of LUNs Supported */
900 int ha_tshift; /* Shift value for target */
901 int ha_bshift; /* Shift value for bus */
902 int ha_npend; /* # of jobs sent to HBA */
903 int ha_active_jobs; /* Number Of Active Jobs */
904 char ha_fw_version[4]; /* Firmware Revision Level */
905 void *ha_ccb; /* Controller command blocks */
906 void *ha_cblist; /* Command block free list */
907 void *ha_dev; /* Logical unit queues */
908 void *ha_StPkt_lock; /* Status Packet Lock */
909 void *ha_ccb_lock; /* CCB Lock */
910 void *ha_LuQWaiting; /* Lu Queue Waiting List */
911 void *ha_QWait_lock; /* Device Que Waiting Lock */
912 int ha_QWait_opri; /* Saved Priority Level */
913 #ifdef DPT_TARGET_MODE
914 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */
919 * Describe the Inquiry Data returned on Page 0 from the Adapter. The
920 * Page C1 Inquiry Data is described in the DptConfig_t structure above.
925 u_int8_t otherData[6];
927 u_int8_t modelNum[16];
928 u_int8_t firmware[4];
929 u_int8_t protocol[4];
933 * sp_EOC is not `safe', so I will check sp_Messages[0] instead!
935 #define DptStat_BUSY(x) ((x)->sp_ID_Message)
936 #define DptStat_Reset_BUSY(x) \
937 ((x)->msg[0] = 0xA5, (x)->EOC = 0, \
938 (x)->ccb_busaddr = ~0)
940 #ifdef DPT_MEASURE_PERFORMANCE
941 #define BIG_ENOUGH 0x8fffffff
942 typedef struct dpt_metrics {
943 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */
944 u_int32_t max_command_time[256];
945 u_int32_t min_command_time[256];
947 u_int32_t min_intr_time;
948 u_int32_t max_intr_time;
949 u_int32_t aborted_interrupts;
950 u_int32_t spurious_interrupts;
952 u_int32_t max_waiting_count;
953 u_int32_t max_submit_count;
954 u_int32_t max_complete_count;
956 u_int32_t min_waiting_time;
957 u_int32_t min_submit_time;
958 u_int32_t min_complete_time;
960 u_int32_t max_waiting_time;
961 u_int32_t max_submit_time;
962 u_int32_t max_complete_time;
964 u_int32_t command_collisions;
965 u_int32_t command_too_busy;
966 u_int32_t max_eata_tries;
967 u_int32_t min_eata_tries;
969 u_int32_t read_by_size_count[10];
970 u_int32_t write_by_size_count[10];
971 u_int32_t read_by_size_min_time[10];
972 u_int32_t read_by_size_max_time[10];
973 u_int32_t write_by_size_min_time[10];
974 u_int32_t write_by_size_max_time[10];
984 #define SIZE_BIGGER 8
987 struct timeval intr_started;
989 u_int32_t warm_starts;
990 u_int32_t cold_boots;
995 bus_dmamap_t sg_dmamap;
996 bus_addr_t sg_physaddr;
998 SLIST_ENTRY(sg_map_node) links;
1001 /* Main state machine and interface structure */
1002 typedef struct dpt_softc {
1006 struct resource * io_res;
1011 struct resource * irq_res;
1015 struct resource * drq_res;
1018 bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */
1019 dpt_ccb_t *dpt_dccbs; /* Array of dpt ccbs */
1020 bus_addr_t dpt_ccb_busbase; /* phys base address of array */
1021 bus_addr_t dpt_ccb_busend; /* phys end address of array */
1023 u_int32_t handle_interrupts :1, /* Are we ready for real work? */
1024 target_mode_enabled :1,
1025 resource_shortage :1,
1034 SLIST_HEAD(, dpt_ccb) free_dccb_list;
1035 LIST_HEAD(, ccb_hdr) pending_ccb_list;
1037 bus_dma_tag_t parent_dmat;
1038 bus_dma_tag_t dccb_dmat; /* dmat for our ccb array */
1039 bus_dmamap_t dccb_dmamap;
1040 bus_dma_tag_t sg_dmat; /* dmat for our sg maps */
1041 SLIST_HEAD(, sg_map_node) sg_maps;
1043 struct cam_sim *sims[MAX_CHANNELS];
1044 struct cam_path *paths[MAX_CHANNELS];
1045 u_int32_t commands_processed;
1046 u_int32_t lost_interrupts;
1049 * These three parameters can be used to allow for wide scsi, and
1050 * for host adapters that support multiple busses. The first two
1051 * should be set to 1 more than the actual max id or lun (i.e. 8 for
1054 * There is a FAT assumption here; We assume that these will never
1055 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS
1057 u_int channels; /* # of avail scsi chan. */
1062 u_int8_t dma_channel;
1064 TAILQ_ENTRY(dpt_softc) links;
1068 * Every object on a unit can have a receiver, if it treats
1069 * us as a target. We do that so that separate and independent
1070 * clients can consume received buffers.
1073 #define DPT_RW_BUFFER_SIZE (8 * 1024)
1074 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1075 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1076 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1078 dpt_inq_t board_data;
1079 u_int8_t EATA_revision;
1080 u_int8_t bustype; /* bustype of HBA */
1081 u_int32_t state; /* state of HBA */
1083 #define DPT_HA_FREE 0x00000000
1084 #define DPT_HA_OK 0x00000000
1085 #define DPT_HA_NO_TIMEOUT 0x00000000
1086 #define DPT_HA_BUSY 0x00000001
1087 #define DPT_HA_TIMEOUT 0x00000002
1088 #define DPT_HA_RESET 0x00000004
1089 #define DPT_HA_LOCKED 0x00000008
1090 #define DPT_HA_ABORTED 0x00000010
1091 #define DPT_HA_CONTROL_ACTIVE 0x00000020
1092 #define DPT_HA_SHUTDOWN_ACTIVE 0x00000040
1093 #define DPT_HA_COMMAND_ACTIVE 0x00000080
1094 #define DPT_HA_QUIET 0x00000100
1096 u_int8_t primary; /* true if primary */
1098 u_int8_t more_support :1, /* HBA supports MORE flag */
1099 immediate_support :1, /* HBA supports IMMEDIATE */
1102 u_int8_t resetlevel[MAX_CHANNELS];
1103 u_int32_t last_ccb; /* Last used ccb */
1104 u_int32_t cplen; /* size of CP in words */
1105 u_int16_t cppadlen; /* pad length of cp */
1106 u_int16_t max_dccbs;
1107 u_int16_t sgsize; /* Entries in the SG list */
1108 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */
1109 u_int32_t cache_size;
1111 volatile dpt_sp_t *sp; /* status packet */
1112 /* Copied from the status packet during interrupt handler */
1114 u_int8_t scsi_stat; /* Target SCSI status */
1115 u_int32_t residue_len; /* Number of bytes not transferred */
1116 bus_addr_t sp_physaddr; /* phys address of status packet */
1119 * We put ALL conditional elements at the tail for the structure.
1120 * If we do not, then userland code will crash or trash based on which
1121 * kernel it is running with.
1122 * This isi most visible with usr/sbin/dpt_softc(8)
1125 #ifdef DPT_MEASURE_PERFORMANCE
1126 dpt_perf_t performance;
1129 #ifdef DPT_RESET_HBA
1130 struct timeval last_contact;
1135 * This structure is used to pass dpt_softc contents to userland via the
1136 * ioctl DPT_IOCTL_SOFTC. The reason for this maddness, is that FreeBSD
1137 * (all BSDs ?) chose to actually assign a nasty meaning to the IOCTL word,
1138 * encoding 13 bits of it as size. As dpt_softc_t is somewhere between
1139 * 8,594 and 8,600 (depends on options), we have to copy the data to
1140 * something less than 4KB long. This siliness also solves the problem of
1141 * varying definition of dpt_softc_t, As the variants are exluded from
1144 * See dpt_softc_t above for enumerations, comments and such.
1146 typedef struct dpt_user_softc {
1148 u_int32_t handle_interrupts :1, /* Are we ready for real work? */
1149 target_mode_enabled :1,
1152 int total_ccbs_count;
1153 int free_ccbs_count;
1154 int waiting_ccbs_count;
1155 int submitted_ccbs_count;
1156 int completed_ccbs_count;
1158 u_int32_t queue_status;
1159 u_int32_t free_lock;
1160 u_int32_t waiting_lock;
1161 u_int32_t submitted_lock;
1162 u_int32_t completed_lock;
1164 u_int32_t commands_processed;
1165 u_int32_t lost_interrupts;
1172 u_int8_t *v_membase;
1173 u_int8_t *p_membase;
1176 u_int8_t dma_channel;
1178 dpt_inq_t board_data;
1179 u_int8_t EATA_revision;
1184 u_int8_t more_support :1,
1185 immediate_support :1,
1188 u_int8_t resetlevel[MAX_CHANNELS];
1192 u_int16_t queuesize;
1194 u_int8_t hostid[MAX_CHANNELS];
1195 u_int32_t cache_type :2,
1201 * These all come from dpt_scsi.c
1205 /* This function gets the current hi-res time and returns it to the caller */
1206 static __inline struct timeval
1216 * Given a minor device number, get its SCSI Unit.
1219 dpt_minor2unit(int minor)
1221 return(minor2hba(minor));
1224 dpt_softc_t *dpt_minor2softc(int minor_no);
1226 #endif /* _KERNEL */
1229 * This function subtracts one timval structure from another,
1230 * Returning the result in usec.
1231 * It assumes that less than 4 billion usecs passed form start to end.
1232 * If times are sensless, ~0 is returned.
1234 static __inline u_int32_t
1235 dpt_time_delta(struct timeval start,
1238 if (start.tv_sec > end.tv_sec)
1241 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) )
1244 return ( (end.tv_sec - start.tv_sec) * 1000000 +
1245 (end.tv_usec - start.tv_usec) );
1248 extern devclass_t dpt_devclass;
1251 void dpt_alloc(device_t);
1252 int dpt_detach(device_t);
1253 int dpt_alloc_resources(device_t);
1254 void dpt_release_resources(device_t);
1256 void dpt_free(struct dpt_softc *dpt);
1257 int dpt_init(struct dpt_softc *dpt);
1258 int dpt_attach(dpt_softc_t * dpt);
1259 void dpt_intr(void *arg);
1262 extern void hex_dump(u_char * data, int length,
1263 char *name, int no);
1264 extern char *i2bin(unsigned int no, int length);
1265 extern char *scsi_cmd_name(u_int8_t cmd);
1267 extern dpt_conf_t *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page,
1268 u_int8_t target, u_int8_t size,
1271 extern int dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf);
1272 extern int dpt_attach(dpt_softc_t * dpt);
1273 extern void dpt_shutdown(int howto, dpt_softc_t *dpt);
1274 extern void dpt_detect_cache(dpt_softc_t *dpt);
1276 extern int dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd,
1277 caddr_t cmdarg, int minor_no);
1279 extern u_int8_t dpt_blinking_led(dpt_softc_t *dpt);
1281 extern dpt_rb_t dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target,
1282 u_int8_t lun, u_int8_t mode,
1283 u_int16_t length, u_int16_t offset,
1284 dpt_rec_buff callback, dpt_rb_op_t op);
1286 extern int dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target,
1287 u_int8_t lun, u_int8_t mode, u_int16_t length,
1288 u_int16_t offset, void *data,
1289 buff_wr_done callback);
1293 void dpt_reset_performance(dpt_softc_t *dpt);