2 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Gareth Hughes <gareth@valinux.com>
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 /** @file ati_pcigart.c
33 * Implementation of ATI's PCIGART, which provides an aperture in card virtual
34 * address space with addresses remapped to system memory.
37 #include "dev/drm/drmP.h"
39 #define ATI_PCIGART_PAGE_SIZE 4096 /* PCI GART page size */
40 #define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
42 #define ATI_GART_NOSNOOP 0x1
43 #define ATI_GART_WRITE 0x4
44 #define ATI_GART_READ 0x8
47 drm_ati_alloc_pcigart_table_cb(void *arg, bus_dma_segment_t *segs,
50 struct drm_dma_handle *dmah = arg;
56 ("drm_ati_alloc_pcigart_table_cb: bad dma segment count"));
58 dmah->busaddr = segs[0].ds_addr;
62 drm_ati_alloc_pcigart_table(struct drm_device *dev,
63 struct drm_ati_pcigart_info *gart_info)
65 struct drm_dma_handle *dmah;
68 dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA,
74 ret = bus_dma_tag_create(NULL, PAGE_SIZE, 0, /* tag, align, boundary */
75 gart_info->table_mask, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
76 NULL, NULL, /* filtfunc, filtfuncargs */
77 gart_info->table_size, 1, /* maxsize, nsegs */
78 gart_info->table_size, /* maxsegsize */
79 0, NULL, NULL, /* flags, lockfunc, lockfuncargs */
82 free(dmah, DRM_MEM_DMA);
86 flags = BUS_DMA_WAITOK | BUS_DMA_ZERO;
87 if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
88 flags |= BUS_DMA_NOCACHE;
90 ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, flags, &dmah->map);
92 bus_dma_tag_destroy(dmah->tag);
93 free(dmah, DRM_MEM_DMA);
98 ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
99 gart_info->table_size, drm_ati_alloc_pcigart_table_cb, dmah,
102 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
103 bus_dma_tag_destroy(dmah->tag);
104 free(dmah, DRM_MEM_DMA);
108 gart_info->dmah = dmah;
114 drm_ati_free_pcigart_table(struct drm_device *dev,
115 struct drm_ati_pcigart_info *gart_info)
117 struct drm_dma_handle *dmah = gart_info->dmah;
119 bus_dmamap_unload(dmah->tag, dmah->map);
120 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
121 bus_dma_tag_destroy(dmah->tag);
122 free(dmah, DRM_MEM_DMA);
123 gart_info->dmah = NULL;
127 drm_ati_pcigart_cleanup(struct drm_device *dev,
128 struct drm_ati_pcigart_info *gart_info)
130 /* we need to support large memory configurations */
131 if (dev->sg == NULL) {
132 DRM_ERROR("no scatter/gather memory!\n");
136 if (gart_info->bus_addr) {
137 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
138 gart_info->bus_addr = 0;
140 drm_ati_free_pcigart_table(dev, gart_info);
148 drm_ati_pcigart_init(struct drm_device *dev,
149 struct drm_ati_pcigart_info *gart_info)
151 void *address = NULL;
153 u32 *pci_gart, page_base;
154 dma_addr_t bus_address = 0;
155 dma_addr_t entry_addr;
159 /* we need to support large memory configurations */
160 if (dev->sg == NULL) {
161 DRM_ERROR("no scatter/gather memory!\n");
165 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
166 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
168 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
170 DRM_ERROR("cannot allocate PCI GART page!\n");
174 address = (void *)gart_info->dmah->vaddr;
175 bus_address = gart_info->dmah->busaddr;
177 address = gart_info->addr;
178 bus_address = gart_info->bus_addr;
179 DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
180 (unsigned int)bus_address, (unsigned long)address);
183 pci_gart = (u32 *) address;
185 max_pages = (gart_info->table_size / sizeof(u32));
186 pages = (dev->sg->pages <= max_pages)
187 ? dev->sg->pages : max_pages;
189 memset(pci_gart, 0, max_pages * sizeof(u32));
191 KASSERT(PAGE_SIZE >= ATI_PCIGART_PAGE_SIZE, ("page size too small"));
193 for (i = 0; i < pages; i++) {
194 entry_addr = dev->sg->busaddr[i];
195 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
196 page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK;
197 switch(gart_info->gart_reg_if) {
198 case DRM_ATI_GART_IGP:
200 (upper_32_bits(entry_addr) & 0xff) << 4;
201 page_base |= ATI_GART_READ | ATI_GART_WRITE;
202 page_base |= ATI_GART_NOSNOOP;
204 case DRM_ATI_GART_PCIE:
207 (upper_32_bits(entry_addr) & 0xff) << 24;
208 page_base |= ATI_GART_READ | ATI_GART_WRITE;
209 page_base |= ATI_GART_NOSNOOP;
212 case DRM_ATI_GART_PCI:
215 *pci_gart = cpu_to_le32(page_base);
217 entry_addr += ATI_PCIGART_PAGE_SIZE;
224 gart_info->addr = address;
225 gart_info->bus_addr = bus_address;