3 * Header for the Direct Rendering Manager
5 * \author Rickard E. (Rik) Faith <faith@valinux.com>
7 * \par Acknowledgments:
8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14 * All rights reserved.
16 * Permission is hereby granted, free of charge, to any person obtaining a
17 * copy of this software and associated documentation files (the "Software"),
18 * to deal in the Software without restriction, including without limitation
19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
20 * and/or sell copies of the Software, and to permit persons to whom the
21 * Software is furnished to do so, subject to the following conditions:
23 * The above copyright notice and this permission notice (including the next
24 * paragraph) shall be included in all copies or substantial portions of the
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33 * OTHER DEALINGS IN THE SOFTWARE.
42 #if defined(__linux__)
43 #include <linux/config.h>
44 #include <asm/ioctl.h> /* For _IO* macros */
45 #define DRM_IOCTL_NR(n) _IOC_NR(n)
46 #define DRM_IOC_VOID _IOC_NONE
47 #define DRM_IOC_READ _IOC_READ
48 #define DRM_IOC_WRITE _IOC_WRITE
49 #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
50 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
51 #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
52 #if defined(__FreeBSD__) && defined(IN_MODULE)
53 /* Prevent name collision when including sys/ioccom.h */
55 #include <sys/ioccom.h>
56 #define ioctl(a,b,c) xf86ioctl(a,b,c)
58 #include <sys/ioccom.h>
59 #endif /* __FreeBSD__ && xf86ioctl */
60 #define DRM_IOCTL_NR(n) ((n) & 0xff)
61 #define DRM_IOC_VOID IOC_VOID
62 #define DRM_IOC_READ IOC_OUT
63 #define DRM_IOC_WRITE IOC_IN
64 #define DRM_IOC_READWRITE IOC_INOUT
65 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
68 #define XFREE86_VERSION(major,minor,patch,snap) \
69 ((major << 16) | (minor << 8) | patch)
71 #ifndef CONFIG_XFREE86_VERSION
72 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
75 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
76 #define DRM_PROC_DEVICES "/proc/devices"
77 #define DRM_PROC_MISC "/proc/misc"
78 #define DRM_PROC_DRM "/proc/drm"
79 #define DRM_DEV_DRM "/dev/drm"
80 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
85 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
89 #if defined(__linux__) || defined(__NetBSD__)
92 #define DRM_MAX_MINOR 15
94 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
95 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
96 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
97 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
99 #define _DRM_LOCK_HELD 0x80000000 /**< Hardware lock is held */
100 #define _DRM_LOCK_CONT 0x40000000 /**< Hardware lock is contended */
101 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
102 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
103 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
106 typedef unsigned long drm_handle_t;
107 typedef unsigned int drm_context_t;
108 typedef unsigned int drm_drawable_t;
109 typedef unsigned int drm_magic_t;
115 * \warning: If you change this structure, make sure you change
116 * XF86DRIClipRectRec in the server as well
118 * \note KW: Actually it's illegal to change either for
119 * backwards-compatibility reasons.
121 typedef struct drm_clip_rect {
132 typedef struct drm_tex_region {
135 unsigned char in_use;
136 unsigned char padding;
143 * The lock structure is a simple cache-line aligned integer. To avoid
144 * processor bus contention on a multiprocessor system, there should not be any
145 * other data stored in the same cache line.
147 typedef struct drm_hw_lock {
148 __volatile__ unsigned int lock; /**< lock variable */
149 char padding[60]; /**< Pad to cache line */
154 * DRM_IOCTL_VERSION ioctl argument type.
156 * \sa drmGetVersion().
158 typedef struct drm_version {
159 int version_major; /**< Major version */
160 int version_minor; /**< Minor version */
161 int version_patchlevel;/**< Patch level */
162 size_t name_len; /**< Length of name buffer */
163 char *name; /**< Name of driver */
164 size_t date_len; /**< Length of date buffer */
165 char *date; /**< User-space buffer to hold date */
166 size_t desc_len; /**< Length of desc buffer */
167 char *desc; /**< User-space buffer to hold desc */
172 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
174 * \sa drmGetBusid() and drmSetBusId().
176 typedef struct drm_unique {
177 size_t unique_len; /**< Length of unique */
178 char *unique; /**< Unique name for driver instantiation */
182 typedef struct drm_list {
183 int count; /**< Length of user-space structures */
184 drm_version_t *version;
188 typedef struct drm_block {
194 * DRM_IOCTL_CONTROL ioctl argument type.
196 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
198 typedef struct drm_control {
210 * Type of memory to map.
212 typedef enum drm_map_type {
213 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
214 _DRM_REGISTERS = 1, /**< no caching, no core dump */
215 _DRM_SHM = 2, /**< shared, cached */
216 _DRM_AGP = 3, /**< AGP/GART */
217 _DRM_SCATTER_GATHER = 4 /**< Scatter/gather memory for PCI DMA */
222 * Memory mapping flags.
224 typedef enum drm_map_flags {
225 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
226 _DRM_READ_ONLY = 0x02,
227 _DRM_LOCKED = 0x04, /**< shared, cached, locked */
228 _DRM_KERNEL = 0x08, /**< kernel requires access */
229 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
230 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
231 _DRM_REMOVABLE = 0x40 /**< Removable mapping */
235 typedef struct drm_ctx_priv_map {
236 unsigned int ctx_id; /**< Context requesting private mapping */
237 void *handle; /**< Handle of map */
238 } drm_ctx_priv_map_t;
242 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
247 typedef struct drm_map {
248 unsigned long offset; /**< Requested physical address (0 for SAREA)*/
249 unsigned long size; /**< Requested physical size (bytes) */
250 drm_map_type_t type; /**< Type of memory to map */
251 drm_map_flags_t flags; /**< Flags */
252 void *handle; /**< User-space: "Handle" to pass to mmap() */
253 /**< Kernel-space: kernel-virtual address */
254 int mtrr; /**< MTRR slot used */
260 * DRM_IOCTL_GET_CLIENT ioctl argument type.
262 typedef struct drm_client {
263 int idx; /**< Which client desired? */
264 int auth; /**< Is client authenticated? */
265 unsigned long pid; /**< Process ID */
266 unsigned long uid; /**< User ID */
267 unsigned long magic; /**< Magic */
268 unsigned long iocs; /**< Ioctl count */
279 _DRM_STAT_VALUE, /**< Generic value */
280 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
281 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
283 _DRM_STAT_IRQ, /**< IRQ */
284 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
285 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
286 _DRM_STAT_DMA, /**< DMA */
287 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
288 _DRM_STAT_MISSED /**< Missed DMA opportunity */
290 /* Add to the *END* of the list */
295 * DRM_IOCTL_GET_STATS ioctl argument type.
297 typedef struct drm_stats {
301 drm_stat_type_t type;
307 * Hardware locking flags.
309 typedef enum drm_lock_flags {
310 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
311 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
312 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
313 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
314 /* These *HALT* flags aren't supported yet
315 -- they will be used to support the
316 full-screen DGA-like mode. */
317 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
318 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
323 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
325 * \sa drmGetLock() and drmUnlock().
327 typedef struct drm_lock {
329 drm_lock_flags_t flags;
337 * These values \e must match xf86drm.h.
341 typedef enum drm_dma_flags {
342 /* Flags for DMA buffer dispatch */
343 _DRM_DMA_BLOCK = 0x01, /**<
344 * Block until buffer dispatched.
346 * \note The buffer may not yet have
347 * been processed by the hardware --
348 * getting a hardware lock with the
349 * hardware quiescent will ensure
350 * that the buffer has been
353 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
354 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
356 /* Flags for DMA buffer request */
357 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
358 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
359 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
364 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
368 typedef struct drm_buf_desc {
369 int count; /**< Number of buffers of this size */
370 int size; /**< Size in bytes */
371 int low_mark; /**< Low water mark */
372 int high_mark; /**< High water mark */
374 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
375 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
376 _DRM_SG_BUFFER = 0x04 /**< Scatter/gather memory buffer */
378 unsigned long agp_start; /**<
379 * Start address of where the AGP buffers are
380 * in the AGP aperture
386 * DRM_IOCTL_INFO_BUFS ioctl argument type.
388 typedef struct drm_buf_info {
389 int count; /**< Entries in list */
390 drm_buf_desc_t *list;
395 * DRM_IOCTL_FREE_BUFS ioctl argument type.
397 typedef struct drm_buf_free {
408 typedef struct drm_buf_pub {
409 int idx; /**< Index into the master buffer list */
410 int total; /**< Buffer size */
411 int used; /**< Amount of buffer in use (for DMA) */
412 void *address; /**< Address of buffer */
417 * DRM_IOCTL_MAP_BUFS ioctl argument type.
419 typedef struct drm_buf_map {
420 int count; /**< Length of the buffer list */
421 void *virtual; /**< Mmap'd area in user-virtual */
422 drm_buf_pub_t *list; /**< Buffer information */
427 * DRM_IOCTL_DMA ioctl argument type.
429 * Indices here refer to the offset into the buffer list in drm_buf_get.
433 typedef struct drm_dma {
434 int context; /**< Context handle */
435 int send_count; /**< Number of buffers to send */
436 int *send_indices; /**< List of handles to buffers */
437 int *send_sizes; /**< Lengths of data to send */
438 drm_dma_flags_t flags; /**< Flags */
439 int request_count; /**< Number of buffers requested */
440 int request_size; /**< Desired size for buffers */
441 int *request_indices; /**< Buffer information */
443 int granted_count; /**< Number of buffers granted */
448 _DRM_CONTEXT_PRESERVED = 0x01,
449 _DRM_CONTEXT_2DONLY = 0x02
454 * DRM_IOCTL_ADD_CTX ioctl argument type.
456 * \sa drmCreateContext() and drmDestroyContext().
458 typedef struct drm_ctx {
459 drm_context_t handle;
460 drm_ctx_flags_t flags;
465 * DRM_IOCTL_RES_CTX ioctl argument type.
467 typedef struct drm_ctx_res {
474 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
476 typedef struct drm_draw {
477 drm_drawable_t handle;
482 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
484 typedef struct drm_auth {
490 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
492 * \sa drmGetInterruptFromBusID().
494 typedef struct drm_irq_busid {
495 int irq; /**< IRQ number */
496 int busnum; /**< bus number */
497 int devnum; /**< device number */
498 int funcnum; /**< function number */
503 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
504 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
505 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
506 } drm_vblank_seq_type_t;
509 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
512 struct drm_wait_vblank_request {
513 drm_vblank_seq_type_t type;
514 unsigned int sequence;
515 unsigned long signal;
519 struct drm_wait_vblank_reply {
520 drm_vblank_seq_type_t type;
521 unsigned int sequence;
528 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
530 * \sa drmWaitVBlank().
532 typedef union drm_wait_vblank {
533 struct drm_wait_vblank_request request;
534 struct drm_wait_vblank_reply reply;
539 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
541 * \sa drmAgpEnable().
543 typedef struct drm_agp_mode {
544 unsigned long mode; /**< AGP mode */
549 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
551 * \sa drmAgpAlloc() and drmAgpFree().
553 typedef struct drm_agp_buffer {
554 unsigned long size; /**< In bytes -- will round to page boundary */
555 unsigned long handle; /**< Used for binding / unbinding */
556 unsigned long type; /**< Type of memory to allocate */
557 unsigned long physical; /**< Physical used by i810 */
562 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
564 * \sa drmAgpBind() and drmAgpUnbind().
566 typedef struct drm_agp_binding {
567 unsigned long handle; /**< From drm_agp_buffer */
568 unsigned long offset; /**< In bytes -- will round to page boundary */
573 * DRM_IOCTL_AGP_INFO ioctl argument type.
575 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
576 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
577 * drmAgpVendorId() and drmAgpDeviceId().
579 typedef struct drm_agp_info {
580 int agp_version_major;
581 int agp_version_minor;
583 unsigned long aperture_base; /* physical address */
584 unsigned long aperture_size; /* bytes */
585 unsigned long memory_allowed; /* bytes */
586 unsigned long memory_used;
588 /* PCI information */
589 unsigned short id_vendor;
590 unsigned short id_device;
595 * DRM_IOCTL_SG_ALLOC ioctl argument type.
597 typedef struct drm_scatter_gather {
598 unsigned long size; /**< In bytes -- will round to page boundary */
599 unsigned long handle; /**< Used for mapping / unmapping */
600 } drm_scatter_gather_t;
603 * DRM_IOCTL_SET_VERSION ioctl argument type.
605 typedef struct drm_set_version {
613 #define DRM_IOCTL_BASE 'd'
614 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
615 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
616 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
617 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
619 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
620 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
621 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
622 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
623 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
624 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
625 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
626 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t)
628 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
629 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
630 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
631 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
632 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
633 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
634 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
635 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
636 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
637 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
638 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
640 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
642 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
643 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
645 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
646 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
647 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
648 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
649 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
650 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
651 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
652 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
653 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
654 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
655 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
656 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
657 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
659 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
660 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
661 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t)
662 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t)
663 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t)
664 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t)
665 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
666 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
668 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t)
669 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t)
671 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t)
674 * Device specific ioctls should only be in their respective headers
675 * The device specific ioctl range is from 0x40 to 0x79.
677 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
678 * drmCommandReadWrite().
680 #define DRM_COMMAND_BASE 0x40