sys/dev/drm/i915_dma.c

   1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
   2  *
   3  * $FreeBSD$
   4  */
   5 /**************************************************************************
   6  *
   7  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   8  * All Rights Reserved.
   9  *
  10  **************************************************************************/
  11
  12 #include "drmP.h"
  13 #include "drm.h"
  14 #include "i915_drm.h"
  15 #include "i915_drv.h"
  16
  17 /* Really want an OS-independent resettable timer.  Would like to have
  18  * this loop run for (eg) 3 sec, but have the timer reset every time
  19  * the head pointer changes, so that EBUSY only happens if the ring
  20  * actually stalls for (eg) 3 seconds.
  21  */
  22 int i915_wait_ring(drm_device_t * dev, int n, const char *caller)
  23 {
  24         drm_i915_private_t *dev_priv = dev->dev_private;
  25         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  26         u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  27         int i;
  28
  29         for (i = 0; i < 10000; i++) {
  30                 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  31                 ring->space = ring->head - (ring->tail + 8);
  32                 if (ring->space < 0)
  33                         ring->space += ring->Size;
  34                 if (ring->space >= n)
  35                         return 0;
  36
  37                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  38
  39                 if (ring->head != last_head)
  40                         i = 0;
  41
  42                 last_head = ring->head;
  43         }
  44
  45         return DRM_ERR(EBUSY);
  46 }
  47
  48 void i915_kernel_lost_context(drm_device_t * dev)
  49 {
  50         drm_i915_private_t *dev_priv = dev->dev_private;
  51         drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  52
  53         ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  54         ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  55         ring->space = ring->head - (ring->tail + 8);
  56         if (ring->space < 0)
  57                 ring->space += ring->Size;
  58
  59         if (ring->head == ring->tail)
  60                 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  61 }
  62
  63 static int i915_dma_cleanup(drm_device_t * dev)
  64 {
  65         /* Make sure interrupts are disabled here because the uninstall ioctl
  66          * may not have been called from userspace and after dev_private
  67          * is freed, it's too late.
  68          */
  69         if (dev->irq)
  70                 drm_irq_uninstall(dev);
  71
  72         if (dev->dev_private) {
  73                 drm_i915_private_t *dev_priv =
  74                     (drm_i915_private_t *) dev->dev_private;
  75
  76                 if (dev_priv->ring.virtual_start) {
  77                         drm_core_ioremapfree(&dev_priv->ring.map, dev);
  78                 }
  79
  80                 if (dev_priv->hw_status_page) {
  81                         drm_pci_free(dev, PAGE_SIZE, dev_priv->hw_status_page,
  82                                      dev_priv->dma_status_page);
  83                         /* Need to rewrite hardware status page */
  84                         I915_WRITE(0x02080, 0x1ffff000);
  85                 }
  86
  87                 drm_free(dev->dev_private, sizeof(drm_i915_private_t),
  88                          DRM_MEM_DRIVER);
  89
  90                 dev->dev_private = NULL;
  91         }
  92
  93         return 0;
  94 }
  95
  96 static int i915_initialize(drm_device_t * dev,
  97                            drm_i915_private_t * dev_priv,
  98                            drm_i915_init_t * init)
  99 {
 100         memset(dev_priv, 0, sizeof(drm_i915_private_t));
 101
 102         DRM_GETSAREA();
 103         if (!dev_priv->sarea) {
 104                 DRM_ERROR("can not find sarea!\n");
 105                 dev->dev_private = (void *)dev_priv;
 106                 i915_dma_cleanup(dev);
 107                 return DRM_ERR(EINVAL);
 108         }
 109
 110         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 111         if (!dev_priv->mmio_map) {
 112                 dev->dev_private = (void *)dev_priv;
 113                 i915_dma_cleanup(dev);
 114                 DRM_ERROR("can not find mmio map!\n");
 115                 return DRM_ERR(EINVAL);
 116         }
 117
 118         dev_priv->sarea_priv = (drm_i915_sarea_t *)
 119             ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
 120
 121         dev_priv->ring.Start = init->ring_start;
 122         dev_priv->ring.End = init->ring_end;
 123         dev_priv->ring.Size = init->ring_size;
 124         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 125
 126         dev_priv->ring.map.offset = init->ring_start;
 127         dev_priv->ring.map.size = init->ring_size;
 128         dev_priv->ring.map.type = 0;
 129         dev_priv->ring.map.flags = 0;
 130         dev_priv->ring.map.mtrr = 0;
 131
 132         drm_core_ioremap(&dev_priv->ring.map, dev);
 133
 134         if (dev_priv->ring.map.handle == NULL) {
 135                 dev->dev_private = (void *)dev_priv;
 136                 i915_dma_cleanup(dev);
 137                 DRM_ERROR("can not ioremap virtual address for"
 138                           " ring buffer\n");
 139                 return DRM_ERR(ENOMEM);
 140         }
 141
 142         dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
 143
 144         dev_priv->back_offset = init->back_offset;
 145         dev_priv->front_offset = init->front_offset;
 146         dev_priv->current_page = 0;
 147         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
 148
 149         /* We are using separate values as placeholders for mechanisms for
 150          * private backbuffer/depthbuffer usage.
 151          */
 152         dev_priv->use_mi_batchbuffer_start = 0;
 153
 154         /* Allow hardware batchbuffers unless told otherwise.
 155          */
 156         dev_priv->allow_batchbuffer = 1;
 157
 158         /* Program Hardware Status Page */
 159         dev_priv->hw_status_page = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,
 160             0xffffffff, &dev_priv->dma_status_page);
 161
 162         if (!dev_priv->hw_status_page) {
 163                 dev->dev_private = (void *)dev_priv;
 164                 i915_dma_cleanup(dev);
 165                 DRM_ERROR("Can not allocate hardware status page\n");
 166                 return DRM_ERR(ENOMEM);
 167         }
 168         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 169         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 170
 171         I915_WRITE(0x02080, dev_priv->dma_status_page);
 172         DRM_DEBUG("Enabled hardware status page\n");
 173
 174         dev->dev_private = (void *)dev_priv;
 175
 176         return 0;
 177 }
 178
 179 static int i915_dma_resume(drm_device_t * dev)
 180 {
 181         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 182
 183         DRM_DEBUG("%s\n", __FUNCTION__);
 184
 185         if (!dev_priv->sarea) {
 186                 DRM_ERROR("can not find sarea!\n");
 187                 return DRM_ERR(EINVAL);
 188         }
 189
 190         if (!dev_priv->mmio_map) {
 191                 DRM_ERROR("can not find mmio map!\n");
 192                 return DRM_ERR(EINVAL);
 193         }
 194
 195         if (dev_priv->ring.map.handle == NULL) {
 196                 DRM_ERROR("can not ioremap virtual address for"
 197                           " ring buffer\n");
 198                 return DRM_ERR(ENOMEM);
 199         }
 200
 201         /* Program Hardware Status Page */
 202         if (!dev_priv->hw_status_page) {
 203                 DRM_ERROR("Can not find hardware status page\n");
 204                 return DRM_ERR(EINVAL);
 205         }
 206         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 207
 208         I915_WRITE(0x02080, dev_priv->dma_status_page);
 209         DRM_DEBUG("Enabled hardware status page\n");
 210
 211         return 0;
 212 }
 213
 214 static int i915_dma_init(DRM_IOCTL_ARGS)
 215 {
 216         DRM_DEVICE;
 217         drm_i915_private_t *dev_priv;
 218         drm_i915_init_t init;
 219         int retcode = 0;
 220
 221         DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data,
 222                                  sizeof(init));
 223
 224         switch (init.func) {
 225         case I915_INIT_DMA:
 226                 dev_priv = drm_alloc(sizeof(drm_i915_private_t),
 227                                      DRM_MEM_DRIVER);
 228                 if (dev_priv == NULL)
 229                         return DRM_ERR(ENOMEM);
 230                 retcode = i915_initialize(dev, dev_priv, &init);
 231                 break;
 232         case I915_CLEANUP_DMA:
 233                 retcode = i915_dma_cleanup(dev);
 234                 break;
 235         case I915_RESUME_DMA:
 236                 retcode = i915_dma_resume(dev);
 237                 break;
 238         default:
 239                 retcode = -EINVAL;
 240                 break;
 241         }
 242
 243         return retcode;
 244 }
 245
 246 /* Implement basically the same security restrictions as hardware does
 247  * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 248  *
 249  * Most of the calculations below involve calculating the size of a
 250  * particular instruction.  It's important to get the size right as
 251  * that tells us where the next instruction to check is.  Any illegal
 252  * instruction detected will be given a size of zero, which is a
 253  * signal to abort the rest of the buffer.
 254  */
 255 static int do_validate_cmd(int cmd)
 256 {
 257         switch (((cmd >> 29) & 0x7)) {
 258         case 0x0:
 259                 switch ((cmd >> 23) & 0x3f) {
 260                 case 0x0:
 261                         return 1;       /* MI_NOOP */
 262                 case 0x4:
 263                         return 1;       /* MI_FLUSH */
 264                 default:
 265                         return 0;       /* disallow everything else */
 266                 }
 267                 break;
 268         case 0x1:
 269                 return 0;       /* reserved */
 270         case 0x2:
 271                 return (cmd & 0xff) + 2;        /* 2d commands */
 272         case 0x3:
 273                 if (((cmd >> 24) & 0x1f) <= 0x18)
 274                         return 1;
 275
 276                 switch ((cmd >> 24) & 0x1f) {
 277                 case 0x1c:
 278                         return 1;
 279                 case 0x1d:
 280                         switch ((cmd >> 16) & 0xff) {
 281                         case 0x3:
 282                                 return (cmd & 0x1f) + 2;
 283                         case 0x4:
 284                                 return (cmd & 0xf) + 2;
 285                         default:
 286                                 return (cmd & 0xffff) + 2;
 287                         }
 288                 case 0x1e:
 289                         if (cmd & (1 << 23))
 290                                 return (cmd & 0xffff) + 1;
 291                         else
 292                                 return 1;
 293                 case 0x1f:
 294                         if ((cmd & (1 << 23)) == 0)     /* inline vertices */
 295                                 return (cmd & 0x1ffff) + 2;
 296                         else if (cmd & (1 << 17))       /* indirect random */
 297                                 if ((cmd & 0xffff) == 0)
 298                                         return 0;       /* unknown length, too hard */
 299                                 else
 300                                         return (((cmd & 0xffff) + 1) / 2) + 1;
 301                         else
 302                                 return 2;       /* indirect sequential */
 303                 default:
 304                         return 0;
 305                 }
 306         default:
 307                 return 0;
 308         }
 309
 310         return 0;
 311 }
 312
 313 static int validate_cmd(int cmd)
 314 {
 315         int ret = do_validate_cmd(cmd);
 316
 317 /*      printk("validate_cmd( %x ): %d\n", cmd, ret); */
 318
 319         return ret;
 320 }
 321
 322 static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
 323 {
 324         drm_i915_private_t *dev_priv = dev->dev_private;
 325         int i;
 326         RING_LOCALS;
 327
 328         for (i = 0; i < dwords;) {
 329                 int cmd, sz;
 330
 331                 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
 332                         return DRM_ERR(EINVAL);
 333
 334 /*              printk("%d/%d ", i, dwords); */
 335
 336                 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
 337                         return DRM_ERR(EINVAL);
 338
 339                 BEGIN_LP_RING(sz);
 340                 OUT_RING(cmd);
 341
 342                 while (++i, --sz) {
 343                         if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
 344                                                          sizeof(cmd))) {
 345                                 return DRM_ERR(EINVAL);
 346                         }
 347                         OUT_RING(cmd);
 348                 }
 349                 ADVANCE_LP_RING();
 350         }
 351
 352         return 0;
 353 }
 354
 355 static int i915_emit_box(drm_device_t * dev,
 356                          drm_clip_rect_t __user * boxes,
 357                          int i, int DR1, int DR4)
 358 {
 359         drm_i915_private_t *dev_priv = dev->dev_private;
 360         drm_clip_rect_t box;
 361         RING_LOCALS;
 362
 363         if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
 364                 return EFAULT;
 365         }
 366
 367         if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
 368                 DRM_ERROR("Bad box %d,%d..%d,%d\n",
 369                           box.x1, box.y1, box.x2, box.y2);
 370                 return DRM_ERR(EINVAL);
 371         }
 372
 373         BEGIN_LP_RING(6);
 374         OUT_RING(GFX_OP_DRAWRECT_INFO);
 375         OUT_RING(DR1);
 376         OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
 377         OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
 378         OUT_RING(DR4);
 379         OUT_RING(0);
 380         ADVANCE_LP_RING();
 381
 382         return 0;
 383 }
 384
 385 static int i915_dispatch_cmdbuffer(drm_device_t * dev,
 386                                    drm_i915_cmdbuffer_t * cmd)
 387 {
 388         int nbox = cmd->num_cliprects;
 389         int i = 0, count, ret;
 390
 391         if (cmd->sz & 0x3) {
 392                 DRM_ERROR("alignment");
 393                 return DRM_ERR(EINVAL);
 394         }
 395
 396         i915_kernel_lost_context(dev);
 397
 398         count = nbox ? nbox : 1;
 399
 400         for (i = 0; i < count; i++) {
 401                 if (i < nbox) {
 402                         ret = i915_emit_box(dev, cmd->cliprects, i,
 403                                             cmd->DR1, cmd->DR4);
 404                         if (ret)
 405                                 return ret;
 406                 }
 407
 408                 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
 409                 if (ret)
 410                         return ret;
 411         }
 412
 413         return 0;
 414 }
 415
 416 static int i915_dispatch_batchbuffer(drm_device_t * dev,
 417                                      drm_i915_batchbuffer_t * batch)
 418 {
 419         drm_i915_private_t *dev_priv = dev->dev_private;
 420         drm_clip_rect_t __user *boxes = batch->cliprects;
 421         int nbox = batch->num_cliprects;
 422         int i = 0, count;
 423         RING_LOCALS;
 424
 425         if ((batch->start | batch->used) & 0x7) {
 426                 DRM_ERROR("alignment");
 427                 return DRM_ERR(EINVAL);
 428         }
 429
 430         i915_kernel_lost_context(dev);
 431
 432         count = nbox ? nbox : 1;
 433
 434         for (i = 0; i < count; i++) {
 435                 if (i < nbox) {
 436                         int ret = i915_emit_box(dev, boxes, i,
 437                                                 batch->DR1, batch->DR4);
 438                         if (ret)
 439                                 return ret;
 440                 }
 441
 442                 if (dev_priv->use_mi_batchbuffer_start) {
 443                         BEGIN_LP_RING(2);
 444                         OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
 445                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 446                         ADVANCE_LP_RING();
 447                 } else {
 448                         BEGIN_LP_RING(4);
 449                         OUT_RING(MI_BATCH_BUFFER);
 450                         OUT_RING(batch->start | MI_BATCH_NON_SECURE);
 451                         OUT_RING(batch->start + batch->used - 4);
 452                         OUT_RING(0);
 453                         ADVANCE_LP_RING();
 454                 }
 455         }
 456
 457         dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
 458
 459         BEGIN_LP_RING(4);
 460         OUT_RING(CMD_STORE_DWORD_IDX);
 461         OUT_RING(20);
 462         OUT_RING(dev_priv->counter);
 463         OUT_RING(0);
 464         ADVANCE_LP_RING();
 465
 466         return 0;
 467 }
 468
 469 static int i915_dispatch_flip(drm_device_t * dev)
 470 {
 471         drm_i915_private_t *dev_priv = dev->dev_private;
 472         RING_LOCALS;
 473
 474         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
 475                   __FUNCTION__,
 476                   dev_priv->current_page,
 477                   dev_priv->sarea_priv->pf_current_page);
 478
 479         i915_kernel_lost_context(dev);
 480
 481         BEGIN_LP_RING(2);
 482         OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
 483         OUT_RING(0);
 484         ADVANCE_LP_RING();
 485
 486         BEGIN_LP_RING(6);
 487         OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
 488         OUT_RING(0);
 489         if (dev_priv->current_page == 0) {
 490                 OUT_RING(dev_priv->back_offset);
 491                 dev_priv->current_page = 1;
 492         } else {
 493                 OUT_RING(dev_priv->front_offset);
 494                 dev_priv->current_page = 0;
 495         }
 496         OUT_RING(0);
 497         ADVANCE_LP_RING();
 498
 499         BEGIN_LP_RING(2);
 500         OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
 501         OUT_RING(0);
 502         ADVANCE_LP_RING();
 503
 504         dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
 505
 506         BEGIN_LP_RING(4);
 507         OUT_RING(CMD_STORE_DWORD_IDX);
 508         OUT_RING(20);
 509         OUT_RING(dev_priv->counter);
 510         OUT_RING(0);
 511         ADVANCE_LP_RING();
 512
 513         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
 514         return 0;
 515 }
 516
 517 static int i915_quiescent(drm_device_t * dev)
 518 {
 519         drm_i915_private_t *dev_priv = dev->dev_private;
 520
 521         i915_kernel_lost_context(dev);
 522         return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
 523 }
 524
 525 static int i915_flush_ioctl(DRM_IOCTL_ARGS)
 526 {
 527         DRM_DEVICE;
 528
 529         LOCK_TEST_WITH_RETURN(dev, filp);
 530
 531         return i915_quiescent(dev);
 532 }
 533
 534 static int i915_batchbuffer(DRM_IOCTL_ARGS)
 535 {
 536         DRM_DEVICE;
 537         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 538         u32 *hw_status = dev_priv->hw_status_page;
 539         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 540             dev_priv->sarea_priv;
 541         drm_i915_batchbuffer_t batch;
 542         int ret;
 543
 544         if (!dev_priv->allow_batchbuffer) {
 545                 DRM_ERROR("Batchbuffer ioctl disabled\n");
 546                 return DRM_ERR(EINVAL);
 547         }
 548
 549         DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data,
 550                                  sizeof(batch));
 551
 552         DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
 553                   batch.start, batch.used, batch.num_cliprects);
 554
 555         LOCK_TEST_WITH_RETURN(dev, filp);
 556
 557         if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects,
 558                                                        batch.num_cliprects *
 559                                                        sizeof(drm_clip_rect_t)))
 560                 return DRM_ERR(EFAULT);
 561
 562         ret = i915_dispatch_batchbuffer(dev, &batch);
 563
 564         sarea_priv->last_dispatch = (int)hw_status[5];
 565         return ret;
 566 }
 567
 568 static int i915_cmdbuffer(DRM_IOCTL_ARGS)
 569 {
 570         DRM_DEVICE;
 571         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 572         u32 *hw_status = dev_priv->hw_status_page;
 573         drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
 574             dev_priv->sarea_priv;
 575         drm_i915_cmdbuffer_t cmdbuf;
 576         int ret;
 577
 578         DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data,
 579                                  sizeof(cmdbuf));
 580
 581         DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
 582                   cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects);
 583
 584         LOCK_TEST_WITH_RETURN(dev, filp);
 585
 586         if (cmdbuf.num_cliprects &&
 587             DRM_VERIFYAREA_READ(cmdbuf.cliprects,
 588                                 cmdbuf.num_cliprects *
 589                                 sizeof(drm_clip_rect_t))) {
 590                 DRM_ERROR("Fault accessing cliprects\n");
 591                 return DRM_ERR(EFAULT);
 592         }
 593
 594         ret = i915_dispatch_cmdbuffer(dev, &cmdbuf);
 595         if (ret) {
 596                 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
 597                 return ret;
 598         }
 599
 600         sarea_priv->last_dispatch = (int)hw_status[5];
 601         return 0;
 602 }
 603
 604 static int i915_do_cleanup_pageflip(drm_device_t * dev)
 605 {
 606         drm_i915_private_t *dev_priv = dev->dev_private;
 607
 608         DRM_DEBUG("%s\n", __FUNCTION__);
 609         if (dev_priv->current_page != 0)
 610                 i915_dispatch_flip(dev);
 611
 612         return 0;
 613 }
 614
 615 static int i915_flip_bufs(DRM_IOCTL_ARGS)
 616 {
 617         DRM_DEVICE;
 618
 619         DRM_DEBUG("%s\n", __FUNCTION__);
 620
 621         LOCK_TEST_WITH_RETURN(dev, filp);
 622
 623         return i915_dispatch_flip(dev);
 624 }
 625
 626 static int i915_getparam(DRM_IOCTL_ARGS)
 627 {
 628         DRM_DEVICE;
 629         drm_i915_private_t *dev_priv = dev->dev_private;
 630         drm_i915_getparam_t param;
 631         int value;
 632
 633         if (!dev_priv) {
 634                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 635                 return DRM_ERR(EINVAL);
 636         }
 637
 638         DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data,
 639                                  sizeof(param));
 640
 641         switch (param.param) {
 642         case I915_PARAM_IRQ_ACTIVE:
 643                 value = dev->irq ? 1 : 0;
 644                 break;
 645         case I915_PARAM_ALLOW_BATCHBUFFER:
 646                 value = dev_priv->allow_batchbuffer ? 1 : 0;
 647                 break;
 648         default:
 649                 DRM_ERROR("Unkown parameter %d\n", param.param);
 650                 return DRM_ERR(EINVAL);
 651         }
 652
 653         if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
 654                 DRM_ERROR("DRM_COPY_TO_USER failed\n");
 655                 return DRM_ERR(EFAULT);
 656         }
 657
 658         return 0;
 659 }
 660
 661 static int i915_setparam(DRM_IOCTL_ARGS)
 662 {
 663         DRM_DEVICE;
 664         drm_i915_private_t *dev_priv = dev->dev_private;
 665         drm_i915_setparam_t param;
 666
 667         if (!dev_priv) {
 668                 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 669                 return DRM_ERR(EINVAL);
 670         }
 671
 672         DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data,
 673                                  sizeof(param));
 674
 675         switch (param.param) {
 676         case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
 677                 dev_priv->use_mi_batchbuffer_start = param.value;
 678                 break;
 679         case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
 680                 dev_priv->tex_lru_log_granularity = param.value;
 681                 break;
 682         case I915_SETPARAM_ALLOW_BATCHBUFFER:
 683                 dev_priv->allow_batchbuffer = param.value;
 684                 break;
 685         default:
 686                 DRM_ERROR("unknown parameter %d\n", param.param);
 687                 return DRM_ERR(EINVAL);
 688         }
 689
 690         return 0;
 691 }
 692
 693 void i915_driver_pretakedown(drm_device_t * dev)
 694 {
 695         if (dev->dev_private) {
 696                 drm_i915_private_t *dev_priv = dev->dev_private;
 697                 i915_mem_takedown(&(dev_priv->agp_heap));
 698         }
 699         i915_dma_cleanup(dev);
 700 }
 701
 702 void i915_driver_prerelease(drm_device_t * dev, DRMFILE filp)
 703 {
 704         if (dev->dev_private) {
 705                 drm_i915_private_t *dev_priv = dev->dev_private;
 706                 if (dev_priv->page_flipping) {
 707                         i915_do_cleanup_pageflip(dev);
 708                 }
 709                 i915_mem_release(dev, filp, dev_priv->agp_heap);
 710         }
 711 }
 712
 713 drm_ioctl_desc_t i915_ioctls[] = {
 714         [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1},
 715         [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0},
 716         [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0},
 717         [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0},
 718         [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0},
 719         [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0},
 720         [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0},
 721         [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1},
 722         [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0},
 723         [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0},
 724         [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1},
 725         [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0}
 726 };
 727
 728 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);