]> CyberLeo.Net >> Repos - FreeBSD/FreeBSD.git/blob - sys/dev/drm/savage_drm.h
This commit was generated by cvs2svn to compensate for changes in r147001,
[FreeBSD/FreeBSD.git] / sys / dev / drm / savage_drm.h
1 /* savage_drm.h -- Public header for the savage driver
2  *
3  * Copyright 2004  Felix Kuehling
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sub license,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the
14  * next paragraph) shall be included in all copies or substantial portions
15  * of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20  * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
21  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
22  * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  *
25  * $FreeBSD$
26  */
27
28 #ifndef __SAVAGE_DRM_H__
29 #define __SAVAGE_DRM_H__
30
31 #ifndef __SAVAGE_SAREA_DEFINES__
32 #define __SAVAGE_SAREA_DEFINES__
33
34 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128
35  * regions, subject to a minimum region size of (1<<16) == 64k.
36  *
37  * Clients may subdivide regions internally, but when sharing between
38  * clients, the region size is the minimum granularity.
39  */
40
41 #define SAVAGE_CARD_HEAP                0
42 #define SAVAGE_AGP_HEAP                 1
43 #define SAVAGE_NR_TEX_HEAPS             2
44 #define SAVAGE_NR_TEX_REGIONS           16
45 #define SAVAGE_LOG_MIN_TEX_REGION_SIZE  16
46
47 #endif /* __SAVAGE_SAREA_DEFINES__ */
48
49 typedef struct _drm_savage_sarea {
50         /* LRU lists for texture memory in agp space and on the card.
51          */
52         drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1];
53         unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
54
55         /* Mechanism to validate card state.
56          */
57         int ctxOwner;
58 } drm_savage_sarea_t, *drm_savage_sarea_ptr;
59
60 /* Savage-specific ioctls
61  */
62 #define DRM_SAVAGE_BCI_INIT             0x00
63 #define DRM_SAVAGE_BCI_CMDBUF           0x01
64 #define DRM_SAVAGE_BCI_EVENT_EMIT       0x02
65 #define DRM_SAVAGE_BCI_EVENT_WAIT       0x03
66
67 #define DRM_IOCTL_SAVAGE_INIT           DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
68 #define DRM_IOCTL_SAVAGE_CMDBUF         DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
69 #define DRM_IOCTL_SAVAGE_EVENT_EMIT     DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
70 #define DRM_IOCTL_SAVAGE_EVENT_WAIT     DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
71
72 #define SAVAGE_DMA_PCI  1
73 #define SAVAGE_DMA_AGP  3
74 typedef struct drm_savage_init {
75         enum {
76                 SAVAGE_INIT_BCI = 1,
77                 SAVAGE_CLEANUP_BCI = 2
78         } func;
79         unsigned int sarea_priv_offset;
80
81         /* some parameters */
82         unsigned int cob_size;
83         unsigned int bci_threshold_lo, bci_threshold_hi;
84         unsigned int dma_type;
85
86         /* frame buffer layout */
87         unsigned int fb_bpp;
88         unsigned int front_offset, front_pitch;
89         unsigned int back_offset, back_pitch;
90         unsigned int depth_bpp;
91         unsigned int depth_offset, depth_pitch;
92
93         /* local textures */
94         unsigned int texture_offset;
95         unsigned int texture_size;
96
97         /* physical locations of non-permanent maps */
98         unsigned long status_offset;
99         unsigned long buffers_offset;
100         unsigned long agp_textures_offset;
101         unsigned long cmd_dma_offset;
102 } drm_savage_init_t;
103
104 typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
105 typedef struct drm_savage_cmdbuf {
106                                 /* command buffer in client's address space */
107         drm_savage_cmd_header_t __user *cmd_addr;
108         unsigned int size;      /* size of the command buffer in 64bit units */
109
110         unsigned int dma_idx;   /* DMA buffer index to use */
111         int discard;            /* discard DMA buffer when done */
112                                 /* vertex buffer in client's address space */
113         unsigned int __user *vb_addr;
114         unsigned int vb_size;   /* size of client vertex buffer in bytes */
115         unsigned int vb_stride; /* stride of vertices in 32bit words */
116                                 /* boxes in client's address space */
117         drm_clip_rect_t __user *box_addr;
118         unsigned int nbox;      /* number of clipping boxes */
119 } drm_savage_cmdbuf_t;
120
121 #define SAVAGE_WAIT_2D  0x1 /* wait for 2D idle before updating event tag */
122 #define SAVAGE_WAIT_3D  0x2 /* wait for 3D idle before updating event tag */
123 #define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
124 typedef struct drm_savage_event {
125         unsigned int count;
126         unsigned int flags;
127 } drm_savage_event_emit_t, drm_savage_event_wait_t;
128
129 /* Commands for the cmdbuf ioctl
130  */
131 #define SAVAGE_CMD_STATE        0  /* a range of state registers */
132 #define SAVAGE_CMD_DMA_PRIM     1  /* vertices from DMA buffer */
133 #define SAVAGE_CMD_VB_PRIM      2  /* vertices from client vertex buffer */
134 #define SAVAGE_CMD_DMA_IDX      3  /* indexed vertices from DMA buffer */
135 #define SAVAGE_CMD_VB_IDX       4  /* indexed vertices client vertex buffer */
136 #define SAVAGE_CMD_CLEAR        5  /* clear buffers */
137 #define SAVAGE_CMD_SWAP         6  /* swap buffers */
138
139 /* Primitive types
140 */
141 #define SAVAGE_PRIM_TRILIST     0  /* triangle list */
142 #define SAVAGE_PRIM_TRISTRIP    1  /* triangle strip */
143 #define SAVAGE_PRIM_TRIFAN      2  /* triangle fan */
144 #define SAVAGE_PRIM_TRILIST_201 3  /* reorder verts for correct flat
145                                     * shading on s3d */
146
147 /* Skip flags (vertex format)
148  */
149 #define SAVAGE_SKIP_Z           0x01
150 #define SAVAGE_SKIP_W           0x02
151 #define SAVAGE_SKIP_C0          0x04
152 #define SAVAGE_SKIP_C1          0x08
153 #define SAVAGE_SKIP_S0          0x10
154 #define SAVAGE_SKIP_T0          0x20
155 #define SAVAGE_SKIP_ST0         0x30
156 #define SAVAGE_SKIP_S1          0x40
157 #define SAVAGE_SKIP_T1          0x80
158 #define SAVAGE_SKIP_ST1         0xc0
159 #define SAVAGE_SKIP_ALL_S3D     0x3f
160 #define SAVAGE_SKIP_ALL_S4      0xff
161
162 /* Buffer names for clear command
163  */
164 #define SAVAGE_FRONT            0x1
165 #define SAVAGE_BACK             0x2
166 #define SAVAGE_DEPTH            0x4
167
168 /* 64-bit command header
169  */
170 union drm_savage_cmd_header {
171         struct {
172                 unsigned char cmd;      /* command */
173                 unsigned char pad0;
174                 unsigned short pad1;
175                 unsigned short pad2;
176                 unsigned short pad3;
177         } cmd; /* generic */
178         struct {
179                 unsigned char cmd;
180                 unsigned char global;   /* need idle engine? */
181                 unsigned short count;   /* number of consecutive registers */
182                 unsigned short start;   /* first register */
183                 unsigned short pad3;
184         } state; /* SAVAGE_CMD_STATE */
185         struct {
186                 unsigned char cmd;
187                 unsigned char prim;     /* primitive type */
188                 unsigned short skip;    /* vertex format (skip flags) */
189                 unsigned short count;   /* number of vertices */
190                 unsigned short start;   /* first vertex in DMA/vertex buffer */
191         } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
192         struct {
193                 unsigned char cmd;
194                 unsigned char prim;
195                 unsigned short skip;
196                 unsigned short count;   /* number of indices that follow */
197                 unsigned short pad3;
198         } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
199         struct {
200                 unsigned char cmd;
201                 unsigned char pad0;
202                 unsigned short pad1;
203                 unsigned int flags;
204         } clear0; /* SAVAGE_CMD_CLEAR */
205         struct {
206                 unsigned int mask;
207                 unsigned int value;
208         } clear1; /* SAVAGE_CMD_CLEAR data */
209 };
210
211 #endif